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b8a7cf8e SA |
1 | /* |
2 | * mailbox-omap.h | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #ifndef _PLAT_MAILBOX_H | |
17 | #define _PLAT_MAILBOX_H | |
18 | ||
19 | /* Interrupt register configuration types */ | |
20 | #define MBOX_INTR_CFG_TYPE1 (0) | |
21 | #define MBOX_INTR_CFG_TYPE2 (1) | |
22 | ||
23 | /** | |
24 | * struct omap_mbox_dev_info - OMAP mailbox device attribute info | |
25 | * @name: name of the mailbox device | |
26 | * @tx_id: mailbox queue id used for transmitting messages | |
27 | * @rx_id: mailbox queue id on which messages are received | |
28 | * @irq_id: irq identifier number to use from the hwmod data | |
29 | * @usr_id: mailbox user id for identifying the interrupt into | |
30 | * the MPU interrupt controller. | |
31 | */ | |
32 | struct omap_mbox_dev_info { | |
33 | const char *name; | |
34 | u32 tx_id; | |
35 | u32 rx_id; | |
36 | u32 irq_id; | |
37 | u32 usr_id; | |
38 | }; | |
39 | ||
40 | /** | |
41 | * struct omap_mbox_pdata - OMAP mailbox platform data | |
42 | * @intr_type: type of interrupt configuration registers used | |
43 | while programming mailbox queue interrupts | |
fe32c1f6 SA |
44 | * @num_users: number of users (processor devices) that the mailbox |
45 | * h/w block can interrupt | |
46 | * @num_fifos: number of h/w fifos within the mailbox h/w block | |
b8a7cf8e SA |
47 | * @info_cnt: number of mailbox devices for the platform |
48 | * @info: array of mailbox device attributes | |
49 | */ | |
50 | struct omap_mbox_pdata { | |
51 | u32 intr_type; | |
fe32c1f6 SA |
52 | u32 num_users; |
53 | u32 num_fifos; | |
b8a7cf8e SA |
54 | u32 info_cnt; |
55 | struct omap_mbox_dev_info *info; | |
56 | }; | |
57 | ||
58 | #endif /* _PLAT_MAILBOX_H */ |