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e9a03add SZ |
1 | /* |
2 | * Pinctrl Driver for ADI GPIO2 controller | |
3 | * | |
4 | * Copyright 2007-2013 Analog Devices Inc. | |
5 | * | |
6 | * Licensed under the GPLv2 or later | |
7 | */ | |
8 | ||
9 | ||
10 | #ifndef PINCTRL_ADI2_H | |
11 | #define PINCTRL_ADI2_H | |
12 | ||
13 | #include <linux/io.h> | |
14 | #include <linux/platform_device.h> | |
15 | ||
16 | /** | |
17 | * struct adi_pinctrl_gpio_platform_data - Pinctrl gpio platform data | |
18 | * for ADI GPIO2 device. | |
19 | * | |
20 | * @port_gpio_base: Optional global GPIO index of the GPIO bank. | |
21 | * 0 means driver decides. | |
22 | * @port_pin_base: Pin index of the pin controller device. | |
23 | * @port_width: PIN number of the GPIO bank device | |
24 | * @pint_id: GPIO PINT device id that this GPIO bank should map to. | |
25 | * @pint_assign: The 32-bit GPIO PINT registers can be divided into 2 parts. A | |
26 | * GPIO bank can be mapped into either low 16 bits[0] or high 16 | |
27 | * bits[1] of each PINT register. | |
28 | * @pint_map: GIOP bank mapping code in PINT device | |
29 | */ | |
30 | struct adi_pinctrl_gpio_platform_data { | |
31 | unsigned int port_gpio_base; | |
32 | unsigned int port_pin_base; | |
33 | unsigned int port_width; | |
34 | u8 pinctrl_id; | |
35 | u8 pint_id; | |
36 | bool pint_assign; | |
37 | u8 pint_map; | |
38 | }; | |
39 | ||
40 | #endif |