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1 | #ifndef __LINUX_REGMAP_H |
2 | #define __LINUX_REGMAP_H | |
3 | ||
4 | /* | |
5 | * Register map access API | |
6 | * | |
7 | * Copyright 2011 Wolfson Microelectronics plc | |
8 | * | |
9 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
b83a313b | 16 | #include <linux/list.h> |
6863ca62 | 17 | #include <linux/rbtree.h> |
49ccc142 | 18 | #include <linux/err.h> |
3f0fa9a8 | 19 | #include <linux/bug.h> |
b83a313b | 20 | |
de477254 | 21 | struct module; |
313162d0 | 22 | struct device; |
9943fa30 | 23 | struct i2c_client; |
90f790d2 | 24 | struct irq_domain; |
a676f083 | 25 | struct spi_device; |
a01779f8 | 26 | struct spmi_device; |
b83d2ff0 | 27 | struct regmap; |
6863ca62 | 28 | struct regmap_range_cfg; |
67252287 | 29 | struct regmap_field; |
9943fa30 | 30 | |
9fabe24e DP |
31 | /* An enum of all the supported cache types */ |
32 | enum regcache_type { | |
33 | REGCACHE_NONE, | |
28644c80 | 34 | REGCACHE_RBTREE, |
2ac902ce MB |
35 | REGCACHE_COMPRESSED, |
36 | REGCACHE_FLAT, | |
9fabe24e DP |
37 | }; |
38 | ||
bd20eb54 MB |
39 | /** |
40 | * Default value for a register. We use an array of structs rather | |
41 | * than a simple array as many modern devices have very sparse | |
42 | * register maps. | |
43 | * | |
44 | * @reg: Register address. | |
45 | * @def: Register default value. | |
46 | */ | |
47 | struct reg_default { | |
48 | unsigned int reg; | |
49 | unsigned int def; | |
50 | }; | |
51 | ||
b83d2ff0 MB |
52 | #ifdef CONFIG_REGMAP |
53 | ||
141eba2e SW |
54 | enum regmap_endian { |
55 | /* Unspecified -> 0 -> Backwards compatible default */ | |
56 | REGMAP_ENDIAN_DEFAULT = 0, | |
57 | REGMAP_ENDIAN_BIG, | |
58 | REGMAP_ENDIAN_LITTLE, | |
59 | REGMAP_ENDIAN_NATIVE, | |
60 | }; | |
61 | ||
76aad392 DC |
62 | /** |
63 | * A register range, used for access related checks | |
64 | * (readable/writeable/volatile/precious checks) | |
65 | * | |
66 | * @range_min: address of first register | |
67 | * @range_max: address of last register | |
68 | */ | |
69 | struct regmap_range { | |
70 | unsigned int range_min; | |
71 | unsigned int range_max; | |
72 | }; | |
73 | ||
6112fe60 LD |
74 | #define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } |
75 | ||
76aad392 DC |
76 | /* |
77 | * A table of ranges including some yes ranges and some no ranges. | |
78 | * If a register belongs to a no_range, the corresponding check function | |
79 | * will return false. If a register belongs to a yes range, the corresponding | |
80 | * check function will return true. "no_ranges" are searched first. | |
81 | * | |
82 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
83 | * @n_yes_ranges: size of the above array | |
84 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
85 | * @n_no_ranges: size of the above array | |
86 | */ | |
87 | struct regmap_access_table { | |
88 | const struct regmap_range *yes_ranges; | |
89 | unsigned int n_yes_ranges; | |
90 | const struct regmap_range *no_ranges; | |
91 | unsigned int n_no_ranges; | |
92 | }; | |
93 | ||
0d4529c5 DC |
94 | typedef void (*regmap_lock)(void *); |
95 | typedef void (*regmap_unlock)(void *); | |
96 | ||
dd898b20 MB |
97 | /** |
98 | * Configuration for the register map of a device. | |
99 | * | |
d3c242e1 SW |
100 | * @name: Optional name of the regmap. Useful when a device has multiple |
101 | * register regions. | |
102 | * | |
dd898b20 | 103 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
104 | * @reg_stride: The register address stride. Valid register addresses are a |
105 | * multiple of this value. If set to 0, a value of 1 will be | |
106 | * used. | |
82159ba8 | 107 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 108 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 109 | * |
3566cc9d | 110 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
111 | * can be written to. If this field is NULL but wr_table |
112 | * (see below) is not, the check is performed on such table | |
113 | * (a register is writeable if it belongs to one of the ranges | |
114 | * specified by wr_table). | |
3566cc9d | 115 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
116 | * can be read from. If this field is NULL but rd_table |
117 | * (see below) is not, the check is performed on such table | |
118 | * (a register is readable if it belongs to one of the ranges | |
119 | * specified by rd_table). | |
3566cc9d | 120 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
121 | * value can't be cached. If this field is NULL but |
122 | * volatile_table (see below) is not, the check is performed on | |
123 | * such table (a register is volatile if it belongs to one of | |
124 | * the ranges specified by volatile_table). | |
bdc39644 | 125 | * @precious_reg: Optional callback returning true if the register |
76aad392 | 126 | * should not be read outside of a call from the driver |
bdc39644 | 127 | * (e.g., a clear on read interrupt status register). If this |
76aad392 DC |
128 | * field is NULL but precious_table (see below) is not, the |
129 | * check is performed on such table (a register is precious if | |
130 | * it belongs to one of the ranges specified by precious_table). | |
131 | * @lock: Optional lock callback (overrides regmap's default lock | |
132 | * function, based on spinlock or mutex). | |
133 | * @unlock: As above for unlocking. | |
134 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
135 | * functions (ignored in case regular lock/unlock functions | |
136 | * are not overridden). | |
d2a5884a AS |
137 | * @reg_read: Optional callback that if filled will be used to perform |
138 | * all the reads from the registers. Should only be provided for | |
bdc39644 LP |
139 | * devices whose read operation cannot be represented as a simple |
140 | * read operation on a bus such as SPI, I2C, etc. Most of the | |
141 | * devices do not need this. | |
d2a5884a AS |
142 | * @reg_write: Same as above for writing. |
143 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex | |
144 | * to perform locking. This field is ignored if custom lock/unlock | |
145 | * functions are used (see fields lock/unlock of struct regmap_config). | |
146 | * This field is a duplicate of a similar file in | |
147 | * 'struct regmap_bus' and serves exact same purpose. | |
148 | * Use it only for "no-bus" cases. | |
bd20eb54 | 149 | * @max_register: Optional, specifies the maximum valid register index. |
76aad392 DC |
150 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
151 | * valid ranges for write access. | |
152 | * @rd_table: As above, for read access. | |
153 | * @volatile_table: As above, for volatile registers. | |
154 | * @precious_table: As above, for precious registers. | |
bd20eb54 MB |
155 | * @reg_defaults: Power on reset values for registers (for use with |
156 | * register cache support). | |
157 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 LPC |
158 | * |
159 | * @read_flag_mask: Mask to be set in the top byte of the register when doing | |
160 | * a read. | |
161 | * @write_flag_mask: Mask to be set in the top byte of the register when doing | |
162 | * a write. If both read_flag_mask and write_flag_mask are | |
163 | * empty the regmap_bus default masks are used. | |
2e33caf1 AJ |
164 | * @use_single_rw: If set, converts the bulk read and write operations into |
165 | * a series of single read and write operations. This is useful | |
166 | * for device that does not support bulk read and write. | |
e894c3f4 OAO |
167 | * @can_multi_write: If set, the device supports the multi write mode of bulk |
168 | * write operations, if clear multi write requests will be | |
169 | * split into individual write operations | |
9fabe24e DP |
170 | * |
171 | * @cache_type: The actual cache type. | |
172 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
173 | * register cache support). | |
174 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
175 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
176 | * DEFAULT, the @reg_format_endian_default value from the | |
177 | * regmap bus is used. | |
178 | * @val_format_endian: Endianness for formatted register values. If this is | |
179 | * DEFAULT, the @reg_format_endian_default value from the | |
180 | * regmap bus is used. | |
6863ca62 KG |
181 | * |
182 | * @ranges: Array of configuration entries for virtual address ranges. | |
183 | * @num_ranges: Number of range configuration entries. | |
dd898b20 | 184 | */ |
b83a313b | 185 | struct regmap_config { |
d3c242e1 SW |
186 | const char *name; |
187 | ||
b83a313b | 188 | int reg_bits; |
f01ee60f | 189 | int reg_stride; |
82159ba8 | 190 | int pad_bits; |
b83a313b | 191 | int val_bits; |
2e2ae66d | 192 | |
2e2ae66d MB |
193 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
194 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
195 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 196 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
0d4529c5 DC |
197 | regmap_lock lock; |
198 | regmap_unlock unlock; | |
199 | void *lock_arg; | |
bd20eb54 | 200 | |
d2a5884a AS |
201 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
202 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
203 | ||
204 | bool fast_io; | |
205 | ||
bd20eb54 | 206 | unsigned int max_register; |
76aad392 DC |
207 | const struct regmap_access_table *wr_table; |
208 | const struct regmap_access_table *rd_table; | |
209 | const struct regmap_access_table *volatile_table; | |
210 | const struct regmap_access_table *precious_table; | |
720e4616 | 211 | const struct reg_default *reg_defaults; |
9fabe24e DP |
212 | unsigned int num_reg_defaults; |
213 | enum regcache_type cache_type; | |
214 | const void *reg_defaults_raw; | |
215 | unsigned int num_reg_defaults_raw; | |
6f306441 LPC |
216 | |
217 | u8 read_flag_mask; | |
218 | u8 write_flag_mask; | |
2e33caf1 AJ |
219 | |
220 | bool use_single_rw; | |
e894c3f4 | 221 | bool can_multi_write; |
141eba2e SW |
222 | |
223 | enum regmap_endian reg_format_endian; | |
224 | enum regmap_endian val_format_endian; | |
38e23194 | 225 | |
6863ca62 | 226 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 227 | unsigned int num_ranges; |
6863ca62 KG |
228 | }; |
229 | ||
230 | /** | |
231 | * Configuration for indirectly accessed or paged registers. | |
232 | * Registers, mapped to this virtual range, are accessed in two steps: | |
233 | * 1. page selector register update; | |
234 | * 2. access through data window registers. | |
235 | * | |
d058bb49 MB |
236 | * @name: Descriptive name for diagnostics |
237 | * | |
6863ca62 KG |
238 | * @range_min: Address of the lowest register address in virtual range. |
239 | * @range_max: Address of the highest register in virtual range. | |
240 | * | |
241 | * @page_sel_reg: Register with selector field. | |
242 | * @page_sel_mask: Bit shift for selector value. | |
243 | * @page_sel_shift: Bit mask for selector value. | |
244 | * | |
245 | * @window_start: Address of first (lowest) register in data window. | |
246 | * @window_len: Number of registers in data window. | |
247 | */ | |
248 | struct regmap_range_cfg { | |
d058bb49 MB |
249 | const char *name; |
250 | ||
6863ca62 KG |
251 | /* Registers of virtual address range */ |
252 | unsigned int range_min; | |
253 | unsigned int range_max; | |
254 | ||
255 | /* Page selector for indirect addressing */ | |
256 | unsigned int selector_reg; | |
257 | unsigned int selector_mask; | |
258 | int selector_shift; | |
259 | ||
260 | /* Data window (per each page) */ | |
261 | unsigned int window_start; | |
262 | unsigned int window_len; | |
b83a313b MB |
263 | }; |
264 | ||
0d509f2b MB |
265 | struct regmap_async; |
266 | ||
0135bbcc | 267 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 268 | size_t count); |
0135bbcc | 269 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
270 | const void *reg, size_t reg_len, |
271 | const void *val, size_t val_len); | |
0d509f2b MB |
272 | typedef int (*regmap_hw_async_write)(void *context, |
273 | const void *reg, size_t reg_len, | |
274 | const void *val, size_t val_len, | |
275 | struct regmap_async *async); | |
0135bbcc | 276 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
277 | const void *reg_buf, size_t reg_size, |
278 | void *val_buf, size_t val_size); | |
0d509f2b | 279 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 280 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
281 | |
282 | /** | |
283 | * Description of a hardware bus for the register map infrastructure. | |
284 | * | |
bacdbe07 | 285 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
286 | * to perform locking. This field is ignored if custom lock/unlock |
287 | * functions are used (see fields lock/unlock of | |
288 | * struct regmap_config). | |
b83a313b MB |
289 | * @write: Write operation. |
290 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
291 | * if not implemented on a given device. | |
0d509f2b MB |
292 | * @async_write: Write operation which completes asynchronously, optional and |
293 | * must serialise with respect to non-async I/O. | |
b83a313b MB |
294 | * @read: Read operation. Data is returned in the buffer used to transmit |
295 | * data. | |
0d509f2b | 296 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
297 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
298 | * a read. | |
141eba2e SW |
299 | * @reg_format_endian_default: Default endianness for formatted register |
300 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
301 | * DEFAULT, BIG is assumed. | |
302 | * @val_format_endian_default: Default endianness for formatted register | |
303 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
304 | * DEFAULT, BIG is assumed. | |
0d509f2b | 305 | * @async_size: Size of struct used for async work. |
b83a313b MB |
306 | */ |
307 | struct regmap_bus { | |
bacdbe07 | 308 | bool fast_io; |
b83a313b MB |
309 | regmap_hw_write write; |
310 | regmap_hw_gather_write gather_write; | |
0d509f2b | 311 | regmap_hw_async_write async_write; |
b83a313b | 312 | regmap_hw_read read; |
0135bbcc | 313 | regmap_hw_free_context free_context; |
0d509f2b | 314 | regmap_hw_async_alloc async_alloc; |
b83a313b | 315 | u8 read_flag_mask; |
141eba2e SW |
316 | enum regmap_endian reg_format_endian_default; |
317 | enum regmap_endian val_format_endian_default; | |
b83a313b MB |
318 | }; |
319 | ||
320 | struct regmap *regmap_init(struct device *dev, | |
321 | const struct regmap_bus *bus, | |
0135bbcc | 322 | void *bus_context, |
b83a313b | 323 | const struct regmap_config *config); |
6cfec04b MS |
324 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
325 | const struct regmap_config *config); | |
9943fa30 MB |
326 | struct regmap *regmap_init_i2c(struct i2c_client *i2c, |
327 | const struct regmap_config *config); | |
a676f083 MB |
328 | struct regmap *regmap_init_spi(struct spi_device *dev, |
329 | const struct regmap_config *config); | |
c9afbb05 JC |
330 | struct regmap *regmap_init_spmi_base(struct spmi_device *dev, |
331 | const struct regmap_config *config); | |
332 | struct regmap *regmap_init_spmi_ext(struct spmi_device *dev, | |
333 | const struct regmap_config *config); | |
878ec67b PZ |
334 | struct regmap *regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
335 | void __iomem *regs, | |
336 | const struct regmap_config *config); | |
a676f083 | 337 | |
c0eb4676 MB |
338 | struct regmap *devm_regmap_init(struct device *dev, |
339 | const struct regmap_bus *bus, | |
0135bbcc | 340 | void *bus_context, |
c0eb4676 MB |
341 | const struct regmap_config *config); |
342 | struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c, | |
343 | const struct regmap_config *config); | |
344 | struct regmap *devm_regmap_init_spi(struct spi_device *dev, | |
345 | const struct regmap_config *config); | |
c9afbb05 JC |
346 | struct regmap *devm_regmap_init_spmi_base(struct spmi_device *dev, |
347 | const struct regmap_config *config); | |
348 | struct regmap *devm_regmap_init_spmi_ext(struct spmi_device *dev, | |
349 | const struct regmap_config *config); | |
878ec67b PZ |
350 | struct regmap *devm_regmap_init_mmio_clk(struct device *dev, const char *clk_id, |
351 | void __iomem *regs, | |
352 | const struct regmap_config *config); | |
353 | ||
354 | /** | |
355 | * regmap_init_mmio(): Initialise register map | |
356 | * | |
357 | * @dev: Device that will be interacted with | |
358 | * @regs: Pointer to memory-mapped IO region | |
359 | * @config: Configuration for register map | |
360 | * | |
361 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
362 | * a struct regmap. | |
363 | */ | |
364 | static inline struct regmap *regmap_init_mmio(struct device *dev, | |
365 | void __iomem *regs, | |
366 | const struct regmap_config *config) | |
367 | { | |
368 | return regmap_init_mmio_clk(dev, NULL, regs, config); | |
369 | } | |
370 | ||
371 | /** | |
372 | * devm_regmap_init_mmio(): Initialise managed register map | |
373 | * | |
374 | * @dev: Device that will be interacted with | |
375 | * @regs: Pointer to memory-mapped IO region | |
376 | * @config: Configuration for register map | |
377 | * | |
378 | * The return value will be an ERR_PTR() on error or a valid pointer | |
379 | * to a struct regmap. The regmap will be automatically freed by the | |
380 | * device management code. | |
381 | */ | |
382 | static inline struct regmap *devm_regmap_init_mmio(struct device *dev, | |
383 | void __iomem *regs, | |
384 | const struct regmap_config *config) | |
385 | { | |
386 | return devm_regmap_init_mmio_clk(dev, NULL, regs, config); | |
387 | } | |
c0eb4676 | 388 | |
b83a313b | 389 | void regmap_exit(struct regmap *map); |
bf315173 MB |
390 | int regmap_reinit_cache(struct regmap *map, |
391 | const struct regmap_config *config); | |
72b39f6f | 392 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
b83a313b | 393 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
915f441b | 394 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); |
b83a313b MB |
395 | int regmap_raw_write(struct regmap *map, unsigned int reg, |
396 | const void *val, size_t val_len); | |
8eaeb219 LD |
397 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
398 | size_t val_count); | |
f7e2cec0 | 399 | int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, |
e33fabd3 | 400 | int num_regs); |
1d5b40bc CK |
401 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
402 | const struct reg_default *regs, | |
403 | int num_regs); | |
0d509f2b MB |
404 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
405 | const void *val, size_t val_len); | |
b83a313b MB |
406 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
407 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
408 | void *val, size_t val_len); | |
409 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
410 | size_t val_count); | |
411 | int regmap_update_bits(struct regmap *map, unsigned int reg, | |
412 | unsigned int mask, unsigned int val); | |
915f441b MB |
413 | int regmap_update_bits_async(struct regmap *map, unsigned int reg, |
414 | unsigned int mask, unsigned int val); | |
018690d3 MB |
415 | int regmap_update_bits_check(struct regmap *map, unsigned int reg, |
416 | unsigned int mask, unsigned int val, | |
417 | bool *change); | |
915f441b MB |
418 | int regmap_update_bits_check_async(struct regmap *map, unsigned int reg, |
419 | unsigned int mask, unsigned int val, | |
420 | bool *change); | |
a6539c32 | 421 | int regmap_get_val_bytes(struct regmap *map); |
0d509f2b | 422 | int regmap_async_complete(struct regmap *map); |
221ad7f2 | 423 | bool regmap_can_raw_write(struct regmap *map); |
b83a313b | 424 | |
39a58439 | 425 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
426 | int regcache_sync_region(struct regmap *map, unsigned int min, |
427 | unsigned int max); | |
697e85bc MB |
428 | int regcache_drop_region(struct regmap *map, unsigned int min, |
429 | unsigned int max); | |
92afb286 | 430 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 431 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 432 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 433 | |
154881e5 MB |
434 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
435 | const struct regmap_access_table *table); | |
436 | ||
22f0d90a MB |
437 | int regmap_register_patch(struct regmap *map, const struct reg_default *regs, |
438 | int num_regs); | |
13ff50c8 NC |
439 | int regmap_parse_val(struct regmap *map, const void *buf, |
440 | unsigned int *val); | |
22f0d90a | 441 | |
76aad392 DC |
442 | static inline bool regmap_reg_in_range(unsigned int reg, |
443 | const struct regmap_range *range) | |
444 | { | |
445 | return reg >= range->range_min && reg <= range->range_max; | |
446 | } | |
447 | ||
448 | bool regmap_reg_in_ranges(unsigned int reg, | |
449 | const struct regmap_range *ranges, | |
450 | unsigned int nranges); | |
451 | ||
67252287 SK |
452 | /** |
453 | * Description of an register field | |
454 | * | |
455 | * @reg: Offset of the register within the regmap bank | |
456 | * @lsb: lsb of the register field. | |
457 | * @reg: msb of the register field. | |
a0102375 KM |
458 | * @id_size: port size if it has some ports |
459 | * @id_offset: address offset for each ports | |
67252287 SK |
460 | */ |
461 | struct reg_field { | |
462 | unsigned int reg; | |
463 | unsigned int lsb; | |
464 | unsigned int msb; | |
a0102375 KM |
465 | unsigned int id_size; |
466 | unsigned int id_offset; | |
67252287 SK |
467 | }; |
468 | ||
469 | #define REG_FIELD(_reg, _lsb, _msb) { \ | |
470 | .reg = _reg, \ | |
471 | .lsb = _lsb, \ | |
472 | .msb = _msb, \ | |
473 | } | |
474 | ||
475 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, | |
476 | struct reg_field reg_field); | |
477 | void regmap_field_free(struct regmap_field *field); | |
478 | ||
479 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
480 | struct regmap *regmap, struct reg_field reg_field); | |
481 | void devm_regmap_field_free(struct device *dev, struct regmap_field *field); | |
482 | ||
483 | int regmap_field_read(struct regmap_field *field, unsigned int *val); | |
484 | int regmap_field_write(struct regmap_field *field, unsigned int val); | |
fdf20029 KM |
485 | int regmap_field_update_bits(struct regmap_field *field, |
486 | unsigned int mask, unsigned int val); | |
76aad392 | 487 | |
a0102375 KM |
488 | int regmap_fields_write(struct regmap_field *field, unsigned int id, |
489 | unsigned int val); | |
490 | int regmap_fields_read(struct regmap_field *field, unsigned int id, | |
491 | unsigned int *val); | |
492 | int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
493 | unsigned int mask, unsigned int val); | |
76aad392 | 494 | |
f8beab2b MB |
495 | /** |
496 | * Description of an IRQ for the generic regmap irq_chip. | |
497 | * | |
498 | * @reg_offset: Offset of the status/mask register within the bank | |
499 | * @mask: Mask used to flag/control the register. | |
500 | */ | |
501 | struct regmap_irq { | |
502 | unsigned int reg_offset; | |
503 | unsigned int mask; | |
504 | }; | |
505 | ||
506 | /** | |
507 | * Description of a generic regmap irq_chip. This is not intended to | |
508 | * handle every possible interrupt controller, but it should handle a | |
509 | * substantial proportion of those that are found in the wild. | |
510 | * | |
511 | * @name: Descriptive name for IRQ controller. | |
512 | * | |
513 | * @status_base: Base status register address. | |
514 | * @mask_base: Base mask register address. | |
d3233433 AS |
515 | * @ack_base: Base ack address. If zero then the chip is clear on read. |
516 | * Using zero value is possible with @use_ack bit. | |
a43fd50d | 517 | * @wake_base: Base address for wake enables. If zero unsupported. |
022f926a | 518 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
2753e6f8 | 519 | * @init_ack_masked: Ack all masked interrupts once during initalization. |
68622bdf | 520 | * @mask_invert: Inverted mask register: cleared bits are masked out. |
d3233433 | 521 | * @use_ack: Use @ack register even if it is zero. |
68622bdf | 522 | * @wake_invert: Inverted wake register: cleared bits are wake enabled. |
0c00c50b | 523 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
524 | * |
525 | * @num_regs: Number of registers in each control bank. | |
526 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
527 | * assigned based on the index in the array of the interrupt. | |
528 | * @num_irqs: Number of descriptors. | |
529 | */ | |
530 | struct regmap_irq_chip { | |
531 | const char *name; | |
532 | ||
533 | unsigned int status_base; | |
534 | unsigned int mask_base; | |
535 | unsigned int ack_base; | |
a43fd50d | 536 | unsigned int wake_base; |
022f926a | 537 | unsigned int irq_reg_stride; |
f484f7a6 PZ |
538 | bool init_ack_masked:1; |
539 | bool mask_invert:1; | |
d3233433 | 540 | bool use_ack:1; |
f484f7a6 PZ |
541 | bool wake_invert:1; |
542 | bool runtime_pm:1; | |
f8beab2b MB |
543 | |
544 | int num_regs; | |
545 | ||
546 | const struct regmap_irq *irqs; | |
547 | int num_irqs; | |
548 | }; | |
549 | ||
550 | struct regmap_irq_chip_data; | |
551 | ||
552 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 553 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b MB |
554 | struct regmap_irq_chip_data **data); |
555 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); | |
209a6006 | 556 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 557 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 558 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 559 | |
9cde5fcd MB |
560 | #else |
561 | ||
562 | /* | |
563 | * These stubs should only ever be called by generic code which has | |
564 | * regmap based facilities, if they ever get called at runtime | |
565 | * something is going wrong and something probably needs to select | |
566 | * REGMAP. | |
567 | */ | |
568 | ||
569 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
570 | unsigned int val) | |
571 | { | |
572 | WARN_ONCE(1, "regmap API is disabled"); | |
573 | return -EINVAL; | |
574 | } | |
575 | ||
915f441b MB |
576 | static inline int regmap_write_async(struct regmap *map, unsigned int reg, |
577 | unsigned int val) | |
578 | { | |
579 | WARN_ONCE(1, "regmap API is disabled"); | |
580 | return -EINVAL; | |
581 | } | |
582 | ||
9cde5fcd MB |
583 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, |
584 | const void *val, size_t val_len) | |
585 | { | |
586 | WARN_ONCE(1, "regmap API is disabled"); | |
587 | return -EINVAL; | |
588 | } | |
589 | ||
0d509f2b MB |
590 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
591 | const void *val, size_t val_len) | |
592 | { | |
593 | WARN_ONCE(1, "regmap API is disabled"); | |
594 | return -EINVAL; | |
595 | } | |
596 | ||
9cde5fcd MB |
597 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
598 | const void *val, size_t val_count) | |
599 | { | |
600 | WARN_ONCE(1, "regmap API is disabled"); | |
601 | return -EINVAL; | |
602 | } | |
603 | ||
604 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
605 | unsigned int *val) | |
606 | { | |
607 | WARN_ONCE(1, "regmap API is disabled"); | |
608 | return -EINVAL; | |
609 | } | |
610 | ||
611 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
612 | void *val, size_t val_len) | |
613 | { | |
614 | WARN_ONCE(1, "regmap API is disabled"); | |
615 | return -EINVAL; | |
616 | } | |
617 | ||
618 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, | |
619 | void *val, size_t val_count) | |
620 | { | |
621 | WARN_ONCE(1, "regmap API is disabled"); | |
622 | return -EINVAL; | |
623 | } | |
624 | ||
625 | static inline int regmap_update_bits(struct regmap *map, unsigned int reg, | |
626 | unsigned int mask, unsigned int val) | |
627 | { | |
628 | WARN_ONCE(1, "regmap API is disabled"); | |
629 | return -EINVAL; | |
630 | } | |
631 | ||
915f441b MB |
632 | static inline int regmap_update_bits_async(struct regmap *map, |
633 | unsigned int reg, | |
634 | unsigned int mask, unsigned int val) | |
635 | { | |
636 | WARN_ONCE(1, "regmap API is disabled"); | |
637 | return -EINVAL; | |
638 | } | |
639 | ||
9cde5fcd MB |
640 | static inline int regmap_update_bits_check(struct regmap *map, |
641 | unsigned int reg, | |
642 | unsigned int mask, unsigned int val, | |
643 | bool *change) | |
644 | { | |
645 | WARN_ONCE(1, "regmap API is disabled"); | |
646 | return -EINVAL; | |
647 | } | |
648 | ||
915f441b MB |
649 | static inline int regmap_update_bits_check_async(struct regmap *map, |
650 | unsigned int reg, | |
651 | unsigned int mask, | |
652 | unsigned int val, | |
653 | bool *change) | |
654 | { | |
655 | WARN_ONCE(1, "regmap API is disabled"); | |
656 | return -EINVAL; | |
657 | } | |
658 | ||
9cde5fcd MB |
659 | static inline int regmap_get_val_bytes(struct regmap *map) |
660 | { | |
661 | WARN_ONCE(1, "regmap API is disabled"); | |
662 | return -EINVAL; | |
663 | } | |
664 | ||
665 | static inline int regcache_sync(struct regmap *map) | |
666 | { | |
667 | WARN_ONCE(1, "regmap API is disabled"); | |
668 | return -EINVAL; | |
669 | } | |
670 | ||
a313f9f5 MB |
671 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
672 | unsigned int max) | |
673 | { | |
674 | WARN_ONCE(1, "regmap API is disabled"); | |
675 | return -EINVAL; | |
676 | } | |
677 | ||
697e85bc MB |
678 | static inline int regcache_drop_region(struct regmap *map, unsigned int min, |
679 | unsigned int max) | |
680 | { | |
681 | WARN_ONCE(1, "regmap API is disabled"); | |
682 | return -EINVAL; | |
683 | } | |
684 | ||
9cde5fcd MB |
685 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
686 | { | |
687 | WARN_ONCE(1, "regmap API is disabled"); | |
688 | } | |
689 | ||
690 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
691 | { | |
692 | WARN_ONCE(1, "regmap API is disabled"); | |
693 | } | |
694 | ||
695 | static inline void regcache_mark_dirty(struct regmap *map) | |
696 | { | |
697 | WARN_ONCE(1, "regmap API is disabled"); | |
698 | } | |
699 | ||
0d509f2b MB |
700 | static inline void regmap_async_complete(struct regmap *map) |
701 | { | |
702 | WARN_ONCE(1, "regmap API is disabled"); | |
703 | } | |
704 | ||
9cde5fcd MB |
705 | static inline int regmap_register_patch(struct regmap *map, |
706 | const struct reg_default *regs, | |
707 | int num_regs) | |
708 | { | |
709 | WARN_ONCE(1, "regmap API is disabled"); | |
710 | return -EINVAL; | |
711 | } | |
712 | ||
13ff50c8 NC |
713 | static inline int regmap_parse_val(struct regmap *map, const void *buf, |
714 | unsigned int *val) | |
715 | { | |
716 | WARN_ONCE(1, "regmap API is disabled"); | |
717 | return -EINVAL; | |
718 | } | |
719 | ||
72b39f6f MB |
720 | static inline struct regmap *dev_get_regmap(struct device *dev, |
721 | const char *name) | |
722 | { | |
72b39f6f MB |
723 | return NULL; |
724 | } | |
725 | ||
9cde5fcd MB |
726 | #endif |
727 | ||
b83a313b | 728 | #endif |