projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 96de1a8f PM |
1 | #ifndef __LINUX_SERIAL_SCI_H |
| 2 | #define __LINUX_SERIAL_SCI_H | |
| ecd95616 PM |
3 | |
| 4 | #include <linux/serial_core.h> | |
| 14baf9d7 | 5 | #include <linux/sh_dma.h> |
| ecd95616 PM |
6 | |
| 7 | /* | |
| 96de1a8f | 8 | * Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts) |
| ecd95616 PM |
9 | */ |
| 10 | ||
| debf9507 PM |
11 | #define SCIx_NOT_SUPPORTED (-1) |
| 12 | ||
| 26c92f37 PM |
13 | enum { |
| 14 | SCBRR_ALGO_1, /* ((clk + 16 * bps) / (16 * bps) - 1) */ | |
| 15 | SCBRR_ALGO_2, /* ((clk + 16 * bps) / (32 * bps) - 1) */ | |
| 16 | SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */ | |
| 17 | SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */ | |
| 18 | SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */ | |
| 19 | }; | |
| 20 | ||
| 00b9de9c PM |
21 | #define SCSCR_TIE (1 << 7) |
| 22 | #define SCSCR_RIE (1 << 6) | |
| 23 | #define SCSCR_TE (1 << 5) | |
| 24 | #define SCSCR_RE (1 << 4) | |
| f43dc23d | 25 | #define SCSCR_REIE (1 << 3) /* not supported by all parts */ |
| 00b9de9c PM |
26 | #define SCSCR_TOIE (1 << 2) /* not supported by all parts */ |
| 27 | #define SCSCR_CKE1 (1 << 1) | |
| 28 | #define SCSCR_CKE0 (1 << 0) | |
| 29 | ||
| debf9507 PM |
30 | /* SCxSR SCI */ |
| 31 | #define SCI_TDRE 0x80 | |
| 32 | #define SCI_RDRF 0x40 | |
| 33 | #define SCI_ORER 0x20 | |
| 34 | #define SCI_FER 0x10 | |
| 35 | #define SCI_PER 0x08 | |
| 36 | #define SCI_TEND 0x04 | |
| 37 | ||
| 38 | #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) | |
| 39 | ||
| 40 | /* SCxSR SCIF */ | |
| 41 | #define SCIF_ER 0x0080 | |
| 42 | #define SCIF_TEND 0x0040 | |
| 43 | #define SCIF_TDFE 0x0020 | |
| 44 | #define SCIF_BRK 0x0010 | |
| 45 | #define SCIF_FER 0x0008 | |
| 46 | #define SCIF_PER 0x0004 | |
| 47 | #define SCIF_RDF 0x0002 | |
| 48 | #define SCIF_DR 0x0001 | |
| 49 | ||
| 50 | #define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) | |
| 51 | ||
| ecd95616 PM |
52 | /* Offsets into the sci_port->irqs array */ |
| 53 | enum { | |
| 54 | SCIx_ERI_IRQ, | |
| 55 | SCIx_RXI_IRQ, | |
| 56 | SCIx_TXI_IRQ, | |
| 57 | SCIx_BRI_IRQ, | |
| 58 | SCIx_NR_IRQS, | |
| 59 | }; | |
| 60 | ||
| 61a6976b PM |
61 | enum { |
| 62 | SCIx_PROBE_REGTYPE, | |
| 63 | ||
| 64 | SCIx_SCI_REGTYPE, | |
| 65 | SCIx_IRDA_REGTYPE, | |
| 66 | SCIx_SCIFA_REGTYPE, | |
| 67 | SCIx_SCIFB_REGTYPE, | |
| 68 | SCIx_SH3_SCIF_REGTYPE, | |
| 69 | SCIx_SH4_SCIF_REGTYPE, | |
| 70 | SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | |
| 71 | SCIx_SH4_SCIF_FIFODATA_REGTYPE, | |
| 72 | SCIx_SH7705_SCIF_REGTYPE, | |
| 73 | ||
| 74 | SCIx_NR_REGTYPES, | |
| 75 | }; | |
| 76 | ||
| 22cc8378 PM |
77 | #define SCIx_IRQ_MUXED(irq) \ |
| 78 | { \ | |
| 79 | [SCIx_ERI_IRQ] = (irq), \ | |
| 80 | [SCIx_RXI_IRQ] = (irq), \ | |
| 81 | [SCIx_TXI_IRQ] = (irq), \ | |
| 82 | [SCIx_BRI_IRQ] = (irq), \ | |
| 83 | } | |
| 84 | ||
| 61a6976b PM |
85 | /* |
| 86 | * SCI register subset common for all port types. | |
| 87 | * Not all registers will exist on all parts. | |
| 88 | */ | |
| 89 | enum { | |
| 90 | SCSMR, SCBRR, SCSCR, SCxSR, | |
| 91 | SCFCR, SCFDR, SCxTDR, SCxRDR, | |
| 92 | SCLSR, SCTFDR, SCRFDR, SCSPTR, | |
| 93 | ||
| 94 | SCIx_NR_REGS, | |
| 95 | }; | |
| 96 | ||
| 73a19e4c GL |
97 | struct device; |
| 98 | ||
| 61a6976b PM |
99 | struct plat_sci_port_ops { |
| 100 | void (*init_pins)(struct uart_port *, unsigned int cflag); | |
| 101 | }; | |
| 102 | ||
| ecd95616 PM |
103 | /* |
| 104 | * Platform device specific platform_data struct | |
| 105 | */ | |
| 106 | struct plat_sci_port { | |
| ecd95616 PM |
107 | unsigned long mapbase; /* resource base */ |
| 108 | unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ | |
| 109 | unsigned int type; /* SCI / SCIF / IRDA */ | |
| 110 | upf_t flags; /* UPF_* flags */ | |
| 00b9de9c | 111 | |
| 26c92f37 | 112 | unsigned int scbrr_algo_id; /* SCBRR calculation algo */ |
| 00b9de9c | 113 | unsigned int scscr; /* SCSCR initialization */ |
| f43dc23d | 114 | |
| debf9507 PM |
115 | /* |
| 116 | * Platform overrides if necessary, defaults otherwise. | |
| 117 | */ | |
| 118 | int overrun_bit; | |
| 119 | unsigned int error_mask; | |
| 120 | ||
| 514820eb | 121 | int port_reg; |
| 61a6976b PM |
122 | unsigned char regshift; |
| 123 | unsigned char regtype; | |
| 124 | ||
| 125 | struct plat_sci_port_ops *ops; | |
| 514820eb | 126 | |
| 73a19e4c | 127 | struct device *dma_dev; |
| f43dc23d | 128 | |
| 27bd1075 PM |
129 | unsigned int dma_slave_tx; |
| 130 | unsigned int dma_slave_rx; | |
| ecd95616 PM |
131 | }; |
| 132 | ||
| 96de1a8f | 133 | #endif /* __LINUX_SERIAL_SCI_H */ |