[deliverable/linux.git] / include / linux / sh_pfc.h

/*
 * SuperH Pin Function Controller Support
 *
 * Copyright (c) 2008 Magnus Damm
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#ifndef __SH_PFC_H
#define __SH_PFC_H

#include <asm-generic/gpio.h>

typedef unsigned short pinmux_enum_t;
typedef unsigned short pinmux_flag_t;

#define PINMUX_TYPE_NONE            0
#define PINMUX_TYPE_FUNCTION        1
#define PINMUX_TYPE_GPIO            2
#define PINMUX_TYPE_OUTPUT          3
#define PINMUX_TYPE_INPUT           4
#define PINMUX_TYPE_INPUT_PULLUP    5
#define PINMUX_TYPE_INPUT_PULLDOWN  6

#define PINMUX_FLAG_TYPE            (0x7)
#define PINMUX_FLAG_WANT_PULLUP     (1 << 3)
#define PINMUX_FLAG_WANT_PULLDOWN   (1 << 4)

#define PINMUX_FLAG_DBIT_SHIFT      5
#define PINMUX_FLAG_DBIT            (0x1f << PINMUX_FLAG_DBIT_SHIFT)
#define PINMUX_FLAG_DREG_SHIFT      10
#define PINMUX_FLAG_DREG            (0x3f << PINMUX_FLAG_DREG_SHIFT)

struct pinmux_gpio {
	pinmux_enum_t enum_id;
	pinmux_flag_t flags;
};

#define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0

struct pinmux_cfg_reg {
	unsigned long reg, reg_width, field_width;
	unsigned long *cnt;
	pinmux_enum_t *enum_ids;
};

#define PINMUX_CFG_REG(name, r, r_width, f_width) \
	.reg = r, .reg_width = r_width, .field_width = f_width,		\
	.cnt = (unsigned long [r_width / f_width]) {}, \
	.enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \

struct pinmux_data_reg {
	unsigned long reg, reg_width, reg_shadow;
	pinmux_enum_t *enum_ids;
};

#define PINMUX_DATA_REG(name, r, r_width) \
	.reg = r, .reg_width = r_width,	\
	.enum_ids = (pinmux_enum_t [r_width]) \

struct pinmux_irq {
	int irq;
	pinmux_enum_t *enum_ids;
};

#define PINMUX_IRQ(irq_nr, ids...)			   \
	{ .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } }	\

struct pinmux_range {
	pinmux_enum_t begin;
	pinmux_enum_t end;
	pinmux_enum_t force;
};

struct pinmux_info {
	char *name;
	pinmux_enum_t reserved_id;
	struct pinmux_range data;
	struct pinmux_range input;
	struct pinmux_range input_pd;
	struct pinmux_range input_pu;
	struct pinmux_range output;
	struct pinmux_range mark;
	struct pinmux_range function;

	unsigned first_gpio, last_gpio;

	struct pinmux_gpio *gpios;
	struct pinmux_cfg_reg *cfg_regs;
	struct pinmux_data_reg *data_regs;

	pinmux_enum_t *gpio_data;
	unsigned int gpio_data_size;

	struct pinmux_irq *gpio_irq;
	unsigned int gpio_irq_size;

	struct gpio_chip chip;
};

int register_pinmux(struct pinmux_info *pip);
int unregister_pinmux(struct pinmux_info *pip);

/* helper macro for port */
#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)

#define PORT_10(fn, pfx, sfx) \
	PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),	\
	PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),	\
	PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),	\
	PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),	\
	PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)

#define PORT_90(fn, pfx, sfx) \
	PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),	\
	PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),	\
	PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),	\
	PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),	\
	PORT_10(fn, pfx##9, sfx)

#define _PORT_ALL(pfx, sfx) pfx##_##sfx
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
#define PORT_ALL(str)	CPU_ALL_PORT(_PORT_ALL, PORT, str)
#define GPIO_PORT_ALL()	CPU_ALL_PORT(_GPIO_PORT, , unused)
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)

/* helper macro for pinmux_enum_t */
#define PORT_DATA_I(nr)	\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)

#define PORT_DATA_I_PD(nr)	\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,	\
		    PORT##nr##_IN, PORT##nr##_IN_PD)

#define PORT_DATA_I_PU(nr)	\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,	\
		    PORT##nr##_IN, PORT##nr##_IN_PU)

#define PORT_DATA_I_PU_PD(nr)	\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,			\
		    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)

#define PORT_DATA_O(nr)		\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)

#define PORT_DATA_IO(nr)	\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
		    PORT##nr##_IN)

#define PORT_DATA_IO_PD(nr)	\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
		    PORT##nr##_IN, PORT##nr##_IN_PD)

#define PORT_DATA_IO_PU(nr)	\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
		    PORT##nr##_IN, PORT##nr##_IN_PU)

#define PORT_DATA_IO_PU_PD(nr)	\
	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
		    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)

/* helper macro for top 4 bits in PORTnCR */
#define _PCRH(in, in_pd, in_pu, out)	\
	0, (out), (in), 0,		\
	0, 0, 0, 0,			\
	0, 0, (in_pd), 0,		\
	0, 0, (in_pu), 0

#define PORTCR(nr, reg)							\
	{								\
		PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {		\
			_PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,		\
			      PORT##nr##_IN_PU, PORT##nr##_OUT),	\
				PORT##nr##_FN0, PORT##nr##_FN1,		\
				PORT##nr##_FN2, PORT##nr##_FN3,		\
				PORT##nr##_FN4, PORT##nr##_FN5,		\
				PORT##nr##_FN6, PORT##nr##_FN7 }	\
	}

#endif /* __SH_PFC_H */
Commit	Line	Data
fae43399 MD	1	/*
	2	* SuperH Pin Function Controller Support
	3	*
	4	* Copyright (c) 2008 Magnus Damm
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*/
	10
	11	#ifndef __SH_PFC_H
	12	#define __SH_PFC_H
	13
	14	#include <asm-generic/gpio.h>
	15
	16	typedef unsigned short pinmux_enum_t;
	17	typedef unsigned short pinmux_flag_t;
	18
	19	#define PINMUX_TYPE_NONE 0
	20	#define PINMUX_TYPE_FUNCTION 1
	21	#define PINMUX_TYPE_GPIO 2
	22	#define PINMUX_TYPE_OUTPUT 3
	23	#define PINMUX_TYPE_INPUT 4
	24	#define PINMUX_TYPE_INPUT_PULLUP 5
	25	#define PINMUX_TYPE_INPUT_PULLDOWN 6
	26
	27	#define PINMUX_FLAG_TYPE (0x7)
	28	#define PINMUX_FLAG_WANT_PULLUP (1 << 3)
	29	#define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
	30
	31	#define PINMUX_FLAG_DBIT_SHIFT 5
	32	#define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
	33	#define PINMUX_FLAG_DREG_SHIFT 10
	34	#define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
	35
	36	struct pinmux_gpio {
	37	pinmux_enum_t enum_id;
	38	pinmux_flag_t flags;
	39	};
	40
	41	#define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
	42	#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
	43
	44	struct pinmux_cfg_reg {
	45	unsigned long reg, reg_width, field_width;
	46	unsigned long *cnt;
	47	pinmux_enum_t *enum_ids;
	48	};
	49
	50	#define PINMUX_CFG_REG(name, r, r_width, f_width) \
	51	.reg = r, .reg_width = r_width, .field_width = f_width, \
	52	.cnt = (unsigned long [r_width / f_width]) {}, \
	53	.enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
	54
	55	struct pinmux_data_reg {
	56	unsigned long reg, reg_width, reg_shadow;
	57	pinmux_enum_t *enum_ids;
	58	};
	59
	60	#define PINMUX_DATA_REG(name, r, r_width) \
	61	.reg = r, .reg_width = r_width, \
	62	.enum_ids = (pinmux_enum_t [r_width]) \
	63
ad2a8e7e MD	64	struct pinmux_irq {
	65	int irq;
	66	pinmux_enum_t *enum_ids;
	67	};
	68
	69	#define PINMUX_IRQ(irq_nr, ids...) \
	70	{ .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \
	71
fae43399 MD	72	struct pinmux_range {
	73	pinmux_enum_t begin;
	74	pinmux_enum_t end;
	75	pinmux_enum_t force;
	76	};
	77
	78	struct pinmux_info {
	79	char *name;
	80	pinmux_enum_t reserved_id;
	81	struct pinmux_range data;
	82	struct pinmux_range input;
	83	struct pinmux_range input_pd;
	84	struct pinmux_range input_pu;
	85	struct pinmux_range output;
	86	struct pinmux_range mark;
	87	struct pinmux_range function;
	88
	89	unsigned first_gpio, last_gpio;
	90
	91	struct pinmux_gpio *gpios;
	92	struct pinmux_cfg_reg *cfg_regs;
	93	struct pinmux_data_reg *data_regs;
	94
	95	pinmux_enum_t *gpio_data;
	96	unsigned int gpio_data_size;
	97
ad2a8e7e MD	98	struct pinmux_irq *gpio_irq;
	99	unsigned int gpio_irq_size;
	100
fae43399 MD	101	struct gpio_chip chip;
	102	};
	103
	104	int register_pinmux(struct pinmux_info *pip);
b72421d8	105	int unregister_pinmux(struct pinmux_info *pip);
fae43399	106
972c3fb6 KM	107	/* helper macro for port */
	108	#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
	109
	110	#define PORT_10(fn, pfx, sfx) \
	111	PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
	112	PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
	113	PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
	114	PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
	115	PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
	116
	117	#define PORT_90(fn, pfx, sfx) \
	118	PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
	119	PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
	120	PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
	121	PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
	122	PORT_10(fn, pfx##9, sfx)
	123
	124	#define _PORT_ALL(pfx, sfx) pfx##_##sfx
	125	#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
	126	#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
	127	#define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
	128	#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
	129
bd8d0cba KM	130	/* helper macro for pinmux_enum_t */
	131	#define PORT_DATA_I(nr) \
	132	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
	133
	134	#define PORT_DATA_I_PD(nr) \
	135	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
	136	PORT##nr##_IN, PORT##nr##_IN_PD)
	137
	138	#define PORT_DATA_I_PU(nr) \
	139	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
	140	PORT##nr##_IN, PORT##nr##_IN_PU)
	141
	142	#define PORT_DATA_I_PU_PD(nr) \
	143	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
	144	PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
	145
	146	#define PORT_DATA_O(nr) \
	147	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
	148
	149	#define PORT_DATA_IO(nr) \
	150	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
	151	PORT##nr##_IN)
	152
	153	#define PORT_DATA_IO_PD(nr) \
	154	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
	155	PORT##nr##_IN, PORT##nr##_IN_PD)
	156
	157	#define PORT_DATA_IO_PU(nr) \
	158	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
	159	PORT##nr##_IN, PORT##nr##_IN_PU)
	160
	161	#define PORT_DATA_IO_PU_PD(nr) \
	162	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
	163	PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
	164
9b49139b KM	165	/* helper macro for top 4 bits in PORTnCR */
	166	#define _PCRH(in, in_pd, in_pu, out) \
	167	0, (out), (in), 0, \
	168	0, 0, 0, 0, \
	169	0, 0, (in_pd), 0, \
	170	0, 0, (in_pu), 0
	171
	172	#define PORTCR(nr, reg) \
	173	{ \
	174	PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
	175	_PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
	176	PORT##nr##_IN_PU, PORT##nr##_OUT), \
	177	PORT##nr##_FN0, PORT##nr##_FN1, \
	178	PORT##nr##_FN2, PORT##nr##_FN3, \
	179	PORT##nr##_FN4, PORT##nr##_FN5, \
	180	PORT##nr##_FN6, PORT##nr##_FN7 } \
	181	}
bd8d0cba	182
fae43399	183	#endif /* __SH_PFC_H */