[deliverable/linux.git] / include / linux / usb / msm_hsusb.h

/* linux/include/asm-arm/arch-msm/hsusb.h
 *
 * Copyright (C) 2008 Google, Inc.
 * Author: Brian Swetland <swetland@google.com>
 * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */

#ifndef __ASM_ARCH_MSM_HSUSB_H
#define __ASM_ARCH_MSM_HSUSB_H

#include <linux/extcon.h>
#include <linux/types.h>
#include <linux/usb/otg.h>
#include <linux/clk.h>

/**
 * OTG control
 *
 * OTG_NO_CONTROL	Id/VBUS notifications not required. Useful in host
 *                      only configuration.
 * OTG_PHY_CONTROL	Id/VBUS notifications comes form USB PHY.
 * OTG_PMIC_CONTROL	Id/VBUS notifications comes from PMIC hardware.
 * OTG_USER_CONTROL	Id/VBUS notifcations comes from User via sysfs.
 *
 */
enum otg_control_type {
	OTG_NO_CONTROL = 0,
	OTG_PHY_CONTROL,
	OTG_PMIC_CONTROL,
	OTG_USER_CONTROL,
};

/**
 * PHY used in
 *
 * INVALID_PHY			Unsupported PHY
 * CI_45NM_INTEGRATED_PHY	Chipidea 45nm integrated PHY
 * SNPS_28NM_INTEGRATED_PHY	Synopsis 28nm integrated PHY
 *
 */
enum msm_usb_phy_type {
	INVALID_PHY = 0,
	CI_45NM_INTEGRATED_PHY,
	SNPS_28NM_INTEGRATED_PHY,
};

#define IDEV_CHG_MAX	1500
#define IUNIT		100

/**
 * Different states involved in USB charger detection.
 *
 * USB_CHG_STATE_UNDEFINED	USB charger is not connected or detection
 *                              process is not yet started.
 * USB_CHG_STATE_WAIT_FOR_DCD	Waiting for Data pins contact.
 * USB_CHG_STATE_DCD_DONE	Data pin contact is detected.
 * USB_CHG_STATE_PRIMARY_DONE	Primary detection is completed (Detects
 *                              between SDP and DCP/CDP).
 * USB_CHG_STATE_SECONDARY_DONE	Secondary detection is completed (Detects
 *                              between DCP and CDP).
 * USB_CHG_STATE_DETECTED	USB charger type is determined.
 *
 */
enum usb_chg_state {
	USB_CHG_STATE_UNDEFINED = 0,
	USB_CHG_STATE_WAIT_FOR_DCD,
	USB_CHG_STATE_DCD_DONE,
	USB_CHG_STATE_PRIMARY_DONE,
	USB_CHG_STATE_SECONDARY_DONE,
	USB_CHG_STATE_DETECTED,
};

/**
 * USB charger types
 *
 * USB_INVALID_CHARGER	Invalid USB charger.
 * USB_SDP_CHARGER	Standard downstream port. Refers to a downstream port
 *                      on USB2.0 compliant host/hub.
 * USB_DCP_CHARGER	Dedicated charger port (AC charger/ Wall charger).
 * USB_CDP_CHARGER	Charging downstream port. Enumeration can happen and
 *                      IDEV_CHG_MAX can be drawn irrespective of USB state.
 *
 */
enum usb_chg_type {
	USB_INVALID_CHARGER = 0,
	USB_SDP_CHARGER,
	USB_DCP_CHARGER,
	USB_CDP_CHARGER,
};

/**
 * struct msm_otg_platform_data - platform device data
 *              for msm_otg driver.
 * @phy_init_seq: PHY configuration sequence values. Value of -1 is reserved as
 *              "do not overwrite default vaule at this address".
 * @phy_init_sz: PHY configuration sequence size.
 * @vbus_power: VBUS power on/off routine.
 * @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
 * @mode: Supported mode (OTG/peripheral/host).
 * @otg_control: OTG switch controlled by user/Id pin
 */
struct msm_otg_platform_data {
	int *phy_init_seq;
	int phy_init_sz;
	void (*vbus_power)(bool on);
	unsigned power_budget;
	enum usb_dr_mode mode;
	enum otg_control_type otg_control;
	enum msm_usb_phy_type phy_type;
	void (*setup_gpio)(enum usb_otg_state state);
};

/**
 * struct msm_usb_cable - structure for exteternal connector cable
 *			  state tracking
 * @nb: hold event notification callback
 * @conn: used for notification registration
 */
struct msm_usb_cable {
	struct notifier_block		nb;
	struct extcon_dev		*extcon;
};

/**
 * struct msm_otg: OTG driver data. Shared by HCD and DCD.
 * @otg: USB OTG Transceiver structure.
 * @pdata: otg device platform data.
 * @irq: IRQ number assigned for HSUSB controller.
 * @clk: clock struct of usb_hs_clk.
 * @pclk: clock struct of usb_hs_pclk.
 * @core_clk: clock struct of usb_hs_core_clk.
 * @regs: ioremapped register base address.
 * @inputs: OTG state machine inputs(Id, SessValid etc).
 * @sm_work: OTG state machine work.
 * @in_lpm: indicates low power mode (LPM) state.
 * @async_int: Async interrupt arrived.
 * @cur_power: The amount of mA available from downstream port.
 * @chg_work: Charger detection work.
 * @chg_state: The state of charger detection process.
 * @chg_type: The type of charger attached.
 * @dcd_retires: The retry count used to track Data contact
 *               detection process.
 * @manual_pullup: true if VBUS is not routed to USB controller/phy
 *	and controller driver therefore enables pull-up explicitly before
 *	starting controller using usbcmd run/stop bit.
 * @vbus: VBUS signal state trakining, using extcon framework
 * @id: ID signal state trakining, using extcon framework
 * @switch_gpio: Descriptor for GPIO used to control external Dual
 *               SPDT USB Switch.
 * @reboot: Used to inform the driver to route USB D+/D- line to Device
 *	    connector
 */
struct msm_otg {
	struct usb_phy phy;
	struct msm_otg_platform_data *pdata;
	int irq;
	struct clk *clk;
	struct clk *pclk;
	struct clk *core_clk;
	void __iomem *regs;
#define ID		0
#define B_SESS_VLD	1
	unsigned long inputs;
	struct work_struct sm_work;
	atomic_t in_lpm;
	int async_int;
	unsigned cur_power;
	int phy_number;
	struct delayed_work chg_work;
	enum usb_chg_state chg_state;
	enum usb_chg_type chg_type;
	u8 dcd_retries;
	struct regulator *v3p3;
	struct regulator *v1p8;
	struct regulator *vddcx;

	struct reset_control *phy_rst;
	struct reset_control *link_rst;
	int vdd_levels[3];

	bool manual_pullup;

	struct msm_usb_cable vbus;
	struct msm_usb_cable id;

	struct gpio_desc *switch_gpio;
	struct notifier_block reboot;
};

#endif
Commit	Line	Data
e0c201f3 PK	1	/* linux/include/asm-arm/arch-msm/hsusb.h
	2	*
	3	* Copyright (C) 2008 Google, Inc.
	4	* Author: Brian Swetland <swetland@google.com>
d860852e	5	* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
e0c201f3 PK	6	*
	7	* This software is licensed under the terms of the GNU General Public
	8	* License version 2, as published by the Free Software Foundation, and
	9	* may be copied, distributed, and modified under those terms.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	*/
	17
	18	#ifndef __ASM_ARCH_MSM_HSUSB_H
	19	#define __ASM_ARCH_MSM_HSUSB_H
	20
591fc116	21	#include <linux/extcon.h>
e0c201f3 PK	22	#include <linux/types.h>
e0c201f3 PK	23	#include <linux/usb/otg.h>
5146d771	24	#include <linux/clk.h>
e0c201f3	25
e0c201f3 PK	26	/**
	27	* OTG control
	28	*
	29	* OTG_NO_CONTROL Id/VBUS notifications not required. Useful in host
	30	* only configuration.
	31	* OTG_PHY_CONTROL Id/VBUS notifications comes form USB PHY.
	32	* OTG_PMIC_CONTROL Id/VBUS notifications comes from PMIC hardware.
	33	* OTG_USER_CONTROL Id/VBUS notifcations comes from User via sysfs.
	34	*
	35	*/
	36	enum otg_control_type {
	37	OTG_NO_CONTROL = 0,
	38	OTG_PHY_CONTROL,
	39	OTG_PMIC_CONTROL,
	40	OTG_USER_CONTROL,
	41	};
	42
d860852e PK	43	/**
	44	* PHY used in
	45	*
	46	* INVALID_PHY Unsupported PHY
	47	* CI_45NM_INTEGRATED_PHY Chipidea 45nm integrated PHY
	48	* SNPS_28NM_INTEGRATED_PHY Synopsis 28nm integrated PHY
	49	*
	50	*/
	51	enum msm_usb_phy_type {
	52	INVALID_PHY = 0,
	53	CI_45NM_INTEGRATED_PHY,
	54	SNPS_28NM_INTEGRATED_PHY,
	55	};
	56
	57	#define IDEV_CHG_MAX 1500
	58	#define IUNIT 100
	59
	60	/**
	61	* Different states involved in USB charger detection.
	62	*
	63	* USB_CHG_STATE_UNDEFINED USB charger is not connected or detection
	64	* process is not yet started.
	65	* USB_CHG_STATE_WAIT_FOR_DCD Waiting for Data pins contact.
	66	* USB_CHG_STATE_DCD_DONE Data pin contact is detected.
	67	* USB_CHG_STATE_PRIMARY_DONE Primary detection is completed (Detects
	68	* between SDP and DCP/CDP).
	69	* USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects
	70	* between DCP and CDP).
	71	* USB_CHG_STATE_DETECTED USB charger type is determined.
	72	*
	73	*/
	74	enum usb_chg_state {
	75	USB_CHG_STATE_UNDEFINED = 0,
	76	USB_CHG_STATE_WAIT_FOR_DCD,
	77	USB_CHG_STATE_DCD_DONE,
	78	USB_CHG_STATE_PRIMARY_DONE,
	79	USB_CHG_STATE_SECONDARY_DONE,
	80	USB_CHG_STATE_DETECTED,
	81	};
	82
	83	/**
	84	* USB charger types
	85	*
	86	* USB_INVALID_CHARGER Invalid USB charger.
	87	* USB_SDP_CHARGER Standard downstream port. Refers to a downstream port
	88	* on USB2.0 compliant host/hub.
	89	* USB_DCP_CHARGER Dedicated charger port (AC charger/ Wall charger).
	90	* USB_CDP_CHARGER Charging downstream port. Enumeration can happen and
	91	* IDEV_CHG_MAX can be drawn irrespective of USB state.
	92	*
	93	*/
	94	enum usb_chg_type {
	95	USB_INVALID_CHARGER = 0,
	96	USB_SDP_CHARGER,
	97	USB_DCP_CHARGER,
	98	USB_CDP_CHARGER,
	99	};
	100
e0c201f3 PK	101	/**
e0c201f3 PK	102	* struct msm_otg_platform_data - platform device data
dfb2130c	103	* for msm_otg driver.
8364f9af II	104	* @phy_init_seq: PHY configuration sequence values. Value of -1 is reserved as
	105	* "do not overwrite default vaule at this address".
	106	* @phy_init_sz: PHY configuration sequence size.
e0c201f3 PK	107	* @vbus_power: VBUS power on/off routine.
	108	* @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
	109	* @mode: Supported mode (OTG/peripheral/host).
	110	* @otg_control: OTG switch controlled by user/Id pin
e0c201f3 PK	111	*/
	112	struct msm_otg_platform_data {
	113	int *phy_init_seq;
8364f9af	114	int phy_init_sz;
e0c201f3 PK	115	void (*vbus_power)(bool on);
e0c201f3 PK	116	unsigned power_budget;
971232cf	117	enum usb_dr_mode mode;
e0c201f3	118	enum otg_control_type otg_control;
d860852e	119	enum msm_usb_phy_type phy_type;
e0c201f3 PK	120	void (*setup_gpio)(enum usb_otg_state state);
	121	};
	122
591fc116 II	123	/**
	124	* struct msm_usb_cable - structure for exteternal connector cable
	125	* state tracking
	126	* @nb: hold event notification callback
	127	* @conn: used for notification registration
	128	*/
	129	struct msm_usb_cable {
	130	struct notifier_block nb;
83b7b67c	131	struct extcon_dev *extcon;
591fc116 II	132	};
591fc116 II	133
e0c201f3 PK	134	/**
	135	* struct msm_otg: OTG driver data. Shared by HCD and DCD.
	136	* @otg: USB OTG Transceiver structure.
	137	* @pdata: otg device platform data.
	138	* @irq: IRQ number assigned for HSUSB controller.
	139	* @clk: clock struct of usb_hs_clk.
	140	* @pclk: clock struct of usb_hs_pclk.
e0c201f3 PK	141	* @core_clk: clock struct of usb_hs_core_clk.
	142	* @regs: ioremapped register base address.
	143	* @inputs: OTG state machine inputs(Id, SessValid etc).
	144	* @sm_work: OTG state machine work.
87c0104a PK	145	* @in_lpm: indicates low power mode (LPM) state.
87c0104a PK	146	* @async_int: Async interrupt arrived.
d860852e PK	147	* @cur_power: The amount of mA available from downstream port.
	148	* @chg_work: Charger detection work.
	149	* @chg_state: The state of charger detection process.
	150	* @chg_type: The type of charger attached.
	151	* @dcd_retires: The retry count used to track Data contact
	152	* detection process.
44e42ae3 II	153	* @manual_pullup: true if VBUS is not routed to USB controller/phy
	154	* and controller driver therefore enables pull-up explicitly before
	155	* starting controller using usbcmd run/stop bit.
591fc116 II	156	* @vbus: VBUS signal state trakining, using extcon framework
591fc116 II	157	* @id: ID signal state trakining, using extcon framework
6f98f545 II	158	* @switch_gpio: Descriptor for GPIO used to control external Dual
	159	* SPDT USB Switch.
	160	* @reboot: Used to inform the driver to route USB D+/D- line to Device
	161	* connector
e0c201f3 PK	162	*/
e0c201f3 PK	163	struct msm_otg {
1d4c9293	164	struct usb_phy phy;
e0c201f3 PK	165	struct msm_otg_platform_data *pdata;
	166	int irq;
	167	struct clk *clk;
	168	struct clk *pclk;
e0c201f3 PK	169	struct clk *core_clk;
	170	void __iomem *regs;
	171	#define ID 0
	172	#define B_SESS_VLD 1
	173	unsigned long inputs;
	174	struct work_struct sm_work;
87c0104a PK	175	atomic_t in_lpm;
87c0104a PK	176	int async_int;
d860852e	177	unsigned cur_power;
cfa3ff5d	178	int phy_number;
d860852e PK	179	struct delayed_work chg_work;
	180	enum usb_chg_state chg_state;
	181	enum usb_chg_type chg_type;
	182	u8 dcd_retries;
37cfdaf7 II	183	struct regulator *v3p3;
	184	struct regulator *v1p8;
	185	struct regulator *vddcx;
a2734543 II	186
	187	struct reset_control *phy_rst;
	188	struct reset_control *link_rst;
01799b62	189	int vdd_levels[3];
591fc116	190
44e42ae3 II	191	bool manual_pullup;
44e42ae3 II	192
591fc116 II	193	struct msm_usb_cable vbus;
591fc116 II	194	struct msm_usb_cable id;
6f98f545 II	195
	196	struct gpio_desc *switch_gpio;
	197	struct notifier_block reboot;
e0c201f3 PK	198	};
	199
	200	#endif