[deliverable/linux.git] / include / linux / usb_isp116x.h


/*
 * Board initialization code should put one of these into dev->platform_data
 * and place the isp116x onto platform_bus.
 */

struct isp116x_platform_data {
	/* Enable internal resistors on downstream ports */
	unsigned sel15Kres:1;
	/* Chip's internal clock won't be stopped in suspended state.
	   Setting/unsetting this bit takes effect only if
	   'remote_wakeup_enable' below is not set. */
	unsigned clknotstop:1;
	/* On-chip overcurrent protection */
	unsigned oc_enable:1;
	/* INT output polarity */
	unsigned int_act_high:1;
	/* INT edge or level triggered */
	unsigned int_edge_triggered:1;
	/* WAKEUP pin connected - NOT SUPPORTED  */
	/* unsigned remote_wakeup_connected:1; */
	/* Wakeup by devices on usb bus enabled */
	unsigned remote_wakeup_enable:1;
	/* Switch or not to switch (keep always powered) */
	unsigned no_power_switching:1;
	/* Ganged port power switching (0) or individual port
	   power switching (1) */
	unsigned power_switching_mode:1;
	/* Hardware reset set/clear. If implemented, this function must:
	   if set == 0,   deassert chip's HW reset pin
	   otherwise,     assert chip's HW reset pin       */
	void (*reset) (struct device * dev, int set);
	/* Hardware clock start/stop. If implemented, this function must:
	   if start == 0,    stop the external clock
	   otherwise,        start the external clock
	 */
	void (*clock) (struct device * dev, int start);
	/* Inter-io delay (ns). The chip is picky about access timings; it
	   expects at least:
	   150ns delay between consecutive accesses to DATA_REG,
	   300ns delay between access to ADDR_REG and DATA_REG
	   OE, WE MUST NOT be changed during these intervals
	 */
	void (*delay) (struct device * dev, int delay);
};
Commit	Line	Data
4808a1c0 OK	1
	2	/*
	3	* Board initialization code should put one of these into dev->platform_data
	4	* and place the isp116x onto platform_bus.
	5	*/
	6
	7	struct isp116x_platform_data {
	8	/* Enable internal resistors on downstream ports */
	9	unsigned sel15Kres:1;
	10	/* Chip's internal clock won't be stopped in suspended state.
	11	Setting/unsetting this bit takes effect only if
	12	'remote_wakeup_enable' below is not set. */
	13	unsigned clknotstop:1;
	14	/* On-chip overcurrent protection */
	15	unsigned oc_enable:1;
	16	/* INT output polarity */
	17	unsigned int_act_high:1;
	18	/* INT edge or level triggered */
	19	unsigned int_edge_triggered:1;
	20	/* WAKEUP pin connected - NOT SUPPORTED */
	21	/* unsigned remote_wakeup_connected:1; */
	22	/* Wakeup by devices on usb bus enabled */
	23	unsigned remote_wakeup_enable:1;
	24	/* Switch or not to switch (keep always powered) */
	25	unsigned no_power_switching:1;
	26	/* Ganged port power switching (0) or individual port
	27	power switching (1) */
	28	unsigned power_switching_mode:1;
4808a1c0 OK	29	/* Hardware reset set/clear. If implemented, this function must:
	30	if set == 0, deassert chip's HW reset pin
	31	otherwise, assert chip's HW reset pin */
	32	void (reset) (struct device dev, int set);
	33	/* Hardware clock start/stop. If implemented, this function must:
	34	if start == 0, stop the external clock
	35	otherwise, start the external clock
	36	*/
	37	void (clock) (struct device dev, int start);
	38	/* Inter-io delay (ns). The chip is picky about access timings; it
	39	expects at least:
	40	150ns delay between consecutive accesses to DATA_REG,
	41	300ns delay between access to ADDR_REG and DATA_REG
	42	OE, WE MUST NOT be changed during these intervals
	43	*/
	44	void (delay) (struct device dev, int delay);
	45	};