[include/elf]
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
0449635d
EZ
12002-08-19 Elena Zannoni <ezannoni@redhat.com>
2
3 From matthew green <mrg@redhat.com>
4
5 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
6 instructions.
7 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
8 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
9 e500x2 Integer select, branch locking, performance monitor,
10 cache locking and machine check APUs, respectively.
11 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
12 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
13
030ad53b
SC
142002-08-13 Stephane Carrez <stcarrez@nerim.fr>
15
16 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
17 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
18 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
19 memory banks.
20 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
21
aec421e0
TS
222002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
23
24 * mips.h (INSN_MIPS16): New define.
25
cd61ebfe
AM
262002-07-08 Alan Modra <amodra@bigpond.net.au>
27
28 * i386.h: Remove IgnoreSize from movsx and movzx.
29
92007e40
AM
302002-06-08 Alan Modra <amodra@bigpond.net.au>
31
32 * a29k.h: Replace CONST with const.
33 (CONST): Don't define.
34 * convex.h: Replace CONST with const.
35 (CONST): Don't define.
36 * dlx.h: Replace CONST with const.
37 * or32.h (CONST): Don't define.
38
deec1734
CD
392002-05-30 Chris G. Demetriou <cgd@broadcom.com>
40
41 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
42 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
43 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
44 (INSN_MDMX): New constants, for MDMX support.
45 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
46
d172d4ba
NC
472002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
48
49 * dlx.h: New file.
50
b3f7d5fd
AM
512002-05-25 Alan Modra <amodra@bigpond.net.au>
52
53 * ia64.h: Use #include "" instead of <> for local header files.
54 * sparc.h: Likewise.
55
771c7ce4
TS
562002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
57
58 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
59
b9c9142c
AV
602002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
61
62 * h8300.h: Corrected defs of all control regs
63 and eepmov instr.
64
cd47f4f1
AM
652002-04-11 Alan Modra <amodra@bigpond.net.au>
66
67 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 68 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 69
1f25f5d3
CD
702002-03-15 Chris G. Demetriou <cgd@broadcom.com>
71
72 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
73 instructions.
74 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
75 may be passed along with the ISA bitmask.
76
e4b29ec6
AM
772002-03-05 Paul Koning <pkoning@equallogic.com>
78
79 * pdp11.h: Add format codes for float instruction formats.
80
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AM
812002-02-25 Alan Modra <amodra@bigpond.net.au>
82
83 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
84
5a8b245c
JH
85Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
86
87 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
88
85a33fe2
JH
89Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
90
91 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
92 (xchg): Fix.
93 (in, out): Disable 64bit operands.
94 (call, jmp): Avoid REX prefixes.
95 (jcxz): Prohibit in 64bit mode
96 (jrcxz, loop): Add 64bit variants.
97 (movq): Fix patterns.
98 (movmskps, pextrw, pinstrw): Add 64bit variants.
99
3b16e843
NC
1002002-01-31 Ivan Guzvinec <ivang@opencores.org>
101
102 * or32.h: New file.
103
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GH
1042002-01-22 Graydon Hoare <graydon@redhat.com>
105
106 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
107 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
108
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AM
1092002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
110
111 * h8300.h: Comment typo fix.
112
a09cf9bd
MG
1132002-01-03 matthew green <mrg@redhat.com>
114
115 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
116 (PPC_OPCODE_BOOKE64): Likewise.
117
1befefea
JL
118Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
119
120 * hppa.h (call, ret): Move to end of table.
121 (addb, addib): PA2.0 variants should have been PA2.0W.
122 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
123 happy.
124 (fldw, fldd, fstw, fstd, bb): Likewise.
125 (short loads/stores): Tweak format specifier slightly to keep
126 disassembler happy.
127 (indexed loads/stores): Likewise.
128 (absolute loads/stores): Likewise.
129
124ddbb2
AO
1302001-12-04 Alexandre Oliva <aoliva@redhat.com>
131
132 * d10v.h (OPERAND_NOSP): New macro.
133
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AO
1342001-11-29 Alexandre Oliva <aoliva@redhat.com>
135
136 * d10v.h (OPERAND_SP): New macro.
137
802a735e
AM
1382001-11-15 Alan Modra <amodra@bigpond.net.au>
139
140 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
141
6e917903
TW
1422001-11-11 Timothy Wall <twall@alum.mit.edu>
143
144 * tic54x.h: Revise opcode layout; don't really need a separate
145 structure for parallel opcodes.
146
e5470cdc
AM
1472001-11-13 Zack Weinberg <zack@codesourcery.com>
148 Alan Modra <amodra@bigpond.net.au>
149
150 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
151 accept WordReg.
152
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CD
1532001-11-04 Chris Demetriou <cgd@broadcom.com>
154
155 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
156
3c3bdf30
NC
1572001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
158
159 * mmix.h: New file.
160
e4432525
CD
1612001-10-18 Chris Demetriou <cgd@broadcom.com>
162
163 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
164 of the expression, to make source code merging easier.
165
8ff529d8
CD
1662001-10-17 Chris Demetriou <cgd@broadcom.com>
167
168 * mips.h: Sort coprocessor instruction argument characters
169 in comment, add a few more words of description for "H".
170
2228315b
CD
1712001-10-17 Chris Demetriou <cgd@broadcom.com>
172
173 * mips.h (INSN_SB1): New cpu-specific instruction bit.
174 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
175 if cpu is CPU_SB1.
176
f5c120c5
MG
1772001-10-17 matthew green <mrg@redhat.com>
178
179 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
180
418c1742
MG
1812001-10-12 matthew green <mrg@redhat.com>
182
0716ce0d
MG
183 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
184 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
185 instructions, respectively.
418c1742 186
6ff2f2ba
NC
1872001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
188
189 * v850.h: Remove spurious comment.
190
015cf428
NC
1912001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
192
193 * h8300.h: Fix compile time warning messages
194
847b8b31
RH
1952001-09-04 Richard Henderson <rth@redhat.com>
196
197 * alpha.h (struct alpha_operand): Pack elements into bitfields.
198
a98b9439
EC
1992001-08-31 Eric Christopher <echristo@redhat.com>
200
201 * mips.h: Remove CPU_MIPS32_4K.
202
a6959011
AM
2032001-08-27 Torbjorn Granlund <tege@swox.com>
204
205 * ppc.h (PPC_OPERAND_DS): Define.
206
d83c6548
AJ
2072001-08-25 Andreas Jaeger <aj@suse.de>
208
209 * d30v.h: Fix declaration of reg_name_cnt.
210
211 * d10v.h: Fix declaration of d10v_reg_name_cnt.
212
213 * arc.h: Add prototypes from opcodes/arc-opc.c.
214
99c14723
TS
2152001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
216
217 * mips.h (INSN_10000): Define.
218 (OPCODE_IS_MEMBER): Check for INSN_10000.
219
11b37b7b
AM
2202001-08-10 Alan Modra <amodra@one.net.au>
221
222 * ppc.h: Revert 2001-08-08.
223
3b16e843
NC
2242001-08-10 Richard Sandiford <rsandifo@redhat.com>
225
226 * mips.h (INSN_GP32): Remove.
227 (OPCODE_IS_MEMBER): Remove gp32 parameter.
228 (M_MOVE): New macro identifier.
229
0f1bac05
AM
2302001-08-08 Alan Modra <amodra@one.net.au>
231
232 1999-10-25 Torbjorn Granlund <tege@swox.com>
233 * ppc.h (struct powerpc_operand): New field `reloc'.
234
3b16e843
NC
2352001-08-01 Aldy Hernandez <aldyh@redhat.com>
236
237 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
238
2392001-07-12 Jeff Johnston <jjohnstn@redhat.com>
240
241 * cgen.h (CGEN_INSN): Add regex support.
242 (build_insn_regex): Declare.
243
81f6038f
FCE
2442001-07-11 Frank Ch. Eigler <fche@redhat.com>
245
246 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
247 (cgen_cpu_desc): Ditto.
248
32cfffe3
BE
2492001-07-07 Ben Elliston <bje@redhat.com>
250
251 * m88k.h: Clean up and reformat. Remove unused code.
252
3e890047
GK
2532001-06-14 Geoffrey Keating <geoffk@redhat.com>
254
255 * cgen.h (cgen_keyword): Add nonalpha_chars field.
256
d1cf510e
NC
2572001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
258
259 * mips.h (CPU_R12000): Define.
260
e281c457
JH
2612001-05-23 John Healy <jhealy@redhat.com>
262
263 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 264
aa5f19f2
NC
2652001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
266
267 * mips.h (INSN_ISA_MASK): Define.
268
67d6227d
AM
2692001-05-12 Alan Modra <amodra@one.net.au>
270
271 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
272 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
273 and use InvMem as these insns must have register operands.
274
992aaec9
AM
2752001-05-04 Alan Modra <amodra@one.net.au>
276
277 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
278 and pextrw to swap reg/rm assignments.
279
4ef7f0bf
HPN
2802001-04-05 Hans-Peter Nilsson <hp@axis.com>
281
282 * cris.h (enum cris_insn_version_usage): Correct comment for
283 cris_ver_v3p.
284
0f17484f
AM
2852001-03-24 Alan Modra <alan@linuxcare.com.au>
286
287 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
288 Add InvMem to first operand of "maskmovdqu".
289
7ccb5238
HPN
2902001-03-22 Hans-Peter Nilsson <hp@axis.com>
291
292 * cris.h (ADD_PC_INCR_OPCODE): New macro.
293
361bfa20
KH
2942001-03-21 Kazu Hirata <kazu@hxi.com>
295
296 * h8300.h: Fix formatting.
297
87890af0
AM
2982001-03-22 Alan Modra <alan@linuxcare.com.au>
299
300 * i386.h (i386_optab): Add paddq, psubq.
301
2e98d2de
AM
3022001-03-19 Alan Modra <alan@linuxcare.com.au>
303
304 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
305
80a523c2
NC
3062001-02-28 Igor Shevlyakov <igor@windriver.com>
307
308 * m68k.h: new defines for Coldfire V4. Update mcf to know
309 about mcf5407.
310
e135f41b
NC
3112001-02-18 lars brinkhoff <lars@nocrew.org>
312
313 * pdp11.h: New file.
314
3152001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
316
317 * i386.h (i386_optab): SSE integer converison instructions have
318 64bit versions on x86-64.
319
8eaec934
NC
3202001-02-10 Nick Clifton <nickc@redhat.com>
321
322 * mips.h: Remove extraneous whitespace. Formating change to allow
323 for future contribution.
324
a85d7ed0
NC
3252001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
326
327 * s390.h: New file.
328
0715dc88
PM
3292001-02-02 Patrick Macdonald <patrickm@redhat.com>
330
331 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
332 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
333 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
334
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AM
3352001-01-24 Karsten Keil <kkeil@suse.de>
336
337 * i386.h (i386_optab): Fix swapgs
338
1328dc98
AM
3392001-01-14 Alan Modra <alan@linuxcare.com.au>
340
341 * hppa.h: Describe new '<' and '>' operand types, and tidy
342 existing comments.
343 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
344 Remove duplicate "ldw j(s,b),x". Sort some entries.
345
e135f41b 3462001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
347
348 * i386.h (i386_optab): Fix pusha and ret templates.
349
0d2bcfaf
NC
3502001-01-11 Peter Targett <peter.targett@arccores.com>
351
352 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
353 definitions for masking cpu type.
354 (arc_ext_operand_value) New structure for storing extended
355 operands.
356 (ARC_OPERAND_*) Flags for operand values.
357
3582001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
359
360 * i386.h (pinsrw): Add.
361 (pshufw): Remove.
362 (cvttpd2dq): Fix operands.
363 (cvttps2dq): Likewise.
364 (movq2q): Rename to movdq2q.
365
079966a8
AM
3662001-01-10 Richard Schaal <richard.schaal@intel.com>
367
368 * i386.h: Correct movnti instruction.
369
8c1f9e76
JJ
3702001-01-09 Jeff Johnston <jjohnstn@redhat.com>
371
372 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
373 of operands (unsigned char or unsigned short).
374 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
375 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
376
0d2bcfaf 3772001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
378
379 * i386.h (i386_optab): Make [sml]fence template to use immext field.
380
0d2bcfaf 3812001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
382
383 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
384 introduced by Pentium4
385
0d2bcfaf 3862000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
387
388 * i386.h (i386_optab): Add "rex*" instructions;
389 add swapgs; disable jmp/call far direct instructions for
390 64bit mode; add syscall and sysret; disable registers for 0xc6
391 template. Add 'q' suffixes to extendable instructions, disable
079966a8 392 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
393 (i386_regtab): Add extended registers.
394 (*Suf): Add No_qSuf.
395 (q_Suf, wlq_Suf, bwlq_Suf): New.
396
0d2bcfaf 3972000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
398
399 * i386.h (i386_optab): Replace "Imm" with "EncImm".
400 (i386_regtab): Add flags field.
d83c6548 401
bf40d919
NC
4022000-12-12 Nick Clifton <nickc@redhat.com>
403
404 * mips.h: Fix formatting.
405
4372b673
NC
4062000-12-01 Chris Demetriou <cgd@sibyte.com>
407
408 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
409 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
410 OP_*_SYSCALL definitions.
411 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
412 19 bit wait codes.
413 (MIPS operand specifier comments): Remove 'm', add 'U' and
414 'J', and update the meaning of 'B' so that it's more general.
415
e7af610e
NC
416 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
417 INSN_ISA5): Renumber, redefine to mean the ISA at which the
418 instruction was added.
419 (INSN_ISA32): New constant.
420 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
421 Renumber to avoid new and/or renumbered INSN_* constants.
422 (INSN_MIPS32): Delete.
423 (ISA_UNKNOWN): New constant to indicate unknown ISA.
424 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
425 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 426 constants available at that ISA level.
e7af610e
NC
427 (CPU_UNKNOWN): New constant to indicate unknown CPU.
428 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
429 define it with a unique value.
430 (OPCODE_IS_MEMBER): Update for new ISA membership-related
431 constant meanings.
432
84ea6cf2 433 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 434 definitions.
84ea6cf2 435
c6c98b38
NC
436 * mips.h (CPU_SB1): New constant.
437
19f7b010
JJ
4382000-10-20 Jakub Jelinek <jakub@redhat.com>
439
440 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
441 Note that '3' is used for siam operand.
442
139368c9
JW
4432000-09-22 Jim Wilson <wilson@cygnus.com>
444
445 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
446
156c2f8b 4472000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 448
156c2f8b
NC
449 * mips.h: Use defines instead of hard-coded processor numbers.
450 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 451 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
452 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
453 CPU_4KC, CPU_4KM, CPU_4KP): Define..
454 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 455 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 456 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
457 Add 'P' to used characters.
458 Use 'H' for coprocessor select field.
156c2f8b 459 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
460 Document new arg characters and add to used characters.
461 (INSN_MIPS32): New define for MIPS32 extensions.
462 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 463
3c5ce02e
AM
4642000-09-05 Alan Modra <alan@linuxcare.com.au>
465
466 * hppa.h: Mention cz completer.
467
50b81f19
JW
4682000-08-16 Jim Wilson <wilson@cygnus.com>
469
470 * ia64.h (IA64_OPCODE_POSTINC): New.
471
fc29466d
L
4722000-08-15 H.J. Lu <hjl@gnu.org>
473
474 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
475 IgnoreSize change.
476
4f1d9bd8
NC
4772000-08-08 Jason Eckhardt <jle@cygnus.com>
478
479 * i860.h: Small formatting adjustments.
480
45ee1401
DC
4812000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
482
483 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
484 Move related opcodes closer to each other.
485 Minor changes in comments, list undefined opcodes.
486
9d551405
DB
4872000-07-26 Dave Brolley <brolley@redhat.com>
488
489 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
490
4f1d9bd8
NC
4912000-07-22 Jason Eckhardt <jle@cygnus.com>
492
493 * i860.h (btne, bte, bla): Changed these opcodes
494 to use sbroff ('r') instead of split16 ('s').
495 (J, K, L, M): New operand types for 16-bit aligned fields.
496 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
497 use I, J, K, L, M instead of just I.
498 (T, U): New operand types for split 16-bit aligned fields.
499 (st.x): Changed these opcodes to use S, T, U instead of just S.
500 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
501 exist on the i860.
502 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
503 (pfeq.ss, pfeq.dd): New opcodes.
504 (st.s): Fixed incorrect mask bits.
505 (fmlow): Fixed incorrect mask bits.
506 (fzchkl, pfzchkl): Fixed incorrect mask bits.
507 (faddz, pfaddz): Fixed incorrect mask bits.
508 (form, pform): Fixed incorrect mask bits.
509 (pfld.l): Fixed incorrect mask bits.
510 (fst.q): Fixed incorrect mask bits.
511 (all floating point opcodes): Fixed incorrect mask bits for
512 handling of dual bit.
513
c8488617
HPN
5142000-07-20 Hans-Peter Nilsson <hp@axis.com>
515
516 cris.h: New file.
517
65aa24b6
NC
5182000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
519
520 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
521 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
522 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
523 (AVR_ISA_M83): Define for ATmega83, ATmega85.
524 (espm): Remove, because ESPM removed in databook update.
525 (eicall, eijmp): Move to the end of opcode table.
526
60bcf0fa
NC
5272000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
528
529 * m68hc11.h: New file for support of Motorola 68hc11.
530
60a2978a
DC
531Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
532
533 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
534
68ab2dd9
DC
535Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
536
537 * avr.h: New file with AVR opcodes.
538
f0662e27
DL
539Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
540
541 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
542
b722f2be
AM
5432000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
544
545 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
546
f9e0cf0b
AM
5472000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
548
549 * i386.h: Use sl_FP, not sl_Suf for fild.
550
f660ee8b
FCE
5512000-05-16 Frank Ch. Eigler <fche@redhat.com>
552
553 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
554 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
555 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
556 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
557
558b0a60
AM
5582000-05-13 Alan Modra <alan@linuxcare.com.au>,
559
560 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
561
e413e4e9
AM
5622000-05-13 Alan Modra <alan@linuxcare.com.au>,
563 Alexander Sokolov <robocop@netlink.ru>
564
565 * i386.h (i386_optab): Add cpu_flags for all instructions.
566
5672000-05-13 Alan Modra <alan@linuxcare.com.au>
568
569 From Gavin Romig-Koch <gavin@cygnus.com>
570 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
571
5c84d377
TW
5722000-05-04 Timothy Wall <twall@cygnus.com>
573
574 * tic54x.h: New.
575
966f959b
C
5762000-05-03 J.T. Conklin <jtc@redback.com>
577
578 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
579 (PPC_OPERAND_VR): New operand flag for vector registers.
580
c5d05dbb
JL
5812000-05-01 Kazu Hirata <kazu@hxi.com>
582
583 * h8300.h (EOP): Add missing initializer.
584
a7fba0e0
JL
585Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
586
587 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
588 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
589 New operand types l,y,&,fe,fE,fx added to support above forms.
590 (pa_opcodes): Replaced usage of 'x' as source/target for
591 floating point double-word loads/stores with 'fx'.
592
800eeca4
JW
593Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
594 David Mosberger <davidm@hpl.hp.com>
595 Timothy Wall <twall@cygnus.com>
596 Jim Wilson <wilson@cygnus.com>
597
598 * ia64.h: New file.
599
ba23e138
NC
6002000-03-27 Nick Clifton <nickc@cygnus.com>
601
602 * d30v.h (SHORT_A1): Fix value.
603 (SHORT_AR): Renumber so that it is at the end of the list of short
604 instructions, not the end of the list of long instructions.
605
d0b47220
AM
6062000-03-26 Alan Modra <alan@linuxcare.com>
607
608 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
609 problem isn't really specific to Unixware.
610 (OLDGCC_COMPAT): Define.
611 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
612 destination %st(0).
613 Fix lots of comments.
614
866afedc
NC
6152000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
616
617 * d30v.h:
618 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
619 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
620 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
621 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
622 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
623 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
624 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
625
cc5ca5ce
AM
6262000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
627
628 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
629 fistpd without suffix.
630
68e324a2
NC
6312000-02-24 Nick Clifton <nickc@cygnus.com>
632
633 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
634 'signed_overflow_ok_p'.
635 Delete prototypes for cgen_set_flags() and cgen_get_flags().
636
60f036a2
AH
6372000-02-24 Andrew Haley <aph@cygnus.com>
638
639 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
640 (CGEN_CPU_TABLE): flags: new field.
641 Add prototypes for new functions.
d83c6548 642
9b9b5cd4
AM
6432000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
644
645 * i386.h: Add some more UNIXWARE_COMPAT comments.
646
5b93d8bb
AM
6472000-02-23 Linas Vepstas <linas@linas.org>
648
649 * i370.h: New file.
650
4f1d9bd8
NC
6512000-02-22 Chandra Chavva <cchavva@cygnus.com>
652
653 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
654 cannot be combined in parallel with ADD/SUBppp.
655
87f398dd
AH
6562000-02-22 Andrew Haley <aph@cygnus.com>
657
658 * mips.h: (OPCODE_IS_MEMBER): Add comment.
659
367c01af
AH
6601999-12-30 Andrew Haley <aph@cygnus.com>
661
9a1e79ca
AH
662 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
663 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
664 insns.
367c01af 665
add0c677
AM
6662000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
667
668 * i386.h: Qualify intel mode far call and jmp with x_Suf.
669
3138f287
AM
6701999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
671
672 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
673 indirect jumps and calls. Add FF/3 call for intel mode.
674
ccecd07b
JL
675Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
676
677 * mn10300.h: Add new operand types. Add new instruction formats.
678
b37e19e9
JL
679Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
680
681 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
682 instruction.
683
5fce5ddf
GRK
6841999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
685
686 * mips.h (INSN_ISA5): New.
687
2bd7f1f3
GRK
6881999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
689
690 * mips.h (OPCODE_IS_MEMBER): New.
691
4df2b5c5
NC
6921999-10-29 Nick Clifton <nickc@cygnus.com>
693
694 * d30v.h (SHORT_AR): Define.
695
446a06c9
MM
6961999-10-18 Michael Meissner <meissner@cygnus.com>
697
698 * alpha.h (alpha_num_opcodes): Convert to unsigned.
699 (alpha_num_operands): Ditto.
700
eca04c6a
JL
701Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
702
703 * hppa.h (pa_opcodes): Add load and store cache control to
704 instructions. Add ordered access load and store.
705
706 * hppa.h (pa_opcode): Add new entries for addb and addib.
707
708 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
709
710 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
711
c43185de
DN
712Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
713
714 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
715
ec3533da
JL
716Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
717
390f858d
JL
718 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
719 and "be" using completer prefixes.
720
8c47ebd9
JL
721 * hppa.h (pa_opcodes): Add initializers to silence compiler.
722
ec3533da
JL
723 * hppa.h: Update comments about character usage.
724
18369bea
JL
725Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
726
727 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
728 up the new fstw & bve instructions.
729
c36efdd2
JL
730Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
731
d3ffb032
JL
732 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
733 instructions.
734
c49ec3da
JL
735 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
736
5d2e7ecc
JL
737 * hppa.h (pa_opcodes): Add long offset double word load/store
738 instructions.
739
6397d1a2
JL
740 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
741 stores.
742
142f0fe0
JL
743 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
744
f5a68b45
JL
745 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
746
8235801e
JL
747 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
748
35184366
JL
749 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
750
f0bfde5e
JL
751 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
752
27bbbb58
JL
753 * hppa.h (pa_opcodes): Add support for "b,l".
754
c36efdd2
JL
755 * hppa.h (pa_opcodes): Add support for "b,gate".
756
f2727d04
JL
757Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
758
9392fb11 759 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 760 in xmpyu.
9392fb11 761
e0c52e99
JL
762 * hppa.h (pa_opcodes): Fix mask for probe and probei.
763
f2727d04
JL
764 * hppa.h (pa_opcodes): Fix mask for depwi.
765
52d836e2
JL
766Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
767
768 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
769 an explicit output argument.
770
90765e3a
JL
771Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
772
773 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
774 Add a few PA2.0 loads and store variants.
775
8340b17f
ILT
7761999-09-04 Steve Chamberlain <sac@pobox.com>
777
778 * pj.h: New file.
779
5f47d35b
AM
7801999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
781
782 * i386.h (i386_regtab): Move %st to top of table, and split off
783 other fp reg entries.
784 (i386_float_regtab): To here.
785
1c143202
JL
786Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
787
7d8fdb64
JL
788 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
789 by 'f'.
790
90927b9c
JL
791 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
792 Add supporting args.
793
1d16bf9c
JL
794 * hppa.h: Document new completers and args.
795 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
796 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
797 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
798 pmenb and pmdis.
799
96226a68
JL
800 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
801 hshr, hsub, mixh, mixw, permh.
802
5d4ba527
JL
803 * hppa.h (pa_opcodes): Change completers in instructions to
804 use 'c' prefix.
805
e9fc28c6
JL
806 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
807 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
808
1c143202
JL
809 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
810 fnegabs to use 'I' instead of 'F'.
811
9e525108
AM
8121999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
813
814 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
815 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
816 Alphabetically sort PIII insns.
817
e8da1bf1
DE
818Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
819
820 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
821
7d627258
JL
822Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
823
5696871a
JL
824 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
825 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
826
7d627258
JL
827 * hppa.h: Document 64 bit condition completers.
828
c5e52916
JL
829Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
830
831 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
832
eecb386c
AM
8331999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
834
835 * i386.h (i386_optab): Add DefaultSize modifier to all insns
836 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
837 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
838
88a380f3
JL
839Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
840 Jeff Law <law@cygnus.com>
841
842 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
843
844 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 845
d83c6548 846 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
847 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
848
145cf1f0
AM
8491999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
850
851 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
852
73826640
JL
853Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
854
855 * hppa.h (struct pa_opcode): Add new field "flags".
856 (FLAGS_STRICT): Define.
857
b65db252
JL
858Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
859 Jeff Law <law@cygnus.com>
860
f7fc668b
JL
861 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
862
863 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 864
10084519
AM
8651999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
866
867 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
868 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
869 flag to fcomi and friends.
870
cd8a80ba
JL
871Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
872
873 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 874 integer logical instructions.
cd8a80ba 875
1fca749b
ILT
8761999-05-28 Linus Nordberg <linus.nordberg@canit.se>
877
878 * m68k.h: Document new formats `E', `G', `H' and new places `N',
879 `n', `o'.
880
881 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
882 and new places `m', `M', `h'.
883
aa008907
JL
884Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
885
886 * hppa.h (pa_opcodes): Add several processor specific system
887 instructions.
888
e26b85f0
JL
889Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
890
d83c6548 891 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
892 "addb", and "addib" to be used by the disassembler.
893
c608c12e
AM
8941999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
895
896 * i386.h (ReverseModrm): Remove all occurences.
897 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
898 movmskps, pextrw, pmovmskb, maskmovq.
899 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
900 ignore the data size prefix.
901
902 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
903 Mostly stolen from Doug Ledford <dledford@redhat.com>
904
45c18104
RH
905Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
906
907 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
908
252b5132
RH
9091999-04-14 Doug Evans <devans@casey.cygnus.com>
910
911 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
912 (CGEN_ATTR_TYPE): Update.
913 (CGEN_ATTR_MASK): Number booleans starting at 0.
914 (CGEN_ATTR_VALUE): Update.
915 (CGEN_INSN_ATTR): Update.
916
917Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
918
919 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
920 instructions.
921
922Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
923
924 * hppa.h (bb, bvb): Tweak opcode/mask.
925
926
9271999-03-22 Doug Evans <devans@casey.cygnus.com>
928
929 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
930 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
931 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
932 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
933 Delete member max_insn_size.
934 (enum cgen_cpu_open_arg): New enum.
935 (cpu_open): Update prototype.
936 (cpu_open_1): Declare.
937 (cgen_set_cpu): Delete.
938
9391999-03-11 Doug Evans <devans@casey.cygnus.com>
940
941 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
942 (CGEN_OPERAND_NIL): New macro.
943 (CGEN_OPERAND): New member `type'.
944 (@arch@_cgen_operand_table): Delete decl.
945 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
946 (CGEN_OPERAND_TABLE): New struct.
947 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
948 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
949 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
950 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
951 {get,set}_{int,vma}_operand.
952 (@arch@_cgen_cpu_open): New arg `isa'.
953 (cgen_set_cpu): Ditto.
954
955Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
956
957 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
958
9591999-02-25 Doug Evans <devans@casey.cygnus.com>
960
961 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
962 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
963 enum cgen_hw_type.
964 (CGEN_HW_TABLE): New struct.
965 (hw_table): Delete declaration.
966 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
967 to table entry to enum.
968 (CGEN_OPINST): Ditto.
969 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
970
971Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
972
973 * alpha.h (AXP_OPCODE_EV6): New.
974 (AXP_OPCODE_NOPAL): Include it.
975
9761999-02-09 Doug Evans <devans@casey.cygnus.com>
977
978 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
979 All uses updated. New members int_insn_p, max_insn_size,
980 parse_operand,insert_operand,extract_operand,print_operand,
981 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
982 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
983 extract_handlers,print_handlers.
984 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
985 (CGEN_ATTR_BOOL_OFFSET): New macro.
986 (CGEN_ATTR_MASK): Subtract it to compute bit number.
987 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
988 (cgen_opcode_handler): Renamed from cgen_base.
989 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
990 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
991 all uses updated.
992 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
993 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
994 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
995 (CGEN_OPCODE,CGEN_IBASE): New types.
996 (CGEN_INSN): Rewrite.
997 (CGEN_{ASM,DIS}_HASH*): Delete.
998 (init_opcode_table,init_ibld_table): Declare.
999 (CGEN_INSN_ATTR): New type.
1000
1001Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1002
252b5132
RH
1003 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1004 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1005 Change *Suf definitions to include x and d suffixes.
1006 (movsx): Use w_Suf and b_Suf.
1007 (movzx): Likewise.
1008 (movs): Use bwld_Suf.
1009 (fld): Change ordering. Use sld_FP.
1010 (fild): Add Intel Syntax equivalent of fildq.
1011 (fst): Use sld_FP.
1012 (fist): Use sld_FP.
1013 (fstp): Use sld_FP. Add x_FP version.
1014 (fistp): LLongMem version for Intel Syntax.
1015 (fcom, fcomp): Use sld_FP.
1016 (fadd, fiadd, fsub): Use sld_FP.
1017 (fsubr): Use sld_FP.
1018 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1019
10201999-01-27 Doug Evans <devans@casey.cygnus.com>
1021
1022 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1023 CGEN_MODE_UINT.
1024
e135f41b 10251999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1026
1027 * hppa.h (bv): Fix mask.
1028
10291999-01-05 Doug Evans <devans@casey.cygnus.com>
1030
1031 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1032 (CGEN_ATTR): Use it.
1033 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1034 (CGEN_ATTR_TABLE): New member dfault.
1035
10361998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1037
1038 * mips.h (MIPS16_INSN_BRANCH): New.
1039
1040Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1041
1042 The following is part of a change made by Edith Epstein
d83c6548
AJ
1043 <eepstein@sophia.cygnus.com> as part of a project to merge in
1044 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1045
1046 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1047 after.
252b5132
RH
1048
1049Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1050
1051 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1052 status word instructions.
252b5132
RH
1053
10541998-11-30 Doug Evans <devans@casey.cygnus.com>
1055
1056 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1057 (struct cgen_keyword_entry): Ditto.
1058 (struct cgen_operand): Ditto.
1059 (CGEN_IFLD): New typedef, with associated access macros.
1060 (CGEN_IFMT): New typedef, with associated access macros.
1061 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1062 (CGEN_IVALUE): New typedef.
1063 (struct cgen_insn): Delete const on syntax,attrs members.
1064 `format' now points to format data. Type of `value' is now
1065 CGEN_IVALUE.
1066 (struct cgen_opcode_table): New member ifld_table.
1067
10681998-11-18 Doug Evans <devans@casey.cygnus.com>
1069
1070 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1071 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1072 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1073 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1074 (cgen_opcode_table): Update type of dis_hash fn.
1075 (extract_operand): Update type of `insn_value' arg.
1076
1077Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1078
1079 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1080
1081Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1082
1083 * mips.h (INSN_MULT): Added.
1084
1085Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1086
1087 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1088
1089Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1090
1091 * cgen.h (CGEN_INSN_INT): New typedef.
1092 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1093 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1094 (CGEN_INSN_BYTES_PTR): New typedef.
1095 (CGEN_EXTRACT_INFO): New typedef.
1096 (cgen_insert_fn,cgen_extract_fn): Update.
1097 (cgen_opcode_table): New member `insn_endian'.
1098 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1099 (insert_operand,extract_operand): Update.
1100 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1101
1102Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1103
1104 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1105 (struct CGEN_HW_ENTRY): New member `attrs'.
1106 (CGEN_HW_ATTR): New macro.
1107 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1108 (CGEN_INSN_INVALID_P): New macro.
1109
1110Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1111
1112 * hppa.h: Add "fid".
d83c6548 1113
252b5132
RH
1114Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1115
1116 From Robert Andrew Dale <rob@nb.net>
1117 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1118 (AMD_3DNOW_OPCODE): Define.
1119
1120Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1121
1122 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1123
1124Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1125
1126 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1127
1128Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1129
1130 Move all global state data into opcode table struct, and treat
1131 opcode table as something that is "opened/closed".
1132 * cgen.h (CGEN_OPCODE_DESC): New type.
1133 (all fns): New first arg of opcode table descriptor.
1134 (cgen_set_parse_operand_fn): Add prototype.
1135 (cgen_current_machine,cgen_current_endian): Delete.
1136 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1137 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1138 dis_hash_table,dis_hash_table_entries.
1139 (opcode_open,opcode_close): Add prototypes.
1140
1141 * cgen.h (cgen_insn): New element `cdx'.
1142
1143Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1144
1145 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1146
1147Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1148
1149 * mn10300.h: Add "no_match_operands" field for instructions.
1150 (MN10300_MAX_OPERANDS): Define.
1151
1152Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1153
1154 * cgen.h (cgen_macro_insn_count): Declare.
1155
1156Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1157
1158 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1159 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1160 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1161 set_{int,vma}_operand.
1162
1163Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1164
1165 * mn10300.h: Add "machine" field for instructions.
1166 (MN103, AM30): Define machine types.
d83c6548 1167
252b5132
RH
1168Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1169
1170 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1171
11721998-06-18 Ulrich Drepper <drepper@cygnus.com>
1173
1174 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1175
1176Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1177
1178 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1179 and ud2b.
1180 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1181 those that happen to be implemented on pentiums.
1182
1183Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1184
1185 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1186 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1187 with Size16|IgnoreSize or Size32|IgnoreSize.
1188
1189Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1190
1191 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1192 (REPE): Rename to REPE_PREFIX_OPCODE.
1193 (i386_regtab_end): Remove.
1194 (i386_prefixtab, i386_prefixtab_end): Remove.
1195 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1196 of md_begin.
1197 (MAX_OPCODE_SIZE): Define.
1198 (i386_optab_end): Remove.
1199 (sl_Suf): Define.
1200 (sl_FP): Use sl_Suf.
1201
1202 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1203 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1204 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1205 data32, dword, and adword prefixes.
1206 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1207 regs.
1208
1209Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1210
1211 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1212
1213 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1214 register operands, because this is a common idiom. Flag them with
1215 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1216 fdivrp because gcc erroneously generates them. Also flag with a
1217 warning.
1218
1219 * i386.h: Add suffix modifiers to most insns, and tighter operand
1220 checks in some cases. Fix a number of UnixWare compatibility
1221 issues with float insns. Merge some floating point opcodes, using
1222 new FloatMF modifier.
1223 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1224 consistency.
1225
1226 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1227 IgnoreDataSize where appropriate.
1228
1229Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1230
1231 * i386.h: (one_byte_segment_defaults): Remove.
1232 (two_byte_segment_defaults): Remove.
1233 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1234
1235Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1236
1237 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1238 (cgen_hw_lookup_by_num): Declare.
1239
1240Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1241
1242 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1243 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1244
1245Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1246
1247 * cgen.h (cgen_asm_init_parse): Delete.
1248 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1249 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1250
1251Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1252
1253 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1254 (cgen_asm_finish_insn): Update prototype.
1255 (cgen_insn): New members num, data.
1256 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1257 dis_hash, dis_hash_table_size moved to ...
1258 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1259 All uses updated. New members asm_hash_p, dis_hash_p.
1260 (CGEN_MINSN_EXPANSION): New struct.
1261 (cgen_expand_macro_insn): Declare.
1262 (cgen_macro_insn_count): Declare.
1263 (get_insn_operands): Update prototype.
1264 (lookup_get_insn_operands): Declare.
1265
1266Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1267
1268 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1269 regKludge. Add operands types for string instructions.
1270
1271Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1272
1273 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1274 table.
1275
1276Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1277
1278 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1279 for `gettext'.
1280
1281Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1282
1283 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1284 Add IsString flag to string instructions.
1285 (IS_STRING): Don't define.
1286 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1287 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1288 (SS_PREFIX_OPCODE): Define.
1289
1290Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1291
1292 * i386.h: Revert March 24 patch; no more LinearAddress.
1293
1294Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1295
1296 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1297 instructions, and instead add FWait opcode modifier. Add short
1298 form of fldenv and fstenv.
1299 (FWAIT_OPCODE): Define.
1300
1301 * i386.h (i386_optab): Change second operand constraint of `mov
1302 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1303 allow legal instructions such as `movl %gs,%esi'
1304
1305Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1306
1307 * h8300.h: Various changes to fully bracket initializers.
1308
1309Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1310
1311 * i386.h: Set LinearAddress for lidt and lgdt.
1312
1313Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1314
1315 * cgen.h (CGEN_BOOL_ATTR): New macro.
1316
1317Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1318
1319 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1320
1321Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1322
1323 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1324 (cgen_insn): Record syntax and format entries here, rather than
1325 separately.
1326
1327Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1328
1329 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1330
1331Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1332
1333 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1334 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1335 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1336
1337Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1338
1339 * cgen.h (lookup_insn): New argument alias_p.
1340
1341Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1342
1343Fix rac to accept only a0:
1344 * d10v.h (OPERAND_ACC): Split into:
1345 (OPERAND_ACC0, OPERAND_ACC1) .
1346 (OPERAND_GPR): Define.
1347
1348Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1349
1350 * cgen.h (CGEN_FIELDS): Define here.
1351 (CGEN_HW_ENTRY): New member `type'.
1352 (hw_list): Delete decl.
1353 (enum cgen_mode): Declare.
1354 (CGEN_OPERAND): New member `hw'.
1355 (enum cgen_operand_instance_type): Declare.
1356 (CGEN_OPERAND_INSTANCE): New type.
1357 (CGEN_INSN): New member `operands'.
1358 (CGEN_OPCODE_DATA): Make hw_list const.
1359 (get_insn_operands,lookup_insn): Add prototypes for.
1360
1361Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1362
1363 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1364 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1365 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1366 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1367
1368Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1369
1370 * cgen.h: Correct typo in comment end marker.
1371
1372Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1373
1374 * tic30.h: New file.
1375
5a109b67 1376Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1377
1378 * cgen.h: Add prototypes for cgen_save_fixups(),
1379 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1380 of cgen_asm_finish_insn() to return a char *.
1381
1382Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1383
1384 * cgen.h: Formatting changes to improve readability.
1385
1386Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1387
1388 * cgen.h (*): Clean up pass over `struct foo' usage.
1389 (CGEN_ATTR): Make unsigned char.
1390 (CGEN_ATTR_TYPE): Update.
1391 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1392 (cgen_base): Move member `attrs' to cgen_insn.
1393 (CGEN_KEYWORD): New member `null_entry'.
1394 (CGEN_{SYNTAX,FORMAT}): New types.
1395 (cgen_insn): Format and syntax separated from each other.
1396
1397Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1398
1399 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1400 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1401 flags_{used,set} long.
1402 (d30v_operand): Make flags field long.
1403
1404Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1405
1406 * m68k.h: Fix comment describing operand types.
1407
1408Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1409
1410 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1411 everything else after down.
1412
1413Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1414
1415 * d10v.h (OPERAND_FLAG): Split into:
1416 (OPERAND_FFLAG, OPERAND_CFLAG) .
1417
1418Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1419
1420 * mips.h (struct mips_opcode): Changed comments to reflect new
1421 field usage.
1422
1423Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1424
1425 * mips.h: Added to comments a quick-ref list of all assigned
1426 operand type characters.
1427 (OP_{MASK,SH}_PERFREG): New macros.
1428
1429Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1430
1431 * sparc.h: Add '_' and '/' for v9a asr's.
1432 Patch from David Miller <davem@vger.rutgers.edu>
1433
1434Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1435
1436 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1437 area are not available in the base model (H8/300).
1438
1439Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1440
1441 * m68k.h: Remove documentation of ` operand specifier.
1442
1443Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1444
1445 * m68k.h: Document q and v operand specifiers.
1446
1447Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1448
1449 * v850.h (struct v850_opcode): Add processors field.
1450 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1451 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1452 (PROCESSOR_V850EA): New bit constants.
1453
1454Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1455
1456 Merge changes from Martin Hunt:
1457
1458 * d30v.h: Allow up to 64 control registers. Add
1459 SHORT_A5S format.
1460
1461 * d30v.h (LONG_Db): New form for delayed branches.
1462
1463 * d30v.h: (LONG_Db): New form for repeati.
1464
1465 * d30v.h (SHORT_D2B): New form.
1466
1467 * d30v.h (SHORT_A2): New form.
1468
1469 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1470 registers are used. Needed for VLIW optimization.
1471
1472Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1473
1474 * cgen.h: Move assembler interface section
1475 up so cgen_parse_operand_result is defined for cgen_parse_address.
1476 (cgen_parse_address): Update prototype.
1477
1478Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1479
1480 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1481
1482Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1483
1484 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1485 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1486 <paubert@iram.es>.
1487
1488 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1489 <paubert@iram.es>.
1490
1491 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1492 <paubert@iram.es>.
1493
1494 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1495 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1496
1497Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1498
1499 * v850.h (V850_NOT_R0): New flag.
1500
1501Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1502
1503 * v850.h (struct v850_opcode): Remove flags field.
1504
1505Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1506
1507 * v850.h (struct v850_opcode): Add flags field.
1508 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1509 fields.
1510 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1511 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1512
1513Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1514
1515 * arc.h: New file.
1516
1517Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1518
1519 * sparc.h (sparc_opcodes): Declare as const.
1520
1521Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1522
1523 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1524 uses single or double precision floating point resources.
1525 (INSN_NO_ISA, INSN_ISA1): Define.
1526 (cpu specific INSN macros): Tweak into bitmasks outside the range
1527 of INSN_ISA field.
1528
1529Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1530
1531 * i386.h: Fix pand opcode.
1532
1533Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1534
1535 * mips.h: Widen INSN_ISA and move it to a more convenient
1536 bit position. Add INSN_3900.
1537
1538Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1539
1540 * mips.h (struct mips_opcode): added new field membership.
1541
1542Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1543
1544 * i386.h (movd): only Reg32 is allowed.
1545
1546 * i386.h: add fcomp and ud2. From Wayne Scott
1547 <wscott@ichips.intel.com>.
1548
1549Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1550
1551 * i386.h: Add MMX instructions.
1552
1553Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1554
1555 * i386.h: Remove W modifier from conditional move instructions.
1556
1557Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1558
1559 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1560 with no arguments to match that generated by the UnixWare
1561 assembler.
1562
1563Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1564
1565 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1566 (cgen_parse_operand_fn): Declare.
1567 (cgen_init_parse_operand): Declare.
1568 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1569 new argument `want'.
1570 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1571 (enum cgen_parse_operand_type): New enum.
1572
1573Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1574
1575 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1576
1577Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1578
1579 * cgen.h: New file.
1580
1581Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1582
1583 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1584 fdivrp.
1585
1586Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1587
1588 * v850.h (extract): Make unsigned.
1589
1590Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1591
1592 * i386.h: Add iclr.
1593
1594Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1595
1596 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1597 take a direction bit.
1598
1599Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1600
1601 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1602
1603Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1604
1605 * sparc.h: Include <ansidecl.h>. Update function declarations to
1606 use prototypes, and to use const when appropriate.
1607
1608Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1609
1610 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1611
1612Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1613
1614 * d10v.h: Change pre_defined_registers to
1615 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1616
1617Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1618
1619 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1620 Change mips_opcodes from const array to a pointer,
1621 and change bfd_mips_num_opcodes from const int to int,
1622 so that we can increase the size of the mips opcodes table
1623 dynamically.
1624
1625Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1626
1627 * d30v.h (FLAG_X): Remove unused flag.
1628
1629Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1630
1631 * d30v.h: New file.
1632
1633Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1634
1635 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1636 (PDS_VALUE): Macro to access value field of predefined symbols.
1637 (tic80_next_predefined_symbol): Add prototype.
1638
1639Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1640
1641 * tic80.h (tic80_symbol_to_value): Change prototype to match
1642 change in function, added class parameter.
1643
1644Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1645
1646 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1647 endmask fields, which are somewhat weird in that 0 and 32 are
1648 treated exactly the same.
1649
1650Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1651
1652 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1653 rather than a constant that is 2**X. Reorder them to put bits for
1654 operands that have symbolic names in the upper bits, so they can
1655 be packed into an int where the lower bits contain the value that
1656 corresponds to that symbolic name.
1657 (predefined_symbo): Add struct.
1658 (tic80_predefined_symbols): Declare array of translations.
1659 (tic80_num_predefined_symbols): Declare size of that array.
1660 (tic80_value_to_symbol): Declare function.
1661 (tic80_symbol_to_value): Declare function.
1662
1663Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1664
1665 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1666
1667Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1668
1669 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1670 be the destination register.
1671
1672Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1673
1674 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1675 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1676 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1677 that the opcode can have two vector instructions in a single
1678 32 bit word and we have to encode/decode both.
1679
1680Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1681
1682 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1683 TIC80_OPERAND_RELATIVE for PC relative.
1684 (TIC80_OPERAND_BASEREL): New flag bit for register
1685 base relative.
1686
1687Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1688
1689 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1690
1691Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1692
1693 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1694 ":s" modifier for scaling.
1695
1696Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1697
1698 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1699 (TIC80_OPERAND_M_LI): Ditto
1700
1701Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1702
1703 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1704 (TIC80_OPERAND_CC): New define for condition code operand.
1705 (TIC80_OPERAND_CR): New define for control register operand.
1706
1707Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1708
1709 * tic80.h (struct tic80_opcode): Name changed.
1710 (struct tic80_opcode): Remove format field.
1711 (struct tic80_operand): Add insertion and extraction functions.
1712 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1713 correct ones.
1714 (FMT_*): Ditto.
1715
1716Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1717
1718 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1719 type IV instruction offsets.
1720
1721Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1722
1723 * tic80.h: New file.
1724
1725Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1726
1727 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1728
1729Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1730
1731 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1732 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1733 * v850.h: Fix comment, v850_operand not powerpc_operand.
1734
1735Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1736
1737 * mn10200.h: Flesh out structures and definitions needed by
1738 the mn10200 assembler & disassembler.
1739
1740Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1741
1742 * mips.h: Add mips16 definitions.
1743
1744Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1745
1746 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1747
1748Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1749
1750 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1751 (MN10300_OPERAND_MEMADDR): Define.
1752
1753Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1754
1755 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1756
1757Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1758
1759 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1760
1761Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1762
1763 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1764
1765Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1766
1767 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1768
1769Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1770
1771 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1772 negative to minimize problems with shared libraries. Organize
1773 instruction subsets by AMASK extensions and PALcode
1774 implementation.
252b5132
RH
1775 (struct alpha_operand): Move flags slot for better packing.
1776
1777Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1778
1779 * v850.h (V850_OPERAND_RELAX): New operand flag.
1780
1781Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1782
1783 * mn10300.h (FMT_*): Move operand format definitions
1784 here.
1785
1786Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1787
1788 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1789
1790Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1791
1792 * mn10300.h (mn10300_opcode): Add "format" field.
1793 (MN10300_OPERAND_*): Define.
1794
1795Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1796
1797 * mn10x00.h: Delete.
1798 * mn10200.h, mn10300.h: New files.
1799
1800Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1801
1802 * mn10x00.h: New file.
1803
1804Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1805
1806 * v850.h: Add new flag to indicate this instruction uses a PC
1807 displacement.
1808
1809Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1810
1811 * h8300.h (stmac): Add missing instruction.
1812
1813Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1814
1815 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1816 field.
1817
1818Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1819
1820 * v850.h (V850_OPERAND_EP): Define.
1821
1822 * v850.h (v850_opcode): Add size field.
1823
1824Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1825
1826 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1827 to functions used to handle unusual operand encoding.
252b5132 1828 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1829 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1830
1831Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1832
1833 * v850.h (v850_operands): Add flags field.
1834 (OPERAND_REG, OPERAND_NUM): Defined.
1835
1836Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1837
1838 * v850.h: New file.
1839
1840Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1841
1842 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1843 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1844 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1845 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1846 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1847 Defined.
252b5132
RH
1848
1849Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1850
1851 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1852 a 3 bit space id instead of a 2 bit space id.
1853
1854Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1855
1856 * d10v.h: Add some additional defines to support the
d83c6548 1857 assembler in determining which operations can be done in parallel.
252b5132
RH
1858
1859Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1860
1861 * h8300.h (SN): Define.
1862 (eepmov.b): Renamed from "eepmov"
1863 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1864 with them.
1865
1866Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1867
1868 * d10v.h (OPERAND_SHIFT): New operand flag.
1869
1870Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1871
1872 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1873 signed numbers.
252b5132
RH
1874
1875Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1876
1877 * d10v.h (pd_reg): Define. Putting the definition here allows
1878 the assembler and disassembler to share the same struct.
1879
1880Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1881
1882 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1883 Williams <steve@icarus.com>.
1884
1885Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1886
1887 * d10v.h: New file.
1888
1889Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1890
1891 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1892
1893Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1894
d83c6548 1895 * m68k.h (mcf5200): New macro.
252b5132
RH
1896 Document names of coldfire control registers.
1897
1898Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1899
1900 * h8300.h (SRC_IN_DST): Define.
1901
1902 * h8300.h (UNOP3): Mark the register operand in this insn
1903 as a source operand, not a destination operand.
1904 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1905 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1906 register operand with SRC_IN_DST.
1907
1908Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1909
1910 * alpha.h: New file.
1911
1912Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1913
1914 * rs6k.h: Remove obsolete file.
1915
1916Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1917
1918 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1919 fdivp, and fdivrp. Add ffreep.
1920
1921Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1922
1923 * h8300.h: Reorder various #defines for readability.
1924 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1925 (BITOP): Accept additional (unused) argument. All callers changed.
1926 (EBITOP): Likewise.
1927 (O_LAST): Bump.
1928 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1929
1930 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1931 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1932 (BITOP, EBITOP): Handle new H8/S addressing modes for
1933 bit insns.
1934 (UNOP3): Handle new shift/rotate insns on the H8/S.
1935 (insns using exr): New instructions.
1936 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1937
1938Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1939
1940 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1941 was incorrect.
1942
1943Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1944
1945 * h8300.h (START): Remove.
1946 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1947 and mov.l insns that can be relaxed.
1948
1949Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1950
1951 * i386.h: Remove Abs32 from lcall.
1952
1953Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1954
1955 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1956 (SLCPOP): New macro.
1957 Mark X,Y opcode letters as in use.
1958
1959Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1960
1961 * sparc.h (F_FLOAT, F_FBR): Define.
1962
1963Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1964
1965 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1966 from all insns.
1967 (ABS8SRC,ABS8DST): Add ABS8MEM.
1968 (add.l): Fix reg+reg variant.
1969 (eepmov.w): Renamed from eepmovw.
1970 (ldc,stc): Fix many cases.
1971
1972Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1973
1974 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1975
1976Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1977
1978 * sparc.h (O): Mark operand letter as in use.
1979
1980Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1981
1982 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1983 Mark operand letters uU as in use.
1984
1985Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1986
1987 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1988 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1989 (SPARC_OPCODE_SUPPORTED): New macro.
1990 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1991 (F_NOTV9): Delete.
1992
1993Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1994
1995 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1996 declaration consistent with return type in definition.
1997
1998Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1999
2000 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2001
2002Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2003
2004 * i386.h (i386_regtab): Add 80486 test registers.
2005
2006Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2007
2008 * i960.h (I_HX): Define.
2009 (i960_opcodes): Add HX instruction.
2010
2011Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2012
2013 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2014 and fclex.
2015
2016Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2017
2018 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2019 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2020 (bfd_* defines): Delete.
2021 (sparc_opcode_archs): Replaces architecture_pname.
2022 (sparc_opcode_lookup_arch): Declare.
2023 (NUMOPCODES): Delete.
2024
2025Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2026
2027 * sparc.h (enum sparc_architecture): Add v9a.
2028 (ARCHITECTURES_CONFLICT_P): Update.
2029
2030Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2031
2032 * i386.h: Added Pentium Pro instructions.
2033
2034Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2035
2036 * m68k.h: Document new 'W' operand place.
2037
2038Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2039
2040 * hppa.h: Add lci and syncdma instructions.
2041
2042Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2043
2044 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2045 instructions.
252b5132
RH
2046
2047Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2048
2049 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2050 assembler's -mcom and -many switches.
2051
2052Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2053
2054 * i386.h: Fix cmpxchg8b extension opcode description.
2055
2056Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2057
2058 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2059 and register cr4.
2060
2061Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2062
2063 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2064
2065Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2066
2067 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2068
2069Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2070
2071 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2072
2073Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2074
2075 * m68kmri.h: Remove.
2076
2077 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2078 declarations. Remove F_ALIAS and flag field of struct
2079 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2080 int. Make name and args fields of struct m68k_opcode const.
2081
2082Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2083
2084 * sparc.h (F_NOTV9): Define.
2085
2086Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2087
2088 * mips.h (INSN_4010): Define.
2089
2090Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2091
2092 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2093
2094 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2095 * m68k.h: Fix argument descriptions of coprocessor
2096 instructions to allow only alterable operands where appropriate.
2097 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2098 (m68k_opcode_aliases): Add more aliases.
2099
2100Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2101
2102 * m68k.h: Added explcitly short-sized conditional branches, and a
2103 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2104 svr4-based configurations.
2105
2106Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2107
2108 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2109 * i386.h: added missing Data16/Data32 flags to a few instructions.
2110
2111Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2112
2113 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2114 (OP_MASK_BCC, OP_SH_BCC): Define.
2115 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2116 (OP_MASK_CCC, OP_SH_CCC): Define.
2117 (INSN_READ_FPR_R): Define.
2118 (INSN_RFE): Delete.
2119
2120Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2121
2122 * m68k.h (enum m68k_architecture): Deleted.
2123 (struct m68k_opcode_alias): New type.
2124 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2125 matching constraints, values and flags. As a side effect of this,
2126 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2127 as I know were never used, now may need re-examining.
2128 (numopcodes): Now const.
2129 (m68k_opcode_aliases, numaliases): New variables.
2130 (endop): Deleted.
2131 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2132 m68k_opcode_aliases; update declaration of m68k_opcodes.
2133
2134Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2135
2136 * hppa.h (delay_type): Delete unused enumeration.
2137 (pa_opcode): Replace unused delayed field with an architecture
2138 field.
2139 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2140
2141Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2142
2143 * mips.h (INSN_ISA4): Define.
2144
2145Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2146
2147 * mips.h (M_DLA_AB, M_DLI): Define.
2148
2149Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2150
2151 * hppa.h (fstwx): Fix single-bit error.
2152
2153Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2154
2155 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2156
2157Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2158
2159 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2160 debug registers. From Charles Hannum (mycroft@netbsd.org).
2161
2162Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2163
2164 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2165 i386 support:
2166 * i386.h (MOV_AX_DISP32): New macro.
2167 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2168 of several call/return instructions.
2169 (ADDR_PREFIX_OPCODE): New macro.
2170
2171Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2172
2173 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2174
4f1d9bd8
NC
2175 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2176 char.
252b5132
RH
2177 (struct vot, field `name'): ditto.
2178
2179Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2180
2181 * vax.h: Supply and properly group all values in end sentinel.
2182
2183Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2184
2185 * mips.h (INSN_ISA, INSN_4650): Define.
2186
2187Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2188
2189 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2190 systems with a separate instruction and data cache, such as the
2191 29040, these instructions take an optional argument.
2192
2193Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2194
2195 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2196 INSN_TRAP.
2197
2198Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2199
2200 * mips.h (INSN_STORE_MEMORY): Define.
2201
2202Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2203
2204 * sparc.h: Document new operand type 'x'.
2205
2206Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2207
2208 * i960.h (I_CX2): New instruction category. It includes
2209 instructions available on Cx and Jx processors.
2210 (I_JX): New instruction category, for JX-only instructions.
2211 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2212 Jx-only instructions, in I_JX category.
2213
2214Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2215
2216 * ns32k.h (endop): Made pointer const too.
2217
2218Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2219
2220 * ns32k.h: Drop Q operand type as there is no correct use
2221 for it. Add I and Z operand types which allow better checking.
2222
2223Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2224
2225 * h8300.h (xor.l) :fix bit pattern.
2226 (L_2): New size of operand.
2227 (trapa): Use it.
2228
2229Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2230
2231 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2232
2233Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2234
2235 * sparc.h: Include v9 definitions.
2236
2237Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2238
2239 * m68k.h (m68060): Defined.
2240 (m68040up, mfloat, mmmu): Include it.
2241 (struct m68k_opcode): Widen `arch' field.
2242 (m68k_opcodes): Updated for M68060. Removed comments that were
2243 instructions commented out by "JF" years ago.
2244
2245Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2246
2247 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2248 add a one-bit `flags' field.
2249 (F_ALIAS): New macro.
2250
2251Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2252
2253 * h8300.h (dec, inc): Get encoding right.
2254
2255Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2256
2257 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2258 a flag instead.
2259 (PPC_OPERAND_SIGNED): Define.
2260 (PPC_OPERAND_SIGNOPT): Define.
2261
2262Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2263
2264 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2265 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2266
2267Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2268
2269 * i386.h: Reverse last change. It'll be handled in gas instead.
2270
2271Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2272
2273 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2274 slower on the 486 and used the implicit shift count despite the
2275 explicit operand. The one-operand form is still available to get
2276 the shorter form with the implicit shift count.
2277
2278Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2279
2280 * hppa.h: Fix typo in fstws arg string.
2281
2282Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2283
2284 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2285
2286Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2287
2288 * ppc.h (PPC_OPCODE_601): Define.
2289
2290Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2291
2292 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2293 (so we can determine valid completers for both addb and addb[tf].)
2294
2295 * hppa.h (xmpyu): No floating point format specifier for the
2296 xmpyu instruction.
2297
2298Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2299
2300 * ppc.h (PPC_OPERAND_NEXT): Define.
2301 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2302 (struct powerpc_macro): Define.
2303 (powerpc_macros, powerpc_num_macros): Declare.
2304
2305Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2306
2307 * ppc.h: New file. Header file for PowerPC opcode table.
2308
2309Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2310
2311 * hppa.h: More minor template fixes for sfu and copr (to allow
2312 for easier disassembly).
2313
2314 * hppa.h: Fix templates for all the sfu and copr instructions.
2315
2316Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2317
2318 * i386.h (push): Permit Imm16 operand too.
2319
2320Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2321
2322 * h8300.h (andc): Exists in base arch.
2323
2324Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2325
2326 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2327 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2328
2329Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2330
2331 * hppa.h: Add FP quadword store instructions.
2332
2333Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2334
2335 * mips.h: (M_J_A): Added.
2336 (M_LA): Removed.
2337
2338Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2339
2340 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2341 <mellon@pepper.ncd.com>.
2342
2343Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2344
2345 * hppa.h: Immediate field in probei instructions is unsigned,
2346 not low-sign extended.
2347
2348Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2349
2350 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2351
2352Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2353
2354 * i386.h: Add "fxch" without operand.
2355
2356Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2357
2358 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2359
2360Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2361
2362 * hppa.h: Add gfw and gfr to the opcode table.
2363
2364Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2365
2366 * m88k.h: extended to handle m88110.
2367
2368Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2369
2370 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2371 addresses.
2372
2373Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2374
2375 * i960.h (i960_opcodes): Properly bracket initializers.
2376
2377Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2378
2379 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2380
2381Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2382
2383 * m68k.h (two): Protect second argument with parentheses.
2384
2385Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2386
2387 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2388 Deleted old in/out instructions in "#if 0" section.
2389
2390Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2391
2392 * i386.h (i386_optab): Properly bracket initializers.
2393
2394Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2395
2396 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2397 Jeff Law, law@cs.utah.edu).
2398
2399Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2400
2401 * i386.h (lcall): Accept Imm32 operand also.
2402
2403Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2404
2405 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2406 (M_DABS): Added.
2407
2408Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2409
2410 * mips.h (INSN_*): Changed values. Removed unused definitions.
2411 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2412 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2413 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2414 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2415 (M_*): Added new values for r6000 and r4000 macros.
2416 (ANY_DELAY): Removed.
2417
2418Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2419
2420 * mips.h: Added M_LI_S and M_LI_SS.
2421
2422Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2423
2424 * h8300.h: Get some rare mov.bs correct.
2425
2426Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2427
2428 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2429 been included.
2430
2431Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2432
2433 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2434 jump instructions, for use in disassemblers.
2435
2436Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2437
2438 * m88k.h: Make bitfields just unsigned, not unsigned long or
2439 unsigned short.
2440
2441Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2442
2443 * hppa.h: New argument type 'y'. Use in various float instructions.
2444
2445Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2446
2447 * hppa.h (break): First immediate field is unsigned.
2448
2449 * hppa.h: Add rfir instruction.
2450
2451Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2452
2453 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2454
2455Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2456
2457 * mips.h: Reworked the hazard information somewhat, and fixed some
2458 bugs in the instruction hazard descriptions.
2459
2460Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2461
2462 * m88k.h: Corrected a couple of opcodes.
2463
2464Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2465
2466 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2467 new version includes instruction hazard information, but is
2468 otherwise reasonably similar.
2469
2470Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2471
2472 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2473
2474Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2475
2476 Patches from Jeff Law, law@cs.utah.edu:
2477 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2478 Make the tables be the same for the following instructions:
2479 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2480 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2481 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2482 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2483 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2484 "fcmp", and "ftest".
2485
2486 * hppa.h: Make new and old tables the same for "break", "mtctl",
2487 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2488 Fix typo in last patch. Collapse several #ifdefs into a
2489 single #ifdef.
2490
2491 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2492 of the comments up-to-date.
2493
2494 * hppa.h: Update "free list" of letters and update
2495 comments describing each letter's function.
2496
4f1d9bd8
NC
2497Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2498
2499 * h8300.h: Lots of little fixes for the h8/300h.
2500
2501Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2502
2503 Support for H8/300-H
2504 * h8300.h: Lots of new opcodes.
2505
252b5132
RH
2506Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2507
2508 * h8300.h: checkpoint, includes H8/300-H opcodes.
2509
2510Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2511
2512 * Patches from Jeffrey Law <law@cs.utah.edu>.
2513 * hppa.h: Rework single precision FP
2514 instructions so that they correctly disassemble code
2515 PA1.1 code.
2516
2517Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2518
2519 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2520 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2521
2522Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2523
2524 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2525 gdb will define it for now.
2526
2527Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2528
2529 * sparc.h: Don't end enumerator list with comma.
2530
2531Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2532
2533 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2534 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2535 ("bc2t"): Correct typo.
2536 ("[ls]wc[023]"): Use T rather than t.
2537 ("c[0123]"): Define general coprocessor instructions.
2538
2539Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2540
2541 * m68k.h: Move split point for gcc compilation more towards
2542 middle.
2543
2544Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2545
2546 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2547 simply wrong, ics, rfi, & rfsvc were missing).
2548 Add "a" to opr_ext for "bb". Doc fix.
2549
2550Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2551
2552 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2553 * mips.h: Add casts, to suppress warnings about shifting too much.
2554 * m68k.h: Document the placement code '9'.
2555
2556Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2557
2558 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2559 allows callers to break up the large initialized struct full of
2560 opcodes into two half-sized ones. This permits GCC to compile
2561 this module, since it takes exponential space for initializers.
2562 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2563
2564Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2565
2566 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2567 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2568 initialized structs in it.
2569
2570Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2571
2572 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2573 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2574 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2575
2576Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2577
2578 * mips.h: document "i" and "j" operands correctly.
2579
2580Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2581
2582 * mips.h: Removed endianness dependency.
2583
2584Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2585
2586 * h8300.h: include info on number of cycles per instruction.
2587
2588Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2589
2590 * hppa.h: Move handy aliases to the front. Fix masks for extract
2591 and deposit instructions.
2592
2593Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2594
2595 * i386.h: accept shld and shrd both with and without the shift
2596 count argument, which is always %cl.
2597
2598Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2599
2600 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2601 (one_byte_segment_defaults, two_byte_segment_defaults,
2602 i386_prefixtab_end): Ditto.
2603
2604Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2605
2606 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2607 for operand 2; from John Carr, jfc@dsg.dec.com.
2608
2609Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2610
2611 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2612 always use 16-bit offsets. Makes calculated-size jump tables
2613 feasible.
2614
2615Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2616
2617 * i386.h: Fix one-operand forms of in* and out* patterns.
2618
2619Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2620
2621 * m68k.h: Added CPU32 support.
2622
2623Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2624
2625 * mips.h (break): Disassemble the argument. Patch from
2626 jonathan@cs.stanford.edu (Jonathan Stone).
2627
2628Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2629
2630 * m68k.h: merged Motorola and MIT syntax.
2631
2632Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2633
2634 * m68k.h (pmove): make the tests less strict, the 68k book is
2635 wrong.
2636
2637Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2638
2639 * m68k.h (m68ec030): Defined as alias for 68030.
2640 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2641 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2642 them. Tightened description of "fmovex" to distinguish it from
2643 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2644 up descriptions that claimed versions were available for chips not
2645 supporting them. Added "pmovefd".
2646
2647Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2648
2649 * m68k.h: fix where the . goes in divull
2650
2651Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2652
2653 * m68k.h: the cas2 instruction is supposed to be written with
2654 indirection on the last two operands, which can be either data or
2655 address registers. Added a new operand type 'r' which accepts
2656 either register type. Added new cases for cas2l and cas2w which
2657 use them. Corrected masks for cas2 which failed to recognize use
2658 of address register.
2659
2660Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2661
2662 * m68k.h: Merged in patches (mostly m68040-specific) from
2663 Colin Smith <colin@wrs.com>.
2664
2665 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2666 base). Also cleaned up duplicates, re-ordered instructions for
2667 the sake of dis-assembling (so aliases come after standard names).
2668 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2669
2670Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2671
2672 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2673 all missing .s
2674
2675Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2676
2677 * sparc.h: Moved tables to BFD library.
2678
2679 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2680
2681Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2682
2683 * h8300.h: Finish filling in all the holes in the opcode table,
2684 so that the Lucid C compiler can digest this as well...
2685
2686Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2687
2688 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2689 Fix opcodes on various sizes of fild/fist instructions
2690 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2691 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2692
2693Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2694
2695 * h8300.h: Fill in all the holes in the opcode table so that the
2696 losing HPUX C compiler can digest this...
2697
2698Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2699
2700 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2701 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2702
2703Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2704
2705 * sparc.h: Add new architecture variant sparclite; add its scan
2706 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2707
2708Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2709
2710 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2711 fy@lucid.com).
2712
2713Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2714
2715 * rs6k.h: New version from IBM (Metin).
2716
2717Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2718
2719 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2720 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2721
2722Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2723
2724 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2725
2726Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2727
2728 * m68k.h (one, two): Cast macro args to unsigned to suppress
2729 complaints from compiler and lint about integer overflow during
2730 shift.
2731
2732Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2733
2734 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2735
2736Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2737
2738 * mips.h: Make bitfield layout depend on the HOST compiler,
2739 not on the TARGET system.
2740
2741Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2742
2743 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2744 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2745 <TRANLE@INTELLICORP.COM>.
2746
2747Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2748
2749 * h8300.h: turned op_type enum into #define list
2750
2751Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2752
2753 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2754 similar instructions -- they've been renamed to "fitoq", etc.
2755 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2756 number of arguments.
2757 * h8300.h: Remove extra ; which produces compiler warning.
2758
2759Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2760
2761 * sparc.h: fix opcode for tsubcctv.
2762
2763Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2764
2765 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2766
2767Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2768
2769 * sparc.h (nop): Made the 'lose' field be even tighter,
2770 so only a standard 'nop' is disassembled as a nop.
2771
2772Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2773
2774 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2775 disassembled as a nop.
2776
4f1d9bd8
NC
2777Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2778
2779 * m68k.h, sparc.h: ANSIfy enums.
2780
252b5132
RH
2781Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2782
2783 * sparc.h: fix a typo.
2784
2785Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2786
2787 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2788 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2789 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2790
2791\f
2792Local Variables:
2793version-control: never
2794End:
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