* ld-selective/sel-dump.exp: Use is_elf_format, xfail assorted targets.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
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12003-10-21 Peter Barada <pbarada@mail.wm.sps.mot.com>
2 Bernardo Innocenti <bernie@develer.com>
3
4 * m68k.h: Add MCFv4/MCF5528x support.
5
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HPN
62003-10-19 Hans-Peter Nilsson <hp@bitrange.com>
7
8 * mmix.h (JMP_INSN_BYTE): Define.
9
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102003-09-30 Chris Demetriou <cgd@broadcom.com>
11
12 * mips.h: Document +E, +F, +G, +H, and +I operand types.
13 Update documentation of I, +B and +C operand types.
14 (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
15 (M_DEXT, M_DINS): New enum values.
16
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172003-09-04 Nick Clifton <nickc@redhat.com>
18
19 * v850.h (PROCESSOR_V850E1): Define.
20
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212003-08-19 Alan Modra <amodra@bigpond.net.au>
22
23 * ppc.h (PPC_OPCODE_440): Define. Formatting. Use hex for other
24 PPC_OPCODE_* defines.
25
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JE
262003-08-16 Jason Eckhardt <jle@rice.edu>
27
28 * i860.h (fmov.ds): Expand as famov.ds.
29 (fmov.sd): Expand as famov.sd.
30 (pfmov.ds): Expand as pfamov.ds.
31
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MM
322003-08-07 Michael Meissner <gnu@the-meissners.org>
33
34 * cgen.h: Remove PARAM macro usage in all prototypes.
35 (CGEN_EXTRACT_INFO): Use void * instead of PTR.
36 (cgen_print_fn): Ditto.
37 (CGEN_HW_ENTRY): Ditto.
38 (CGEN_MAYBE_MULTI_IFLD): Ditto.
39 (struct cgen_insn): Ditto.
40 (CGEN_CPU_TABLE): Ditto.
41
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422003-08-07 Alan Modra <amodra@bigpond.net.au>
43
44 * alpha.h: Remove PARAMS macro.
45 * arc.h: Likewise.
46 * d10v.h: Likewise.
47 * d30v.h: Likewise.
48 * i370.h: Likewise.
49 * or32.h: Likewise.
50 * pj.h: Likewise.
51 * ppc.h: Likewise.
52 * sparc.h: Likewise.
53 * tic80.h: Likewise.
54 * v850.h: Likewise.
55
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562003-07-18 Michael Snyder <msnyder@redhat.com>
57
58 * include/opcode/h8sx.h (DO_MOVA1, DO_MOVA2): Reformatting.
59
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RS
602003-07-15 Richard Sandiford <rsandifo@redhat.com>
61
62 * mips.h (CPU_RM7000): New macro.
63 (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
64
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AO
652003-07-09 Alexandre Oliva <aoliva@redhat.com>
66
67 2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
68 * mn10300.h (AM33_2): Renamed from AM33.
69 2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
70 * mn10300.h (AM332, FMT_D3): Defined.
71 (MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise.
72 (MN10300_OPERAND_FPCR): Likewise.
73
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742003-07-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
75
76 * s390.h (s390_opcode_cpu_val): Add enum for cpu type z990.
77
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782003-06-25 Richard Sandiford <rsandifo@redhat.com>
79
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80 * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
81 (IMM8U, IMM8U_NS): Define.
82 (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
83
842003-06-25 Richard Sandiford <rsandifo@redhat.com>
85
86 * h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and
87 mov.l ERs,@(dd:32,ERd) entries.
8d1e520a 88
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892003-06-23 H.J. Lu <hongjiu.lu@intel.com>
90
91 * i386.h (i386_optab): Support Intel Precott New Instructions.
92
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932003-06-10 Gary Hade <garyhade@us.ibm.com>
94
95 * ppc.h (PPC_OPERAND_DQ): Define.
96
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972003-06-10 Richard Sandiford <rsandifo@redhat.com>
98
99 * h8300.h (IMM4_NS, IMM8_NS): New.
100 (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
101 Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
102
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1032003-06-03 Michael Snyder <msnyder@redhat.com>
104
50649e42 105 * h8300.h (enum h8_model): Add AV_H8S to distinguish from H8H.
adadcc0c 106 (ldc): Split ccr ops from exr ops (which are only available
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MS
107 on H8S or H8SX).
108 (stc): Ditto.
109 (andc, orc, xorc): Ditto.
110 (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
111
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1122003-06-03 Michael Snyder <msnyder@redhat.com>
113 and Bernd Schmidt <bernds@redhat.com>
114 and Alexandre Oliva <aoliva@redhat.com>
115 * h8300.h: Add support for h8300sx instruction set.
116
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1172003-05-23 Jason Eckhardt <jle@rice.edu>
118
119 * i860.h (expand_type): Add XP_ONLY.
120 (scyc.b): New XP instruction.
121 (ldio.l): Likewise.
122 (ldio.s): Likewise.
123 (ldio.b): Likewise.
124 (ldint.l): Likewise.
125 (ldint.s): Likewise.
126 (ldint.b): Likewise.
127 (stio.l): Likewise.
128 (stio.s): Likewise.
129 (stio.b): Likewise.
130 (pfld.q): Likewise.
131
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1322003-05-20 Jason Eckhardt <jle@rice.edu>
133
14218d5f 134 * i860.h (flush): Set lower 3 bits properly and use 'L'
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135 for the immediate operand type instead of 'i'.
136
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1372003-05-20 Jason Eckhardt <jle@rice.edu>
138
14218d5f 139 * i860.h (fzchks): Both S and R bits must be set.
ca464f37
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140 (pfzchks): Likewise.
141 (faddp): Likewise.
142 (pfaddp): Likewise.
143 (fix.ss): Remove (invalid instruction).
144 (pfix.ss): Likewise.
145 (ftrunc.ss): Likewise.
146 (pftrunc.ss): Likewise.
147
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1482003-05-18 Jason Eckhardt <jle@rice.edu>
149
150 * i860.h (form, pform): Add missing .dd suffix.
151
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SC
1522003-05-13 Stephane Carrez <stcarrez@nerim.fr>
153
154 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
155
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1562003-04-07 Michael Snyder <msnyder@redhat.com>
157
158 * h8300.h (ldc/stc): Fix up src/dst swaps.
159
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AM
1602003-04-09 J. Grant <jg-binutils@jguk.org>
161
162 * mips.h: Correct comment typo.
163
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1642003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
165
166 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
167 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
168 (s390_opcode): Remove architecture. Add modes and min_cpu.
169
c8cc2f32
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1702003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
171
172 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
173 processing.
174
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1752003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
176
177 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
178
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1792003-01-23 Alan Modra <amodra@bigpond.net.au>
180
181 * m68hc11.h (cpu6812s): Define.
182
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1832003-01-07 Chris Demetriou <cgd@broadcom.com>
184
185 * mips.h: Fix missing space in comment.
186 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
187 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
188 by four bits.
189
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1902003-01-02 Chris Demetriou <cgd@broadcom.com>
191
192 * mips.h: Update copyright years to include 2002 (which had
193 been missed previously) and 2003. Make comments about "+A",
194 "+B", and "+C" operand types more descriptive.
195
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1962002-12-31 Chris Demetriou <cgd@broadcom.com>
197
198 * mips.h: Note that the "+D" operand type name is now used.
199
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2002002-12-30 Chris Demetriou <cgd@broadcom.com>
201
202 * mips.h: Document "+" as the start of two-character operand
203 type names, and add new "K", "+A", "+B", and "+C" operand types.
204 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
205 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
206 defines.
207
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2082002-12-24 Dmitry Diky <diwil@mail.ru>
209
210 * msp430.h: New file. Defines msp430 opcodes.
211
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2122002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
213
214 * h8300.h: Added some more pseudo opcodes for system call
215 processing.
216
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2172002-12-19 Chris Demetriou <cgd@broadcom.com>
218
219 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
220 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
221 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
222 (OP_OP_SDC2, OP_OP_SDC3): Define.
223
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2242002-12-16 Alan Modra <amodra@bigpond.net.au>
225
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226 * hppa.h (completer_chars): #if 0 out.
227
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228 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
229 "default_args".
230 (struct not_wot): Constify "args".
231 (struct not): Constify "name".
232 (numopcodes): Delete.
233 (endop): Delete.
234
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2352002-12-13 Alan Modra <amodra@bigpond.net.au>
236
237 * pj.h (pj_opc_info_t): Add union.
238
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2392002-12-04 David Mosberger <davidm@hpl.hp.com>
240
241 * ia64.h: Fix copyright message.
242 (IA64_OPND_AR_CSD): New operand kind.
243
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2442002-12-03 Richard Henderson <rth@redhat.com>
245
246 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
247
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2482002-12-03 Alan Modra <amodra@bigpond.net.au>
249
250 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
251 Constify "leaf" and "multi".
252
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2532002-11-19 Klee Dienes <kdienes@apple.com>
254
255 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
256 fields.
257 (h8_opcodes). Modify initializer and initializer macros to no
258 longer initialize the removed fields.
adadcc0c 259
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2602002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
261
262 * tic4x.h (c4x_insts): Fixed LDHI constraint
263
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2642002-11-18 Klee Dienes <kdienes@apple.com>
265
266 * h8300.h (h8_opcode): Remove 'length' field.
267 (h8_opcodes): Mark as 'const' (both the declaration and
268 definition). Modify initializer and initializer macros to no
269 longer initialize the length field.
270
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2712002-11-18 Klee Dienes <kdienes@apple.com>
272
273 * arc.h (arc_ext_opcodes): Declare as extern.
274 (arc_ext_operands): Declare as extern.
275 * i860.h (i860_opcodes): Declare as const.
276
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2772002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
278
279 * tic4x.h: File reordering. Added enhanced opcodes.
280
2812002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
282
283 * tic4x.h: Major rewrite of entire file. Define instruction
284 classes, and put each instruction into a class.
285
2862002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
287
288 * tic4x.h: Added new opcodes and corrected some bugs. Add support
289 for new DSP types.
290
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2912002-10-14 Alan Modra <amodra@bigpond.net.au>
292
293 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
294
701b80cd 2952002-09-30 Gavin Romig-Koch <gavin@redhat.com>
adadcc0c
AM
296 Ken Raeburn <raeburn@cygnus.com>
297 Aldy Hernandez <aldyh@redhat.com>
298 Eric Christopher <echristo@redhat.com>
299 Richard Sandiford <rsandifo@redhat.com>
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300
301 * mips.h: Update comment for new opcodes.
302 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
303 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
304 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
305 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
306 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
307 Don't match CPU_R4111 with INSN_4100.
308
0449635d 3092002-08-19 Elena Zannoni <ezannoni@redhat.com>
0449635d 310
adadcc0c
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311 From matthew green <mrg@redhat.com>
312
313 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
0449635d 314 instructions.
adadcc0c 315 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
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EZ
316 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
317 e500x2 Integer select, branch locking, performance monitor,
318 cache locking and machine check APUs, respectively.
319 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
320 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
321
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3222002-08-13 Stephane Carrez <stcarrez@nerim.fr>
323
324 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
325 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
326 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
327 memory banks.
328 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
329
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3302002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
331
332 * mips.h (INSN_MIPS16): New define.
333
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3342002-07-08 Alan Modra <amodra@bigpond.net.au>
335
336 * i386.h: Remove IgnoreSize from movsx and movzx.
337
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3382002-06-08 Alan Modra <amodra@bigpond.net.au>
339
340 * a29k.h: Replace CONST with const.
341 (CONST): Don't define.
342 * convex.h: Replace CONST with const.
343 (CONST): Don't define.
344 * dlx.h: Replace CONST with const.
345 * or32.h (CONST): Don't define.
346
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3472002-05-30 Chris G. Demetriou <cgd@broadcom.com>
348
349 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
350 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
351 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
352 (INSN_MDMX): New constants, for MDMX support.
353 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
354
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3552002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
356
357 * dlx.h: New file.
358
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3592002-05-25 Alan Modra <amodra@bigpond.net.au>
360
361 * ia64.h: Use #include "" instead of <> for local header files.
362 * sparc.h: Likewise.
363
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3642002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
365
366 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
367
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3682002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
369
adadcc0c 370 * h8300.h: Corrected defs of all control regs
b9c9142c 371 and eepmov instr.
adadcc0c 372
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3732002-04-11 Alan Modra <amodra@bigpond.net.au>
374
375 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 376 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 377
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3782002-03-15 Chris G. Demetriou <cgd@broadcom.com>
379
380 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
381 instructions.
382 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
383 may be passed along with the ISA bitmask.
384
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3852002-03-05 Paul Koning <pkoning@equallogic.com>
386
387 * pdp11.h: Add format codes for float instruction formats.
388
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3892002-02-25 Alan Modra <amodra@bigpond.net.au>
390
391 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
392
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393Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
394
395 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
396
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397Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
398
399 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
400 (xchg): Fix.
401 (in, out): Disable 64bit operands.
402 (call, jmp): Avoid REX prefixes.
403 (jcxz): Prohibit in 64bit mode
404 (jrcxz, loop): Add 64bit variants.
405 (movq): Fix patterns.
406 (movmskps, pextrw, pinstrw): Add 64bit variants.
407
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4082002-01-31 Ivan Guzvinec <ivang@opencores.org>
409
410 * or32.h: New file.
411
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4122002-01-22 Graydon Hoare <graydon@redhat.com>
413
414 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
415 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
416
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4172002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
418
419 * h8300.h: Comment typo fix.
420
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4212002-01-03 matthew green <mrg@redhat.com>
422
423 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
424 (PPC_OPCODE_BOOKE64): Likewise.
425
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426Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
427
428 * hppa.h (call, ret): Move to end of table.
429 (addb, addib): PA2.0 variants should have been PA2.0W.
430 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
431 happy.
432 (fldw, fldd, fstw, fstd, bb): Likewise.
433 (short loads/stores): Tweak format specifier slightly to keep
434 disassembler happy.
435 (indexed loads/stores): Likewise.
436 (absolute loads/stores): Likewise.
437
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4382001-12-04 Alexandre Oliva <aoliva@redhat.com>
439
440 * d10v.h (OPERAND_NOSP): New macro.
441
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4422001-11-29 Alexandre Oliva <aoliva@redhat.com>
443
444 * d10v.h (OPERAND_SP): New macro.
445
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4462001-11-15 Alan Modra <amodra@bigpond.net.au>
447
448 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
449
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TW
4502001-11-11 Timothy Wall <twall@alum.mit.edu>
451
452 * tic54x.h: Revise opcode layout; don't really need a separate
453 structure for parallel opcodes.
454
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4552001-11-13 Zack Weinberg <zack@codesourcery.com>
456 Alan Modra <amodra@bigpond.net.au>
457
458 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
459 accept WordReg.
460
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4612001-11-04 Chris Demetriou <cgd@broadcom.com>
462
463 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
464
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4652001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
466
467 * mmix.h: New file.
468
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4692001-10-18 Chris Demetriou <cgd@broadcom.com>
470
471 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
472 of the expression, to make source code merging easier.
473
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4742001-10-17 Chris Demetriou <cgd@broadcom.com>
475
476 * mips.h: Sort coprocessor instruction argument characters
477 in comment, add a few more words of description for "H".
478
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4792001-10-17 Chris Demetriou <cgd@broadcom.com>
480
481 * mips.h (INSN_SB1): New cpu-specific instruction bit.
482 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
483 if cpu is CPU_SB1.
484
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MG
4852001-10-17 matthew green <mrg@redhat.com>
486
487 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
488
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MG
4892001-10-12 matthew green <mrg@redhat.com>
490
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491 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
492 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
493 instructions, respectively.
418c1742 494
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NC
4952001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
496
497 * v850.h: Remove spurious comment.
498
015cf428
NC
4992001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
500
501 * h8300.h: Fix compile time warning messages
502
847b8b31
RH
5032001-09-04 Richard Henderson <rth@redhat.com>
504
505 * alpha.h (struct alpha_operand): Pack elements into bitfields.
506
a98b9439
EC
5072001-08-31 Eric Christopher <echristo@redhat.com>
508
509 * mips.h: Remove CPU_MIPS32_4K.
510
a6959011
AM
5112001-08-27 Torbjorn Granlund <tege@swox.com>
512
513 * ppc.h (PPC_OPERAND_DS): Define.
514
d83c6548
AJ
5152001-08-25 Andreas Jaeger <aj@suse.de>
516
517 * d30v.h: Fix declaration of reg_name_cnt.
518
519 * d10v.h: Fix declaration of d10v_reg_name_cnt.
520
521 * arc.h: Add prototypes from opcodes/arc-opc.c.
522
99c14723
TS
5232001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
524
525 * mips.h (INSN_10000): Define.
526 (OPCODE_IS_MEMBER): Check for INSN_10000.
527
11b37b7b
AM
5282001-08-10 Alan Modra <amodra@one.net.au>
529
530 * ppc.h: Revert 2001-08-08.
531
3b16e843
NC
5322001-08-10 Richard Sandiford <rsandifo@redhat.com>
533
534 * mips.h (INSN_GP32): Remove.
535 (OPCODE_IS_MEMBER): Remove gp32 parameter.
536 (M_MOVE): New macro identifier.
537
0f1bac05
AM
5382001-08-08 Alan Modra <amodra@one.net.au>
539
540 1999-10-25 Torbjorn Granlund <tege@swox.com>
541 * ppc.h (struct powerpc_operand): New field `reloc'.
542
3b16e843
NC
5432001-08-01 Aldy Hernandez <aldyh@redhat.com>
544
545 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
546
5472001-07-12 Jeff Johnston <jjohnstn@redhat.com>
548
549 * cgen.h (CGEN_INSN): Add regex support.
550 (build_insn_regex): Declare.
551
81f6038f
FCE
5522001-07-11 Frank Ch. Eigler <fche@redhat.com>
553
554 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
555 (cgen_cpu_desc): Ditto.
556
32cfffe3
BE
5572001-07-07 Ben Elliston <bje@redhat.com>
558
559 * m88k.h: Clean up and reformat. Remove unused code.
560
3e890047
GK
5612001-06-14 Geoffrey Keating <geoffk@redhat.com>
562
563 * cgen.h (cgen_keyword): Add nonalpha_chars field.
564
d1cf510e
NC
5652001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
566
567 * mips.h (CPU_R12000): Define.
568
e281c457
JH
5692001-05-23 John Healy <jhealy@redhat.com>
570
571 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 572
aa5f19f2
NC
5732001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
574
575 * mips.h (INSN_ISA_MASK): Define.
576
67d6227d
AM
5772001-05-12 Alan Modra <amodra@one.net.au>
578
579 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
580 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
581 and use InvMem as these insns must have register operands.
582
992aaec9
AM
5832001-05-04 Alan Modra <amodra@one.net.au>
584
585 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
586 and pextrw to swap reg/rm assignments.
587
4ef7f0bf
HPN
5882001-04-05 Hans-Peter Nilsson <hp@axis.com>
589
590 * cris.h (enum cris_insn_version_usage): Correct comment for
591 cris_ver_v3p.
592
0f17484f
AM
5932001-03-24 Alan Modra <alan@linuxcare.com.au>
594
595 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
596 Add InvMem to first operand of "maskmovdqu".
597
7ccb5238
HPN
5982001-03-22 Hans-Peter Nilsson <hp@axis.com>
599
600 * cris.h (ADD_PC_INCR_OPCODE): New macro.
601
361bfa20
KH
6022001-03-21 Kazu Hirata <kazu@hxi.com>
603
604 * h8300.h: Fix formatting.
605
87890af0
AM
6062001-03-22 Alan Modra <alan@linuxcare.com.au>
607
608 * i386.h (i386_optab): Add paddq, psubq.
609
2e98d2de
AM
6102001-03-19 Alan Modra <alan@linuxcare.com.au>
611
612 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
613
80a523c2
NC
6142001-02-28 Igor Shevlyakov <igor@windriver.com>
615
616 * m68k.h: new defines for Coldfire V4. Update mcf to know
617 about mcf5407.
618
e135f41b
NC
6192001-02-18 lars brinkhoff <lars@nocrew.org>
620
621 * pdp11.h: New file.
622
6232001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
624
625 * i386.h (i386_optab): SSE integer converison instructions have
626 64bit versions on x86-64.
627
8eaec934
NC
6282001-02-10 Nick Clifton <nickc@redhat.com>
629
630 * mips.h: Remove extraneous whitespace. Formating change to allow
631 for future contribution.
632
a85d7ed0
NC
6332001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
634
635 * s390.h: New file.
636
0715dc88
PM
6372001-02-02 Patrick Macdonald <patrickm@redhat.com>
638
adadcc0c
AM
639 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
640 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
641 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
0715dc88 642
296bc568
AM
6432001-01-24 Karsten Keil <kkeil@suse.de>
644
645 * i386.h (i386_optab): Fix swapgs
646
1328dc98
AM
6472001-01-14 Alan Modra <alan@linuxcare.com.au>
648
649 * hppa.h: Describe new '<' and '>' operand types, and tidy
650 existing comments.
651 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
652 Remove duplicate "ldw j(s,b),x". Sort some entries.
653
e135f41b 6542001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
655
656 * i386.h (i386_optab): Fix pusha and ret templates.
657
0d2bcfaf
NC
6582001-01-11 Peter Targett <peter.targett@arccores.com>
659
660 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
661 definitions for masking cpu type.
662 (arc_ext_operand_value) New structure for storing extended
663 operands.
664 (ARC_OPERAND_*) Flags for operand values.
665
6662001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
667
668 * i386.h (pinsrw): Add.
669 (pshufw): Remove.
670 (cvttpd2dq): Fix operands.
671 (cvttps2dq): Likewise.
672 (movq2q): Rename to movdq2q.
673
079966a8
AM
6742001-01-10 Richard Schaal <richard.schaal@intel.com>
675
676 * i386.h: Correct movnti instruction.
677
8c1f9e76
JJ
6782001-01-09 Jeff Johnston <jjohnstn@redhat.com>
679
680 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
681 of operands (unsigned char or unsigned short).
682 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
683 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
684
0d2bcfaf 6852001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
686
687 * i386.h (i386_optab): Make [sml]fence template to use immext field.
688
0d2bcfaf 6892001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
690
691 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
692 introduced by Pentium4
693
0d2bcfaf 6942000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
695
696 * i386.h (i386_optab): Add "rex*" instructions;
697 add swapgs; disable jmp/call far direct instructions for
698 64bit mode; add syscall and sysret; disable registers for 0xc6
699 template. Add 'q' suffixes to extendable instructions, disable
079966a8 700 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
701 (i386_regtab): Add extended registers.
702 (*Suf): Add No_qSuf.
703 (q_Suf, wlq_Suf, bwlq_Suf): New.
704
0d2bcfaf 7052000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
706
707 * i386.h (i386_optab): Replace "Imm" with "EncImm".
708 (i386_regtab): Add flags field.
d83c6548 709
bf40d919
NC
7102000-12-12 Nick Clifton <nickc@redhat.com>
711
712 * mips.h: Fix formatting.
713
4372b673
NC
7142000-12-01 Chris Demetriou <cgd@sibyte.com>
715
adadcc0c
AM
716 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
717 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
718 OP_*_SYSCALL definitions.
719 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
720 19 bit wait codes.
721 (MIPS operand specifier comments): Remove 'm', add 'U' and
722 'J', and update the meaning of 'B' so that it's more general.
723
724 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
725 INSN_ISA5): Renumber, redefine to mean the ISA at which the
726 instruction was added.
727 (INSN_ISA32): New constant.
728 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
729 Renumber to avoid new and/or renumbered INSN_* constants.
730 (INSN_MIPS32): Delete.
731 (ISA_UNKNOWN): New constant to indicate unknown ISA.
732 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
733 ISA_MIPS32): New constants, defined to be the mask of INSN_*
734 constants available at that ISA level.
735 (CPU_UNKNOWN): New constant to indicate unknown CPU.
736 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
737 define it with a unique value.
738 (OPCODE_IS_MEMBER): Update for new ISA membership-related
739 constant meanings.
740
741 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
742 definitions.
743
744 * mips.h (CPU_SB1): New constant.
c6c98b38 745
19f7b010
JJ
7462000-10-20 Jakub Jelinek <jakub@redhat.com>
747
748 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
749 Note that '3' is used for siam operand.
750
139368c9
JW
7512000-09-22 Jim Wilson <wilson@cygnus.com>
752
753 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
754
156c2f8b 7552000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 756
156c2f8b
NC
757 * mips.h: Use defines instead of hard-coded processor numbers.
758 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 759 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
760 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
761 CPU_4KC, CPU_4KM, CPU_4KP): Define..
762 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 763 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 764 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
765 Add 'P' to used characters.
766 Use 'H' for coprocessor select field.
156c2f8b 767 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
768 Document new arg characters and add to used characters.
769 (INSN_MIPS32): New define for MIPS32 extensions.
770 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 771
3c5ce02e
AM
7722000-09-05 Alan Modra <alan@linuxcare.com.au>
773
774 * hppa.h: Mention cz completer.
775
50b81f19
JW
7762000-08-16 Jim Wilson <wilson@cygnus.com>
777
778 * ia64.h (IA64_OPCODE_POSTINC): New.
779
fc29466d
L
7802000-08-15 H.J. Lu <hjl@gnu.org>
781
782 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
783 IgnoreSize change.
784
4f1d9bd8
NC
7852000-08-08 Jason Eckhardt <jle@cygnus.com>
786
787 * i860.h: Small formatting adjustments.
788
45ee1401
DC
7892000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
790
791 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
792 Move related opcodes closer to each other.
793 Minor changes in comments, list undefined opcodes.
794
9d551405
DB
7952000-07-26 Dave Brolley <brolley@redhat.com>
796
797 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
798
4f1d9bd8
NC
7992000-07-22 Jason Eckhardt <jle@cygnus.com>
800
801 * i860.h (btne, bte, bla): Changed these opcodes
802 to use sbroff ('r') instead of split16 ('s').
803 (J, K, L, M): New operand types for 16-bit aligned fields.
804 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
805 use I, J, K, L, M instead of just I.
806 (T, U): New operand types for split 16-bit aligned fields.
807 (st.x): Changed these opcodes to use S, T, U instead of just S.
808 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
809 exist on the i860.
810 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
811 (pfeq.ss, pfeq.dd): New opcodes.
812 (st.s): Fixed incorrect mask bits.
813 (fmlow): Fixed incorrect mask bits.
814 (fzchkl, pfzchkl): Fixed incorrect mask bits.
815 (faddz, pfaddz): Fixed incorrect mask bits.
816 (form, pform): Fixed incorrect mask bits.
817 (pfld.l): Fixed incorrect mask bits.
818 (fst.q): Fixed incorrect mask bits.
819 (all floating point opcodes): Fixed incorrect mask bits for
820 handling of dual bit.
821
c8488617
HPN
8222000-07-20 Hans-Peter Nilsson <hp@axis.com>
823
824 cris.h: New file.
825
65aa24b6
NC
8262000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
827
828 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
829 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
830 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
831 (AVR_ISA_M83): Define for ATmega83, ATmega85.
832 (espm): Remove, because ESPM removed in databook update.
833 (eicall, eijmp): Move to the end of opcode table.
834
60bcf0fa
NC
8352000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
836
837 * m68hc11.h: New file for support of Motorola 68hc11.
838
60a2978a
DC
839Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
840
841 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
842
68ab2dd9
DC
843Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
844
845 * avr.h: New file with AVR opcodes.
846
f0662e27
DL
847Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
848
849 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
850
b722f2be
AM
8512000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
852
853 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
854
f9e0cf0b
AM
8552000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
856
857 * i386.h: Use sl_FP, not sl_Suf for fild.
858
f660ee8b
FCE
8592000-05-16 Frank Ch. Eigler <fche@redhat.com>
860
861 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
862 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
863 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
864 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
865
558b0a60
AM
8662000-05-13 Alan Modra <alan@linuxcare.com.au>,
867
868 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
869
e413e4e9
AM
8702000-05-13 Alan Modra <alan@linuxcare.com.au>,
871 Alexander Sokolov <robocop@netlink.ru>
872
873 * i386.h (i386_optab): Add cpu_flags for all instructions.
874
8752000-05-13 Alan Modra <alan@linuxcare.com.au>
876
877 From Gavin Romig-Koch <gavin@cygnus.com>
878 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
879
5c84d377
TW
8802000-05-04 Timothy Wall <twall@cygnus.com>
881
882 * tic54x.h: New.
883
966f959b
C
8842000-05-03 J.T. Conklin <jtc@redback.com>
885
886 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
887 (PPC_OPERAND_VR): New operand flag for vector registers.
888
c5d05dbb
JL
8892000-05-01 Kazu Hirata <kazu@hxi.com>
890
891 * h8300.h (EOP): Add missing initializer.
892
a7fba0e0
JL
893Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
894
895 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
896 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
897 New operand types l,y,&,fe,fE,fx added to support above forms.
898 (pa_opcodes): Replaced usage of 'x' as source/target for
899 floating point double-word loads/stores with 'fx'.
900
800eeca4
JW
901Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
902 David Mosberger <davidm@hpl.hp.com>
903 Timothy Wall <twall@cygnus.com>
904 Jim Wilson <wilson@cygnus.com>
905
906 * ia64.h: New file.
907
ba23e138
NC
9082000-03-27 Nick Clifton <nickc@cygnus.com>
909
910 * d30v.h (SHORT_A1): Fix value.
911 (SHORT_AR): Renumber so that it is at the end of the list of short
912 instructions, not the end of the list of long instructions.
913
d0b47220
AM
9142000-03-26 Alan Modra <alan@linuxcare.com>
915
916 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
917 problem isn't really specific to Unixware.
918 (OLDGCC_COMPAT): Define.
919 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
920 destination %st(0).
921 Fix lots of comments.
922
866afedc
NC
9232000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
924
adadcc0c
AM
925 * d30v.h:
926 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
927 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
928 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
929 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
930 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
931 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
932 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
866afedc 933
cc5ca5ce
AM
9342000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
935
936 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
937 fistpd without suffix.
938
68e324a2
NC
9392000-02-24 Nick Clifton <nickc@cygnus.com>
940
941 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
adadcc0c 942 'signed_overflow_ok_p'.
68e324a2
NC
943 Delete prototypes for cgen_set_flags() and cgen_get_flags().
944
60f036a2
AH
9452000-02-24 Andrew Haley <aph@cygnus.com>
946
947 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
948 (CGEN_CPU_TABLE): flags: new field.
949 Add prototypes for new functions.
d83c6548 950
9b9b5cd4
AM
9512000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
952
953 * i386.h: Add some more UNIXWARE_COMPAT comments.
954
5b93d8bb
AM
9552000-02-23 Linas Vepstas <linas@linas.org>
956
957 * i370.h: New file.
958
4f1d9bd8
NC
9592000-02-22 Chandra Chavva <cchavva@cygnus.com>
960
961 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
962 cannot be combined in parallel with ADD/SUBppp.
963
87f398dd
AH
9642000-02-22 Andrew Haley <aph@cygnus.com>
965
966 * mips.h: (OPCODE_IS_MEMBER): Add comment.
967
367c01af
AH
9681999-12-30 Andrew Haley <aph@cygnus.com>
969
9a1e79ca
AH
970 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
971 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
972 insns.
367c01af 973
add0c677
AM
9742000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
975
976 * i386.h: Qualify intel mode far call and jmp with x_Suf.
977
3138f287
AM
9781999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
979
980 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
981 indirect jumps and calls. Add FF/3 call for intel mode.
982
ccecd07b
JL
983Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
984
985 * mn10300.h: Add new operand types. Add new instruction formats.
986
b37e19e9
JL
987Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
988
989 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
990 instruction.
991
5fce5ddf
GRK
9921999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
993
994 * mips.h (INSN_ISA5): New.
995
2bd7f1f3
GRK
9961999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
997
998 * mips.h (OPCODE_IS_MEMBER): New.
999
4df2b5c5
NC
10001999-10-29 Nick Clifton <nickc@cygnus.com>
1001
1002 * d30v.h (SHORT_AR): Define.
1003
446a06c9
MM
10041999-10-18 Michael Meissner <meissner@cygnus.com>
1005
1006 * alpha.h (alpha_num_opcodes): Convert to unsigned.
1007 (alpha_num_operands): Ditto.
1008
eca04c6a
JL
1009Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
1010
adadcc0c 1011 * hppa.h (pa_opcodes): Add load and store cache control to
eca04c6a
JL
1012 instructions. Add ordered access load and store.
1013
1014 * hppa.h (pa_opcode): Add new entries for addb and addib.
1015
1016 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
1017
adadcc0c 1018 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
eca04c6a 1019
c43185de
DN
1020Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
1021
1022 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
1023
ec3533da
JL
1024Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1025
390f858d
JL
1026 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
1027 and "be" using completer prefixes.
1028
8c47ebd9
JL
1029 * hppa.h (pa_opcodes): Add initializers to silence compiler.
1030
ec3533da
JL
1031 * hppa.h: Update comments about character usage.
1032
18369bea
JL
1033Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
1034
1035 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
1036 up the new fstw & bve instructions.
1037
c36efdd2
JL
1038Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
1039
d3ffb032
JL
1040 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
1041 instructions.
1042
c49ec3da
JL
1043 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
1044
5d2e7ecc
JL
1045 * hppa.h (pa_opcodes): Add long offset double word load/store
1046 instructions.
1047
6397d1a2
JL
1048 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
1049 stores.
1050
142f0fe0
JL
1051 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
1052
f5a68b45
JL
1053 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
1054
8235801e
JL
1055 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
1056
35184366
JL
1057 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
1058
f0bfde5e
JL
1059 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
1060
27bbbb58
JL
1061 * hppa.h (pa_opcodes): Add support for "b,l".
1062
c36efdd2
JL
1063 * hppa.h (pa_opcodes): Add support for "b,gate".
1064
f2727d04
JL
1065Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
1066
9392fb11 1067 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 1068 in xmpyu.
9392fb11 1069
e0c52e99
JL
1070 * hppa.h (pa_opcodes): Fix mask for probe and probei.
1071
f2727d04
JL
1072 * hppa.h (pa_opcodes): Fix mask for depwi.
1073
52d836e2
JL
1074Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
1075
1076 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
1077 an explicit output argument.
1078
90765e3a
JL
1079Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
1080
1081 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
1082 Add a few PA2.0 loads and store variants.
1083
8340b17f
ILT
10841999-09-04 Steve Chamberlain <sac@pobox.com>
1085
1086 * pj.h: New file.
1087
5f47d35b
AM
10881999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
1089
1090 * i386.h (i386_regtab): Move %st to top of table, and split off
1091 other fp reg entries.
1092 (i386_float_regtab): To here.
1093
1c143202
JL
1094Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1095
7d8fdb64
JL
1096 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
1097 by 'f'.
1098
90927b9c
JL
1099 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1100 Add supporting args.
1101
adadcc0c
AM
1102 * hppa.h: Document new completers and args.
1103 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1d16bf9c
JL
1104 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
1105 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
1106 pmenb and pmdis.
1107
adadcc0c 1108 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
96226a68
JL
1109 hshr, hsub, mixh, mixw, permh.
1110
5d4ba527
JL
1111 * hppa.h (pa_opcodes): Change completers in instructions to
1112 use 'c' prefix.
1113
adadcc0c 1114 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
e9fc28c6
JL
1115 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1116
adadcc0c 1117 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1c143202
JL
1118 fnegabs to use 'I' instead of 'F'.
1119
9e525108
AM
11201999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1121
1122 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1123 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1124 Alphabetically sort PIII insns.
1125
e8da1bf1
DE
1126Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1127
1128 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1129
7d627258
JL
1130Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1131
5696871a
JL
1132 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1133 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1134
adadcc0c 1135 * hppa.h: Document 64 bit condition completers.
7d627258 1136
c5e52916
JL
1137Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1138
1139 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1140
eecb386c
AM
11411999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1142
1143 * i386.h (i386_optab): Add DefaultSize modifier to all insns
1144 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1145 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1146
88a380f3
JL
1147Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1148 Jeff Law <law@cygnus.com>
1149
1150 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1151
1152 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 1153
adadcc0c 1154 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
1155 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1156
145cf1f0
AM
11571999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1158
1159 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1160
73826640
JL
1161Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1162
1163 * hppa.h (struct pa_opcode): Add new field "flags".
1164 (FLAGS_STRICT): Define.
1165
b65db252
JL
1166Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1167 Jeff Law <law@cygnus.com>
1168
f7fc668b
JL
1169 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1170
1171 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 1172
10084519
AM
11731999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1174
1175 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1176 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1177 flag to fcomi and friends.
1178
cd8a80ba
JL
1179Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1180
1181 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 1182 integer logical instructions.
cd8a80ba 1183
1fca749b
ILT
11841999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1185
1186 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1187 `n', `o'.
1188
1189 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1190 and new places `m', `M', `h'.
1191
aa008907
JL
1192Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1193
1194 * hppa.h (pa_opcodes): Add several processor specific system
1195 instructions.
1196
e26b85f0
JL
1197Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1198
d83c6548 1199 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
1200 "addb", and "addib" to be used by the disassembler.
1201
c608c12e
AM
12021999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1203
1204 * i386.h (ReverseModrm): Remove all occurences.
1205 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1206 movmskps, pextrw, pmovmskb, maskmovq.
1207 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1208 ignore the data size prefix.
1209
1210 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1211 Mostly stolen from Doug Ledford <dledford@redhat.com>
1212
45c18104
RH
1213Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1214
1215 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1216
252b5132
RH
12171999-04-14 Doug Evans <devans@casey.cygnus.com>
1218
1219 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1220 (CGEN_ATTR_TYPE): Update.
1221 (CGEN_ATTR_MASK): Number booleans starting at 0.
1222 (CGEN_ATTR_VALUE): Update.
1223 (CGEN_INSN_ATTR): Update.
1224
1225Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1226
1227 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1228 instructions.
1229
1230Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1231
1232 * hppa.h (bb, bvb): Tweak opcode/mask.
1233
1234
12351999-03-22 Doug Evans <devans@casey.cygnus.com>
1236
1237 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1238 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1239 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1240 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1241 Delete member max_insn_size.
1242 (enum cgen_cpu_open_arg): New enum.
1243 (cpu_open): Update prototype.
1244 (cpu_open_1): Declare.
1245 (cgen_set_cpu): Delete.
1246
12471999-03-11 Doug Evans <devans@casey.cygnus.com>
1248
1249 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1250 (CGEN_OPERAND_NIL): New macro.
1251 (CGEN_OPERAND): New member `type'.
1252 (@arch@_cgen_operand_table): Delete decl.
1253 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1254 (CGEN_OPERAND_TABLE): New struct.
1255 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1256 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1257 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1258 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1259 {get,set}_{int,vma}_operand.
1260 (@arch@_cgen_cpu_open): New arg `isa'.
1261 (cgen_set_cpu): Ditto.
1262
1263Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1264
1265 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1266
12671999-02-25 Doug Evans <devans@casey.cygnus.com>
1268
1269 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1270 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1271 enum cgen_hw_type.
1272 (CGEN_HW_TABLE): New struct.
1273 (hw_table): Delete declaration.
1274 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1275 to table entry to enum.
1276 (CGEN_OPINST): Ditto.
1277 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1278
1279Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1280
1281 * alpha.h (AXP_OPCODE_EV6): New.
1282 (AXP_OPCODE_NOPAL): Include it.
1283
12841999-02-09 Doug Evans <devans@casey.cygnus.com>
1285
1286 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1287 All uses updated. New members int_insn_p, max_insn_size,
1288 parse_operand,insert_operand,extract_operand,print_operand,
1289 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1290 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1291 extract_handlers,print_handlers.
1292 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1293 (CGEN_ATTR_BOOL_OFFSET): New macro.
1294 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1295 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1296 (cgen_opcode_handler): Renamed from cgen_base.
1297 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1298 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1299 all uses updated.
1300 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1301 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1302 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1303 (CGEN_OPCODE,CGEN_IBASE): New types.
1304 (CGEN_INSN): Rewrite.
1305 (CGEN_{ASM,DIS}_HASH*): Delete.
1306 (init_opcode_table,init_ibld_table): Declare.
1307 (CGEN_INSN_ATTR): New type.
1308
1309Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1310
adadcc0c
AM
1311 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1312 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1313 Change *Suf definitions to include x and d suffixes.
1314 (movsx): Use w_Suf and b_Suf.
1315 (movzx): Likewise.
1316 (movs): Use bwld_Suf.
1317 (fld): Change ordering. Use sld_FP.
1318 (fild): Add Intel Syntax equivalent of fildq.
1319 (fst): Use sld_FP.
1320 (fist): Use sld_FP.
1321 (fstp): Use sld_FP. Add x_FP version.
1322 (fistp): LLongMem version for Intel Syntax.
1323 (fcom, fcomp): Use sld_FP.
1324 (fadd, fiadd, fsub): Use sld_FP.
1325 (fsubr): Use sld_FP.
1326 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
252b5132
RH
1327
13281999-01-27 Doug Evans <devans@casey.cygnus.com>
1329
1330 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1331 CGEN_MODE_UINT.
1332
e135f41b 13331999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1334
1335 * hppa.h (bv): Fix mask.
1336
13371999-01-05 Doug Evans <devans@casey.cygnus.com>
1338
1339 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1340 (CGEN_ATTR): Use it.
1341 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1342 (CGEN_ATTR_TABLE): New member dfault.
1343
13441998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1345
1346 * mips.h (MIPS16_INSN_BRANCH): New.
1347
1348Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1349
1350 The following is part of a change made by Edith Epstein
d83c6548
AJ
1351 <eepstein@sophia.cygnus.com> as part of a project to merge in
1352 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1353
1354 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1355 after.
252b5132
RH
1356
1357Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1358
1359 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1360 status word instructions.
252b5132
RH
1361
13621998-11-30 Doug Evans <devans@casey.cygnus.com>
1363
1364 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1365 (struct cgen_keyword_entry): Ditto.
1366 (struct cgen_operand): Ditto.
1367 (CGEN_IFLD): New typedef, with associated access macros.
1368 (CGEN_IFMT): New typedef, with associated access macros.
1369 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1370 (CGEN_IVALUE): New typedef.
1371 (struct cgen_insn): Delete const on syntax,attrs members.
1372 `format' now points to format data. Type of `value' is now
1373 CGEN_IVALUE.
1374 (struct cgen_opcode_table): New member ifld_table.
1375
13761998-11-18 Doug Evans <devans@casey.cygnus.com>
1377
1378 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1379 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1380 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1381 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1382 (cgen_opcode_table): Update type of dis_hash fn.
1383 (extract_operand): Update type of `insn_value' arg.
1384
1385Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1386
1387 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1388
1389Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1390
1391 * mips.h (INSN_MULT): Added.
1392
1393Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1394
1395 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1396
1397Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1398
1399 * cgen.h (CGEN_INSN_INT): New typedef.
1400 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1401 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1402 (CGEN_INSN_BYTES_PTR): New typedef.
1403 (CGEN_EXTRACT_INFO): New typedef.
1404 (cgen_insert_fn,cgen_extract_fn): Update.
1405 (cgen_opcode_table): New member `insn_endian'.
1406 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1407 (insert_operand,extract_operand): Update.
1408 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1409
1410Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1411
1412 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1413 (struct CGEN_HW_ENTRY): New member `attrs'.
1414 (CGEN_HW_ATTR): New macro.
1415 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1416 (CGEN_INSN_INVALID_P): New macro.
1417
1418Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1419
1420 * hppa.h: Add "fid".
d83c6548 1421
252b5132
RH
1422Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1423
1424 From Robert Andrew Dale <rob@nb.net>
1425 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1426 (AMD_3DNOW_OPCODE): Define.
1427
1428Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1429
1430 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1431
1432Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1433
1434 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1435
1436Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1437
1438 Move all global state data into opcode table struct, and treat
1439 opcode table as something that is "opened/closed".
1440 * cgen.h (CGEN_OPCODE_DESC): New type.
1441 (all fns): New first arg of opcode table descriptor.
1442 (cgen_set_parse_operand_fn): Add prototype.
1443 (cgen_current_machine,cgen_current_endian): Delete.
1444 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1445 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1446 dis_hash_table,dis_hash_table_entries.
1447 (opcode_open,opcode_close): Add prototypes.
1448
1449 * cgen.h (cgen_insn): New element `cdx'.
1450
1451Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1452
1453 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1454
1455Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1456
1457 * mn10300.h: Add "no_match_operands" field for instructions.
1458 (MN10300_MAX_OPERANDS): Define.
1459
1460Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1461
1462 * cgen.h (cgen_macro_insn_count): Declare.
1463
1464Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1465
1466 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1467 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1468 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1469 set_{int,vma}_operand.
1470
1471Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1472
1473 * mn10300.h: Add "machine" field for instructions.
1474 (MN103, AM30): Define machine types.
d83c6548 1475
252b5132
RH
1476Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1477
1478 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1479
14801998-06-18 Ulrich Drepper <drepper@cygnus.com>
1481
1482 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1483
1484Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1485
1486 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1487 and ud2b.
1488 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1489 those that happen to be implemented on pentiums.
1490
1491Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1492
1493 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1494 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1495 with Size16|IgnoreSize or Size32|IgnoreSize.
1496
1497Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1498
1499 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1500 (REPE): Rename to REPE_PREFIX_OPCODE.
1501 (i386_regtab_end): Remove.
1502 (i386_prefixtab, i386_prefixtab_end): Remove.
1503 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1504 of md_begin.
1505 (MAX_OPCODE_SIZE): Define.
1506 (i386_optab_end): Remove.
1507 (sl_Suf): Define.
1508 (sl_FP): Use sl_Suf.
1509
1510 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1511 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1512 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1513 data32, dword, and adword prefixes.
1514 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1515 regs.
1516
1517Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1518
1519 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1520
1521 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1522 register operands, because this is a common idiom. Flag them with
1523 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1524 fdivrp because gcc erroneously generates them. Also flag with a
1525 warning.
1526
1527 * i386.h: Add suffix modifiers to most insns, and tighter operand
1528 checks in some cases. Fix a number of UnixWare compatibility
1529 issues with float insns. Merge some floating point opcodes, using
1530 new FloatMF modifier.
1531 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1532 consistency.
1533
1534 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1535 IgnoreDataSize where appropriate.
1536
1537Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1538
1539 * i386.h: (one_byte_segment_defaults): Remove.
1540 (two_byte_segment_defaults): Remove.
1541 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1542
1543Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1544
1545 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1546 (cgen_hw_lookup_by_num): Declare.
1547
1548Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1549
1550 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1551 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1552
1553Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1554
1555 * cgen.h (cgen_asm_init_parse): Delete.
1556 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1557 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1558
1559Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1560
1561 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1562 (cgen_asm_finish_insn): Update prototype.
1563 (cgen_insn): New members num, data.
1564 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1565 dis_hash, dis_hash_table_size moved to ...
1566 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1567 All uses updated. New members asm_hash_p, dis_hash_p.
1568 (CGEN_MINSN_EXPANSION): New struct.
1569 (cgen_expand_macro_insn): Declare.
1570 (cgen_macro_insn_count): Declare.
1571 (get_insn_operands): Update prototype.
1572 (lookup_get_insn_operands): Declare.
1573
1574Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1575
1576 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1577 regKludge. Add operands types for string instructions.
1578
1579Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1580
1581 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1582 table.
1583
1584Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1585
1586 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1587 for `gettext'.
1588
1589Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1590
1591 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1592 Add IsString flag to string instructions.
1593 (IS_STRING): Don't define.
1594 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1595 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1596 (SS_PREFIX_OPCODE): Define.
1597
1598Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1599
1600 * i386.h: Revert March 24 patch; no more LinearAddress.
1601
1602Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1603
1604 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1605 instructions, and instead add FWait opcode modifier. Add short
1606 form of fldenv and fstenv.
1607 (FWAIT_OPCODE): Define.
1608
1609 * i386.h (i386_optab): Change second operand constraint of `mov
1610 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1611 allow legal instructions such as `movl %gs,%esi'
1612
1613Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1614
1615 * h8300.h: Various changes to fully bracket initializers.
1616
1617Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1618
1619 * i386.h: Set LinearAddress for lidt and lgdt.
1620
1621Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1622
1623 * cgen.h (CGEN_BOOL_ATTR): New macro.
1624
1625Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1626
1627 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1628
1629Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1630
1631 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1632 (cgen_insn): Record syntax and format entries here, rather than
1633 separately.
1634
1635Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1636
1637 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1638
1639Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1640
1641 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1642 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1643 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1644
1645Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1646
1647 * cgen.h (lookup_insn): New argument alias_p.
1648
1649Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1650
1651Fix rac to accept only a0:
1652 * d10v.h (OPERAND_ACC): Split into:
1653 (OPERAND_ACC0, OPERAND_ACC1) .
1654 (OPERAND_GPR): Define.
1655
1656Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1657
1658 * cgen.h (CGEN_FIELDS): Define here.
1659 (CGEN_HW_ENTRY): New member `type'.
1660 (hw_list): Delete decl.
1661 (enum cgen_mode): Declare.
1662 (CGEN_OPERAND): New member `hw'.
1663 (enum cgen_operand_instance_type): Declare.
1664 (CGEN_OPERAND_INSTANCE): New type.
1665 (CGEN_INSN): New member `operands'.
1666 (CGEN_OPCODE_DATA): Make hw_list const.
1667 (get_insn_operands,lookup_insn): Add prototypes for.
1668
1669Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1670
1671 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1672 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1673 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1674 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1675
1676Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1677
1678 * cgen.h: Correct typo in comment end marker.
1679
1680Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1681
1682 * tic30.h: New file.
1683
5a109b67 1684Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1685
1686 * cgen.h: Add prototypes for cgen_save_fixups(),
1687 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1688 of cgen_asm_finish_insn() to return a char *.
1689
1690Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1691
1692 * cgen.h: Formatting changes to improve readability.
1693
1694Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1695
1696 * cgen.h (*): Clean up pass over `struct foo' usage.
1697 (CGEN_ATTR): Make unsigned char.
1698 (CGEN_ATTR_TYPE): Update.
1699 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1700 (cgen_base): Move member `attrs' to cgen_insn.
1701 (CGEN_KEYWORD): New member `null_entry'.
1702 (CGEN_{SYNTAX,FORMAT}): New types.
1703 (cgen_insn): Format and syntax separated from each other.
1704
1705Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1706
1707 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1708 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1709 flags_{used,set} long.
1710 (d30v_operand): Make flags field long.
1711
1712Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1713
1714 * m68k.h: Fix comment describing operand types.
1715
1716Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1717
1718 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1719 everything else after down.
1720
1721Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1722
1723 * d10v.h (OPERAND_FLAG): Split into:
1724 (OPERAND_FFLAG, OPERAND_CFLAG) .
1725
1726Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1727
1728 * mips.h (struct mips_opcode): Changed comments to reflect new
1729 field usage.
1730
1731Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1732
1733 * mips.h: Added to comments a quick-ref list of all assigned
1734 operand type characters.
1735 (OP_{MASK,SH}_PERFREG): New macros.
1736
1737Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1738
1739 * sparc.h: Add '_' and '/' for v9a asr's.
1740 Patch from David Miller <davem@vger.rutgers.edu>
1741
1742Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1743
1744 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1745 area are not available in the base model (H8/300).
1746
1747Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1748
1749 * m68k.h: Remove documentation of ` operand specifier.
1750
1751Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1752
1753 * m68k.h: Document q and v operand specifiers.
1754
1755Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1756
1757 * v850.h (struct v850_opcode): Add processors field.
1758 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1759 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1760 (PROCESSOR_V850EA): New bit constants.
1761
1762Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1763
1764 Merge changes from Martin Hunt:
1765
1766 * d30v.h: Allow up to 64 control registers. Add
1767 SHORT_A5S format.
1768
1769 * d30v.h (LONG_Db): New form for delayed branches.
1770
1771 * d30v.h: (LONG_Db): New form for repeati.
1772
1773 * d30v.h (SHORT_D2B): New form.
1774
1775 * d30v.h (SHORT_A2): New form.
1776
1777 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1778 registers are used. Needed for VLIW optimization.
1779
1780Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1781
1782 * cgen.h: Move assembler interface section
1783 up so cgen_parse_operand_result is defined for cgen_parse_address.
1784 (cgen_parse_address): Update prototype.
1785
1786Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1787
1788 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1789
1790Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1791
1792 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1793 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1794 <paubert@iram.es>.
1795
1796 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1797 <paubert@iram.es>.
1798
1799 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1800 <paubert@iram.es>.
1801
1802 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1803 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1804
1805Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1806
1807 * v850.h (V850_NOT_R0): New flag.
1808
1809Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1810
1811 * v850.h (struct v850_opcode): Remove flags field.
1812
1813Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1814
1815 * v850.h (struct v850_opcode): Add flags field.
1816 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1817 fields.
1818 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1819 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1820
1821Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1822
1823 * arc.h: New file.
1824
1825Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1826
1827 * sparc.h (sparc_opcodes): Declare as const.
1828
1829Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1830
1831 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1832 uses single or double precision floating point resources.
1833 (INSN_NO_ISA, INSN_ISA1): Define.
1834 (cpu specific INSN macros): Tweak into bitmasks outside the range
1835 of INSN_ISA field.
1836
1837Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1838
1839 * i386.h: Fix pand opcode.
1840
1841Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1842
1843 * mips.h: Widen INSN_ISA and move it to a more convenient
1844 bit position. Add INSN_3900.
1845
1846Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1847
1848 * mips.h (struct mips_opcode): added new field membership.
1849
1850Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1851
1852 * i386.h (movd): only Reg32 is allowed.
1853
1854 * i386.h: add fcomp and ud2. From Wayne Scott
1855 <wscott@ichips.intel.com>.
1856
1857Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1858
1859 * i386.h: Add MMX instructions.
1860
1861Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1862
1863 * i386.h: Remove W modifier from conditional move instructions.
1864
1865Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1866
1867 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1868 with no arguments to match that generated by the UnixWare
1869 assembler.
1870
1871Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1872
1873 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1874 (cgen_parse_operand_fn): Declare.
1875 (cgen_init_parse_operand): Declare.
1876 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1877 new argument `want'.
1878 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1879 (enum cgen_parse_operand_type): New enum.
1880
1881Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1882
1883 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1884
1885Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1886
1887 * cgen.h: New file.
1888
1889Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1890
1891 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1892 fdivrp.
1893
1894Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1895
adadcc0c 1896 * v850.h (extract): Make unsigned.
252b5132
RH
1897
1898Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1899
1900 * i386.h: Add iclr.
1901
1902Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1903
1904 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1905 take a direction bit.
1906
1907Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1908
1909 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1910
1911Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1912
1913 * sparc.h: Include <ansidecl.h>. Update function declarations to
1914 use prototypes, and to use const when appropriate.
1915
1916Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1917
1918 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1919
1920Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1921
1922 * d10v.h: Change pre_defined_registers to
1923 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1924
1925Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1926
1927 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1928 Change mips_opcodes from const array to a pointer,
1929 and change bfd_mips_num_opcodes from const int to int,
1930 so that we can increase the size of the mips opcodes table
1931 dynamically.
1932
1933Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1934
1935 * d30v.h (FLAG_X): Remove unused flag.
1936
1937Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1938
1939 * d30v.h: New file.
1940
1941Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1942
1943 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1944 (PDS_VALUE): Macro to access value field of predefined symbols.
1945 (tic80_next_predefined_symbol): Add prototype.
1946
1947Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1948
1949 * tic80.h (tic80_symbol_to_value): Change prototype to match
1950 change in function, added class parameter.
1951
1952Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1953
1954 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1955 endmask fields, which are somewhat weird in that 0 and 32 are
1956 treated exactly the same.
1957
1958Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1959
1960 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1961 rather than a constant that is 2**X. Reorder them to put bits for
1962 operands that have symbolic names in the upper bits, so they can
1963 be packed into an int where the lower bits contain the value that
1964 corresponds to that symbolic name.
1965 (predefined_symbo): Add struct.
1966 (tic80_predefined_symbols): Declare array of translations.
1967 (tic80_num_predefined_symbols): Declare size of that array.
1968 (tic80_value_to_symbol): Declare function.
1969 (tic80_symbol_to_value): Declare function.
1970
1971Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1972
1973 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1974
1975Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1976
1977 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1978 be the destination register.
1979
1980Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1981
1982 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1983 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1984 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1985 that the opcode can have two vector instructions in a single
1986 32 bit word and we have to encode/decode both.
1987
1988Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1989
1990 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1991 TIC80_OPERAND_RELATIVE for PC relative.
1992 (TIC80_OPERAND_BASEREL): New flag bit for register
1993 base relative.
1994
1995Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1996
1997 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1998
1999Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
2000
2001 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
2002 ":s" modifier for scaling.
2003
2004Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
2005
2006 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
2007 (TIC80_OPERAND_M_LI): Ditto
2008
2009Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
2010
2011 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
2012 (TIC80_OPERAND_CC): New define for condition code operand.
2013 (TIC80_OPERAND_CR): New define for control register operand.
2014
2015Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
2016
2017 * tic80.h (struct tic80_opcode): Name changed.
2018 (struct tic80_opcode): Remove format field.
2019 (struct tic80_operand): Add insertion and extraction functions.
2020 (TIC80_OPERAND_*): Remove old bogus values, start adding new
2021 correct ones.
2022 (FMT_*): Ditto.
2023
2024Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
2025
2026 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
2027 type IV instruction offsets.
2028
2029Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
2030
2031 * tic80.h: New file.
2032
2033Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
2034
2035 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
2036
2037Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
2038
2039 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
2040 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
2041 * v850.h: Fix comment, v850_operand not powerpc_operand.
2042
2043Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
2044
2045 * mn10200.h: Flesh out structures and definitions needed by
2046 the mn10200 assembler & disassembler.
2047
2048Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
2049
2050 * mips.h: Add mips16 definitions.
2051
2052Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
2053
2054 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
2055
2056Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
2057
2058 * mn10300.h (MN10300_OPERAND_PCREL): Define.
2059 (MN10300_OPERAND_MEMADDR): Define.
2060
2061Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
2062
2063 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
2064
2065Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
2066
2067 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
2068
2069Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
2070
2071 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
2072
2073Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
2074
2075 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
2076
2077Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
2078
2079 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
2080 negative to minimize problems with shared libraries. Organize
2081 instruction subsets by AMASK extensions and PALcode
2082 implementation.
252b5132
RH
2083 (struct alpha_operand): Move flags slot for better packing.
2084
2085Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
2086
2087 * v850.h (V850_OPERAND_RELAX): New operand flag.
2088
2089Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
2090
2091 * mn10300.h (FMT_*): Move operand format definitions
2092 here.
2093
2094Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
2095
2096 * mn10300.h (MN10300_OPERAND_PAREN): Define.
2097
2098Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
2099
2100 * mn10300.h (mn10300_opcode): Add "format" field.
2101 (MN10300_OPERAND_*): Define.
2102
2103Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
2104
2105 * mn10x00.h: Delete.
2106 * mn10200.h, mn10300.h: New files.
2107
2108Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
2109
2110 * mn10x00.h: New file.
2111
2112Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2113
adadcc0c 2114 * v850.h: Add new flag to indicate this instruction uses a PC
252b5132
RH
2115 displacement.
2116
2117Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2118
2119 * h8300.h (stmac): Add missing instruction.
2120
2121Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2122
2123 * v850.h (v850_opcode): Remove "size" field. Add "memop"
2124 field.
2125
2126Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2127
2128 * v850.h (V850_OPERAND_EP): Define.
2129
2130 * v850.h (v850_opcode): Add size field.
2131
2132Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2133
2134 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 2135 to functions used to handle unusual operand encoding.
252b5132 2136 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 2137 V850_OPERAND_SIGNED): Defined.
252b5132
RH
2138
2139Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2140
2141 * v850.h (v850_operands): Add flags field.
2142 (OPERAND_REG, OPERAND_NUM): Defined.
2143
2144Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2145
2146 * v850.h: New file.
2147
2148Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2149
2150 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
2151 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2152 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2153 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2154 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2155 Defined.
252b5132
RH
2156
2157Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2158
2159 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2160 a 3 bit space id instead of a 2 bit space id.
2161
2162Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2163
2164 * d10v.h: Add some additional defines to support the
d83c6548 2165 assembler in determining which operations can be done in parallel.
252b5132
RH
2166
2167Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2168
2169 * h8300.h (SN): Define.
2170 (eepmov.b): Renamed from "eepmov"
2171 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2172 with them.
2173
2174Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2175
2176 * d10v.h (OPERAND_SHIFT): New operand flag.
2177
2178Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2179
2180 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 2181 signed numbers.
252b5132
RH
2182
2183Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2184
2185 * d10v.h (pd_reg): Define. Putting the definition here allows
2186 the assembler and disassembler to share the same struct.
2187
2188Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2189
2190 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2191 Williams <steve@icarus.com>.
2192
2193Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2194
2195 * d10v.h: New file.
2196
2197Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2198
2199 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2200
2201Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2202
d83c6548 2203 * m68k.h (mcf5200): New macro.
252b5132
RH
2204 Document names of coldfire control registers.
2205
2206Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2207
2208 * h8300.h (SRC_IN_DST): Define.
2209
2210 * h8300.h (UNOP3): Mark the register operand in this insn
2211 as a source operand, not a destination operand.
2212 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2213 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2214 register operand with SRC_IN_DST.
2215
2216Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2217
2218 * alpha.h: New file.
2219
2220Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2221
2222 * rs6k.h: Remove obsolete file.
2223
2224Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2225
2226 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2227 fdivp, and fdivrp. Add ffreep.
2228
2229Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2230
2231 * h8300.h: Reorder various #defines for readability.
2232 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2233 (BITOP): Accept additional (unused) argument. All callers changed.
2234 (EBITOP): Likewise.
2235 (O_LAST): Bump.
2236 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2237
2238 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2239 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2240 (BITOP, EBITOP): Handle new H8/S addressing modes for
2241 bit insns.
2242 (UNOP3): Handle new shift/rotate insns on the H8/S.
2243 (insns using exr): New instructions.
2244 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2245
2246Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2247
2248 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2249 was incorrect.
2250
2251Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2252
2253 * h8300.h (START): Remove.
2254 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2255 and mov.l insns that can be relaxed.
2256
2257Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2258
2259 * i386.h: Remove Abs32 from lcall.
2260
2261Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2262
2263 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2264 (SLCPOP): New macro.
2265 Mark X,Y opcode letters as in use.
2266
2267Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2268
2269 * sparc.h (F_FLOAT, F_FBR): Define.
2270
2271Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2272
2273 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2274 from all insns.
2275 (ABS8SRC,ABS8DST): Add ABS8MEM.
2276 (add.l): Fix reg+reg variant.
2277 (eepmov.w): Renamed from eepmovw.
2278 (ldc,stc): Fix many cases.
2279
2280Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2281
2282 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2283
2284Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2285
2286 * sparc.h (O): Mark operand letter as in use.
2287
2288Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2289
2290 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2291 Mark operand letters uU as in use.
2292
2293Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2294
2295 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2296 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2297 (SPARC_OPCODE_SUPPORTED): New macro.
2298 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2299 (F_NOTV9): Delete.
2300
2301Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2302
2303 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2304 declaration consistent with return type in definition.
2305
2306Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2307
2308 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2309
2310Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2311
2312 * i386.h (i386_regtab): Add 80486 test registers.
2313
2314Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2315
2316 * i960.h (I_HX): Define.
2317 (i960_opcodes): Add HX instruction.
2318
2319Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2320
2321 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2322 and fclex.
2323
2324Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2325
2326 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2327 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2328 (bfd_* defines): Delete.
2329 (sparc_opcode_archs): Replaces architecture_pname.
2330 (sparc_opcode_lookup_arch): Declare.
2331 (NUMOPCODES): Delete.
2332
2333Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2334
2335 * sparc.h (enum sparc_architecture): Add v9a.
2336 (ARCHITECTURES_CONFLICT_P): Update.
2337
2338Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2339
2340 * i386.h: Added Pentium Pro instructions.
2341
2342Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2343
2344 * m68k.h: Document new 'W' operand place.
2345
2346Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2347
2348 * hppa.h: Add lci and syncdma instructions.
2349
2350Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2351
2352 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2353 instructions.
252b5132
RH
2354
2355Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2356
2357 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2358 assembler's -mcom and -many switches.
2359
2360Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2361
2362 * i386.h: Fix cmpxchg8b extension opcode description.
2363
2364Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2365
2366 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2367 and register cr4.
2368
2369Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2370
2371 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2372
2373Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2374
2375 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2376
2377Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2378
2379 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2380
2381Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2382
2383 * m68kmri.h: Remove.
2384
2385 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2386 declarations. Remove F_ALIAS and flag field of struct
2387 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2388 int. Make name and args fields of struct m68k_opcode const.
2389
2390Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2391
2392 * sparc.h (F_NOTV9): Define.
2393
2394Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2395
2396 * mips.h (INSN_4010): Define.
2397
2398Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2399
2400 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2401
2402 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2403 * m68k.h: Fix argument descriptions of coprocessor
2404 instructions to allow only alterable operands where appropriate.
2405 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2406 (m68k_opcode_aliases): Add more aliases.
2407
2408Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2409
2410 * m68k.h: Added explcitly short-sized conditional branches, and a
2411 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2412 svr4-based configurations.
2413
2414Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2415
2416 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2417 * i386.h: added missing Data16/Data32 flags to a few instructions.
2418
2419Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2420
2421 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2422 (OP_MASK_BCC, OP_SH_BCC): Define.
2423 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2424 (OP_MASK_CCC, OP_SH_CCC): Define.
2425 (INSN_READ_FPR_R): Define.
2426 (INSN_RFE): Delete.
2427
2428Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2429
2430 * m68k.h (enum m68k_architecture): Deleted.
2431 (struct m68k_opcode_alias): New type.
2432 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2433 matching constraints, values and flags. As a side effect of this,
2434 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2435 as I know were never used, now may need re-examining.
2436 (numopcodes): Now const.
2437 (m68k_opcode_aliases, numaliases): New variables.
2438 (endop): Deleted.
2439 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2440 m68k_opcode_aliases; update declaration of m68k_opcodes.
2441
2442Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2443
2444 * hppa.h (delay_type): Delete unused enumeration.
2445 (pa_opcode): Replace unused delayed field with an architecture
2446 field.
2447 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2448
2449Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2450
2451 * mips.h (INSN_ISA4): Define.
2452
2453Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2454
2455 * mips.h (M_DLA_AB, M_DLI): Define.
2456
2457Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2458
2459 * hppa.h (fstwx): Fix single-bit error.
2460
2461Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2462
2463 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2464
2465Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2466
2467 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2468 debug registers. From Charles Hannum (mycroft@netbsd.org).
2469
2470Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2471
2472 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2473 i386 support:
2474 * i386.h (MOV_AX_DISP32): New macro.
2475 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2476 of several call/return instructions.
2477 (ADDR_PREFIX_OPCODE): New macro.
2478
2479Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2480
2481 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2482
adadcc0c 2483 * vax.h (struct vot_wot, field `args'): Make it pointer to const
4f1d9bd8 2484 char.
adadcc0c 2485 (struct vot, field `name'): ditto.
252b5132
RH
2486
2487Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2488
2489 * vax.h: Supply and properly group all values in end sentinel.
2490
2491Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2492
2493 * mips.h (INSN_ISA, INSN_4650): Define.
2494
2495Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2496
2497 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2498 systems with a separate instruction and data cache, such as the
2499 29040, these instructions take an optional argument.
2500
2501Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2502
2503 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2504 INSN_TRAP.
2505
2506Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2507
2508 * mips.h (INSN_STORE_MEMORY): Define.
2509
2510Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2511
2512 * sparc.h: Document new operand type 'x'.
2513
2514Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2515
2516 * i960.h (I_CX2): New instruction category. It includes
2517 instructions available on Cx and Jx processors.
2518 (I_JX): New instruction category, for JX-only instructions.
2519 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2520 Jx-only instructions, in I_JX category.
2521
2522Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2523
2524 * ns32k.h (endop): Made pointer const too.
2525
2526Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2527
2528 * ns32k.h: Drop Q operand type as there is no correct use
2529 for it. Add I and Z operand types which allow better checking.
2530
2531Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2532
2533 * h8300.h (xor.l) :fix bit pattern.
2534 (L_2): New size of operand.
2535 (trapa): Use it.
2536
2537Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2538
2539 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2540
2541Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2542
2543 * sparc.h: Include v9 definitions.
2544
2545Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2546
2547 * m68k.h (m68060): Defined.
2548 (m68040up, mfloat, mmmu): Include it.
2549 (struct m68k_opcode): Widen `arch' field.
2550 (m68k_opcodes): Updated for M68060. Removed comments that were
2551 instructions commented out by "JF" years ago.
2552
2553Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2554
2555 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2556 add a one-bit `flags' field.
2557 (F_ALIAS): New macro.
2558
2559Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2560
2561 * h8300.h (dec, inc): Get encoding right.
2562
2563Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2564
2565 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2566 a flag instead.
2567 (PPC_OPERAND_SIGNED): Define.
2568 (PPC_OPERAND_SIGNOPT): Define.
2569
2570Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2571
2572 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2573 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2574
2575Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2576
2577 * i386.h: Reverse last change. It'll be handled in gas instead.
2578
2579Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2580
2581 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2582 slower on the 486 and used the implicit shift count despite the
2583 explicit operand. The one-operand form is still available to get
2584 the shorter form with the implicit shift count.
2585
2586Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2587
2588 * hppa.h: Fix typo in fstws arg string.
2589
2590Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2591
2592 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2593
2594Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2595
2596 * ppc.h (PPC_OPCODE_601): Define.
2597
2598Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2599
2600 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2601 (so we can determine valid completers for both addb and addb[tf].)
2602
2603 * hppa.h (xmpyu): No floating point format specifier for the
2604 xmpyu instruction.
2605
2606Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2607
2608 * ppc.h (PPC_OPERAND_NEXT): Define.
2609 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2610 (struct powerpc_macro): Define.
2611 (powerpc_macros, powerpc_num_macros): Declare.
2612
2613Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2614
2615 * ppc.h: New file. Header file for PowerPC opcode table.
2616
2617Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2618
2619 * hppa.h: More minor template fixes for sfu and copr (to allow
2620 for easier disassembly).
2621
2622 * hppa.h: Fix templates for all the sfu and copr instructions.
2623
2624Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2625
2626 * i386.h (push): Permit Imm16 operand too.
2627
2628Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2629
2630 * h8300.h (andc): Exists in base arch.
2631
2632Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2633
2634 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2635 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2636
2637Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2638
2639 * hppa.h: Add FP quadword store instructions.
2640
2641Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2642
2643 * mips.h: (M_J_A): Added.
2644 (M_LA): Removed.
2645
2646Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2647
2648 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2649 <mellon@pepper.ncd.com>.
2650
2651Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2652
2653 * hppa.h: Immediate field in probei instructions is unsigned,
2654 not low-sign extended.
2655
2656Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2657
2658 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2659
2660Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2661
2662 * i386.h: Add "fxch" without operand.
2663
2664Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2665
2666 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2667
2668Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2669
2670 * hppa.h: Add gfw and gfr to the opcode table.
2671
2672Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2673
2674 * m88k.h: extended to handle m88110.
2675
2676Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2677
2678 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2679 addresses.
2680
2681Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2682
2683 * i960.h (i960_opcodes): Properly bracket initializers.
2684
2685Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2686
2687 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2688
2689Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2690
2691 * m68k.h (two): Protect second argument with parentheses.
2692
2693Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2694
2695 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2696 Deleted old in/out instructions in "#if 0" section.
2697
2698Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2699
2700 * i386.h (i386_optab): Properly bracket initializers.
2701
2702Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2703
2704 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2705 Jeff Law, law@cs.utah.edu).
2706
2707Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2708
2709 * i386.h (lcall): Accept Imm32 operand also.
2710
2711Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2712
2713 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2714 (M_DABS): Added.
2715
2716Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2717
2718 * mips.h (INSN_*): Changed values. Removed unused definitions.
2719 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2720 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2721 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2722 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2723 (M_*): Added new values for r6000 and r4000 macros.
2724 (ANY_DELAY): Removed.
2725
2726Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2727
2728 * mips.h: Added M_LI_S and M_LI_SS.
2729
2730Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2731
2732 * h8300.h: Get some rare mov.bs correct.
2733
2734Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2735
2736 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2737 been included.
2738
2739Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2740
adadcc0c 2741 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
252b5132
RH
2742 jump instructions, for use in disassemblers.
2743
2744Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2745
2746 * m88k.h: Make bitfields just unsigned, not unsigned long or
2747 unsigned short.
2748
2749Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2750
2751 * hppa.h: New argument type 'y'. Use in various float instructions.
2752
2753Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2754
2755 * hppa.h (break): First immediate field is unsigned.
2756
2757 * hppa.h: Add rfir instruction.
2758
2759Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2760
2761 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2762
2763Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2764
2765 * mips.h: Reworked the hazard information somewhat, and fixed some
2766 bugs in the instruction hazard descriptions.
2767
2768Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2769
2770 * m88k.h: Corrected a couple of opcodes.
2771
2772Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2773
2774 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2775 new version includes instruction hazard information, but is
2776 otherwise reasonably similar.
2777
2778Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2779
2780 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2781
2782Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2783
2784 Patches from Jeff Law, law@cs.utah.edu:
2785 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2786 Make the tables be the same for the following instructions:
2787 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2788 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2789 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2790 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2791 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2792 "fcmp", and "ftest".
2793
2794 * hppa.h: Make new and old tables the same for "break", "mtctl",
2795 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2796 Fix typo in last patch. Collapse several #ifdefs into a
2797 single #ifdef.
2798
2799 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2800 of the comments up-to-date.
2801
2802 * hppa.h: Update "free list" of letters and update
2803 comments describing each letter's function.
2804
4f1d9bd8
NC
2805Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2806
2807 * h8300.h: Lots of little fixes for the h8/300h.
2808
2809Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2810
2811 Support for H8/300-H
2812 * h8300.h: Lots of new opcodes.
2813
252b5132
RH
2814Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2815
2816 * h8300.h: checkpoint, includes H8/300-H opcodes.
2817
2818Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2819
2820 * Patches from Jeffrey Law <law@cs.utah.edu>.
2821 * hppa.h: Rework single precision FP
2822 instructions so that they correctly disassemble code
2823 PA1.1 code.
2824
2825Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2826
2827 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2828 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2829
2830Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2831
2832 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2833 gdb will define it for now.
2834
2835Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2836
2837 * sparc.h: Don't end enumerator list with comma.
2838
2839Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2840
2841 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2842 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2843 ("bc2t"): Correct typo.
2844 ("[ls]wc[023]"): Use T rather than t.
2845 ("c[0123]"): Define general coprocessor instructions.
2846
2847Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2848
2849 * m68k.h: Move split point for gcc compilation more towards
2850 middle.
2851
2852Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2853
2854 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2855 simply wrong, ics, rfi, & rfsvc were missing).
2856 Add "a" to opr_ext for "bb". Doc fix.
2857
2858Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2859
adadcc0c
AM
2860 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2861 * mips.h: Add casts, to suppress warnings about shifting too much.
2862 * m68k.h: Document the placement code '9'.
252b5132
RH
2863
2864Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2865
adadcc0c 2866 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
252b5132
RH
2867 allows callers to break up the large initialized struct full of
2868 opcodes into two half-sized ones. This permits GCC to compile
2869 this module, since it takes exponential space for initializers.
adadcc0c 2870 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
252b5132
RH
2871
2872Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2873
adadcc0c
AM
2874 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2875 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
252b5132
RH
2876 initialized structs in it.
2877
2878Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2879
2880 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
adadcc0c
AM
2881 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2882 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
252b5132
RH
2883
2884Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2885
2886 * mips.h: document "i" and "j" operands correctly.
2887
2888Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2889
2890 * mips.h: Removed endianness dependency.
2891
2892Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2893
2894 * h8300.h: include info on number of cycles per instruction.
2895
2896Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2897
adadcc0c 2898 * hppa.h: Move handy aliases to the front. Fix masks for extract
252b5132
RH
2899 and deposit instructions.
2900
2901Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2902
2903 * i386.h: accept shld and shrd both with and without the shift
2904 count argument, which is always %cl.
2905
2906Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2907
2908 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2909 (one_byte_segment_defaults, two_byte_segment_defaults,
2910 i386_prefixtab_end): Ditto.
2911
2912Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2913
2914 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2915 for operand 2; from John Carr, jfc@dsg.dec.com.
2916
2917Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2918
2919 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2920 always use 16-bit offsets. Makes calculated-size jump tables
2921 feasible.
2922
2923Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2924
2925 * i386.h: Fix one-operand forms of in* and out* patterns.
2926
2927Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2928
2929 * m68k.h: Added CPU32 support.
2930
2931Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2932
adadcc0c 2933 * mips.h (break): Disassemble the argument. Patch from
252b5132
RH
2934 jonathan@cs.stanford.edu (Jonathan Stone).
2935
2936Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2937
2938 * m68k.h: merged Motorola and MIT syntax.
2939
2940Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2941
2942 * m68k.h (pmove): make the tests less strict, the 68k book is
2943 wrong.
2944
2945Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2946
2947 * m68k.h (m68ec030): Defined as alias for 68030.
2948 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2949 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2950 them. Tightened description of "fmovex" to distinguish it from
2951 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2952 up descriptions that claimed versions were available for chips not
2953 supporting them. Added "pmovefd".
2954
2955Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2956
2957 * m68k.h: fix where the . goes in divull
2958
2959Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2960
2961 * m68k.h: the cas2 instruction is supposed to be written with
2962 indirection on the last two operands, which can be either data or
2963 address registers. Added a new operand type 'r' which accepts
2964 either register type. Added new cases for cas2l and cas2w which
2965 use them. Corrected masks for cas2 which failed to recognize use
2966 of address register.
2967
2968Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2969
adadcc0c 2970 * m68k.h: Merged in patches (mostly m68040-specific) from
252b5132
RH
2971 Colin Smith <colin@wrs.com>.
2972
adadcc0c 2973 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
252b5132
RH
2974 base). Also cleaned up duplicates, re-ordered instructions for
2975 the sake of dis-assembling (so aliases come after standard names).
2976 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2977
2978Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2979
2980 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2981 all missing .s
2982
2983Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2984
2985 * sparc.h: Moved tables to BFD library.
2986
2987 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2988
2989Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2990
adadcc0c 2991 * h8300.h: Finish filling in all the holes in the opcode table,
252b5132
RH
2992 so that the Lucid C compiler can digest this as well...
2993
2994Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2995
adadcc0c 2996 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
252b5132
RH
2997 Fix opcodes on various sizes of fild/fist instructions
2998 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2999 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
3000
3001Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
3002
adadcc0c 3003 * h8300.h: Fill in all the holes in the opcode table so that the
252b5132
RH
3004 losing HPUX C compiler can digest this...
3005
3006Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
3007
adadcc0c 3008 * mips.h: Fix decoding of coprocessor instructions, somewhat.
252b5132
RH
3009 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
3010
3011Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
3012
3013 * sparc.h: Add new architecture variant sparclite; add its scan
3014 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
3015
3016Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
3017
adadcc0c 3018 * mips.h: Add some more opcode synonyms (from Frank Yellin,
252b5132
RH
3019 fy@lucid.com).
3020
3021Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
3022
adadcc0c 3023 * rs6k.h: New version from IBM (Metin).
252b5132
RH
3024
3025Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
3026
3027 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
adadcc0c 3028 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
252b5132
RH
3029
3030Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
3031
adadcc0c 3032 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
252b5132
RH
3033
3034Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
3035
adadcc0c 3036 * m68k.h (one, two): Cast macro args to unsigned to suppress
252b5132
RH
3037 complaints from compiler and lint about integer overflow during
3038 shift.
3039
3040Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
3041
adadcc0c 3042 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
252b5132
RH
3043
3044Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
3045
adadcc0c 3046 * mips.h: Make bitfield layout depend on the HOST compiler,
252b5132
RH
3047 not on the TARGET system.
3048
3049Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
3050
3051 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
3052 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
3053 <TRANLE@INTELLICORP.COM>.
3054
3055Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
3056
3057 * h8300.h: turned op_type enum into #define list
3058
3059Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
3060
adadcc0c 3061 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
252b5132
RH
3062 similar instructions -- they've been renamed to "fitoq", etc.
3063 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
3064 number of arguments.
adadcc0c 3065 * h8300.h: Remove extra ; which produces compiler warning.
252b5132
RH
3066
3067Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
3068
adadcc0c 3069 * sparc.h: fix opcode for tsubcctv.
252b5132
RH
3070
3071Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
3072
3073 * sparc.h: fba and cba are now aliases for fb and cb respectively.
3074
3075Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
3076
adadcc0c 3077 * sparc.h (nop): Made the 'lose' field be even tighter,
252b5132
RH
3078 so only a standard 'nop' is disassembled as a nop.
3079
3080Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
3081
3082 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
3083 disassembled as a nop.
3084
4f1d9bd8
NC
3085Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
3086
adadcc0c 3087 * m68k.h, sparc.h: ANSIfy enums.
4f1d9bd8 3088
252b5132
RH
3089Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
3090
3091 * sparc.h: fix a typo.
3092
3093Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
3094
3095 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
3096 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 3097 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
3098
3099\f
3100Local Variables:
3101version-control: never
3102End:
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