Binutils portion of fix for syntax array elements when max
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
0715dc88
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12001-02-02 Patrick Macdonald <patrickm@redhat.com>
2
3 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
4 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
5 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
6
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72001-01-24 Karsten Keil <kkeil@suse.de>
8
9 * i386.h (i386_optab): Fix swapgs
10
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112001-01-14 Alan Modra <alan@linuxcare.com.au>
12
13 * hppa.h: Describe new '<' and '>' operand types, and tidy
14 existing comments.
15 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
16 Remove duplicate "ldw j(s,b),x". Sort some entries.
17
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18Sat Jan 13 09:56:32 MET 2001 Jan Hubicka <jh@suse.cz>
19
20 * i386.h (i386_optab): Fix pusha and ret templates.
21
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222001-01-11 Peter Targett <peter.targett@arccores.com>
23
24 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
25 definitions for masking cpu type.
26 (arc_ext_operand_value) New structure for storing extended
27 operands.
28 (ARC_OPERAND_*) Flags for operand values.
29
302001-01-10 Jan Hubicka <jh@suse.cz>
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31
32 * i386.h (pinsrw): Add.
33 (pshufw): Remove.
34 (cvttpd2dq): Fix operands.
35 (cvttps2dq): Likewise.
36 (movq2q): Rename to movdq2q.
37
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382001-01-10 Richard Schaal <richard.schaal@intel.com>
39
40 * i386.h: Correct movnti instruction.
41
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422001-01-09 Jeff Johnston <jjohnstn@redhat.com>
43
44 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
45 of operands (unsigned char or unsigned short).
46 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
47 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
48
0d2bcfaf 492001-01-05 Jan Hubicka <jh@suse.cz>
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50
51 * i386.h (i386_optab): Make [sml]fence template to use immext field.
52
0d2bcfaf 532001-01-03 Jan Hubicka <jh@suse.cz>
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54
55 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
56 introduced by Pentium4
57
0d2bcfaf 582000-12-30 Jan Hubicka <jh@suse.cz>
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59
60 * i386.h (i386_optab): Add "rex*" instructions;
61 add swapgs; disable jmp/call far direct instructions for
62 64bit mode; add syscall and sysret; disable registers for 0xc6
63 template. Add 'q' suffixes to extendable instructions, disable
079966a8 64 obsolete instructions, add new sign/zero extension ones.
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65 (i386_regtab): Add extended registers.
66 (*Suf): Add No_qSuf.
67 (q_Suf, wlq_Suf, bwlq_Suf): New.
68
0d2bcfaf 692000-12-20 Jan Hubicka <jh@suse.cz>
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70
71 * i386.h (i386_optab): Replace "Imm" with "EncImm".
72 (i386_regtab): Add flags field.
73
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742000-12-12 Nick Clifton <nickc@redhat.com>
75
76 * mips.h: Fix formatting.
77
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782000-12-01 Chris Demetriou <cgd@sibyte.com>
79
80 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
81 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
82 OP_*_SYSCALL definitions.
83 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
84 19 bit wait codes.
85 (MIPS operand specifier comments): Remove 'm', add 'U' and
86 'J', and update the meaning of 'B' so that it's more general.
87
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88 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
89 INSN_ISA5): Renumber, redefine to mean the ISA at which the
90 instruction was added.
91 (INSN_ISA32): New constant.
92 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
93 Renumber to avoid new and/or renumbered INSN_* constants.
94 (INSN_MIPS32): Delete.
95 (ISA_UNKNOWN): New constant to indicate unknown ISA.
96 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
97 ISA_MIPS32): New constants, defined to be the mask of INSN_*
98 constants available at that ISA level.
99 (CPU_UNKNOWN): New constant to indicate unknown CPU.
100 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
101 define it with a unique value.
102 (OPCODE_IS_MEMBER): Update for new ISA membership-related
103 constant meanings.
104
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105 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
106 definitions.
107
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108 * mips.h (CPU_SB1): New constant.
109
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1102000-10-20 Jakub Jelinek <jakub@redhat.com>
111
112 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
113 Note that '3' is used for siam operand.
114
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1152000-09-22 Jim Wilson <wilson@cygnus.com>
116
117 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
118
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1192000-09-13 Anders Norlander <anorland@acc.umu.se>
120
121 * mips.h: Use defines instead of hard-coded processor numbers.
122 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
123 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
124 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
125 CPU_4KC, CPU_4KM, CPU_4KP): Define..
126 (OPCODE_IS_MEMBER): Use new defines.
127 (OP_MASK_SEL, OP_SH_SEL): Define.
128 (OP_MASK_CODE20, OP_SH_CODE20): Define.
129 Add 'P' to used characters.
130 Use 'H' for coprocessor select field.
131 Use 'm' for 20 bit breakpoint code.
132 Document new arg characters and add to used characters.
133 (INSN_MIPS32): New define for MIPS32 extensions.
134 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
135
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1362000-09-05 Alan Modra <alan@linuxcare.com.au>
137
138 * hppa.h: Mention cz completer.
139
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1402000-08-16 Jim Wilson <wilson@cygnus.com>
141
142 * ia64.h (IA64_OPCODE_POSTINC): New.
143
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1442000-08-15 H.J. Lu <hjl@gnu.org>
145
146 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
147 IgnoreSize change.
148
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1492000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
150
151 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
152 Move related opcodes closer to each other.
153 Minor changes in comments, list undefined opcodes.
154
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1552000-07-26 Dave Brolley <brolley@redhat.com>
156
157 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
158
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1592000-07-20 Hans-Peter Nilsson <hp@axis.com>
160
161 cris.h: New file.
162
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1632000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
164
165 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
166 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
167 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
168 (AVR_ISA_M83): Define for ATmega83, ATmega85.
169 (espm): Remove, because ESPM removed in databook update.
170 (eicall, eijmp): Move to the end of opcode table.
171
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1722000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
173
174 * m68hc11.h: New file for support of Motorola 68hc11.
175
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176Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
177
178 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
179
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180Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
181
182 * avr.h: New file with AVR opcodes.
183
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184Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
185
186 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
187
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1882000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
189
190 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
191
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1922000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
193
194 * i386.h: Use sl_FP, not sl_Suf for fild.
195
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1962000-05-16 Frank Ch. Eigler <fche@redhat.com>
197
198 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
199 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
200 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
201 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
202
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2032000-05-13 Alan Modra <alan@linuxcare.com.au>,
204
205 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
206
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2072000-05-13 Alan Modra <alan@linuxcare.com.au>,
208 Alexander Sokolov <robocop@netlink.ru>
209
210 * i386.h (i386_optab): Add cpu_flags for all instructions.
211
2122000-05-13 Alan Modra <alan@linuxcare.com.au>
213
214 From Gavin Romig-Koch <gavin@cygnus.com>
215 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
216
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2172000-05-04 Timothy Wall <twall@cygnus.com>
218
219 * tic54x.h: New.
220
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2212000-05-03 J.T. Conklin <jtc@redback.com>
222
223 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
224 (PPC_OPERAND_VR): New operand flag for vector registers.
225
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2262000-05-01 Kazu Hirata <kazu@hxi.com>
227
228 * h8300.h (EOP): Add missing initializer.
229
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230Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
231
232 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
233 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
234 New operand types l,y,&,fe,fE,fx added to support above forms.
235 (pa_opcodes): Replaced usage of 'x' as source/target for
236 floating point double-word loads/stores with 'fx'.
237
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238Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
239 David Mosberger <davidm@hpl.hp.com>
240 Timothy Wall <twall@cygnus.com>
241 Jim Wilson <wilson@cygnus.com>
242
243 * ia64.h: New file.
244
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2452000-03-27 Nick Clifton <nickc@cygnus.com>
246
247 * d30v.h (SHORT_A1): Fix value.
248 (SHORT_AR): Renumber so that it is at the end of the list of short
249 instructions, not the end of the list of long instructions.
250
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2512000-03-26 Alan Modra <alan@linuxcare.com>
252
253 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
254 problem isn't really specific to Unixware.
255 (OLDGCC_COMPAT): Define.
256 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
257 destination %st(0).
258 Fix lots of comments.
259
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2602000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
261
262 * d30v.h:
263 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
264 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
265 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
266 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
267 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
268 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
269 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
270
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2712000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
272
273 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
274 fistpd without suffix.
275
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2762000-02-24 Nick Clifton <nickc@cygnus.com>
277
278 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
279 'signed_overflow_ok_p'.
280 Delete prototypes for cgen_set_flags() and cgen_get_flags().
281
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2822000-02-24 Andrew Haley <aph@cygnus.com>
283
284 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
285 (CGEN_CPU_TABLE): flags: new field.
286 Add prototypes for new functions.
287
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2882000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
289
290 * i386.h: Add some more UNIXWARE_COMPAT comments.
291
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2922000-02-23 Linas Vepstas <linas@linas.org>
293
294 * i370.h: New file.
295
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2962000-02-22 Andrew Haley <aph@cygnus.com>
297
298 * mips.h: (OPCODE_IS_MEMBER): Add comment.
299
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3001999-12-30 Andrew Haley <aph@cygnus.com>
301
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302 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
303 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
304 insns.
367c01af 305
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3062000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
307
308 * i386.h: Qualify intel mode far call and jmp with x_Suf.
309
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3101999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
311
312 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
313 indirect jumps and calls. Add FF/3 call for intel mode.
314
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315Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
316
317 * mn10300.h: Add new operand types. Add new instruction formats.
318
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319Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
320
321 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
322 instruction.
323
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3241999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
325
326 * mips.h (INSN_ISA5): New.
327
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3281999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
329
330 * mips.h (OPCODE_IS_MEMBER): New.
331
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3321999-10-29 Nick Clifton <nickc@cygnus.com>
333
334 * d30v.h (SHORT_AR): Define.
335
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3361999-10-18 Michael Meissner <meissner@cygnus.com>
337
338 * alpha.h (alpha_num_opcodes): Convert to unsigned.
339 (alpha_num_operands): Ditto.
340
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341Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
342
343 * hppa.h (pa_opcodes): Add load and store cache control to
344 instructions. Add ordered access load and store.
345
346 * hppa.h (pa_opcode): Add new entries for addb and addib.
347
348 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
349
350 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
351
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352Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
353
354 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
355
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356Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
357
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358 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
359 and "be" using completer prefixes.
360
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361 * hppa.h (pa_opcodes): Add initializers to silence compiler.
362
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363 * hppa.h: Update comments about character usage.
364
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365Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
366
367 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
368 up the new fstw & bve instructions.
369
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370Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
371
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372 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
373 instructions.
374
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375 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
376
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377 * hppa.h (pa_opcodes): Add long offset double word load/store
378 instructions.
379
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380 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
381 stores.
382
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383 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
384
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385 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
386
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387 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
388
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389 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
390
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391 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
392
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393 * hppa.h (pa_opcodes): Add support for "b,l".
394
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395 * hppa.h (pa_opcodes): Add support for "b,gate".
396
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397Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
398
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399 * hppa.h (pa_opcodes): Use 'fX' for first register operand
400 in xmpyu.
401
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402 * hppa.h (pa_opcodes): Fix mask for probe and probei.
403
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404 * hppa.h (pa_opcodes): Fix mask for depwi.
405
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406Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
407
408 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
409 an explicit output argument.
410
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411Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
412
413 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
414 Add a few PA2.0 loads and store variants.
415
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4161999-09-04 Steve Chamberlain <sac@pobox.com>
417
418 * pj.h: New file.
419
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4201999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
421
422 * i386.h (i386_regtab): Move %st to top of table, and split off
423 other fp reg entries.
424 (i386_float_regtab): To here.
425
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426Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
427
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428 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
429 by 'f'.
430
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431 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
432 Add supporting args.
433
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434 * hppa.h: Document new completers and args.
435 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
436 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
437 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
438 pmenb and pmdis.
439
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440 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
441 hshr, hsub, mixh, mixw, permh.
442
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443 * hppa.h (pa_opcodes): Change completers in instructions to
444 use 'c' prefix.
445
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446 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
447 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
448
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449 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
450 fnegabs to use 'I' instead of 'F'.
451
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4521999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
453
454 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
455 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
456 Alphabetically sort PIII insns.
457
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458Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
459
460 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
461
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462Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
463
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464 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
465 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
466
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467 * hppa.h: Document 64 bit condition completers.
468
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469Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
470
471 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
472
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4731999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
474
475 * i386.h (i386_optab): Add DefaultSize modifier to all insns
476 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
477 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
478
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JL
479Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
480 Jeff Law <law@cygnus.com>
481
482 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
483
484 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
485
486 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
487 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
488
145cf1f0
AM
4891999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
490
491 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
492
73826640
JL
493Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
494
495 * hppa.h (struct pa_opcode): Add new field "flags".
496 (FLAGS_STRICT): Define.
497
b65db252
JL
498Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
499 Jeff Law <law@cygnus.com>
500
f7fc668b
JL
501 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
502
503 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 504
10084519
AM
5051999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
506
507 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
508 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
509 flag to fcomi and friends.
510
cd8a80ba
JL
511Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
512
513 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
514 integer logical instructions.
515
1fca749b
ILT
5161999-05-28 Linus Nordberg <linus.nordberg@canit.se>
517
518 * m68k.h: Document new formats `E', `G', `H' and new places `N',
519 `n', `o'.
520
521 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
522 and new places `m', `M', `h'.
523
aa008907
JL
524Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
525
526 * hppa.h (pa_opcodes): Add several processor specific system
527 instructions.
528
e26b85f0
JL
529Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
530
531 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
532 "addb", and "addib" to be used by the disassembler.
533
c608c12e
AM
5341999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
535
536 * i386.h (ReverseModrm): Remove all occurences.
537 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
538 movmskps, pextrw, pmovmskb, maskmovq.
539 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
540 ignore the data size prefix.
541
542 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
543 Mostly stolen from Doug Ledford <dledford@redhat.com>
544
45c18104
RH
545Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
546
547 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
548
252b5132
RH
5491999-04-14 Doug Evans <devans@casey.cygnus.com>
550
551 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
552 (CGEN_ATTR_TYPE): Update.
553 (CGEN_ATTR_MASK): Number booleans starting at 0.
554 (CGEN_ATTR_VALUE): Update.
555 (CGEN_INSN_ATTR): Update.
556
557Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
558
559 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
560 instructions.
561
562Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
563
564 * hppa.h (bb, bvb): Tweak opcode/mask.
565
566
5671999-03-22 Doug Evans <devans@casey.cygnus.com>
568
569 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
570 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
571 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
572 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
573 Delete member max_insn_size.
574 (enum cgen_cpu_open_arg): New enum.
575 (cpu_open): Update prototype.
576 (cpu_open_1): Declare.
577 (cgen_set_cpu): Delete.
578
5791999-03-11 Doug Evans <devans@casey.cygnus.com>
580
581 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
582 (CGEN_OPERAND_NIL): New macro.
583 (CGEN_OPERAND): New member `type'.
584 (@arch@_cgen_operand_table): Delete decl.
585 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
586 (CGEN_OPERAND_TABLE): New struct.
587 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
588 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
589 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
590 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
591 {get,set}_{int,vma}_operand.
592 (@arch@_cgen_cpu_open): New arg `isa'.
593 (cgen_set_cpu): Ditto.
594
595Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
596
597 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
598
5991999-02-25 Doug Evans <devans@casey.cygnus.com>
600
601 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
602 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
603 enum cgen_hw_type.
604 (CGEN_HW_TABLE): New struct.
605 (hw_table): Delete declaration.
606 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
607 to table entry to enum.
608 (CGEN_OPINST): Ditto.
609 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
610
611Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
612
613 * alpha.h (AXP_OPCODE_EV6): New.
614 (AXP_OPCODE_NOPAL): Include it.
615
6161999-02-09 Doug Evans <devans@casey.cygnus.com>
617
618 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
619 All uses updated. New members int_insn_p, max_insn_size,
620 parse_operand,insert_operand,extract_operand,print_operand,
621 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
622 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
623 extract_handlers,print_handlers.
624 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
625 (CGEN_ATTR_BOOL_OFFSET): New macro.
626 (CGEN_ATTR_MASK): Subtract it to compute bit number.
627 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
628 (cgen_opcode_handler): Renamed from cgen_base.
629 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
630 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
631 all uses updated.
632 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
633 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
634 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
635 (CGEN_OPCODE,CGEN_IBASE): New types.
636 (CGEN_INSN): Rewrite.
637 (CGEN_{ASM,DIS}_HASH*): Delete.
638 (init_opcode_table,init_ibld_table): Declare.
639 (CGEN_INSN_ATTR): New type.
640
641Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
642
643 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
644 (x_FP, d_FP, dls_FP, sldx_FP): Define.
645 Change *Suf definitions to include x and d suffixes.
646 (movsx): Use w_Suf and b_Suf.
647 (movzx): Likewise.
648 (movs): Use bwld_Suf.
649 (fld): Change ordering. Use sld_FP.
650 (fild): Add Intel Syntax equivalent of fildq.
651 (fst): Use sld_FP.
652 (fist): Use sld_FP.
653 (fstp): Use sld_FP. Add x_FP version.
654 (fistp): LLongMem version for Intel Syntax.
655 (fcom, fcomp): Use sld_FP.
656 (fadd, fiadd, fsub): Use sld_FP.
657 (fsubr): Use sld_FP.
658 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
659
6601999-01-27 Doug Evans <devans@casey.cygnus.com>
661
662 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
663 CGEN_MODE_UINT.
664
665Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
666
667 * hppa.h (bv): Fix mask.
668
6691999-01-05 Doug Evans <devans@casey.cygnus.com>
670
671 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
672 (CGEN_ATTR): Use it.
673 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
674 (CGEN_ATTR_TABLE): New member dfault.
675
6761998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
677
678 * mips.h (MIPS16_INSN_BRANCH): New.
679
680Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
681
682 The following is part of a change made by Edith Epstein
683 <eepstein@sophia.cygnus.com> as part of a project to merge in
684 changes by HP; HP did not create ChangeLog entries.
685
686 * hppa.h (completer_chars): list of chars to not put a space
687 after.
688
689Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
690
691 * i386.h (i386_optab): Permit w suffix on processor control and
692 status word instructions.
693
6941998-11-30 Doug Evans <devans@casey.cygnus.com>
695
696 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
697 (struct cgen_keyword_entry): Ditto.
698 (struct cgen_operand): Ditto.
699 (CGEN_IFLD): New typedef, with associated access macros.
700 (CGEN_IFMT): New typedef, with associated access macros.
701 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
702 (CGEN_IVALUE): New typedef.
703 (struct cgen_insn): Delete const on syntax,attrs members.
704 `format' now points to format data. Type of `value' is now
705 CGEN_IVALUE.
706 (struct cgen_opcode_table): New member ifld_table.
707
7081998-11-18 Doug Evans <devans@casey.cygnus.com>
709
710 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
711 (CGEN_OPERAND_INSTANCE): New member `attrs'.
712 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
713 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
714 (cgen_opcode_table): Update type of dis_hash fn.
715 (extract_operand): Update type of `insn_value' arg.
716
717Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
718
719 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
720
721Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
722
723 * mips.h (INSN_MULT): Added.
724
725Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
726
727 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
728
729Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
730
731 * cgen.h (CGEN_INSN_INT): New typedef.
732 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
733 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
734 (CGEN_INSN_BYTES_PTR): New typedef.
735 (CGEN_EXTRACT_INFO): New typedef.
736 (cgen_insert_fn,cgen_extract_fn): Update.
737 (cgen_opcode_table): New member `insn_endian'.
738 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
739 (insert_operand,extract_operand): Update.
740 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
741
742Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
743
744 * cgen.h (CGEN_ATTR_BOOLS): New macro.
745 (struct CGEN_HW_ENTRY): New member `attrs'.
746 (CGEN_HW_ATTR): New macro.
747 (struct CGEN_OPERAND_INSTANCE): New member `name'.
748 (CGEN_INSN_INVALID_P): New macro.
749
750Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
751
752 * hppa.h: Add "fid".
753
754Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
755
756 From Robert Andrew Dale <rob@nb.net>
757 * i386.h (i386_optab): Add AMD 3DNow! instructions.
758 (AMD_3DNOW_OPCODE): Define.
759
760Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
761
762 * d30v.h (EITHER_BUT_PREFER_MU): Define.
763
764Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
765
766 * cgen.h (cgen_insn): #if 0 out element `cdx'.
767
768Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
769
770 Move all global state data into opcode table struct, and treat
771 opcode table as something that is "opened/closed".
772 * cgen.h (CGEN_OPCODE_DESC): New type.
773 (all fns): New first arg of opcode table descriptor.
774 (cgen_set_parse_operand_fn): Add prototype.
775 (cgen_current_machine,cgen_current_endian): Delete.
776 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
777 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
778 dis_hash_table,dis_hash_table_entries.
779 (opcode_open,opcode_close): Add prototypes.
780
781 * cgen.h (cgen_insn): New element `cdx'.
782
783Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
784
785 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
786
787Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
788
789 * mn10300.h: Add "no_match_operands" field for instructions.
790 (MN10300_MAX_OPERANDS): Define.
791
792Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
793
794 * cgen.h (cgen_macro_insn_count): Declare.
795
796Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
797
798 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
799 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
800 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
801 set_{int,vma}_operand.
802
803Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
804
805 * mn10300.h: Add "machine" field for instructions.
806 (MN103, AM30): Define machine types.
807
808Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
809
810 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
811
8121998-06-18 Ulrich Drepper <drepper@cygnus.com>
813
814 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
815
816Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
817
818 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
819 and ud2b.
820 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
821 those that happen to be implemented on pentiums.
822
823Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
824
825 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
826 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
827 with Size16|IgnoreSize or Size32|IgnoreSize.
828
829Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
830
831 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
832 (REPE): Rename to REPE_PREFIX_OPCODE.
833 (i386_regtab_end): Remove.
834 (i386_prefixtab, i386_prefixtab_end): Remove.
835 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
836 of md_begin.
837 (MAX_OPCODE_SIZE): Define.
838 (i386_optab_end): Remove.
839 (sl_Suf): Define.
840 (sl_FP): Use sl_Suf.
841
842 * i386.h (i386_optab): Allow 16 bit displacement for `mov
843 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
844 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
845 data32, dword, and adword prefixes.
846 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
847 regs.
848
849Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
850
851 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
852
853 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
854 register operands, because this is a common idiom. Flag them with
855 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
856 fdivrp because gcc erroneously generates them. Also flag with a
857 warning.
858
859 * i386.h: Add suffix modifiers to most insns, and tighter operand
860 checks in some cases. Fix a number of UnixWare compatibility
861 issues with float insns. Merge some floating point opcodes, using
862 new FloatMF modifier.
863 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
864 consistency.
865
866 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
867 IgnoreDataSize where appropriate.
868
869Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
870
871 * i386.h: (one_byte_segment_defaults): Remove.
872 (two_byte_segment_defaults): Remove.
873 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
874
875Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
876
877 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
878 (cgen_hw_lookup_by_num): Declare.
879
880Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
881
882 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
883 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
884
885Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
886
887 * cgen.h (cgen_asm_init_parse): Delete.
888 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
889 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
890
891Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
892
893 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
894 (cgen_asm_finish_insn): Update prototype.
895 (cgen_insn): New members num, data.
896 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
897 dis_hash, dis_hash_table_size moved to ...
898 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
899 All uses updated. New members asm_hash_p, dis_hash_p.
900 (CGEN_MINSN_EXPANSION): New struct.
901 (cgen_expand_macro_insn): Declare.
902 (cgen_macro_insn_count): Declare.
903 (get_insn_operands): Update prototype.
904 (lookup_get_insn_operands): Declare.
905
906Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
907
908 * i386.h (i386_optab): Change iclrKludge and imulKludge to
909 regKludge. Add operands types for string instructions.
910
911Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
912
913 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
914 table.
915
916Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
917
918 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
919 for `gettext'.
920
921Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
922
923 * i386.h: Remove NoModrm flag from all insns: it's never checked.
924 Add IsString flag to string instructions.
925 (IS_STRING): Don't define.
926 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
927 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
928 (SS_PREFIX_OPCODE): Define.
929
930Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
931
932 * i386.h: Revert March 24 patch; no more LinearAddress.
933
934Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
935
936 * i386.h (i386_optab): Remove fwait (9b) from all floating point
937 instructions, and instead add FWait opcode modifier. Add short
938 form of fldenv and fstenv.
939 (FWAIT_OPCODE): Define.
940
941 * i386.h (i386_optab): Change second operand constraint of `mov
942 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
943 allow legal instructions such as `movl %gs,%esi'
944
945Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
946
947 * h8300.h: Various changes to fully bracket initializers.
948
949Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
950
951 * i386.h: Set LinearAddress for lidt and lgdt.
952
953Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
954
955 * cgen.h (CGEN_BOOL_ATTR): New macro.
956
957Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
958
959 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
960
961Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
962
963 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
964 (cgen_insn): Record syntax and format entries here, rather than
965 separately.
966
967Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
968
969 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
970
971Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
972
973 * cgen.h (cgen_insert_fn): Change type of result to const char *.
974 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
975 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
976
977Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
978
979 * cgen.h (lookup_insn): New argument alias_p.
980
981Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
982
983Fix rac to accept only a0:
984 * d10v.h (OPERAND_ACC): Split into:
985 (OPERAND_ACC0, OPERAND_ACC1) .
986 (OPERAND_GPR): Define.
987
988Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
989
990 * cgen.h (CGEN_FIELDS): Define here.
991 (CGEN_HW_ENTRY): New member `type'.
992 (hw_list): Delete decl.
993 (enum cgen_mode): Declare.
994 (CGEN_OPERAND): New member `hw'.
995 (enum cgen_operand_instance_type): Declare.
996 (CGEN_OPERAND_INSTANCE): New type.
997 (CGEN_INSN): New member `operands'.
998 (CGEN_OPCODE_DATA): Make hw_list const.
999 (get_insn_operands,lookup_insn): Add prototypes for.
1000
1001Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1002
1003 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1004 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1005 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1006 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1007
1008Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1009
1010 * cgen.h: Correct typo in comment end marker.
1011
1012Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1013
1014 * tic30.h: New file.
1015
1016Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1017
1018 * cgen.h: Add prototypes for cgen_save_fixups(),
1019 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1020 of cgen_asm_finish_insn() to return a char *.
1021
1022Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1023
1024 * cgen.h: Formatting changes to improve readability.
1025
1026Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1027
1028 * cgen.h (*): Clean up pass over `struct foo' usage.
1029 (CGEN_ATTR): Make unsigned char.
1030 (CGEN_ATTR_TYPE): Update.
1031 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1032 (cgen_base): Move member `attrs' to cgen_insn.
1033 (CGEN_KEYWORD): New member `null_entry'.
1034 (CGEN_{SYNTAX,FORMAT}): New types.
1035 (cgen_insn): Format and syntax separated from each other.
1036
1037Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1038
1039 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1040 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1041 flags_{used,set} long.
1042 (d30v_operand): Make flags field long.
1043
1044Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1045
1046 * m68k.h: Fix comment describing operand types.
1047
1048Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1049
1050 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1051 everything else after down.
1052
1053Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1054
1055 * d10v.h (OPERAND_FLAG): Split into:
1056 (OPERAND_FFLAG, OPERAND_CFLAG) .
1057
1058Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1059
1060 * mips.h (struct mips_opcode): Changed comments to reflect new
1061 field usage.
1062
1063Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1064
1065 * mips.h: Added to comments a quick-ref list of all assigned
1066 operand type characters.
1067 (OP_{MASK,SH}_PERFREG): New macros.
1068
1069Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1070
1071 * sparc.h: Add '_' and '/' for v9a asr's.
1072 Patch from David Miller <davem@vger.rutgers.edu>
1073
1074Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1075
1076 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1077 area are not available in the base model (H8/300).
1078
1079Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1080
1081 * m68k.h: Remove documentation of ` operand specifier.
1082
1083Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1084
1085 * m68k.h: Document q and v operand specifiers.
1086
1087Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1088
1089 * v850.h (struct v850_opcode): Add processors field.
1090 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1091 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1092 (PROCESSOR_V850EA): New bit constants.
1093
1094Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1095
1096 Merge changes from Martin Hunt:
1097
1098 * d30v.h: Allow up to 64 control registers. Add
1099 SHORT_A5S format.
1100
1101 * d30v.h (LONG_Db): New form for delayed branches.
1102
1103 * d30v.h: (LONG_Db): New form for repeati.
1104
1105 * d30v.h (SHORT_D2B): New form.
1106
1107 * d30v.h (SHORT_A2): New form.
1108
1109 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1110 registers are used. Needed for VLIW optimization.
1111
1112Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1113
1114 * cgen.h: Move assembler interface section
1115 up so cgen_parse_operand_result is defined for cgen_parse_address.
1116 (cgen_parse_address): Update prototype.
1117
1118Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1119
1120 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1121
1122Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1123
1124 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1125 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1126 <paubert@iram.es>.
1127
1128 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1129 <paubert@iram.es>.
1130
1131 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1132 <paubert@iram.es>.
1133
1134 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1135 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1136
1137Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1138
1139 * v850.h (V850_NOT_R0): New flag.
1140
1141Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1142
1143 * v850.h (struct v850_opcode): Remove flags field.
1144
1145Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1146
1147 * v850.h (struct v850_opcode): Add flags field.
1148 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1149 fields.
1150 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1151 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1152
1153Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1154
1155 * arc.h: New file.
1156
1157Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1158
1159 * sparc.h (sparc_opcodes): Declare as const.
1160
1161Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1162
1163 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1164 uses single or double precision floating point resources.
1165 (INSN_NO_ISA, INSN_ISA1): Define.
1166 (cpu specific INSN macros): Tweak into bitmasks outside the range
1167 of INSN_ISA field.
1168
1169Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1170
1171 * i386.h: Fix pand opcode.
1172
1173Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1174
1175 * mips.h: Widen INSN_ISA and move it to a more convenient
1176 bit position. Add INSN_3900.
1177
1178Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1179
1180 * mips.h (struct mips_opcode): added new field membership.
1181
1182Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1183
1184 * i386.h (movd): only Reg32 is allowed.
1185
1186 * i386.h: add fcomp and ud2. From Wayne Scott
1187 <wscott@ichips.intel.com>.
1188
1189Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1190
1191 * i386.h: Add MMX instructions.
1192
1193Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1194
1195 * i386.h: Remove W modifier from conditional move instructions.
1196
1197Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1198
1199 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1200 with no arguments to match that generated by the UnixWare
1201 assembler.
1202
1203Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1204
1205 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1206 (cgen_parse_operand_fn): Declare.
1207 (cgen_init_parse_operand): Declare.
1208 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1209 new argument `want'.
1210 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1211 (enum cgen_parse_operand_type): New enum.
1212
1213Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1214
1215 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1216
1217Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1218
1219 * cgen.h: New file.
1220
1221Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1222
1223 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1224 fdivrp.
1225
1226Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1227
1228 * v850.h (extract): Make unsigned.
1229
1230Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1231
1232 * i386.h: Add iclr.
1233
1234Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1235
1236 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1237 take a direction bit.
1238
1239Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1240
1241 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1242
1243Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1244
1245 * sparc.h: Include <ansidecl.h>. Update function declarations to
1246 use prototypes, and to use const when appropriate.
1247
1248Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1249
1250 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1251
1252Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1253
1254 * d10v.h: Change pre_defined_registers to
1255 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1256
1257Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1258
1259 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1260 Change mips_opcodes from const array to a pointer,
1261 and change bfd_mips_num_opcodes from const int to int,
1262 so that we can increase the size of the mips opcodes table
1263 dynamically.
1264
1265Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1266
1267 * d30v.h (FLAG_X): Remove unused flag.
1268
1269Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1270
1271 * d30v.h: New file.
1272
1273Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1274
1275 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1276 (PDS_VALUE): Macro to access value field of predefined symbols.
1277 (tic80_next_predefined_symbol): Add prototype.
1278
1279Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1280
1281 * tic80.h (tic80_symbol_to_value): Change prototype to match
1282 change in function, added class parameter.
1283
1284Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1285
1286 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1287 endmask fields, which are somewhat weird in that 0 and 32 are
1288 treated exactly the same.
1289
1290Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1291
1292 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1293 rather than a constant that is 2**X. Reorder them to put bits for
1294 operands that have symbolic names in the upper bits, so they can
1295 be packed into an int where the lower bits contain the value that
1296 corresponds to that symbolic name.
1297 (predefined_symbo): Add struct.
1298 (tic80_predefined_symbols): Declare array of translations.
1299 (tic80_num_predefined_symbols): Declare size of that array.
1300 (tic80_value_to_symbol): Declare function.
1301 (tic80_symbol_to_value): Declare function.
1302
1303Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1304
1305 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1306
1307Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1308
1309 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1310 be the destination register.
1311
1312Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1313
1314 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1315 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1316 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1317 that the opcode can have two vector instructions in a single
1318 32 bit word and we have to encode/decode both.
1319
1320Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1321
1322 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1323 TIC80_OPERAND_RELATIVE for PC relative.
1324 (TIC80_OPERAND_BASEREL): New flag bit for register
1325 base relative.
1326
1327Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1328
1329 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1330
1331Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1332
1333 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1334 ":s" modifier for scaling.
1335
1336Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1337
1338 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1339 (TIC80_OPERAND_M_LI): Ditto
1340
1341Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1342
1343 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1344 (TIC80_OPERAND_CC): New define for condition code operand.
1345 (TIC80_OPERAND_CR): New define for control register operand.
1346
1347Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1348
1349 * tic80.h (struct tic80_opcode): Name changed.
1350 (struct tic80_opcode): Remove format field.
1351 (struct tic80_operand): Add insertion and extraction functions.
1352 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1353 correct ones.
1354 (FMT_*): Ditto.
1355
1356Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1357
1358 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1359 type IV instruction offsets.
1360
1361Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1362
1363 * tic80.h: New file.
1364
1365Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1366
1367 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1368
1369Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1370
1371 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1372 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1373 * v850.h: Fix comment, v850_operand not powerpc_operand.
1374
1375Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1376
1377 * mn10200.h: Flesh out structures and definitions needed by
1378 the mn10200 assembler & disassembler.
1379
1380Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1381
1382 * mips.h: Add mips16 definitions.
1383
1384Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1385
1386 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1387
1388Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1389
1390 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1391 (MN10300_OPERAND_MEMADDR): Define.
1392
1393Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1394
1395 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1396
1397Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1398
1399 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1400
1401Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1402
1403 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1404
1405Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1406
1407 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1408
1409Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1410
1411 * alpha.h: Don't include "bfd.h"; private relocation types are now
1412 negative to minimize problems with shared libraries. Organize
1413 instruction subsets by AMASK extensions and PALcode
1414 implementation.
1415 (struct alpha_operand): Move flags slot for better packing.
1416
1417Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1418
1419 * v850.h (V850_OPERAND_RELAX): New operand flag.
1420
1421Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1422
1423 * mn10300.h (FMT_*): Move operand format definitions
1424 here.
1425
1426Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1427
1428 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1429
1430Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1431
1432 * mn10300.h (mn10300_opcode): Add "format" field.
1433 (MN10300_OPERAND_*): Define.
1434
1435Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1436
1437 * mn10x00.h: Delete.
1438 * mn10200.h, mn10300.h: New files.
1439
1440Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1441
1442 * mn10x00.h: New file.
1443
1444Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1445
1446 * v850.h: Add new flag to indicate this instruction uses a PC
1447 displacement.
1448
1449Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1450
1451 * h8300.h (stmac): Add missing instruction.
1452
1453Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1454
1455 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1456 field.
1457
1458Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1459
1460 * v850.h (V850_OPERAND_EP): Define.
1461
1462 * v850.h (v850_opcode): Add size field.
1463
1464Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1465
1466 * v850.h (v850_operands): Add insert and extract fields, pointers
1467 to functions used to handle unusual operand encoding.
1468 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1469 V850_OPERAND_SIGNED): Defined.
1470
1471Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1472
1473 * v850.h (v850_operands): Add flags field.
1474 (OPERAND_REG, OPERAND_NUM): Defined.
1475
1476Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1477
1478 * v850.h: New file.
1479
1480Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1481
1482 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1483 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1484 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1485 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1486 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1487 Defined.
1488
1489Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1490
1491 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1492 a 3 bit space id instead of a 2 bit space id.
1493
1494Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1495
1496 * d10v.h: Add some additional defines to support the
1497 assembler in determining which operations can be done in parallel.
1498
1499Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1500
1501 * h8300.h (SN): Define.
1502 (eepmov.b): Renamed from "eepmov"
1503 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1504 with them.
1505
1506Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1507
1508 * d10v.h (OPERAND_SHIFT): New operand flag.
1509
1510Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1511
1512 * d10v.h: Changes for divs, parallel-only instructions, and
1513 signed numbers.
1514
1515Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1516
1517 * d10v.h (pd_reg): Define. Putting the definition here allows
1518 the assembler and disassembler to share the same struct.
1519
1520Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1521
1522 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1523 Williams <steve@icarus.com>.
1524
1525Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1526
1527 * d10v.h: New file.
1528
1529Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1530
1531 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1532
1533Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1534
1535 * m68k.h (mcf5200): New macro.
1536 Document names of coldfire control registers.
1537
1538Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1539
1540 * h8300.h (SRC_IN_DST): Define.
1541
1542 * h8300.h (UNOP3): Mark the register operand in this insn
1543 as a source operand, not a destination operand.
1544 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1545 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1546 register operand with SRC_IN_DST.
1547
1548Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1549
1550 * alpha.h: New file.
1551
1552Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1553
1554 * rs6k.h: Remove obsolete file.
1555
1556Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1557
1558 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1559 fdivp, and fdivrp. Add ffreep.
1560
1561Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1562
1563 * h8300.h: Reorder various #defines for readability.
1564 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1565 (BITOP): Accept additional (unused) argument. All callers changed.
1566 (EBITOP): Likewise.
1567 (O_LAST): Bump.
1568 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1569
1570 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1571 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1572 (BITOP, EBITOP): Handle new H8/S addressing modes for
1573 bit insns.
1574 (UNOP3): Handle new shift/rotate insns on the H8/S.
1575 (insns using exr): New instructions.
1576 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1577
1578Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1579
1580 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1581 was incorrect.
1582
1583Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1584
1585 * h8300.h (START): Remove.
1586 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1587 and mov.l insns that can be relaxed.
1588
1589Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1590
1591 * i386.h: Remove Abs32 from lcall.
1592
1593Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1594
1595 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1596 (SLCPOP): New macro.
1597 Mark X,Y opcode letters as in use.
1598
1599Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1600
1601 * sparc.h (F_FLOAT, F_FBR): Define.
1602
1603Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1604
1605 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1606 from all insns.
1607 (ABS8SRC,ABS8DST): Add ABS8MEM.
1608 (add.l): Fix reg+reg variant.
1609 (eepmov.w): Renamed from eepmovw.
1610 (ldc,stc): Fix many cases.
1611
1612Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1613
1614 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1615
1616Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1617
1618 * sparc.h (O): Mark operand letter as in use.
1619
1620Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1621
1622 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1623 Mark operand letters uU as in use.
1624
1625Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1626
1627 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1628 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1629 (SPARC_OPCODE_SUPPORTED): New macro.
1630 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1631 (F_NOTV9): Delete.
1632
1633Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1634
1635 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1636 declaration consistent with return type in definition.
1637
1638Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1639
1640 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1641
1642Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1643
1644 * i386.h (i386_regtab): Add 80486 test registers.
1645
1646Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1647
1648 * i960.h (I_HX): Define.
1649 (i960_opcodes): Add HX instruction.
1650
1651Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1652
1653 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1654 and fclex.
1655
1656Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1657
1658 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1659 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1660 (bfd_* defines): Delete.
1661 (sparc_opcode_archs): Replaces architecture_pname.
1662 (sparc_opcode_lookup_arch): Declare.
1663 (NUMOPCODES): Delete.
1664
1665Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1666
1667 * sparc.h (enum sparc_architecture): Add v9a.
1668 (ARCHITECTURES_CONFLICT_P): Update.
1669
1670Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1671
1672 * i386.h: Added Pentium Pro instructions.
1673
1674Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1675
1676 * m68k.h: Document new 'W' operand place.
1677
1678Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1679
1680 * hppa.h: Add lci and syncdma instructions.
1681
1682Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1683
1684 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1685 instructions.
1686
1687Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1688
1689 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1690 assembler's -mcom and -many switches.
1691
1692Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1693
1694 * i386.h: Fix cmpxchg8b extension opcode description.
1695
1696Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1697
1698 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1699 and register cr4.
1700
1701Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1702
1703 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1704
1705Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1706
1707 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1708
1709Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1710
1711 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1712
1713Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1714
1715 * m68kmri.h: Remove.
1716
1717 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1718 declarations. Remove F_ALIAS and flag field of struct
1719 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1720 int. Make name and args fields of struct m68k_opcode const.
1721
1722Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1723
1724 * sparc.h (F_NOTV9): Define.
1725
1726Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1727
1728 * mips.h (INSN_4010): Define.
1729
1730Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1731
1732 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1733
1734 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1735 * m68k.h: Fix argument descriptions of coprocessor
1736 instructions to allow only alterable operands where appropriate.
1737 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1738 (m68k_opcode_aliases): Add more aliases.
1739
1740Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1741
1742 * m68k.h: Added explcitly short-sized conditional branches, and a
1743 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1744 svr4-based configurations.
1745
1746Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1747
1748 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1749 * i386.h: added missing Data16/Data32 flags to a few instructions.
1750
1751Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1752
1753 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1754 (OP_MASK_BCC, OP_SH_BCC): Define.
1755 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1756 (OP_MASK_CCC, OP_SH_CCC): Define.
1757 (INSN_READ_FPR_R): Define.
1758 (INSN_RFE): Delete.
1759
1760Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1761
1762 * m68k.h (enum m68k_architecture): Deleted.
1763 (struct m68k_opcode_alias): New type.
1764 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1765 matching constraints, values and flags. As a side effect of this,
1766 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1767 as I know were never used, now may need re-examining.
1768 (numopcodes): Now const.
1769 (m68k_opcode_aliases, numaliases): New variables.
1770 (endop): Deleted.
1771 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1772 m68k_opcode_aliases; update declaration of m68k_opcodes.
1773
1774Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1775
1776 * hppa.h (delay_type): Delete unused enumeration.
1777 (pa_opcode): Replace unused delayed field with an architecture
1778 field.
1779 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1780
1781Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1782
1783 * mips.h (INSN_ISA4): Define.
1784
1785Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1786
1787 * mips.h (M_DLA_AB, M_DLI): Define.
1788
1789Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1790
1791 * hppa.h (fstwx): Fix single-bit error.
1792
1793Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1794
1795 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1796
1797Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1798
1799 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1800 debug registers. From Charles Hannum (mycroft@netbsd.org).
1801
1802Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1803
1804 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1805 i386 support:
1806 * i386.h (MOV_AX_DISP32): New macro.
1807 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1808 of several call/return instructions.
1809 (ADDR_PREFIX_OPCODE): New macro.
1810
1811Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1812
1813 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1814
1815 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1816 it pointer to const char;
1817 (struct vot, field `name'): ditto.
1818
1819Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1820
1821 * vax.h: Supply and properly group all values in end sentinel.
1822
1823Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1824
1825 * mips.h (INSN_ISA, INSN_4650): Define.
1826
1827Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1828
1829 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1830 systems with a separate instruction and data cache, such as the
1831 29040, these instructions take an optional argument.
1832
1833Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1834
1835 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1836 INSN_TRAP.
1837
1838Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1839
1840 * mips.h (INSN_STORE_MEMORY): Define.
1841
1842Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1843
1844 * sparc.h: Document new operand type 'x'.
1845
1846Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1847
1848 * i960.h (I_CX2): New instruction category. It includes
1849 instructions available on Cx and Jx processors.
1850 (I_JX): New instruction category, for JX-only instructions.
1851 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1852 Jx-only instructions, in I_JX category.
1853
1854Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1855
1856 * ns32k.h (endop): Made pointer const too.
1857
1858Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1859
1860 * ns32k.h: Drop Q operand type as there is no correct use
1861 for it. Add I and Z operand types which allow better checking.
1862
1863Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1864
1865 * h8300.h (xor.l) :fix bit pattern.
1866 (L_2): New size of operand.
1867 (trapa): Use it.
1868
1869Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1870
1871 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1872
1873Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1874
1875 * sparc.h: Include v9 definitions.
1876
1877Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1878
1879 * m68k.h (m68060): Defined.
1880 (m68040up, mfloat, mmmu): Include it.
1881 (struct m68k_opcode): Widen `arch' field.
1882 (m68k_opcodes): Updated for M68060. Removed comments that were
1883 instructions commented out by "JF" years ago.
1884
1885Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1886
1887 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1888 add a one-bit `flags' field.
1889 (F_ALIAS): New macro.
1890
1891Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1892
1893 * h8300.h (dec, inc): Get encoding right.
1894
1895Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1896
1897 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1898 a flag instead.
1899 (PPC_OPERAND_SIGNED): Define.
1900 (PPC_OPERAND_SIGNOPT): Define.
1901
1902Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1903
1904 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1905 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1906
1907Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1908
1909 * i386.h: Reverse last change. It'll be handled in gas instead.
1910
1911Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1912
1913 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1914 slower on the 486 and used the implicit shift count despite the
1915 explicit operand. The one-operand form is still available to get
1916 the shorter form with the implicit shift count.
1917
1918Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1919
1920 * hppa.h: Fix typo in fstws arg string.
1921
1922Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1923
1924 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1925
1926Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1927
1928 * ppc.h (PPC_OPCODE_601): Define.
1929
1930Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1931
1932 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1933 (so we can determine valid completers for both addb and addb[tf].)
1934
1935 * hppa.h (xmpyu): No floating point format specifier for the
1936 xmpyu instruction.
1937
1938Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1939
1940 * ppc.h (PPC_OPERAND_NEXT): Define.
1941 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1942 (struct powerpc_macro): Define.
1943 (powerpc_macros, powerpc_num_macros): Declare.
1944
1945Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1946
1947 * ppc.h: New file. Header file for PowerPC opcode table.
1948
1949Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1950
1951 * hppa.h: More minor template fixes for sfu and copr (to allow
1952 for easier disassembly).
1953
1954 * hppa.h: Fix templates for all the sfu and copr instructions.
1955
1956Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1957
1958 * i386.h (push): Permit Imm16 operand too.
1959
1960Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1961
1962 * h8300.h (andc): Exists in base arch.
1963
1964Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1965
1966 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1967 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1968
1969Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1970
1971 * hppa.h: Add FP quadword store instructions.
1972
1973Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1974
1975 * mips.h: (M_J_A): Added.
1976 (M_LA): Removed.
1977
1978Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1979
1980 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1981 <mellon@pepper.ncd.com>.
1982
1983Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1984
1985 * hppa.h: Immediate field in probei instructions is unsigned,
1986 not low-sign extended.
1987
1988Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1989
1990 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1991
1992Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1993
1994 * i386.h: Add "fxch" without operand.
1995
1996Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1997
1998 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1999
2000Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2001
2002 * hppa.h: Add gfw and gfr to the opcode table.
2003
2004Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2005
2006 * m88k.h: extended to handle m88110.
2007
2008Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2009
2010 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2011 addresses.
2012
2013Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2014
2015 * i960.h (i960_opcodes): Properly bracket initializers.
2016
2017Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2018
2019 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2020
2021Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2022
2023 * m68k.h (two): Protect second argument with parentheses.
2024
2025Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2026
2027 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2028 Deleted old in/out instructions in "#if 0" section.
2029
2030Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2031
2032 * i386.h (i386_optab): Properly bracket initializers.
2033
2034Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2035
2036 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2037 Jeff Law, law@cs.utah.edu).
2038
2039Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2040
2041 * i386.h (lcall): Accept Imm32 operand also.
2042
2043Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2044
2045 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2046 (M_DABS): Added.
2047
2048Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2049
2050 * mips.h (INSN_*): Changed values. Removed unused definitions.
2051 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2052 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2053 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2054 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2055 (M_*): Added new values for r6000 and r4000 macros.
2056 (ANY_DELAY): Removed.
2057
2058Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2059
2060 * mips.h: Added M_LI_S and M_LI_SS.
2061
2062Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2063
2064 * h8300.h: Get some rare mov.bs correct.
2065
2066Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2067
2068 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2069 been included.
2070
2071Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2072
2073 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2074 jump instructions, for use in disassemblers.
2075
2076Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2077
2078 * m88k.h: Make bitfields just unsigned, not unsigned long or
2079 unsigned short.
2080
2081Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2082
2083 * hppa.h: New argument type 'y'. Use in various float instructions.
2084
2085Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2086
2087 * hppa.h (break): First immediate field is unsigned.
2088
2089 * hppa.h: Add rfir instruction.
2090
2091Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2092
2093 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2094
2095Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2096
2097 * mips.h: Reworked the hazard information somewhat, and fixed some
2098 bugs in the instruction hazard descriptions.
2099
2100Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2101
2102 * m88k.h: Corrected a couple of opcodes.
2103
2104Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2105
2106 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2107 new version includes instruction hazard information, but is
2108 otherwise reasonably similar.
2109
2110Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2111
2112 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2113
2114Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2115
2116 Patches from Jeff Law, law@cs.utah.edu:
2117 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2118 Make the tables be the same for the following instructions:
2119 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2120 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2121 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2122 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2123 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2124 "fcmp", and "ftest".
2125
2126 * hppa.h: Make new and old tables the same for "break", "mtctl",
2127 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2128 Fix typo in last patch. Collapse several #ifdefs into a
2129 single #ifdef.
2130
2131 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2132 of the comments up-to-date.
2133
2134 * hppa.h: Update "free list" of letters and update
2135 comments describing each letter's function.
2136
2137Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2138
2139 * h8300.h: checkpoint, includes H8/300-H opcodes.
2140
2141Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2142
2143 * Patches from Jeffrey Law <law@cs.utah.edu>.
2144 * hppa.h: Rework single precision FP
2145 instructions so that they correctly disassemble code
2146 PA1.1 code.
2147
2148Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2149
2150 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2151 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2152
2153Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2154
2155 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2156 gdb will define it for now.
2157
2158Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2159
2160 * sparc.h: Don't end enumerator list with comma.
2161
2162Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2163
2164 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2165 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2166 ("bc2t"): Correct typo.
2167 ("[ls]wc[023]"): Use T rather than t.
2168 ("c[0123]"): Define general coprocessor instructions.
2169
2170Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2171
2172 * m68k.h: Move split point for gcc compilation more towards
2173 middle.
2174
2175Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2176
2177 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2178 simply wrong, ics, rfi, & rfsvc were missing).
2179 Add "a" to opr_ext for "bb". Doc fix.
2180
2181Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2182
2183 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2184 * mips.h: Add casts, to suppress warnings about shifting too much.
2185 * m68k.h: Document the placement code '9'.
2186
2187Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2188
2189 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2190 allows callers to break up the large initialized struct full of
2191 opcodes into two half-sized ones. This permits GCC to compile
2192 this module, since it takes exponential space for initializers.
2193 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2194
2195Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2196
2197 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2198 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2199 initialized structs in it.
2200
2201Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2202
2203 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2204 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2205 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2206
2207Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2208
2209 * mips.h: document "i" and "j" operands correctly.
2210
2211Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2212
2213 * mips.h: Removed endianness dependency.
2214
2215Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2216
2217 * h8300.h: include info on number of cycles per instruction.
2218
2219Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2220
2221 * hppa.h: Move handy aliases to the front. Fix masks for extract
2222 and deposit instructions.
2223
2224Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2225
2226 * i386.h: accept shld and shrd both with and without the shift
2227 count argument, which is always %cl.
2228
2229Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2230
2231 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2232 (one_byte_segment_defaults, two_byte_segment_defaults,
2233 i386_prefixtab_end): Ditto.
2234
2235Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2236
2237 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2238 for operand 2; from John Carr, jfc@dsg.dec.com.
2239
2240Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2241
2242 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2243 always use 16-bit offsets. Makes calculated-size jump tables
2244 feasible.
2245
2246Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2247
2248 * i386.h: Fix one-operand forms of in* and out* patterns.
2249
2250Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2251
2252 * m68k.h: Added CPU32 support.
2253
2254Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2255
2256 * mips.h (break): Disassemble the argument. Patch from
2257 jonathan@cs.stanford.edu (Jonathan Stone).
2258
2259Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2260
2261 * m68k.h: merged Motorola and MIT syntax.
2262
2263Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2264
2265 * m68k.h (pmove): make the tests less strict, the 68k book is
2266 wrong.
2267
2268Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2269
2270 * m68k.h (m68ec030): Defined as alias for 68030.
2271 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2272 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2273 them. Tightened description of "fmovex" to distinguish it from
2274 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2275 up descriptions that claimed versions were available for chips not
2276 supporting them. Added "pmovefd".
2277
2278Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2279
2280 * m68k.h: fix where the . goes in divull
2281
2282Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2283
2284 * m68k.h: the cas2 instruction is supposed to be written with
2285 indirection on the last two operands, which can be either data or
2286 address registers. Added a new operand type 'r' which accepts
2287 either register type. Added new cases for cas2l and cas2w which
2288 use them. Corrected masks for cas2 which failed to recognize use
2289 of address register.
2290
2291Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2292
2293 * m68k.h: Merged in patches (mostly m68040-specific) from
2294 Colin Smith <colin@wrs.com>.
2295
2296 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2297 base). Also cleaned up duplicates, re-ordered instructions for
2298 the sake of dis-assembling (so aliases come after standard names).
2299 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2300
2301Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2302
2303 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2304 all missing .s
2305
2306Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2307
2308 * sparc.h: Moved tables to BFD library.
2309
2310 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2311
2312Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2313
2314 * h8300.h: Finish filling in all the holes in the opcode table,
2315 so that the Lucid C compiler can digest this as well...
2316
2317Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2318
2319 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2320 Fix opcodes on various sizes of fild/fist instructions
2321 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2322 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2323
2324Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2325
2326 * h8300.h: Fill in all the holes in the opcode table so that the
2327 losing HPUX C compiler can digest this...
2328
2329Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2330
2331 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2332 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2333
2334Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2335
2336 * sparc.h: Add new architecture variant sparclite; add its scan
2337 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2338
2339Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2340
2341 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2342 fy@lucid.com).
2343
2344Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2345
2346 * rs6k.h: New version from IBM (Metin).
2347
2348Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2349
2350 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2351 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2352
2353Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2354
2355 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2356
2357Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2358
2359 * m68k.h (one, two): Cast macro args to unsigned to suppress
2360 complaints from compiler and lint about integer overflow during
2361 shift.
2362
2363Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2364
2365 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2366
2367Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2368
2369 * mips.h: Make bitfield layout depend on the HOST compiler,
2370 not on the TARGET system.
2371
2372Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2373
2374 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2375 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2376 <TRANLE@INTELLICORP.COM>.
2377
2378Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2379
2380 * h8300.h: turned op_type enum into #define list
2381
2382Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2383
2384 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2385 similar instructions -- they've been renamed to "fitoq", etc.
2386 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2387 number of arguments.
2388 * h8300.h: Remove extra ; which produces compiler warning.
2389
2390Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2391
2392 * sparc.h: fix opcode for tsubcctv.
2393
2394Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2395
2396 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2397
2398Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2399
2400 * sparc.h (nop): Made the 'lose' field be even tighter,
2401 so only a standard 'nop' is disassembled as a nop.
2402
2403Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2404
2405 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2406 disassembled as a nop.
2407
2408Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2409
2410 * sparc.h: fix a typo.
2411
2412Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2413
2414 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2415 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2416 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2417
2418\f
2419Local Variables:
2420version-control: never
2421End:
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