Revert 2001-08-08 changes.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
11b37b7b
AM
12001-08-10 Alan Modra <amodra@one.net.au>
2
3 * ppc.h: Revert 2001-08-08.
4
0f1bac05
AM
52001-08-08 Alan Modra <amodra@one.net.au>
6
7 1999-10-25 Torbjorn Granlund <tege@swox.com>
8 * ppc.h (struct powerpc_operand): New field `reloc'.
9
81f6038f
FCE
102001-07-11 Frank Ch. Eigler <fche@redhat.com>
11
12 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
13 (cgen_cpu_desc): Ditto.
14
32cfffe3
BE
152001-07-07 Ben Elliston <bje@redhat.com>
16
17 * m88k.h: Clean up and reformat. Remove unused code.
18
3e890047
GK
192001-06-14 Geoffrey Keating <geoffk@redhat.com>
20
21 * cgen.h (cgen_keyword): Add nonalpha_chars field.
22
d1cf510e
NC
232001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
24
25 * mips.h (CPU_R12000): Define.
26
e281c457
JH
272001-05-23 John Healy <jhealy@redhat.com>
28
29 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
30
aa5f19f2
NC
312001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
32
33 * mips.h (INSN_ISA_MASK): Define.
34
67d6227d
AM
352001-05-12 Alan Modra <amodra@one.net.au>
36
37 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
38 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
39 and use InvMem as these insns must have register operands.
40
992aaec9
AM
412001-05-04 Alan Modra <amodra@one.net.au>
42
43 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
44 and pextrw to swap reg/rm assignments.
45
4ef7f0bf
HPN
462001-04-05 Hans-Peter Nilsson <hp@axis.com>
47
48 * cris.h (enum cris_insn_version_usage): Correct comment for
49 cris_ver_v3p.
50
0f17484f
AM
512001-03-24 Alan Modra <alan@linuxcare.com.au>
52
53 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
54 Add InvMem to first operand of "maskmovdqu".
55
7ccb5238
HPN
562001-03-22 Hans-Peter Nilsson <hp@axis.com>
57
58 * cris.h (ADD_PC_INCR_OPCODE): New macro.
59
361bfa20
KH
602001-03-21 Kazu Hirata <kazu@hxi.com>
61
62 * h8300.h: Fix formatting.
63
87890af0
AM
642001-03-22 Alan Modra <alan@linuxcare.com.au>
65
66 * i386.h (i386_optab): Add paddq, psubq.
67
2e98d2de
AM
682001-03-19 Alan Modra <alan@linuxcare.com.au>
69
70 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
71
80a523c2
NC
722001-02-28 Igor Shevlyakov <igor@windriver.com>
73
74 * m68k.h: new defines for Coldfire V4. Update mcf to know
75 about mcf5407.
76
e135f41b
NC
772001-02-18 lars brinkhoff <lars@nocrew.org>
78
79 * pdp11.h: New file.
80
812001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
82
83 * i386.h (i386_optab): SSE integer converison instructions have
84 64bit versions on x86-64.
85
8eaec934
NC
862001-02-10 Nick Clifton <nickc@redhat.com>
87
88 * mips.h: Remove extraneous whitespace. Formating change to allow
89 for future contribution.
90
a85d7ed0
NC
912001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
92
93 * s390.h: New file.
94
0715dc88
PM
952001-02-02 Patrick Macdonald <patrickm@redhat.com>
96
97 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
98 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
99 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
100
296bc568
AM
1012001-01-24 Karsten Keil <kkeil@suse.de>
102
103 * i386.h (i386_optab): Fix swapgs
104
1328dc98
AM
1052001-01-14 Alan Modra <alan@linuxcare.com.au>
106
107 * hppa.h: Describe new '<' and '>' operand types, and tidy
108 existing comments.
109 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
110 Remove duplicate "ldw j(s,b),x". Sort some entries.
111
e135f41b 1122001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
113
114 * i386.h (i386_optab): Fix pusha and ret templates.
115
0d2bcfaf
NC
1162001-01-11 Peter Targett <peter.targett@arccores.com>
117
118 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
119 definitions for masking cpu type.
120 (arc_ext_operand_value) New structure for storing extended
121 operands.
122 (ARC_OPERAND_*) Flags for operand values.
123
1242001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
125
126 * i386.h (pinsrw): Add.
127 (pshufw): Remove.
128 (cvttpd2dq): Fix operands.
129 (cvttps2dq): Likewise.
130 (movq2q): Rename to movdq2q.
131
079966a8
AM
1322001-01-10 Richard Schaal <richard.schaal@intel.com>
133
134 * i386.h: Correct movnti instruction.
135
8c1f9e76
JJ
1362001-01-09 Jeff Johnston <jjohnstn@redhat.com>
137
138 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
139 of operands (unsigned char or unsigned short).
140 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
141 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
142
0d2bcfaf 1432001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
144
145 * i386.h (i386_optab): Make [sml]fence template to use immext field.
146
0d2bcfaf 1472001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
148
149 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
150 introduced by Pentium4
151
0d2bcfaf 1522000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
153
154 * i386.h (i386_optab): Add "rex*" instructions;
155 add swapgs; disable jmp/call far direct instructions for
156 64bit mode; add syscall and sysret; disable registers for 0xc6
157 template. Add 'q' suffixes to extendable instructions, disable
079966a8 158 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
159 (i386_regtab): Add extended registers.
160 (*Suf): Add No_qSuf.
161 (q_Suf, wlq_Suf, bwlq_Suf): New.
162
0d2bcfaf 1632000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
164
165 * i386.h (i386_optab): Replace "Imm" with "EncImm".
166 (i386_regtab): Add flags field.
167
bf40d919
NC
1682000-12-12 Nick Clifton <nickc@redhat.com>
169
170 * mips.h: Fix formatting.
171
4372b673
NC
1722000-12-01 Chris Demetriou <cgd@sibyte.com>
173
174 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
175 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
176 OP_*_SYSCALL definitions.
177 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
178 19 bit wait codes.
179 (MIPS operand specifier comments): Remove 'm', add 'U' and
180 'J', and update the meaning of 'B' so that it's more general.
181
e7af610e
NC
182 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
183 INSN_ISA5): Renumber, redefine to mean the ISA at which the
184 instruction was added.
185 (INSN_ISA32): New constant.
186 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
187 Renumber to avoid new and/or renumbered INSN_* constants.
188 (INSN_MIPS32): Delete.
189 (ISA_UNKNOWN): New constant to indicate unknown ISA.
190 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
191 ISA_MIPS32): New constants, defined to be the mask of INSN_*
192 constants available at that ISA level.
193 (CPU_UNKNOWN): New constant to indicate unknown CPU.
194 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
195 define it with a unique value.
196 (OPCODE_IS_MEMBER): Update for new ISA membership-related
197 constant meanings.
198
84ea6cf2
NC
199 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
200 definitions.
201
c6c98b38
NC
202 * mips.h (CPU_SB1): New constant.
203
19f7b010
JJ
2042000-10-20 Jakub Jelinek <jakub@redhat.com>
205
206 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
207 Note that '3' is used for siam operand.
208
139368c9
JW
2092000-09-22 Jim Wilson <wilson@cygnus.com>
210
211 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
212
156c2f8b
NC
2132000-09-13 Anders Norlander <anorland@acc.umu.se>
214
215 * mips.h: Use defines instead of hard-coded processor numbers.
216 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
217 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
218 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
219 CPU_4KC, CPU_4KM, CPU_4KP): Define..
220 (OPCODE_IS_MEMBER): Use new defines.
221 (OP_MASK_SEL, OP_SH_SEL): Define.
222 (OP_MASK_CODE20, OP_SH_CODE20): Define.
223 Add 'P' to used characters.
224 Use 'H' for coprocessor select field.
225 Use 'm' for 20 bit breakpoint code.
226 Document new arg characters and add to used characters.
227 (INSN_MIPS32): New define for MIPS32 extensions.
228 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
229
3c5ce02e
AM
2302000-09-05 Alan Modra <alan@linuxcare.com.au>
231
232 * hppa.h: Mention cz completer.
233
50b81f19
JW
2342000-08-16 Jim Wilson <wilson@cygnus.com>
235
236 * ia64.h (IA64_OPCODE_POSTINC): New.
237
fc29466d
L
2382000-08-15 H.J. Lu <hjl@gnu.org>
239
240 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
241 IgnoreSize change.
242
4f1d9bd8
NC
2432000-08-08 Jason Eckhardt <jle@cygnus.com>
244
245 * i860.h: Small formatting adjustments.
246
45ee1401
DC
2472000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
248
249 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
250 Move related opcodes closer to each other.
251 Minor changes in comments, list undefined opcodes.
252
9d551405
DB
2532000-07-26 Dave Brolley <brolley@redhat.com>
254
255 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
256
4f1d9bd8
NC
2572000-07-22 Jason Eckhardt <jle@cygnus.com>
258
259 * i860.h (btne, bte, bla): Changed these opcodes
260 to use sbroff ('r') instead of split16 ('s').
261 (J, K, L, M): New operand types for 16-bit aligned fields.
262 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
263 use I, J, K, L, M instead of just I.
264 (T, U): New operand types for split 16-bit aligned fields.
265 (st.x): Changed these opcodes to use S, T, U instead of just S.
266 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
267 exist on the i860.
268 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
269 (pfeq.ss, pfeq.dd): New opcodes.
270 (st.s): Fixed incorrect mask bits.
271 (fmlow): Fixed incorrect mask bits.
272 (fzchkl, pfzchkl): Fixed incorrect mask bits.
273 (faddz, pfaddz): Fixed incorrect mask bits.
274 (form, pform): Fixed incorrect mask bits.
275 (pfld.l): Fixed incorrect mask bits.
276 (fst.q): Fixed incorrect mask bits.
277 (all floating point opcodes): Fixed incorrect mask bits for
278 handling of dual bit.
279
c8488617
HPN
2802000-07-20 Hans-Peter Nilsson <hp@axis.com>
281
282 cris.h: New file.
283
65aa24b6
NC
2842000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
285
286 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
287 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
288 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
289 (AVR_ISA_M83): Define for ATmega83, ATmega85.
290 (espm): Remove, because ESPM removed in databook update.
291 (eicall, eijmp): Move to the end of opcode table.
292
60bcf0fa
NC
2932000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
294
295 * m68hc11.h: New file for support of Motorola 68hc11.
296
60a2978a
DC
297Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
298
299 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
300
68ab2dd9
DC
301Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
302
303 * avr.h: New file with AVR opcodes.
304
f0662e27
DL
305Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
306
307 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
308
b722f2be
AM
3092000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
310
311 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
312
f9e0cf0b
AM
3132000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
314
315 * i386.h: Use sl_FP, not sl_Suf for fild.
316
f660ee8b
FCE
3172000-05-16 Frank Ch. Eigler <fche@redhat.com>
318
319 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
320 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
321 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
322 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
323
558b0a60
AM
3242000-05-13 Alan Modra <alan@linuxcare.com.au>,
325
326 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
327
e413e4e9
AM
3282000-05-13 Alan Modra <alan@linuxcare.com.au>,
329 Alexander Sokolov <robocop@netlink.ru>
330
331 * i386.h (i386_optab): Add cpu_flags for all instructions.
332
3332000-05-13 Alan Modra <alan@linuxcare.com.au>
334
335 From Gavin Romig-Koch <gavin@cygnus.com>
336 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
337
5c84d377
TW
3382000-05-04 Timothy Wall <twall@cygnus.com>
339
340 * tic54x.h: New.
341
966f959b
C
3422000-05-03 J.T. Conklin <jtc@redback.com>
343
344 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
345 (PPC_OPERAND_VR): New operand flag for vector registers.
346
c5d05dbb
JL
3472000-05-01 Kazu Hirata <kazu@hxi.com>
348
349 * h8300.h (EOP): Add missing initializer.
350
a7fba0e0
JL
351Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
352
353 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
354 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
355 New operand types l,y,&,fe,fE,fx added to support above forms.
356 (pa_opcodes): Replaced usage of 'x' as source/target for
357 floating point double-word loads/stores with 'fx'.
358
800eeca4
JW
359Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
360 David Mosberger <davidm@hpl.hp.com>
361 Timothy Wall <twall@cygnus.com>
362 Jim Wilson <wilson@cygnus.com>
363
364 * ia64.h: New file.
365
ba23e138
NC
3662000-03-27 Nick Clifton <nickc@cygnus.com>
367
368 * d30v.h (SHORT_A1): Fix value.
369 (SHORT_AR): Renumber so that it is at the end of the list of short
370 instructions, not the end of the list of long instructions.
371
d0b47220
AM
3722000-03-26 Alan Modra <alan@linuxcare.com>
373
374 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
375 problem isn't really specific to Unixware.
376 (OLDGCC_COMPAT): Define.
377 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
378 destination %st(0).
379 Fix lots of comments.
380
866afedc
NC
3812000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
382
383 * d30v.h:
384 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
385 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
386 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
387 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
388 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
389 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
390 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
391
cc5ca5ce
AM
3922000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
393
394 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
395 fistpd without suffix.
396
68e324a2
NC
3972000-02-24 Nick Clifton <nickc@cygnus.com>
398
399 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
400 'signed_overflow_ok_p'.
401 Delete prototypes for cgen_set_flags() and cgen_get_flags().
402
60f036a2
AH
4032000-02-24 Andrew Haley <aph@cygnus.com>
404
405 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
406 (CGEN_CPU_TABLE): flags: new field.
407 Add prototypes for new functions.
408
9b9b5cd4
AM
4092000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
410
411 * i386.h: Add some more UNIXWARE_COMPAT comments.
412
5b93d8bb
AM
4132000-02-23 Linas Vepstas <linas@linas.org>
414
415 * i370.h: New file.
416
4f1d9bd8
NC
4172000-02-22 Chandra Chavva <cchavva@cygnus.com>
418
419 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
420 cannot be combined in parallel with ADD/SUBppp.
421
87f398dd
AH
4222000-02-22 Andrew Haley <aph@cygnus.com>
423
424 * mips.h: (OPCODE_IS_MEMBER): Add comment.
425
367c01af
AH
4261999-12-30 Andrew Haley <aph@cygnus.com>
427
9a1e79ca
AH
428 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
429 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
430 insns.
367c01af 431
add0c677
AM
4322000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
433
434 * i386.h: Qualify intel mode far call and jmp with x_Suf.
435
3138f287
AM
4361999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
437
438 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
439 indirect jumps and calls. Add FF/3 call for intel mode.
440
ccecd07b
JL
441Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
442
443 * mn10300.h: Add new operand types. Add new instruction formats.
444
b37e19e9
JL
445Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
446
447 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
448 instruction.
449
5fce5ddf
GRK
4501999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
451
452 * mips.h (INSN_ISA5): New.
453
2bd7f1f3
GRK
4541999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
455
456 * mips.h (OPCODE_IS_MEMBER): New.
457
4df2b5c5
NC
4581999-10-29 Nick Clifton <nickc@cygnus.com>
459
460 * d30v.h (SHORT_AR): Define.
461
446a06c9
MM
4621999-10-18 Michael Meissner <meissner@cygnus.com>
463
464 * alpha.h (alpha_num_opcodes): Convert to unsigned.
465 (alpha_num_operands): Ditto.
466
eca04c6a
JL
467Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
468
469 * hppa.h (pa_opcodes): Add load and store cache control to
470 instructions. Add ordered access load and store.
471
472 * hppa.h (pa_opcode): Add new entries for addb and addib.
473
474 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
475
476 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
477
c43185de
DN
478Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
479
480 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
481
ec3533da
JL
482Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
483
390f858d
JL
484 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
485 and "be" using completer prefixes.
486
8c47ebd9
JL
487 * hppa.h (pa_opcodes): Add initializers to silence compiler.
488
ec3533da
JL
489 * hppa.h: Update comments about character usage.
490
18369bea
JL
491Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
492
493 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
494 up the new fstw & bve instructions.
495
c36efdd2
JL
496Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
497
d3ffb032
JL
498 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
499 instructions.
500
c49ec3da
JL
501 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
502
5d2e7ecc
JL
503 * hppa.h (pa_opcodes): Add long offset double word load/store
504 instructions.
505
6397d1a2
JL
506 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
507 stores.
508
142f0fe0
JL
509 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
510
f5a68b45
JL
511 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
512
8235801e
JL
513 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
514
35184366
JL
515 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
516
f0bfde5e
JL
517 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
518
27bbbb58
JL
519 * hppa.h (pa_opcodes): Add support for "b,l".
520
c36efdd2
JL
521 * hppa.h (pa_opcodes): Add support for "b,gate".
522
f2727d04
JL
523Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
524
9392fb11
JL
525 * hppa.h (pa_opcodes): Use 'fX' for first register operand
526 in xmpyu.
527
e0c52e99
JL
528 * hppa.h (pa_opcodes): Fix mask for probe and probei.
529
f2727d04
JL
530 * hppa.h (pa_opcodes): Fix mask for depwi.
531
52d836e2
JL
532Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
533
534 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
535 an explicit output argument.
536
90765e3a
JL
537Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
538
539 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
540 Add a few PA2.0 loads and store variants.
541
8340b17f
ILT
5421999-09-04 Steve Chamberlain <sac@pobox.com>
543
544 * pj.h: New file.
545
5f47d35b
AM
5461999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
547
548 * i386.h (i386_regtab): Move %st to top of table, and split off
549 other fp reg entries.
550 (i386_float_regtab): To here.
551
1c143202
JL
552Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
553
7d8fdb64
JL
554 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
555 by 'f'.
556
90927b9c
JL
557 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
558 Add supporting args.
559
1d16bf9c
JL
560 * hppa.h: Document new completers and args.
561 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
562 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
563 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
564 pmenb and pmdis.
565
96226a68
JL
566 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
567 hshr, hsub, mixh, mixw, permh.
568
5d4ba527
JL
569 * hppa.h (pa_opcodes): Change completers in instructions to
570 use 'c' prefix.
571
e9fc28c6
JL
572 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
573 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
574
1c143202
JL
575 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
576 fnegabs to use 'I' instead of 'F'.
577
9e525108
AM
5781999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
579
580 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
581 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
582 Alphabetically sort PIII insns.
583
e8da1bf1
DE
584Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
585
586 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
587
7d627258
JL
588Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
589
5696871a
JL
590 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
591 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
592
7d627258
JL
593 * hppa.h: Document 64 bit condition completers.
594
c5e52916
JL
595Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
596
597 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
598
eecb386c
AM
5991999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
600
601 * i386.h (i386_optab): Add DefaultSize modifier to all insns
602 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
603 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
604
88a380f3
JL
605Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
606 Jeff Law <law@cygnus.com>
607
608 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
609
610 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
611
612 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
613 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
614
145cf1f0
AM
6151999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
616
617 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
618
73826640
JL
619Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
620
621 * hppa.h (struct pa_opcode): Add new field "flags".
622 (FLAGS_STRICT): Define.
623
b65db252
JL
624Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
625 Jeff Law <law@cygnus.com>
626
f7fc668b
JL
627 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
628
629 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 630
10084519
AM
6311999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
632
633 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
634 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
635 flag to fcomi and friends.
636
cd8a80ba
JL
637Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
638
639 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
640 integer logical instructions.
641
1fca749b
ILT
6421999-05-28 Linus Nordberg <linus.nordberg@canit.se>
643
644 * m68k.h: Document new formats `E', `G', `H' and new places `N',
645 `n', `o'.
646
647 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
648 and new places `m', `M', `h'.
649
aa008907
JL
650Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
651
652 * hppa.h (pa_opcodes): Add several processor specific system
653 instructions.
654
e26b85f0
JL
655Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
656
657 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
658 "addb", and "addib" to be used by the disassembler.
659
c608c12e
AM
6601999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
661
662 * i386.h (ReverseModrm): Remove all occurences.
663 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
664 movmskps, pextrw, pmovmskb, maskmovq.
665 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
666 ignore the data size prefix.
667
668 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
669 Mostly stolen from Doug Ledford <dledford@redhat.com>
670
45c18104
RH
671Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
672
673 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
674
252b5132
RH
6751999-04-14 Doug Evans <devans@casey.cygnus.com>
676
677 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
678 (CGEN_ATTR_TYPE): Update.
679 (CGEN_ATTR_MASK): Number booleans starting at 0.
680 (CGEN_ATTR_VALUE): Update.
681 (CGEN_INSN_ATTR): Update.
682
683Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
684
685 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
686 instructions.
687
688Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
689
690 * hppa.h (bb, bvb): Tweak opcode/mask.
691
692
6931999-03-22 Doug Evans <devans@casey.cygnus.com>
694
695 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
696 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
697 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
698 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
699 Delete member max_insn_size.
700 (enum cgen_cpu_open_arg): New enum.
701 (cpu_open): Update prototype.
702 (cpu_open_1): Declare.
703 (cgen_set_cpu): Delete.
704
7051999-03-11 Doug Evans <devans@casey.cygnus.com>
706
707 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
708 (CGEN_OPERAND_NIL): New macro.
709 (CGEN_OPERAND): New member `type'.
710 (@arch@_cgen_operand_table): Delete decl.
711 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
712 (CGEN_OPERAND_TABLE): New struct.
713 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
714 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
715 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
716 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
717 {get,set}_{int,vma}_operand.
718 (@arch@_cgen_cpu_open): New arg `isa'.
719 (cgen_set_cpu): Ditto.
720
721Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
722
723 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
724
7251999-02-25 Doug Evans <devans@casey.cygnus.com>
726
727 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
728 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
729 enum cgen_hw_type.
730 (CGEN_HW_TABLE): New struct.
731 (hw_table): Delete declaration.
732 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
733 to table entry to enum.
734 (CGEN_OPINST): Ditto.
735 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
736
737Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
738
739 * alpha.h (AXP_OPCODE_EV6): New.
740 (AXP_OPCODE_NOPAL): Include it.
741
7421999-02-09 Doug Evans <devans@casey.cygnus.com>
743
744 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
745 All uses updated. New members int_insn_p, max_insn_size,
746 parse_operand,insert_operand,extract_operand,print_operand,
747 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
748 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
749 extract_handlers,print_handlers.
750 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
751 (CGEN_ATTR_BOOL_OFFSET): New macro.
752 (CGEN_ATTR_MASK): Subtract it to compute bit number.
753 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
754 (cgen_opcode_handler): Renamed from cgen_base.
755 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
756 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
757 all uses updated.
758 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
759 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
760 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
761 (CGEN_OPCODE,CGEN_IBASE): New types.
762 (CGEN_INSN): Rewrite.
763 (CGEN_{ASM,DIS}_HASH*): Delete.
764 (init_opcode_table,init_ibld_table): Declare.
765 (CGEN_INSN_ATTR): New type.
766
767Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
768
769 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
770 (x_FP, d_FP, dls_FP, sldx_FP): Define.
771 Change *Suf definitions to include x and d suffixes.
772 (movsx): Use w_Suf and b_Suf.
773 (movzx): Likewise.
774 (movs): Use bwld_Suf.
775 (fld): Change ordering. Use sld_FP.
776 (fild): Add Intel Syntax equivalent of fildq.
777 (fst): Use sld_FP.
778 (fist): Use sld_FP.
779 (fstp): Use sld_FP. Add x_FP version.
780 (fistp): LLongMem version for Intel Syntax.
781 (fcom, fcomp): Use sld_FP.
782 (fadd, fiadd, fsub): Use sld_FP.
783 (fsubr): Use sld_FP.
784 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
785
7861999-01-27 Doug Evans <devans@casey.cygnus.com>
787
788 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
789 CGEN_MODE_UINT.
790
e135f41b 7911999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
792
793 * hppa.h (bv): Fix mask.
794
7951999-01-05 Doug Evans <devans@casey.cygnus.com>
796
797 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
798 (CGEN_ATTR): Use it.
799 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
800 (CGEN_ATTR_TABLE): New member dfault.
801
8021998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
803
804 * mips.h (MIPS16_INSN_BRANCH): New.
805
806Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
807
808 The following is part of a change made by Edith Epstein
809 <eepstein@sophia.cygnus.com> as part of a project to merge in
810 changes by HP; HP did not create ChangeLog entries.
811
812 * hppa.h (completer_chars): list of chars to not put a space
813 after.
814
815Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
816
817 * i386.h (i386_optab): Permit w suffix on processor control and
818 status word instructions.
819
8201998-11-30 Doug Evans <devans@casey.cygnus.com>
821
822 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
823 (struct cgen_keyword_entry): Ditto.
824 (struct cgen_operand): Ditto.
825 (CGEN_IFLD): New typedef, with associated access macros.
826 (CGEN_IFMT): New typedef, with associated access macros.
827 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
828 (CGEN_IVALUE): New typedef.
829 (struct cgen_insn): Delete const on syntax,attrs members.
830 `format' now points to format data. Type of `value' is now
831 CGEN_IVALUE.
832 (struct cgen_opcode_table): New member ifld_table.
833
8341998-11-18 Doug Evans <devans@casey.cygnus.com>
835
836 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
837 (CGEN_OPERAND_INSTANCE): New member `attrs'.
838 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
839 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
840 (cgen_opcode_table): Update type of dis_hash fn.
841 (extract_operand): Update type of `insn_value' arg.
842
843Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
844
845 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
846
847Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
848
849 * mips.h (INSN_MULT): Added.
850
851Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
852
853 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
854
855Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
856
857 * cgen.h (CGEN_INSN_INT): New typedef.
858 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
859 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
860 (CGEN_INSN_BYTES_PTR): New typedef.
861 (CGEN_EXTRACT_INFO): New typedef.
862 (cgen_insert_fn,cgen_extract_fn): Update.
863 (cgen_opcode_table): New member `insn_endian'.
864 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
865 (insert_operand,extract_operand): Update.
866 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
867
868Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
869
870 * cgen.h (CGEN_ATTR_BOOLS): New macro.
871 (struct CGEN_HW_ENTRY): New member `attrs'.
872 (CGEN_HW_ATTR): New macro.
873 (struct CGEN_OPERAND_INSTANCE): New member `name'.
874 (CGEN_INSN_INVALID_P): New macro.
875
876Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
877
878 * hppa.h: Add "fid".
879
880Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
881
882 From Robert Andrew Dale <rob@nb.net>
883 * i386.h (i386_optab): Add AMD 3DNow! instructions.
884 (AMD_3DNOW_OPCODE): Define.
885
886Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
887
888 * d30v.h (EITHER_BUT_PREFER_MU): Define.
889
890Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
891
892 * cgen.h (cgen_insn): #if 0 out element `cdx'.
893
894Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
895
896 Move all global state data into opcode table struct, and treat
897 opcode table as something that is "opened/closed".
898 * cgen.h (CGEN_OPCODE_DESC): New type.
899 (all fns): New first arg of opcode table descriptor.
900 (cgen_set_parse_operand_fn): Add prototype.
901 (cgen_current_machine,cgen_current_endian): Delete.
902 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
903 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
904 dis_hash_table,dis_hash_table_entries.
905 (opcode_open,opcode_close): Add prototypes.
906
907 * cgen.h (cgen_insn): New element `cdx'.
908
909Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
910
911 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
912
913Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
914
915 * mn10300.h: Add "no_match_operands" field for instructions.
916 (MN10300_MAX_OPERANDS): Define.
917
918Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
919
920 * cgen.h (cgen_macro_insn_count): Declare.
921
922Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
923
924 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
925 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
926 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
927 set_{int,vma}_operand.
928
929Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
930
931 * mn10300.h: Add "machine" field for instructions.
932 (MN103, AM30): Define machine types.
933
934Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
935
936 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
937
9381998-06-18 Ulrich Drepper <drepper@cygnus.com>
939
940 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
941
942Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
943
944 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
945 and ud2b.
946 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
947 those that happen to be implemented on pentiums.
948
949Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
950
951 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
952 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
953 with Size16|IgnoreSize or Size32|IgnoreSize.
954
955Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
956
957 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
958 (REPE): Rename to REPE_PREFIX_OPCODE.
959 (i386_regtab_end): Remove.
960 (i386_prefixtab, i386_prefixtab_end): Remove.
961 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
962 of md_begin.
963 (MAX_OPCODE_SIZE): Define.
964 (i386_optab_end): Remove.
965 (sl_Suf): Define.
966 (sl_FP): Use sl_Suf.
967
968 * i386.h (i386_optab): Allow 16 bit displacement for `mov
969 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
970 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
971 data32, dword, and adword prefixes.
972 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
973 regs.
974
975Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
976
977 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
978
979 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
980 register operands, because this is a common idiom. Flag them with
981 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
982 fdivrp because gcc erroneously generates them. Also flag with a
983 warning.
984
985 * i386.h: Add suffix modifiers to most insns, and tighter operand
986 checks in some cases. Fix a number of UnixWare compatibility
987 issues with float insns. Merge some floating point opcodes, using
988 new FloatMF modifier.
989 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
990 consistency.
991
992 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
993 IgnoreDataSize where appropriate.
994
995Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
996
997 * i386.h: (one_byte_segment_defaults): Remove.
998 (two_byte_segment_defaults): Remove.
999 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1000
1001Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1002
1003 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1004 (cgen_hw_lookup_by_num): Declare.
1005
1006Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1007
1008 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1009 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1010
1011Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1012
1013 * cgen.h (cgen_asm_init_parse): Delete.
1014 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1015 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1016
1017Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1018
1019 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1020 (cgen_asm_finish_insn): Update prototype.
1021 (cgen_insn): New members num, data.
1022 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1023 dis_hash, dis_hash_table_size moved to ...
1024 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1025 All uses updated. New members asm_hash_p, dis_hash_p.
1026 (CGEN_MINSN_EXPANSION): New struct.
1027 (cgen_expand_macro_insn): Declare.
1028 (cgen_macro_insn_count): Declare.
1029 (get_insn_operands): Update prototype.
1030 (lookup_get_insn_operands): Declare.
1031
1032Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1033
1034 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1035 regKludge. Add operands types for string instructions.
1036
1037Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1038
1039 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1040 table.
1041
1042Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1043
1044 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1045 for `gettext'.
1046
1047Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1048
1049 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1050 Add IsString flag to string instructions.
1051 (IS_STRING): Don't define.
1052 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1053 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1054 (SS_PREFIX_OPCODE): Define.
1055
1056Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1057
1058 * i386.h: Revert March 24 patch; no more LinearAddress.
1059
1060Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1061
1062 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1063 instructions, and instead add FWait opcode modifier. Add short
1064 form of fldenv and fstenv.
1065 (FWAIT_OPCODE): Define.
1066
1067 * i386.h (i386_optab): Change second operand constraint of `mov
1068 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1069 allow legal instructions such as `movl %gs,%esi'
1070
1071Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1072
1073 * h8300.h: Various changes to fully bracket initializers.
1074
1075Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1076
1077 * i386.h: Set LinearAddress for lidt and lgdt.
1078
1079Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1080
1081 * cgen.h (CGEN_BOOL_ATTR): New macro.
1082
1083Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1084
1085 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1086
1087Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1088
1089 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1090 (cgen_insn): Record syntax and format entries here, rather than
1091 separately.
1092
1093Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1094
1095 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1096
1097Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1098
1099 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1100 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1101 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1102
1103Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1104
1105 * cgen.h (lookup_insn): New argument alias_p.
1106
1107Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1108
1109Fix rac to accept only a0:
1110 * d10v.h (OPERAND_ACC): Split into:
1111 (OPERAND_ACC0, OPERAND_ACC1) .
1112 (OPERAND_GPR): Define.
1113
1114Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1115
1116 * cgen.h (CGEN_FIELDS): Define here.
1117 (CGEN_HW_ENTRY): New member `type'.
1118 (hw_list): Delete decl.
1119 (enum cgen_mode): Declare.
1120 (CGEN_OPERAND): New member `hw'.
1121 (enum cgen_operand_instance_type): Declare.
1122 (CGEN_OPERAND_INSTANCE): New type.
1123 (CGEN_INSN): New member `operands'.
1124 (CGEN_OPCODE_DATA): Make hw_list const.
1125 (get_insn_operands,lookup_insn): Add prototypes for.
1126
1127Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1128
1129 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1130 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1131 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1132 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1133
1134Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1135
1136 * cgen.h: Correct typo in comment end marker.
1137
1138Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1139
1140 * tic30.h: New file.
1141
5a109b67 1142Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1143
1144 * cgen.h: Add prototypes for cgen_save_fixups(),
1145 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1146 of cgen_asm_finish_insn() to return a char *.
1147
1148Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1149
1150 * cgen.h: Formatting changes to improve readability.
1151
1152Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1153
1154 * cgen.h (*): Clean up pass over `struct foo' usage.
1155 (CGEN_ATTR): Make unsigned char.
1156 (CGEN_ATTR_TYPE): Update.
1157 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1158 (cgen_base): Move member `attrs' to cgen_insn.
1159 (CGEN_KEYWORD): New member `null_entry'.
1160 (CGEN_{SYNTAX,FORMAT}): New types.
1161 (cgen_insn): Format and syntax separated from each other.
1162
1163Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1164
1165 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1166 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1167 flags_{used,set} long.
1168 (d30v_operand): Make flags field long.
1169
1170Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1171
1172 * m68k.h: Fix comment describing operand types.
1173
1174Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1175
1176 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1177 everything else after down.
1178
1179Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1180
1181 * d10v.h (OPERAND_FLAG): Split into:
1182 (OPERAND_FFLAG, OPERAND_CFLAG) .
1183
1184Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1185
1186 * mips.h (struct mips_opcode): Changed comments to reflect new
1187 field usage.
1188
1189Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1190
1191 * mips.h: Added to comments a quick-ref list of all assigned
1192 operand type characters.
1193 (OP_{MASK,SH}_PERFREG): New macros.
1194
1195Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1196
1197 * sparc.h: Add '_' and '/' for v9a asr's.
1198 Patch from David Miller <davem@vger.rutgers.edu>
1199
1200Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1201
1202 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1203 area are not available in the base model (H8/300).
1204
1205Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1206
1207 * m68k.h: Remove documentation of ` operand specifier.
1208
1209Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1210
1211 * m68k.h: Document q and v operand specifiers.
1212
1213Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1214
1215 * v850.h (struct v850_opcode): Add processors field.
1216 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1217 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1218 (PROCESSOR_V850EA): New bit constants.
1219
1220Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1221
1222 Merge changes from Martin Hunt:
1223
1224 * d30v.h: Allow up to 64 control registers. Add
1225 SHORT_A5S format.
1226
1227 * d30v.h (LONG_Db): New form for delayed branches.
1228
1229 * d30v.h: (LONG_Db): New form for repeati.
1230
1231 * d30v.h (SHORT_D2B): New form.
1232
1233 * d30v.h (SHORT_A2): New form.
1234
1235 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1236 registers are used. Needed for VLIW optimization.
1237
1238Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1239
1240 * cgen.h: Move assembler interface section
1241 up so cgen_parse_operand_result is defined for cgen_parse_address.
1242 (cgen_parse_address): Update prototype.
1243
1244Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1245
1246 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1247
1248Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1249
1250 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1251 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1252 <paubert@iram.es>.
1253
1254 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1255 <paubert@iram.es>.
1256
1257 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1258 <paubert@iram.es>.
1259
1260 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1261 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1262
1263Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1264
1265 * v850.h (V850_NOT_R0): New flag.
1266
1267Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1268
1269 * v850.h (struct v850_opcode): Remove flags field.
1270
1271Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1272
1273 * v850.h (struct v850_opcode): Add flags field.
1274 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1275 fields.
1276 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1277 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1278
1279Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1280
1281 * arc.h: New file.
1282
1283Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1284
1285 * sparc.h (sparc_opcodes): Declare as const.
1286
1287Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1288
1289 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1290 uses single or double precision floating point resources.
1291 (INSN_NO_ISA, INSN_ISA1): Define.
1292 (cpu specific INSN macros): Tweak into bitmasks outside the range
1293 of INSN_ISA field.
1294
1295Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1296
1297 * i386.h: Fix pand opcode.
1298
1299Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1300
1301 * mips.h: Widen INSN_ISA and move it to a more convenient
1302 bit position. Add INSN_3900.
1303
1304Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1305
1306 * mips.h (struct mips_opcode): added new field membership.
1307
1308Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1309
1310 * i386.h (movd): only Reg32 is allowed.
1311
1312 * i386.h: add fcomp and ud2. From Wayne Scott
1313 <wscott@ichips.intel.com>.
1314
1315Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1316
1317 * i386.h: Add MMX instructions.
1318
1319Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1320
1321 * i386.h: Remove W modifier from conditional move instructions.
1322
1323Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1324
1325 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1326 with no arguments to match that generated by the UnixWare
1327 assembler.
1328
1329Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1330
1331 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1332 (cgen_parse_operand_fn): Declare.
1333 (cgen_init_parse_operand): Declare.
1334 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1335 new argument `want'.
1336 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1337 (enum cgen_parse_operand_type): New enum.
1338
1339Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1340
1341 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1342
1343Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1344
1345 * cgen.h: New file.
1346
1347Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1348
1349 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1350 fdivrp.
1351
1352Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1353
1354 * v850.h (extract): Make unsigned.
1355
1356Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1357
1358 * i386.h: Add iclr.
1359
1360Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1361
1362 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1363 take a direction bit.
1364
1365Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1366
1367 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1368
1369Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1370
1371 * sparc.h: Include <ansidecl.h>. Update function declarations to
1372 use prototypes, and to use const when appropriate.
1373
1374Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1375
1376 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1377
1378Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1379
1380 * d10v.h: Change pre_defined_registers to
1381 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1382
1383Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1384
1385 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1386 Change mips_opcodes from const array to a pointer,
1387 and change bfd_mips_num_opcodes from const int to int,
1388 so that we can increase the size of the mips opcodes table
1389 dynamically.
1390
1391Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1392
1393 * d30v.h (FLAG_X): Remove unused flag.
1394
1395Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1396
1397 * d30v.h: New file.
1398
1399Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1400
1401 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1402 (PDS_VALUE): Macro to access value field of predefined symbols.
1403 (tic80_next_predefined_symbol): Add prototype.
1404
1405Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1406
1407 * tic80.h (tic80_symbol_to_value): Change prototype to match
1408 change in function, added class parameter.
1409
1410Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1411
1412 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1413 endmask fields, which are somewhat weird in that 0 and 32 are
1414 treated exactly the same.
1415
1416Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1417
1418 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1419 rather than a constant that is 2**X. Reorder them to put bits for
1420 operands that have symbolic names in the upper bits, so they can
1421 be packed into an int where the lower bits contain the value that
1422 corresponds to that symbolic name.
1423 (predefined_symbo): Add struct.
1424 (tic80_predefined_symbols): Declare array of translations.
1425 (tic80_num_predefined_symbols): Declare size of that array.
1426 (tic80_value_to_symbol): Declare function.
1427 (tic80_symbol_to_value): Declare function.
1428
1429Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1430
1431 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1432
1433Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1434
1435 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1436 be the destination register.
1437
1438Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1439
1440 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1441 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1442 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1443 that the opcode can have two vector instructions in a single
1444 32 bit word and we have to encode/decode both.
1445
1446Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1447
1448 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1449 TIC80_OPERAND_RELATIVE for PC relative.
1450 (TIC80_OPERAND_BASEREL): New flag bit for register
1451 base relative.
1452
1453Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1454
1455 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1456
1457Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1458
1459 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1460 ":s" modifier for scaling.
1461
1462Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1463
1464 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1465 (TIC80_OPERAND_M_LI): Ditto
1466
1467Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1468
1469 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1470 (TIC80_OPERAND_CC): New define for condition code operand.
1471 (TIC80_OPERAND_CR): New define for control register operand.
1472
1473Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1474
1475 * tic80.h (struct tic80_opcode): Name changed.
1476 (struct tic80_opcode): Remove format field.
1477 (struct tic80_operand): Add insertion and extraction functions.
1478 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1479 correct ones.
1480 (FMT_*): Ditto.
1481
1482Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1483
1484 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1485 type IV instruction offsets.
1486
1487Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1488
1489 * tic80.h: New file.
1490
1491Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1492
1493 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1494
1495Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1496
1497 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1498 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1499 * v850.h: Fix comment, v850_operand not powerpc_operand.
1500
1501Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1502
1503 * mn10200.h: Flesh out structures and definitions needed by
1504 the mn10200 assembler & disassembler.
1505
1506Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1507
1508 * mips.h: Add mips16 definitions.
1509
1510Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1511
1512 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1513
1514Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1515
1516 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1517 (MN10300_OPERAND_MEMADDR): Define.
1518
1519Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1520
1521 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1522
1523Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1524
1525 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1526
1527Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1528
1529 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1530
1531Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1532
1533 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1534
1535Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1536
1537 * alpha.h: Don't include "bfd.h"; private relocation types are now
1538 negative to minimize problems with shared libraries. Organize
1539 instruction subsets by AMASK extensions and PALcode
1540 implementation.
1541 (struct alpha_operand): Move flags slot for better packing.
1542
1543Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1544
1545 * v850.h (V850_OPERAND_RELAX): New operand flag.
1546
1547Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1548
1549 * mn10300.h (FMT_*): Move operand format definitions
1550 here.
1551
1552Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1555
1556Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1557
1558 * mn10300.h (mn10300_opcode): Add "format" field.
1559 (MN10300_OPERAND_*): Define.
1560
1561Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1562
1563 * mn10x00.h: Delete.
1564 * mn10200.h, mn10300.h: New files.
1565
1566Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1567
1568 * mn10x00.h: New file.
1569
1570Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1571
1572 * v850.h: Add new flag to indicate this instruction uses a PC
1573 displacement.
1574
1575Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1576
1577 * h8300.h (stmac): Add missing instruction.
1578
1579Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1580
1581 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1582 field.
1583
1584Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1585
1586 * v850.h (V850_OPERAND_EP): Define.
1587
1588 * v850.h (v850_opcode): Add size field.
1589
1590Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1591
1592 * v850.h (v850_operands): Add insert and extract fields, pointers
1593 to functions used to handle unusual operand encoding.
1594 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1595 V850_OPERAND_SIGNED): Defined.
1596
1597Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1598
1599 * v850.h (v850_operands): Add flags field.
1600 (OPERAND_REG, OPERAND_NUM): Defined.
1601
1602Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1603
1604 * v850.h: New file.
1605
1606Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1607
1608 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1609 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1610 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1611 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1612 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1613 Defined.
1614
1615Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1616
1617 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1618 a 3 bit space id instead of a 2 bit space id.
1619
1620Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1621
1622 * d10v.h: Add some additional defines to support the
1623 assembler in determining which operations can be done in parallel.
1624
1625Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1626
1627 * h8300.h (SN): Define.
1628 (eepmov.b): Renamed from "eepmov"
1629 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1630 with them.
1631
1632Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1633
1634 * d10v.h (OPERAND_SHIFT): New operand flag.
1635
1636Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1637
1638 * d10v.h: Changes for divs, parallel-only instructions, and
1639 signed numbers.
1640
1641Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1642
1643 * d10v.h (pd_reg): Define. Putting the definition here allows
1644 the assembler and disassembler to share the same struct.
1645
1646Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1647
1648 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1649 Williams <steve@icarus.com>.
1650
1651Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1652
1653 * d10v.h: New file.
1654
1655Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1656
1657 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1658
1659Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1660
1661 * m68k.h (mcf5200): New macro.
1662 Document names of coldfire control registers.
1663
1664Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1665
1666 * h8300.h (SRC_IN_DST): Define.
1667
1668 * h8300.h (UNOP3): Mark the register operand in this insn
1669 as a source operand, not a destination operand.
1670 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1671 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1672 register operand with SRC_IN_DST.
1673
1674Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1675
1676 * alpha.h: New file.
1677
1678Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1679
1680 * rs6k.h: Remove obsolete file.
1681
1682Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1683
1684 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1685 fdivp, and fdivrp. Add ffreep.
1686
1687Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1688
1689 * h8300.h: Reorder various #defines for readability.
1690 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1691 (BITOP): Accept additional (unused) argument. All callers changed.
1692 (EBITOP): Likewise.
1693 (O_LAST): Bump.
1694 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1695
1696 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1697 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1698 (BITOP, EBITOP): Handle new H8/S addressing modes for
1699 bit insns.
1700 (UNOP3): Handle new shift/rotate insns on the H8/S.
1701 (insns using exr): New instructions.
1702 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1703
1704Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1705
1706 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1707 was incorrect.
1708
1709Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1710
1711 * h8300.h (START): Remove.
1712 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1713 and mov.l insns that can be relaxed.
1714
1715Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1716
1717 * i386.h: Remove Abs32 from lcall.
1718
1719Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1720
1721 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1722 (SLCPOP): New macro.
1723 Mark X,Y opcode letters as in use.
1724
1725Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1726
1727 * sparc.h (F_FLOAT, F_FBR): Define.
1728
1729Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1730
1731 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1732 from all insns.
1733 (ABS8SRC,ABS8DST): Add ABS8MEM.
1734 (add.l): Fix reg+reg variant.
1735 (eepmov.w): Renamed from eepmovw.
1736 (ldc,stc): Fix many cases.
1737
1738Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1739
1740 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1741
1742Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1743
1744 * sparc.h (O): Mark operand letter as in use.
1745
1746Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1747
1748 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1749 Mark operand letters uU as in use.
1750
1751Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1752
1753 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1754 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1755 (SPARC_OPCODE_SUPPORTED): New macro.
1756 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1757 (F_NOTV9): Delete.
1758
1759Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1760
1761 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1762 declaration consistent with return type in definition.
1763
1764Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1765
1766 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1767
1768Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1769
1770 * i386.h (i386_regtab): Add 80486 test registers.
1771
1772Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1773
1774 * i960.h (I_HX): Define.
1775 (i960_opcodes): Add HX instruction.
1776
1777Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1778
1779 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1780 and fclex.
1781
1782Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1783
1784 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1785 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1786 (bfd_* defines): Delete.
1787 (sparc_opcode_archs): Replaces architecture_pname.
1788 (sparc_opcode_lookup_arch): Declare.
1789 (NUMOPCODES): Delete.
1790
1791Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1792
1793 * sparc.h (enum sparc_architecture): Add v9a.
1794 (ARCHITECTURES_CONFLICT_P): Update.
1795
1796Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1797
1798 * i386.h: Added Pentium Pro instructions.
1799
1800Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1801
1802 * m68k.h: Document new 'W' operand place.
1803
1804Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1805
1806 * hppa.h: Add lci and syncdma instructions.
1807
1808Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1809
1810 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1811 instructions.
1812
1813Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1814
1815 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1816 assembler's -mcom and -many switches.
1817
1818Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1819
1820 * i386.h: Fix cmpxchg8b extension opcode description.
1821
1822Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1823
1824 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1825 and register cr4.
1826
1827Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1828
1829 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1830
1831Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1832
1833 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1834
1835Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1836
1837 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1838
1839Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1840
1841 * m68kmri.h: Remove.
1842
1843 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1844 declarations. Remove F_ALIAS and flag field of struct
1845 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1846 int. Make name and args fields of struct m68k_opcode const.
1847
1848Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1849
1850 * sparc.h (F_NOTV9): Define.
1851
1852Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1853
1854 * mips.h (INSN_4010): Define.
1855
1856Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1857
1858 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1859
1860 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1861 * m68k.h: Fix argument descriptions of coprocessor
1862 instructions to allow only alterable operands where appropriate.
1863 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1864 (m68k_opcode_aliases): Add more aliases.
1865
1866Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1867
1868 * m68k.h: Added explcitly short-sized conditional branches, and a
1869 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1870 svr4-based configurations.
1871
1872Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1873
1874 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1875 * i386.h: added missing Data16/Data32 flags to a few instructions.
1876
1877Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1878
1879 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1880 (OP_MASK_BCC, OP_SH_BCC): Define.
1881 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1882 (OP_MASK_CCC, OP_SH_CCC): Define.
1883 (INSN_READ_FPR_R): Define.
1884 (INSN_RFE): Delete.
1885
1886Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1887
1888 * m68k.h (enum m68k_architecture): Deleted.
1889 (struct m68k_opcode_alias): New type.
1890 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1891 matching constraints, values and flags. As a side effect of this,
1892 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1893 as I know were never used, now may need re-examining.
1894 (numopcodes): Now const.
1895 (m68k_opcode_aliases, numaliases): New variables.
1896 (endop): Deleted.
1897 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1898 m68k_opcode_aliases; update declaration of m68k_opcodes.
1899
1900Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1901
1902 * hppa.h (delay_type): Delete unused enumeration.
1903 (pa_opcode): Replace unused delayed field with an architecture
1904 field.
1905 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1906
1907Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1908
1909 * mips.h (INSN_ISA4): Define.
1910
1911Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1912
1913 * mips.h (M_DLA_AB, M_DLI): Define.
1914
1915Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1916
1917 * hppa.h (fstwx): Fix single-bit error.
1918
1919Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1920
1921 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1922
1923Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1924
1925 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1926 debug registers. From Charles Hannum (mycroft@netbsd.org).
1927
1928Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1929
1930 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1931 i386 support:
1932 * i386.h (MOV_AX_DISP32): New macro.
1933 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1934 of several call/return instructions.
1935 (ADDR_PREFIX_OPCODE): New macro.
1936
1937Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1938
1939 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1940
4f1d9bd8
NC
1941 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1942 char.
252b5132
RH
1943 (struct vot, field `name'): ditto.
1944
1945Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1946
1947 * vax.h: Supply and properly group all values in end sentinel.
1948
1949Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1950
1951 * mips.h (INSN_ISA, INSN_4650): Define.
1952
1953Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1954
1955 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1956 systems with a separate instruction and data cache, such as the
1957 29040, these instructions take an optional argument.
1958
1959Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1960
1961 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1962 INSN_TRAP.
1963
1964Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1965
1966 * mips.h (INSN_STORE_MEMORY): Define.
1967
1968Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1969
1970 * sparc.h: Document new operand type 'x'.
1971
1972Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1973
1974 * i960.h (I_CX2): New instruction category. It includes
1975 instructions available on Cx and Jx processors.
1976 (I_JX): New instruction category, for JX-only instructions.
1977 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1978 Jx-only instructions, in I_JX category.
1979
1980Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1981
1982 * ns32k.h (endop): Made pointer const too.
1983
1984Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1985
1986 * ns32k.h: Drop Q operand type as there is no correct use
1987 for it. Add I and Z operand types which allow better checking.
1988
1989Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1990
1991 * h8300.h (xor.l) :fix bit pattern.
1992 (L_2): New size of operand.
1993 (trapa): Use it.
1994
1995Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1996
1997 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1998
1999Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2000
2001 * sparc.h: Include v9 definitions.
2002
2003Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2004
2005 * m68k.h (m68060): Defined.
2006 (m68040up, mfloat, mmmu): Include it.
2007 (struct m68k_opcode): Widen `arch' field.
2008 (m68k_opcodes): Updated for M68060. Removed comments that were
2009 instructions commented out by "JF" years ago.
2010
2011Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2012
2013 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2014 add a one-bit `flags' field.
2015 (F_ALIAS): New macro.
2016
2017Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2018
2019 * h8300.h (dec, inc): Get encoding right.
2020
2021Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2022
2023 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2024 a flag instead.
2025 (PPC_OPERAND_SIGNED): Define.
2026 (PPC_OPERAND_SIGNOPT): Define.
2027
2028Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2029
2030 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2031 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2032
2033Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2034
2035 * i386.h: Reverse last change. It'll be handled in gas instead.
2036
2037Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2038
2039 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2040 slower on the 486 and used the implicit shift count despite the
2041 explicit operand. The one-operand form is still available to get
2042 the shorter form with the implicit shift count.
2043
2044Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2045
2046 * hppa.h: Fix typo in fstws arg string.
2047
2048Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2049
2050 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2051
2052Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2053
2054 * ppc.h (PPC_OPCODE_601): Define.
2055
2056Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2057
2058 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2059 (so we can determine valid completers for both addb and addb[tf].)
2060
2061 * hppa.h (xmpyu): No floating point format specifier for the
2062 xmpyu instruction.
2063
2064Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2065
2066 * ppc.h (PPC_OPERAND_NEXT): Define.
2067 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2068 (struct powerpc_macro): Define.
2069 (powerpc_macros, powerpc_num_macros): Declare.
2070
2071Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2072
2073 * ppc.h: New file. Header file for PowerPC opcode table.
2074
2075Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2076
2077 * hppa.h: More minor template fixes for sfu and copr (to allow
2078 for easier disassembly).
2079
2080 * hppa.h: Fix templates for all the sfu and copr instructions.
2081
2082Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2083
2084 * i386.h (push): Permit Imm16 operand too.
2085
2086Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2087
2088 * h8300.h (andc): Exists in base arch.
2089
2090Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2091
2092 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2093 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2094
2095Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2096
2097 * hppa.h: Add FP quadword store instructions.
2098
2099Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2100
2101 * mips.h: (M_J_A): Added.
2102 (M_LA): Removed.
2103
2104Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2105
2106 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2107 <mellon@pepper.ncd.com>.
2108
2109Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2110
2111 * hppa.h: Immediate field in probei instructions is unsigned,
2112 not low-sign extended.
2113
2114Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2115
2116 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2117
2118Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2119
2120 * i386.h: Add "fxch" without operand.
2121
2122Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2123
2124 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2125
2126Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2127
2128 * hppa.h: Add gfw and gfr to the opcode table.
2129
2130Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2131
2132 * m88k.h: extended to handle m88110.
2133
2134Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2135
2136 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2137 addresses.
2138
2139Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2140
2141 * i960.h (i960_opcodes): Properly bracket initializers.
2142
2143Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2144
2145 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2146
2147Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2148
2149 * m68k.h (two): Protect second argument with parentheses.
2150
2151Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2152
2153 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2154 Deleted old in/out instructions in "#if 0" section.
2155
2156Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2157
2158 * i386.h (i386_optab): Properly bracket initializers.
2159
2160Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2161
2162 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2163 Jeff Law, law@cs.utah.edu).
2164
2165Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2166
2167 * i386.h (lcall): Accept Imm32 operand also.
2168
2169Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2170
2171 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2172 (M_DABS): Added.
2173
2174Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2175
2176 * mips.h (INSN_*): Changed values. Removed unused definitions.
2177 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2178 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2179 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2180 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2181 (M_*): Added new values for r6000 and r4000 macros.
2182 (ANY_DELAY): Removed.
2183
2184Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2185
2186 * mips.h: Added M_LI_S and M_LI_SS.
2187
2188Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2189
2190 * h8300.h: Get some rare mov.bs correct.
2191
2192Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2193
2194 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2195 been included.
2196
2197Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2198
2199 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2200 jump instructions, for use in disassemblers.
2201
2202Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2203
2204 * m88k.h: Make bitfields just unsigned, not unsigned long or
2205 unsigned short.
2206
2207Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2208
2209 * hppa.h: New argument type 'y'. Use in various float instructions.
2210
2211Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2212
2213 * hppa.h (break): First immediate field is unsigned.
2214
2215 * hppa.h: Add rfir instruction.
2216
2217Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2218
2219 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2220
2221Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2222
2223 * mips.h: Reworked the hazard information somewhat, and fixed some
2224 bugs in the instruction hazard descriptions.
2225
2226Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2227
2228 * m88k.h: Corrected a couple of opcodes.
2229
2230Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2231
2232 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2233 new version includes instruction hazard information, but is
2234 otherwise reasonably similar.
2235
2236Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2237
2238 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2239
2240Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2241
2242 Patches from Jeff Law, law@cs.utah.edu:
2243 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2244 Make the tables be the same for the following instructions:
2245 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2246 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2247 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2248 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2249 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2250 "fcmp", and "ftest".
2251
2252 * hppa.h: Make new and old tables the same for "break", "mtctl",
2253 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2254 Fix typo in last patch. Collapse several #ifdefs into a
2255 single #ifdef.
2256
2257 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2258 of the comments up-to-date.
2259
2260 * hppa.h: Update "free list" of letters and update
2261 comments describing each letter's function.
2262
4f1d9bd8
NC
2263Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2264
2265 * h8300.h: Lots of little fixes for the h8/300h.
2266
2267Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2268
2269 Support for H8/300-H
2270 * h8300.h: Lots of new opcodes.
2271
252b5132
RH
2272Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2273
2274 * h8300.h: checkpoint, includes H8/300-H opcodes.
2275
2276Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2277
2278 * Patches from Jeffrey Law <law@cs.utah.edu>.
2279 * hppa.h: Rework single precision FP
2280 instructions so that they correctly disassemble code
2281 PA1.1 code.
2282
2283Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2284
2285 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2286 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2287
2288Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2289
2290 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2291 gdb will define it for now.
2292
2293Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2294
2295 * sparc.h: Don't end enumerator list with comma.
2296
2297Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2298
2299 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2300 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2301 ("bc2t"): Correct typo.
2302 ("[ls]wc[023]"): Use T rather than t.
2303 ("c[0123]"): Define general coprocessor instructions.
2304
2305Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2306
2307 * m68k.h: Move split point for gcc compilation more towards
2308 middle.
2309
2310Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2311
2312 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2313 simply wrong, ics, rfi, & rfsvc were missing).
2314 Add "a" to opr_ext for "bb". Doc fix.
2315
2316Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2317
2318 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2319 * mips.h: Add casts, to suppress warnings about shifting too much.
2320 * m68k.h: Document the placement code '9'.
2321
2322Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2323
2324 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2325 allows callers to break up the large initialized struct full of
2326 opcodes into two half-sized ones. This permits GCC to compile
2327 this module, since it takes exponential space for initializers.
2328 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2329
2330Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2331
2332 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2333 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2334 initialized structs in it.
2335
2336Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2337
2338 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2339 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2340 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2341
2342Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2343
2344 * mips.h: document "i" and "j" operands correctly.
2345
2346Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2347
2348 * mips.h: Removed endianness dependency.
2349
2350Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2351
2352 * h8300.h: include info on number of cycles per instruction.
2353
2354Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2355
2356 * hppa.h: Move handy aliases to the front. Fix masks for extract
2357 and deposit instructions.
2358
2359Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2360
2361 * i386.h: accept shld and shrd both with and without the shift
2362 count argument, which is always %cl.
2363
2364Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2365
2366 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2367 (one_byte_segment_defaults, two_byte_segment_defaults,
2368 i386_prefixtab_end): Ditto.
2369
2370Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2371
2372 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2373 for operand 2; from John Carr, jfc@dsg.dec.com.
2374
2375Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2376
2377 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2378 always use 16-bit offsets. Makes calculated-size jump tables
2379 feasible.
2380
2381Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2382
2383 * i386.h: Fix one-operand forms of in* and out* patterns.
2384
2385Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2386
2387 * m68k.h: Added CPU32 support.
2388
2389Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2390
2391 * mips.h (break): Disassemble the argument. Patch from
2392 jonathan@cs.stanford.edu (Jonathan Stone).
2393
2394Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2395
2396 * m68k.h: merged Motorola and MIT syntax.
2397
2398Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2399
2400 * m68k.h (pmove): make the tests less strict, the 68k book is
2401 wrong.
2402
2403Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2404
2405 * m68k.h (m68ec030): Defined as alias for 68030.
2406 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2407 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2408 them. Tightened description of "fmovex" to distinguish it from
2409 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2410 up descriptions that claimed versions were available for chips not
2411 supporting them. Added "pmovefd".
2412
2413Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2414
2415 * m68k.h: fix where the . goes in divull
2416
2417Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2418
2419 * m68k.h: the cas2 instruction is supposed to be written with
2420 indirection on the last two operands, which can be either data or
2421 address registers. Added a new operand type 'r' which accepts
2422 either register type. Added new cases for cas2l and cas2w which
2423 use them. Corrected masks for cas2 which failed to recognize use
2424 of address register.
2425
2426Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2427
2428 * m68k.h: Merged in patches (mostly m68040-specific) from
2429 Colin Smith <colin@wrs.com>.
2430
2431 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2432 base). Also cleaned up duplicates, re-ordered instructions for
2433 the sake of dis-assembling (so aliases come after standard names).
2434 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2435
2436Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2437
2438 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2439 all missing .s
2440
2441Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2442
2443 * sparc.h: Moved tables to BFD library.
2444
2445 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2446
2447Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2448
2449 * h8300.h: Finish filling in all the holes in the opcode table,
2450 so that the Lucid C compiler can digest this as well...
2451
2452Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2453
2454 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2455 Fix opcodes on various sizes of fild/fist instructions
2456 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2457 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2458
2459Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2460
2461 * h8300.h: Fill in all the holes in the opcode table so that the
2462 losing HPUX C compiler can digest this...
2463
2464Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2465
2466 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2467 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2468
2469Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2470
2471 * sparc.h: Add new architecture variant sparclite; add its scan
2472 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2473
2474Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2475
2476 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2477 fy@lucid.com).
2478
2479Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2480
2481 * rs6k.h: New version from IBM (Metin).
2482
2483Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2484
2485 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2486 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2487
2488Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2489
2490 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2491
2492Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2493
2494 * m68k.h (one, two): Cast macro args to unsigned to suppress
2495 complaints from compiler and lint about integer overflow during
2496 shift.
2497
2498Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2499
2500 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2501
2502Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2503
2504 * mips.h: Make bitfield layout depend on the HOST compiler,
2505 not on the TARGET system.
2506
2507Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2508
2509 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2510 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2511 <TRANLE@INTELLICORP.COM>.
2512
2513Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2514
2515 * h8300.h: turned op_type enum into #define list
2516
2517Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2518
2519 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2520 similar instructions -- they've been renamed to "fitoq", etc.
2521 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2522 number of arguments.
2523 * h8300.h: Remove extra ; which produces compiler warning.
2524
2525Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2526
2527 * sparc.h: fix opcode for tsubcctv.
2528
2529Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2530
2531 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2532
2533Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2534
2535 * sparc.h (nop): Made the 'lose' field be even tighter,
2536 so only a standard 'nop' is disassembled as a nop.
2537
2538Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2539
2540 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2541 disassembled as a nop.
2542
4f1d9bd8
NC
2543Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2544
2545 * m68k.h, sparc.h: ANSIfy enums.
2546
252b5132
RH
2547Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2548
2549 * sparc.h: fix a typo.
2550
2551Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2552
2553 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2554 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2555 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2556
2557\f
2558Local Variables:
2559version-control: never
2560End:
This page took 0.186284 seconds and 4 git commands to generate.