Adds assembly and dis-assembly support for the HPPA wide
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
1328dc98
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12001-01-14 Alan Modra <alan@linuxcare.com.au>
2
3 * hppa.h: Describe new '<' and '>' operand types, and tidy
4 existing comments.
5 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
6 Remove duplicate "ldw j(s,b),x". Sort some entries.
7
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8Sat Jan 13 09:56:32 MET 2001 Jan Hubicka <jh@suse.cz>
9
10 * i386.h (i386_optab): Fix pusha and ret templates.
11
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122001-01-11 Peter Targett <peter.targett@arccores.com>
13
14 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
15 definitions for masking cpu type.
16 (arc_ext_operand_value) New structure for storing extended
17 operands.
18 (ARC_OPERAND_*) Flags for operand values.
19
202001-01-10 Jan Hubicka <jh@suse.cz>
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21
22 * i386.h (pinsrw): Add.
23 (pshufw): Remove.
24 (cvttpd2dq): Fix operands.
25 (cvttps2dq): Likewise.
26 (movq2q): Rename to movdq2q.
27
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282001-01-10 Richard Schaal <richard.schaal@intel.com>
29
30 * i386.h: Correct movnti instruction.
31
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322001-01-09 Jeff Johnston <jjohnstn@redhat.com>
33
34 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
35 of operands (unsigned char or unsigned short).
36 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
37 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
38
0d2bcfaf 392001-01-05 Jan Hubicka <jh@suse.cz>
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40
41 * i386.h (i386_optab): Make [sml]fence template to use immext field.
42
0d2bcfaf 432001-01-03 Jan Hubicka <jh@suse.cz>
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44
45 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
46 introduced by Pentium4
47
0d2bcfaf 482000-12-30 Jan Hubicka <jh@suse.cz>
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49
50 * i386.h (i386_optab): Add "rex*" instructions;
51 add swapgs; disable jmp/call far direct instructions for
52 64bit mode; add syscall and sysret; disable registers for 0xc6
53 template. Add 'q' suffixes to extendable instructions, disable
079966a8 54 obsolete instructions, add new sign/zero extension ones.
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55 (i386_regtab): Add extended registers.
56 (*Suf): Add No_qSuf.
57 (q_Suf, wlq_Suf, bwlq_Suf): New.
58
0d2bcfaf 592000-12-20 Jan Hubicka <jh@suse.cz>
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60
61 * i386.h (i386_optab): Replace "Imm" with "EncImm".
62 (i386_regtab): Add flags field.
63
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642000-12-12 Nick Clifton <nickc@redhat.com>
65
66 * mips.h: Fix formatting.
67
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682000-12-01 Chris Demetriou <cgd@sibyte.com>
69
70 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
71 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
72 OP_*_SYSCALL definitions.
73 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
74 19 bit wait codes.
75 (MIPS operand specifier comments): Remove 'm', add 'U' and
76 'J', and update the meaning of 'B' so that it's more general.
77
e7af610e
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78 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
79 INSN_ISA5): Renumber, redefine to mean the ISA at which the
80 instruction was added.
81 (INSN_ISA32): New constant.
82 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
83 Renumber to avoid new and/or renumbered INSN_* constants.
84 (INSN_MIPS32): Delete.
85 (ISA_UNKNOWN): New constant to indicate unknown ISA.
86 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
87 ISA_MIPS32): New constants, defined to be the mask of INSN_*
88 constants available at that ISA level.
89 (CPU_UNKNOWN): New constant to indicate unknown CPU.
90 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
91 define it with a unique value.
92 (OPCODE_IS_MEMBER): Update for new ISA membership-related
93 constant meanings.
94
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95 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
96 definitions.
97
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98 * mips.h (CPU_SB1): New constant.
99
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1002000-10-20 Jakub Jelinek <jakub@redhat.com>
101
102 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
103 Note that '3' is used for siam operand.
104
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1052000-09-22 Jim Wilson <wilson@cygnus.com>
106
107 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
108
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1092000-09-13 Anders Norlander <anorland@acc.umu.se>
110
111 * mips.h: Use defines instead of hard-coded processor numbers.
112 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
113 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
114 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
115 CPU_4KC, CPU_4KM, CPU_4KP): Define..
116 (OPCODE_IS_MEMBER): Use new defines.
117 (OP_MASK_SEL, OP_SH_SEL): Define.
118 (OP_MASK_CODE20, OP_SH_CODE20): Define.
119 Add 'P' to used characters.
120 Use 'H' for coprocessor select field.
121 Use 'm' for 20 bit breakpoint code.
122 Document new arg characters and add to used characters.
123 (INSN_MIPS32): New define for MIPS32 extensions.
124 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
125
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1262000-09-05 Alan Modra <alan@linuxcare.com.au>
127
128 * hppa.h: Mention cz completer.
129
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1302000-08-16 Jim Wilson <wilson@cygnus.com>
131
132 * ia64.h (IA64_OPCODE_POSTINC): New.
133
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1342000-08-15 H.J. Lu <hjl@gnu.org>
135
136 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
137 IgnoreSize change.
138
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1392000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
140
141 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
142 Move related opcodes closer to each other.
143 Minor changes in comments, list undefined opcodes.
144
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1452000-07-26 Dave Brolley <brolley@redhat.com>
146
147 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
148
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1492000-07-20 Hans-Peter Nilsson <hp@axis.com>
150
151 cris.h: New file.
152
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1532000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
154
155 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
156 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
157 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
158 (AVR_ISA_M83): Define for ATmega83, ATmega85.
159 (espm): Remove, because ESPM removed in databook update.
160 (eicall, eijmp): Move to the end of opcode table.
161
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1622000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
163
164 * m68hc11.h: New file for support of Motorola 68hc11.
165
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166Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
167
168 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
169
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170Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
171
172 * avr.h: New file with AVR opcodes.
173
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174Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
175
176 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
177
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1782000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
179
180 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
181
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1822000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
183
184 * i386.h: Use sl_FP, not sl_Suf for fild.
185
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1862000-05-16 Frank Ch. Eigler <fche@redhat.com>
187
188 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
189 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
190 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
191 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
192
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1932000-05-13 Alan Modra <alan@linuxcare.com.au>,
194
195 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
196
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1972000-05-13 Alan Modra <alan@linuxcare.com.au>,
198 Alexander Sokolov <robocop@netlink.ru>
199
200 * i386.h (i386_optab): Add cpu_flags for all instructions.
201
2022000-05-13 Alan Modra <alan@linuxcare.com.au>
203
204 From Gavin Romig-Koch <gavin@cygnus.com>
205 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
206
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2072000-05-04 Timothy Wall <twall@cygnus.com>
208
209 * tic54x.h: New.
210
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2112000-05-03 J.T. Conklin <jtc@redback.com>
212
213 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
214 (PPC_OPERAND_VR): New operand flag for vector registers.
215
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2162000-05-01 Kazu Hirata <kazu@hxi.com>
217
218 * h8300.h (EOP): Add missing initializer.
219
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220Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
221
222 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
223 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
224 New operand types l,y,&,fe,fE,fx added to support above forms.
225 (pa_opcodes): Replaced usage of 'x' as source/target for
226 floating point double-word loads/stores with 'fx'.
227
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228Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
229 David Mosberger <davidm@hpl.hp.com>
230 Timothy Wall <twall@cygnus.com>
231 Jim Wilson <wilson@cygnus.com>
232
233 * ia64.h: New file.
234
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2352000-03-27 Nick Clifton <nickc@cygnus.com>
236
237 * d30v.h (SHORT_A1): Fix value.
238 (SHORT_AR): Renumber so that it is at the end of the list of short
239 instructions, not the end of the list of long instructions.
240
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2412000-03-26 Alan Modra <alan@linuxcare.com>
242
243 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
244 problem isn't really specific to Unixware.
245 (OLDGCC_COMPAT): Define.
246 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
247 destination %st(0).
248 Fix lots of comments.
249
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2502000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
251
252 * d30v.h:
253 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
254 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
255 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
256 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
257 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
258 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
259 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
260
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2612000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
262
263 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
264 fistpd without suffix.
265
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2662000-02-24 Nick Clifton <nickc@cygnus.com>
267
268 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
269 'signed_overflow_ok_p'.
270 Delete prototypes for cgen_set_flags() and cgen_get_flags().
271
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2722000-02-24 Andrew Haley <aph@cygnus.com>
273
274 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
275 (CGEN_CPU_TABLE): flags: new field.
276 Add prototypes for new functions.
277
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2782000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
279
280 * i386.h: Add some more UNIXWARE_COMPAT comments.
281
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2822000-02-23 Linas Vepstas <linas@linas.org>
283
284 * i370.h: New file.
285
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2862000-02-22 Andrew Haley <aph@cygnus.com>
287
288 * mips.h: (OPCODE_IS_MEMBER): Add comment.
289
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2901999-12-30 Andrew Haley <aph@cygnus.com>
291
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292 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
293 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
294 insns.
367c01af 295
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2962000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
297
298 * i386.h: Qualify intel mode far call and jmp with x_Suf.
299
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3001999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
301
302 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
303 indirect jumps and calls. Add FF/3 call for intel mode.
304
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305Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
306
307 * mn10300.h: Add new operand types. Add new instruction formats.
308
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309Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
310
311 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
312 instruction.
313
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3141999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
315
316 * mips.h (INSN_ISA5): New.
317
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3181999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
319
320 * mips.h (OPCODE_IS_MEMBER): New.
321
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3221999-10-29 Nick Clifton <nickc@cygnus.com>
323
324 * d30v.h (SHORT_AR): Define.
325
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3261999-10-18 Michael Meissner <meissner@cygnus.com>
327
328 * alpha.h (alpha_num_opcodes): Convert to unsigned.
329 (alpha_num_operands): Ditto.
330
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331Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
332
333 * hppa.h (pa_opcodes): Add load and store cache control to
334 instructions. Add ordered access load and store.
335
336 * hppa.h (pa_opcode): Add new entries for addb and addib.
337
338 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
339
340 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
341
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342Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
343
344 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
345
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346Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
347
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348 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
349 and "be" using completer prefixes.
350
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351 * hppa.h (pa_opcodes): Add initializers to silence compiler.
352
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353 * hppa.h: Update comments about character usage.
354
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355Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
356
357 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
358 up the new fstw & bve instructions.
359
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360Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
361
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362 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
363 instructions.
364
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365 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
366
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367 * hppa.h (pa_opcodes): Add long offset double word load/store
368 instructions.
369
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370 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
371 stores.
372
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373 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
374
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375 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
376
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377 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
378
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379 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
380
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381 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
382
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383 * hppa.h (pa_opcodes): Add support for "b,l".
384
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385 * hppa.h (pa_opcodes): Add support for "b,gate".
386
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387Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
388
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389 * hppa.h (pa_opcodes): Use 'fX' for first register operand
390 in xmpyu.
391
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392 * hppa.h (pa_opcodes): Fix mask for probe and probei.
393
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394 * hppa.h (pa_opcodes): Fix mask for depwi.
395
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396Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
397
398 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
399 an explicit output argument.
400
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401Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
402
403 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
404 Add a few PA2.0 loads and store variants.
405
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4061999-09-04 Steve Chamberlain <sac@pobox.com>
407
408 * pj.h: New file.
409
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4101999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
411
412 * i386.h (i386_regtab): Move %st to top of table, and split off
413 other fp reg entries.
414 (i386_float_regtab): To here.
415
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416Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
417
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418 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
419 by 'f'.
420
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421 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
422 Add supporting args.
423
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424 * hppa.h: Document new completers and args.
425 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
426 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
427 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
428 pmenb and pmdis.
429
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430 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
431 hshr, hsub, mixh, mixw, permh.
432
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433 * hppa.h (pa_opcodes): Change completers in instructions to
434 use 'c' prefix.
435
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436 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
437 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
438
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439 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
440 fnegabs to use 'I' instead of 'F'.
441
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4421999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
443
444 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
445 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
446 Alphabetically sort PIII insns.
447
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448Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
449
450 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
451
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452Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
453
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454 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
455 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
456
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457 * hppa.h: Document 64 bit condition completers.
458
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459Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
460
461 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
462
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4631999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
464
465 * i386.h (i386_optab): Add DefaultSize modifier to all insns
466 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
467 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
468
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469Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
470 Jeff Law <law@cygnus.com>
471
472 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
473
474 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
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475
476 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
477 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
478
145cf1f0
AM
4791999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
480
481 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
482
73826640
JL
483Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
484
485 * hppa.h (struct pa_opcode): Add new field "flags".
486 (FLAGS_STRICT): Define.
487
b65db252
JL
488Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
489 Jeff Law <law@cygnus.com>
490
f7fc668b
JL
491 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
492
493 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 494
10084519
AM
4951999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
496
497 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
498 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
499 flag to fcomi and friends.
500
cd8a80ba
JL
501Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
502
503 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
504 integer logical instructions.
505
1fca749b
ILT
5061999-05-28 Linus Nordberg <linus.nordberg@canit.se>
507
508 * m68k.h: Document new formats `E', `G', `H' and new places `N',
509 `n', `o'.
510
511 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
512 and new places `m', `M', `h'.
513
aa008907
JL
514Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
515
516 * hppa.h (pa_opcodes): Add several processor specific system
517 instructions.
518
e26b85f0
JL
519Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
520
521 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
522 "addb", and "addib" to be used by the disassembler.
523
c608c12e
AM
5241999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
525
526 * i386.h (ReverseModrm): Remove all occurences.
527 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
528 movmskps, pextrw, pmovmskb, maskmovq.
529 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
530 ignore the data size prefix.
531
532 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
533 Mostly stolen from Doug Ledford <dledford@redhat.com>
534
45c18104
RH
535Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
536
537 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
538
252b5132
RH
5391999-04-14 Doug Evans <devans@casey.cygnus.com>
540
541 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
542 (CGEN_ATTR_TYPE): Update.
543 (CGEN_ATTR_MASK): Number booleans starting at 0.
544 (CGEN_ATTR_VALUE): Update.
545 (CGEN_INSN_ATTR): Update.
546
547Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
548
549 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
550 instructions.
551
552Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
553
554 * hppa.h (bb, bvb): Tweak opcode/mask.
555
556
5571999-03-22 Doug Evans <devans@casey.cygnus.com>
558
559 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
560 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
561 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
562 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
563 Delete member max_insn_size.
564 (enum cgen_cpu_open_arg): New enum.
565 (cpu_open): Update prototype.
566 (cpu_open_1): Declare.
567 (cgen_set_cpu): Delete.
568
5691999-03-11 Doug Evans <devans@casey.cygnus.com>
570
571 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
572 (CGEN_OPERAND_NIL): New macro.
573 (CGEN_OPERAND): New member `type'.
574 (@arch@_cgen_operand_table): Delete decl.
575 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
576 (CGEN_OPERAND_TABLE): New struct.
577 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
578 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
579 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
580 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
581 {get,set}_{int,vma}_operand.
582 (@arch@_cgen_cpu_open): New arg `isa'.
583 (cgen_set_cpu): Ditto.
584
585Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
586
587 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
588
5891999-02-25 Doug Evans <devans@casey.cygnus.com>
590
591 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
592 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
593 enum cgen_hw_type.
594 (CGEN_HW_TABLE): New struct.
595 (hw_table): Delete declaration.
596 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
597 to table entry to enum.
598 (CGEN_OPINST): Ditto.
599 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
600
601Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
602
603 * alpha.h (AXP_OPCODE_EV6): New.
604 (AXP_OPCODE_NOPAL): Include it.
605
6061999-02-09 Doug Evans <devans@casey.cygnus.com>
607
608 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
609 All uses updated. New members int_insn_p, max_insn_size,
610 parse_operand,insert_operand,extract_operand,print_operand,
611 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
612 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
613 extract_handlers,print_handlers.
614 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
615 (CGEN_ATTR_BOOL_OFFSET): New macro.
616 (CGEN_ATTR_MASK): Subtract it to compute bit number.
617 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
618 (cgen_opcode_handler): Renamed from cgen_base.
619 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
620 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
621 all uses updated.
622 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
623 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
624 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
625 (CGEN_OPCODE,CGEN_IBASE): New types.
626 (CGEN_INSN): Rewrite.
627 (CGEN_{ASM,DIS}_HASH*): Delete.
628 (init_opcode_table,init_ibld_table): Declare.
629 (CGEN_INSN_ATTR): New type.
630
631Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
632
633 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
634 (x_FP, d_FP, dls_FP, sldx_FP): Define.
635 Change *Suf definitions to include x and d suffixes.
636 (movsx): Use w_Suf and b_Suf.
637 (movzx): Likewise.
638 (movs): Use bwld_Suf.
639 (fld): Change ordering. Use sld_FP.
640 (fild): Add Intel Syntax equivalent of fildq.
641 (fst): Use sld_FP.
642 (fist): Use sld_FP.
643 (fstp): Use sld_FP. Add x_FP version.
644 (fistp): LLongMem version for Intel Syntax.
645 (fcom, fcomp): Use sld_FP.
646 (fadd, fiadd, fsub): Use sld_FP.
647 (fsubr): Use sld_FP.
648 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
649
6501999-01-27 Doug Evans <devans@casey.cygnus.com>
651
652 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
653 CGEN_MODE_UINT.
654
655Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
656
657 * hppa.h (bv): Fix mask.
658
6591999-01-05 Doug Evans <devans@casey.cygnus.com>
660
661 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
662 (CGEN_ATTR): Use it.
663 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
664 (CGEN_ATTR_TABLE): New member dfault.
665
6661998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
667
668 * mips.h (MIPS16_INSN_BRANCH): New.
669
670Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
671
672 The following is part of a change made by Edith Epstein
673 <eepstein@sophia.cygnus.com> as part of a project to merge in
674 changes by HP; HP did not create ChangeLog entries.
675
676 * hppa.h (completer_chars): list of chars to not put a space
677 after.
678
679Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
680
681 * i386.h (i386_optab): Permit w suffix on processor control and
682 status word instructions.
683
6841998-11-30 Doug Evans <devans@casey.cygnus.com>
685
686 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
687 (struct cgen_keyword_entry): Ditto.
688 (struct cgen_operand): Ditto.
689 (CGEN_IFLD): New typedef, with associated access macros.
690 (CGEN_IFMT): New typedef, with associated access macros.
691 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
692 (CGEN_IVALUE): New typedef.
693 (struct cgen_insn): Delete const on syntax,attrs members.
694 `format' now points to format data. Type of `value' is now
695 CGEN_IVALUE.
696 (struct cgen_opcode_table): New member ifld_table.
697
6981998-11-18 Doug Evans <devans@casey.cygnus.com>
699
700 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
701 (CGEN_OPERAND_INSTANCE): New member `attrs'.
702 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
703 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
704 (cgen_opcode_table): Update type of dis_hash fn.
705 (extract_operand): Update type of `insn_value' arg.
706
707Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
708
709 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
710
711Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
712
713 * mips.h (INSN_MULT): Added.
714
715Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
716
717 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
718
719Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
720
721 * cgen.h (CGEN_INSN_INT): New typedef.
722 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
723 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
724 (CGEN_INSN_BYTES_PTR): New typedef.
725 (CGEN_EXTRACT_INFO): New typedef.
726 (cgen_insert_fn,cgen_extract_fn): Update.
727 (cgen_opcode_table): New member `insn_endian'.
728 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
729 (insert_operand,extract_operand): Update.
730 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
731
732Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
733
734 * cgen.h (CGEN_ATTR_BOOLS): New macro.
735 (struct CGEN_HW_ENTRY): New member `attrs'.
736 (CGEN_HW_ATTR): New macro.
737 (struct CGEN_OPERAND_INSTANCE): New member `name'.
738 (CGEN_INSN_INVALID_P): New macro.
739
740Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
741
742 * hppa.h: Add "fid".
743
744Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
745
746 From Robert Andrew Dale <rob@nb.net>
747 * i386.h (i386_optab): Add AMD 3DNow! instructions.
748 (AMD_3DNOW_OPCODE): Define.
749
750Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
751
752 * d30v.h (EITHER_BUT_PREFER_MU): Define.
753
754Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
755
756 * cgen.h (cgen_insn): #if 0 out element `cdx'.
757
758Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
759
760 Move all global state data into opcode table struct, and treat
761 opcode table as something that is "opened/closed".
762 * cgen.h (CGEN_OPCODE_DESC): New type.
763 (all fns): New first arg of opcode table descriptor.
764 (cgen_set_parse_operand_fn): Add prototype.
765 (cgen_current_machine,cgen_current_endian): Delete.
766 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
767 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
768 dis_hash_table,dis_hash_table_entries.
769 (opcode_open,opcode_close): Add prototypes.
770
771 * cgen.h (cgen_insn): New element `cdx'.
772
773Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
774
775 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
776
777Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
778
779 * mn10300.h: Add "no_match_operands" field for instructions.
780 (MN10300_MAX_OPERANDS): Define.
781
782Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
783
784 * cgen.h (cgen_macro_insn_count): Declare.
785
786Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
787
788 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
789 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
790 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
791 set_{int,vma}_operand.
792
793Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
794
795 * mn10300.h: Add "machine" field for instructions.
796 (MN103, AM30): Define machine types.
797
798Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
799
800 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
801
8021998-06-18 Ulrich Drepper <drepper@cygnus.com>
803
804 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
805
806Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
807
808 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
809 and ud2b.
810 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
811 those that happen to be implemented on pentiums.
812
813Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
814
815 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
816 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
817 with Size16|IgnoreSize or Size32|IgnoreSize.
818
819Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
820
821 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
822 (REPE): Rename to REPE_PREFIX_OPCODE.
823 (i386_regtab_end): Remove.
824 (i386_prefixtab, i386_prefixtab_end): Remove.
825 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
826 of md_begin.
827 (MAX_OPCODE_SIZE): Define.
828 (i386_optab_end): Remove.
829 (sl_Suf): Define.
830 (sl_FP): Use sl_Suf.
831
832 * i386.h (i386_optab): Allow 16 bit displacement for `mov
833 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
834 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
835 data32, dword, and adword prefixes.
836 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
837 regs.
838
839Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
840
841 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
842
843 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
844 register operands, because this is a common idiom. Flag them with
845 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
846 fdivrp because gcc erroneously generates them. Also flag with a
847 warning.
848
849 * i386.h: Add suffix modifiers to most insns, and tighter operand
850 checks in some cases. Fix a number of UnixWare compatibility
851 issues with float insns. Merge some floating point opcodes, using
852 new FloatMF modifier.
853 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
854 consistency.
855
856 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
857 IgnoreDataSize where appropriate.
858
859Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
860
861 * i386.h: (one_byte_segment_defaults): Remove.
862 (two_byte_segment_defaults): Remove.
863 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
864
865Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
866
867 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
868 (cgen_hw_lookup_by_num): Declare.
869
870Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
871
872 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
873 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
874
875Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
876
877 * cgen.h (cgen_asm_init_parse): Delete.
878 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
879 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
880
881Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
882
883 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
884 (cgen_asm_finish_insn): Update prototype.
885 (cgen_insn): New members num, data.
886 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
887 dis_hash, dis_hash_table_size moved to ...
888 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
889 All uses updated. New members asm_hash_p, dis_hash_p.
890 (CGEN_MINSN_EXPANSION): New struct.
891 (cgen_expand_macro_insn): Declare.
892 (cgen_macro_insn_count): Declare.
893 (get_insn_operands): Update prototype.
894 (lookup_get_insn_operands): Declare.
895
896Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
897
898 * i386.h (i386_optab): Change iclrKludge and imulKludge to
899 regKludge. Add operands types for string instructions.
900
901Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
902
903 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
904 table.
905
906Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
907
908 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
909 for `gettext'.
910
911Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
912
913 * i386.h: Remove NoModrm flag from all insns: it's never checked.
914 Add IsString flag to string instructions.
915 (IS_STRING): Don't define.
916 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
917 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
918 (SS_PREFIX_OPCODE): Define.
919
920Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
921
922 * i386.h: Revert March 24 patch; no more LinearAddress.
923
924Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
925
926 * i386.h (i386_optab): Remove fwait (9b) from all floating point
927 instructions, and instead add FWait opcode modifier. Add short
928 form of fldenv and fstenv.
929 (FWAIT_OPCODE): Define.
930
931 * i386.h (i386_optab): Change second operand constraint of `mov
932 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
933 allow legal instructions such as `movl %gs,%esi'
934
935Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
936
937 * h8300.h: Various changes to fully bracket initializers.
938
939Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
940
941 * i386.h: Set LinearAddress for lidt and lgdt.
942
943Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
944
945 * cgen.h (CGEN_BOOL_ATTR): New macro.
946
947Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
948
949 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
950
951Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
952
953 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
954 (cgen_insn): Record syntax and format entries here, rather than
955 separately.
956
957Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
958
959 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
960
961Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
962
963 * cgen.h (cgen_insert_fn): Change type of result to const char *.
964 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
965 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
966
967Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
968
969 * cgen.h (lookup_insn): New argument alias_p.
970
971Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
972
973Fix rac to accept only a0:
974 * d10v.h (OPERAND_ACC): Split into:
975 (OPERAND_ACC0, OPERAND_ACC1) .
976 (OPERAND_GPR): Define.
977
978Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
979
980 * cgen.h (CGEN_FIELDS): Define here.
981 (CGEN_HW_ENTRY): New member `type'.
982 (hw_list): Delete decl.
983 (enum cgen_mode): Declare.
984 (CGEN_OPERAND): New member `hw'.
985 (enum cgen_operand_instance_type): Declare.
986 (CGEN_OPERAND_INSTANCE): New type.
987 (CGEN_INSN): New member `operands'.
988 (CGEN_OPCODE_DATA): Make hw_list const.
989 (get_insn_operands,lookup_insn): Add prototypes for.
990
991Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
992
993 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
994 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
995 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
996 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
997
998Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
999
1000 * cgen.h: Correct typo in comment end marker.
1001
1002Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1003
1004 * tic30.h: New file.
1005
1006Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1007
1008 * cgen.h: Add prototypes for cgen_save_fixups(),
1009 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1010 of cgen_asm_finish_insn() to return a char *.
1011
1012Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1013
1014 * cgen.h: Formatting changes to improve readability.
1015
1016Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1017
1018 * cgen.h (*): Clean up pass over `struct foo' usage.
1019 (CGEN_ATTR): Make unsigned char.
1020 (CGEN_ATTR_TYPE): Update.
1021 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1022 (cgen_base): Move member `attrs' to cgen_insn.
1023 (CGEN_KEYWORD): New member `null_entry'.
1024 (CGEN_{SYNTAX,FORMAT}): New types.
1025 (cgen_insn): Format and syntax separated from each other.
1026
1027Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1028
1029 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1030 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1031 flags_{used,set} long.
1032 (d30v_operand): Make flags field long.
1033
1034Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1035
1036 * m68k.h: Fix comment describing operand types.
1037
1038Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1039
1040 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1041 everything else after down.
1042
1043Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1044
1045 * d10v.h (OPERAND_FLAG): Split into:
1046 (OPERAND_FFLAG, OPERAND_CFLAG) .
1047
1048Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1049
1050 * mips.h (struct mips_opcode): Changed comments to reflect new
1051 field usage.
1052
1053Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1054
1055 * mips.h: Added to comments a quick-ref list of all assigned
1056 operand type characters.
1057 (OP_{MASK,SH}_PERFREG): New macros.
1058
1059Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1060
1061 * sparc.h: Add '_' and '/' for v9a asr's.
1062 Patch from David Miller <davem@vger.rutgers.edu>
1063
1064Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1065
1066 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1067 area are not available in the base model (H8/300).
1068
1069Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1070
1071 * m68k.h: Remove documentation of ` operand specifier.
1072
1073Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1074
1075 * m68k.h: Document q and v operand specifiers.
1076
1077Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1078
1079 * v850.h (struct v850_opcode): Add processors field.
1080 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1081 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1082 (PROCESSOR_V850EA): New bit constants.
1083
1084Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1085
1086 Merge changes from Martin Hunt:
1087
1088 * d30v.h: Allow up to 64 control registers. Add
1089 SHORT_A5S format.
1090
1091 * d30v.h (LONG_Db): New form for delayed branches.
1092
1093 * d30v.h: (LONG_Db): New form for repeati.
1094
1095 * d30v.h (SHORT_D2B): New form.
1096
1097 * d30v.h (SHORT_A2): New form.
1098
1099 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1100 registers are used. Needed for VLIW optimization.
1101
1102Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1103
1104 * cgen.h: Move assembler interface section
1105 up so cgen_parse_operand_result is defined for cgen_parse_address.
1106 (cgen_parse_address): Update prototype.
1107
1108Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1109
1110 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1111
1112Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1113
1114 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1115 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1116 <paubert@iram.es>.
1117
1118 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1119 <paubert@iram.es>.
1120
1121 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1122 <paubert@iram.es>.
1123
1124 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1125 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1126
1127Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1128
1129 * v850.h (V850_NOT_R0): New flag.
1130
1131Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1132
1133 * v850.h (struct v850_opcode): Remove flags field.
1134
1135Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1136
1137 * v850.h (struct v850_opcode): Add flags field.
1138 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1139 fields.
1140 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1141 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1142
1143Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1144
1145 * arc.h: New file.
1146
1147Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1148
1149 * sparc.h (sparc_opcodes): Declare as const.
1150
1151Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1152
1153 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1154 uses single or double precision floating point resources.
1155 (INSN_NO_ISA, INSN_ISA1): Define.
1156 (cpu specific INSN macros): Tweak into bitmasks outside the range
1157 of INSN_ISA field.
1158
1159Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1160
1161 * i386.h: Fix pand opcode.
1162
1163Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1164
1165 * mips.h: Widen INSN_ISA and move it to a more convenient
1166 bit position. Add INSN_3900.
1167
1168Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1169
1170 * mips.h (struct mips_opcode): added new field membership.
1171
1172Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1173
1174 * i386.h (movd): only Reg32 is allowed.
1175
1176 * i386.h: add fcomp and ud2. From Wayne Scott
1177 <wscott@ichips.intel.com>.
1178
1179Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1180
1181 * i386.h: Add MMX instructions.
1182
1183Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1184
1185 * i386.h: Remove W modifier from conditional move instructions.
1186
1187Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1188
1189 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1190 with no arguments to match that generated by the UnixWare
1191 assembler.
1192
1193Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1194
1195 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1196 (cgen_parse_operand_fn): Declare.
1197 (cgen_init_parse_operand): Declare.
1198 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1199 new argument `want'.
1200 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1201 (enum cgen_parse_operand_type): New enum.
1202
1203Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1204
1205 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1206
1207Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1208
1209 * cgen.h: New file.
1210
1211Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1212
1213 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1214 fdivrp.
1215
1216Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1217
1218 * v850.h (extract): Make unsigned.
1219
1220Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1221
1222 * i386.h: Add iclr.
1223
1224Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1225
1226 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1227 take a direction bit.
1228
1229Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1230
1231 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1232
1233Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1234
1235 * sparc.h: Include <ansidecl.h>. Update function declarations to
1236 use prototypes, and to use const when appropriate.
1237
1238Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1239
1240 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1241
1242Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1243
1244 * d10v.h: Change pre_defined_registers to
1245 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1246
1247Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1248
1249 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1250 Change mips_opcodes from const array to a pointer,
1251 and change bfd_mips_num_opcodes from const int to int,
1252 so that we can increase the size of the mips opcodes table
1253 dynamically.
1254
1255Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1256
1257 * d30v.h (FLAG_X): Remove unused flag.
1258
1259Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1260
1261 * d30v.h: New file.
1262
1263Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1264
1265 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1266 (PDS_VALUE): Macro to access value field of predefined symbols.
1267 (tic80_next_predefined_symbol): Add prototype.
1268
1269Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1270
1271 * tic80.h (tic80_symbol_to_value): Change prototype to match
1272 change in function, added class parameter.
1273
1274Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1275
1276 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1277 endmask fields, which are somewhat weird in that 0 and 32 are
1278 treated exactly the same.
1279
1280Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1281
1282 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1283 rather than a constant that is 2**X. Reorder them to put bits for
1284 operands that have symbolic names in the upper bits, so they can
1285 be packed into an int where the lower bits contain the value that
1286 corresponds to that symbolic name.
1287 (predefined_symbo): Add struct.
1288 (tic80_predefined_symbols): Declare array of translations.
1289 (tic80_num_predefined_symbols): Declare size of that array.
1290 (tic80_value_to_symbol): Declare function.
1291 (tic80_symbol_to_value): Declare function.
1292
1293Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1294
1295 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1296
1297Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1298
1299 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1300 be the destination register.
1301
1302Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1303
1304 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1305 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1306 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1307 that the opcode can have two vector instructions in a single
1308 32 bit word and we have to encode/decode both.
1309
1310Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1311
1312 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1313 TIC80_OPERAND_RELATIVE for PC relative.
1314 (TIC80_OPERAND_BASEREL): New flag bit for register
1315 base relative.
1316
1317Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1318
1319 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1320
1321Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1322
1323 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1324 ":s" modifier for scaling.
1325
1326Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1327
1328 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1329 (TIC80_OPERAND_M_LI): Ditto
1330
1331Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1332
1333 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1334 (TIC80_OPERAND_CC): New define for condition code operand.
1335 (TIC80_OPERAND_CR): New define for control register operand.
1336
1337Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1338
1339 * tic80.h (struct tic80_opcode): Name changed.
1340 (struct tic80_opcode): Remove format field.
1341 (struct tic80_operand): Add insertion and extraction functions.
1342 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1343 correct ones.
1344 (FMT_*): Ditto.
1345
1346Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1347
1348 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1349 type IV instruction offsets.
1350
1351Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1352
1353 * tic80.h: New file.
1354
1355Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1356
1357 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1358
1359Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1360
1361 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1362 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1363 * v850.h: Fix comment, v850_operand not powerpc_operand.
1364
1365Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1366
1367 * mn10200.h: Flesh out structures and definitions needed by
1368 the mn10200 assembler & disassembler.
1369
1370Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1371
1372 * mips.h: Add mips16 definitions.
1373
1374Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1375
1376 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1377
1378Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1379
1380 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1381 (MN10300_OPERAND_MEMADDR): Define.
1382
1383Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1384
1385 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1386
1387Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1388
1389 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1390
1391Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1392
1393 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1394
1395Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1396
1397 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1398
1399Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1400
1401 * alpha.h: Don't include "bfd.h"; private relocation types are now
1402 negative to minimize problems with shared libraries. Organize
1403 instruction subsets by AMASK extensions and PALcode
1404 implementation.
1405 (struct alpha_operand): Move flags slot for better packing.
1406
1407Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1408
1409 * v850.h (V850_OPERAND_RELAX): New operand flag.
1410
1411Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1412
1413 * mn10300.h (FMT_*): Move operand format definitions
1414 here.
1415
1416Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1417
1418 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1419
1420Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1421
1422 * mn10300.h (mn10300_opcode): Add "format" field.
1423 (MN10300_OPERAND_*): Define.
1424
1425Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1426
1427 * mn10x00.h: Delete.
1428 * mn10200.h, mn10300.h: New files.
1429
1430Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1431
1432 * mn10x00.h: New file.
1433
1434Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1435
1436 * v850.h: Add new flag to indicate this instruction uses a PC
1437 displacement.
1438
1439Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1440
1441 * h8300.h (stmac): Add missing instruction.
1442
1443Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1444
1445 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1446 field.
1447
1448Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1449
1450 * v850.h (V850_OPERAND_EP): Define.
1451
1452 * v850.h (v850_opcode): Add size field.
1453
1454Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1455
1456 * v850.h (v850_operands): Add insert and extract fields, pointers
1457 to functions used to handle unusual operand encoding.
1458 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1459 V850_OPERAND_SIGNED): Defined.
1460
1461Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1462
1463 * v850.h (v850_operands): Add flags field.
1464 (OPERAND_REG, OPERAND_NUM): Defined.
1465
1466Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1467
1468 * v850.h: New file.
1469
1470Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1471
1472 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1473 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1474 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1475 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1476 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1477 Defined.
1478
1479Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1480
1481 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1482 a 3 bit space id instead of a 2 bit space id.
1483
1484Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1485
1486 * d10v.h: Add some additional defines to support the
1487 assembler in determining which operations can be done in parallel.
1488
1489Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1490
1491 * h8300.h (SN): Define.
1492 (eepmov.b): Renamed from "eepmov"
1493 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1494 with them.
1495
1496Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1497
1498 * d10v.h (OPERAND_SHIFT): New operand flag.
1499
1500Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1501
1502 * d10v.h: Changes for divs, parallel-only instructions, and
1503 signed numbers.
1504
1505Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1506
1507 * d10v.h (pd_reg): Define. Putting the definition here allows
1508 the assembler and disassembler to share the same struct.
1509
1510Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1511
1512 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1513 Williams <steve@icarus.com>.
1514
1515Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1516
1517 * d10v.h: New file.
1518
1519Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1520
1521 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1522
1523Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1524
1525 * m68k.h (mcf5200): New macro.
1526 Document names of coldfire control registers.
1527
1528Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1529
1530 * h8300.h (SRC_IN_DST): Define.
1531
1532 * h8300.h (UNOP3): Mark the register operand in this insn
1533 as a source operand, not a destination operand.
1534 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1535 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1536 register operand with SRC_IN_DST.
1537
1538Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1539
1540 * alpha.h: New file.
1541
1542Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1543
1544 * rs6k.h: Remove obsolete file.
1545
1546Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1547
1548 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1549 fdivp, and fdivrp. Add ffreep.
1550
1551Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1552
1553 * h8300.h: Reorder various #defines for readability.
1554 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1555 (BITOP): Accept additional (unused) argument. All callers changed.
1556 (EBITOP): Likewise.
1557 (O_LAST): Bump.
1558 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1559
1560 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1561 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1562 (BITOP, EBITOP): Handle new H8/S addressing modes for
1563 bit insns.
1564 (UNOP3): Handle new shift/rotate insns on the H8/S.
1565 (insns using exr): New instructions.
1566 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1567
1568Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1569
1570 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1571 was incorrect.
1572
1573Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1574
1575 * h8300.h (START): Remove.
1576 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1577 and mov.l insns that can be relaxed.
1578
1579Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1580
1581 * i386.h: Remove Abs32 from lcall.
1582
1583Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1584
1585 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1586 (SLCPOP): New macro.
1587 Mark X,Y opcode letters as in use.
1588
1589Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1590
1591 * sparc.h (F_FLOAT, F_FBR): Define.
1592
1593Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1594
1595 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1596 from all insns.
1597 (ABS8SRC,ABS8DST): Add ABS8MEM.
1598 (add.l): Fix reg+reg variant.
1599 (eepmov.w): Renamed from eepmovw.
1600 (ldc,stc): Fix many cases.
1601
1602Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1603
1604 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1605
1606Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1607
1608 * sparc.h (O): Mark operand letter as in use.
1609
1610Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1611
1612 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1613 Mark operand letters uU as in use.
1614
1615Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1616
1617 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1618 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1619 (SPARC_OPCODE_SUPPORTED): New macro.
1620 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1621 (F_NOTV9): Delete.
1622
1623Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1624
1625 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1626 declaration consistent with return type in definition.
1627
1628Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1629
1630 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1631
1632Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1633
1634 * i386.h (i386_regtab): Add 80486 test registers.
1635
1636Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1637
1638 * i960.h (I_HX): Define.
1639 (i960_opcodes): Add HX instruction.
1640
1641Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1642
1643 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1644 and fclex.
1645
1646Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1647
1648 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1649 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1650 (bfd_* defines): Delete.
1651 (sparc_opcode_archs): Replaces architecture_pname.
1652 (sparc_opcode_lookup_arch): Declare.
1653 (NUMOPCODES): Delete.
1654
1655Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1656
1657 * sparc.h (enum sparc_architecture): Add v9a.
1658 (ARCHITECTURES_CONFLICT_P): Update.
1659
1660Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1661
1662 * i386.h: Added Pentium Pro instructions.
1663
1664Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1665
1666 * m68k.h: Document new 'W' operand place.
1667
1668Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1669
1670 * hppa.h: Add lci and syncdma instructions.
1671
1672Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1673
1674 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1675 instructions.
1676
1677Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1678
1679 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1680 assembler's -mcom and -many switches.
1681
1682Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1683
1684 * i386.h: Fix cmpxchg8b extension opcode description.
1685
1686Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1687
1688 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1689 and register cr4.
1690
1691Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1692
1693 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1694
1695Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1696
1697 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1698
1699Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1700
1701 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1702
1703Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1704
1705 * m68kmri.h: Remove.
1706
1707 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1708 declarations. Remove F_ALIAS and flag field of struct
1709 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1710 int. Make name and args fields of struct m68k_opcode const.
1711
1712Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1713
1714 * sparc.h (F_NOTV9): Define.
1715
1716Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1717
1718 * mips.h (INSN_4010): Define.
1719
1720Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1721
1722 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1723
1724 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1725 * m68k.h: Fix argument descriptions of coprocessor
1726 instructions to allow only alterable operands where appropriate.
1727 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1728 (m68k_opcode_aliases): Add more aliases.
1729
1730Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1731
1732 * m68k.h: Added explcitly short-sized conditional branches, and a
1733 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1734 svr4-based configurations.
1735
1736Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1737
1738 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1739 * i386.h: added missing Data16/Data32 flags to a few instructions.
1740
1741Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1742
1743 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1744 (OP_MASK_BCC, OP_SH_BCC): Define.
1745 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1746 (OP_MASK_CCC, OP_SH_CCC): Define.
1747 (INSN_READ_FPR_R): Define.
1748 (INSN_RFE): Delete.
1749
1750Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1751
1752 * m68k.h (enum m68k_architecture): Deleted.
1753 (struct m68k_opcode_alias): New type.
1754 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1755 matching constraints, values and flags. As a side effect of this,
1756 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1757 as I know were never used, now may need re-examining.
1758 (numopcodes): Now const.
1759 (m68k_opcode_aliases, numaliases): New variables.
1760 (endop): Deleted.
1761 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1762 m68k_opcode_aliases; update declaration of m68k_opcodes.
1763
1764Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1765
1766 * hppa.h (delay_type): Delete unused enumeration.
1767 (pa_opcode): Replace unused delayed field with an architecture
1768 field.
1769 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1770
1771Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1772
1773 * mips.h (INSN_ISA4): Define.
1774
1775Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1776
1777 * mips.h (M_DLA_AB, M_DLI): Define.
1778
1779Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1780
1781 * hppa.h (fstwx): Fix single-bit error.
1782
1783Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1784
1785 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1786
1787Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1788
1789 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1790 debug registers. From Charles Hannum (mycroft@netbsd.org).
1791
1792Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1793
1794 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1795 i386 support:
1796 * i386.h (MOV_AX_DISP32): New macro.
1797 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1798 of several call/return instructions.
1799 (ADDR_PREFIX_OPCODE): New macro.
1800
1801Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1802
1803 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1804
1805 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1806 it pointer to const char;
1807 (struct vot, field `name'): ditto.
1808
1809Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1810
1811 * vax.h: Supply and properly group all values in end sentinel.
1812
1813Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1814
1815 * mips.h (INSN_ISA, INSN_4650): Define.
1816
1817Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1818
1819 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1820 systems with a separate instruction and data cache, such as the
1821 29040, these instructions take an optional argument.
1822
1823Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1824
1825 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1826 INSN_TRAP.
1827
1828Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1829
1830 * mips.h (INSN_STORE_MEMORY): Define.
1831
1832Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1833
1834 * sparc.h: Document new operand type 'x'.
1835
1836Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1837
1838 * i960.h (I_CX2): New instruction category. It includes
1839 instructions available on Cx and Jx processors.
1840 (I_JX): New instruction category, for JX-only instructions.
1841 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1842 Jx-only instructions, in I_JX category.
1843
1844Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1845
1846 * ns32k.h (endop): Made pointer const too.
1847
1848Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1849
1850 * ns32k.h: Drop Q operand type as there is no correct use
1851 for it. Add I and Z operand types which allow better checking.
1852
1853Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1854
1855 * h8300.h (xor.l) :fix bit pattern.
1856 (L_2): New size of operand.
1857 (trapa): Use it.
1858
1859Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1860
1861 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1862
1863Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1864
1865 * sparc.h: Include v9 definitions.
1866
1867Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1868
1869 * m68k.h (m68060): Defined.
1870 (m68040up, mfloat, mmmu): Include it.
1871 (struct m68k_opcode): Widen `arch' field.
1872 (m68k_opcodes): Updated for M68060. Removed comments that were
1873 instructions commented out by "JF" years ago.
1874
1875Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1876
1877 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1878 add a one-bit `flags' field.
1879 (F_ALIAS): New macro.
1880
1881Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1882
1883 * h8300.h (dec, inc): Get encoding right.
1884
1885Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1886
1887 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1888 a flag instead.
1889 (PPC_OPERAND_SIGNED): Define.
1890 (PPC_OPERAND_SIGNOPT): Define.
1891
1892Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1893
1894 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1895 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1896
1897Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1898
1899 * i386.h: Reverse last change. It'll be handled in gas instead.
1900
1901Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1902
1903 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1904 slower on the 486 and used the implicit shift count despite the
1905 explicit operand. The one-operand form is still available to get
1906 the shorter form with the implicit shift count.
1907
1908Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1909
1910 * hppa.h: Fix typo in fstws arg string.
1911
1912Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1913
1914 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1915
1916Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1917
1918 * ppc.h (PPC_OPCODE_601): Define.
1919
1920Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1921
1922 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1923 (so we can determine valid completers for both addb and addb[tf].)
1924
1925 * hppa.h (xmpyu): No floating point format specifier for the
1926 xmpyu instruction.
1927
1928Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1929
1930 * ppc.h (PPC_OPERAND_NEXT): Define.
1931 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1932 (struct powerpc_macro): Define.
1933 (powerpc_macros, powerpc_num_macros): Declare.
1934
1935Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1936
1937 * ppc.h: New file. Header file for PowerPC opcode table.
1938
1939Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1940
1941 * hppa.h: More minor template fixes for sfu and copr (to allow
1942 for easier disassembly).
1943
1944 * hppa.h: Fix templates for all the sfu and copr instructions.
1945
1946Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1947
1948 * i386.h (push): Permit Imm16 operand too.
1949
1950Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1951
1952 * h8300.h (andc): Exists in base arch.
1953
1954Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1955
1956 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1957 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1958
1959Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1960
1961 * hppa.h: Add FP quadword store instructions.
1962
1963Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1964
1965 * mips.h: (M_J_A): Added.
1966 (M_LA): Removed.
1967
1968Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1969
1970 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1971 <mellon@pepper.ncd.com>.
1972
1973Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1974
1975 * hppa.h: Immediate field in probei instructions is unsigned,
1976 not low-sign extended.
1977
1978Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1979
1980 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1981
1982Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1983
1984 * i386.h: Add "fxch" without operand.
1985
1986Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1987
1988 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1989
1990Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1991
1992 * hppa.h: Add gfw and gfr to the opcode table.
1993
1994Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1995
1996 * m88k.h: extended to handle m88110.
1997
1998Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1999
2000 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2001 addresses.
2002
2003Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2004
2005 * i960.h (i960_opcodes): Properly bracket initializers.
2006
2007Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2008
2009 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2010
2011Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2012
2013 * m68k.h (two): Protect second argument with parentheses.
2014
2015Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2016
2017 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2018 Deleted old in/out instructions in "#if 0" section.
2019
2020Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2021
2022 * i386.h (i386_optab): Properly bracket initializers.
2023
2024Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2025
2026 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2027 Jeff Law, law@cs.utah.edu).
2028
2029Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2030
2031 * i386.h (lcall): Accept Imm32 operand also.
2032
2033Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2034
2035 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2036 (M_DABS): Added.
2037
2038Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2039
2040 * mips.h (INSN_*): Changed values. Removed unused definitions.
2041 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2042 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2043 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2044 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2045 (M_*): Added new values for r6000 and r4000 macros.
2046 (ANY_DELAY): Removed.
2047
2048Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2049
2050 * mips.h: Added M_LI_S and M_LI_SS.
2051
2052Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2053
2054 * h8300.h: Get some rare mov.bs correct.
2055
2056Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2057
2058 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2059 been included.
2060
2061Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2062
2063 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2064 jump instructions, for use in disassemblers.
2065
2066Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2067
2068 * m88k.h: Make bitfields just unsigned, not unsigned long or
2069 unsigned short.
2070
2071Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2072
2073 * hppa.h: New argument type 'y'. Use in various float instructions.
2074
2075Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2076
2077 * hppa.h (break): First immediate field is unsigned.
2078
2079 * hppa.h: Add rfir instruction.
2080
2081Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2082
2083 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2084
2085Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2086
2087 * mips.h: Reworked the hazard information somewhat, and fixed some
2088 bugs in the instruction hazard descriptions.
2089
2090Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2091
2092 * m88k.h: Corrected a couple of opcodes.
2093
2094Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2095
2096 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2097 new version includes instruction hazard information, but is
2098 otherwise reasonably similar.
2099
2100Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2101
2102 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2103
2104Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2105
2106 Patches from Jeff Law, law@cs.utah.edu:
2107 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2108 Make the tables be the same for the following instructions:
2109 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2110 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2111 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2112 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2113 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2114 "fcmp", and "ftest".
2115
2116 * hppa.h: Make new and old tables the same for "break", "mtctl",
2117 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2118 Fix typo in last patch. Collapse several #ifdefs into a
2119 single #ifdef.
2120
2121 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2122 of the comments up-to-date.
2123
2124 * hppa.h: Update "free list" of letters and update
2125 comments describing each letter's function.
2126
2127Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2128
2129 * h8300.h: checkpoint, includes H8/300-H opcodes.
2130
2131Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2132
2133 * Patches from Jeffrey Law <law@cs.utah.edu>.
2134 * hppa.h: Rework single precision FP
2135 instructions so that they correctly disassemble code
2136 PA1.1 code.
2137
2138Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2139
2140 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2141 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2142
2143Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2144
2145 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2146 gdb will define it for now.
2147
2148Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2149
2150 * sparc.h: Don't end enumerator list with comma.
2151
2152Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2153
2154 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2155 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2156 ("bc2t"): Correct typo.
2157 ("[ls]wc[023]"): Use T rather than t.
2158 ("c[0123]"): Define general coprocessor instructions.
2159
2160Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2161
2162 * m68k.h: Move split point for gcc compilation more towards
2163 middle.
2164
2165Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2166
2167 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2168 simply wrong, ics, rfi, & rfsvc were missing).
2169 Add "a" to opr_ext for "bb". Doc fix.
2170
2171Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2172
2173 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2174 * mips.h: Add casts, to suppress warnings about shifting too much.
2175 * m68k.h: Document the placement code '9'.
2176
2177Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2178
2179 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2180 allows callers to break up the large initialized struct full of
2181 opcodes into two half-sized ones. This permits GCC to compile
2182 this module, since it takes exponential space for initializers.
2183 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2184
2185Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2186
2187 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2188 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2189 initialized structs in it.
2190
2191Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2192
2193 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2194 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2195 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2196
2197Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2198
2199 * mips.h: document "i" and "j" operands correctly.
2200
2201Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2202
2203 * mips.h: Removed endianness dependency.
2204
2205Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2206
2207 * h8300.h: include info on number of cycles per instruction.
2208
2209Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2210
2211 * hppa.h: Move handy aliases to the front. Fix masks for extract
2212 and deposit instructions.
2213
2214Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2215
2216 * i386.h: accept shld and shrd both with and without the shift
2217 count argument, which is always %cl.
2218
2219Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2220
2221 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2222 (one_byte_segment_defaults, two_byte_segment_defaults,
2223 i386_prefixtab_end): Ditto.
2224
2225Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2226
2227 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2228 for operand 2; from John Carr, jfc@dsg.dec.com.
2229
2230Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2231
2232 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2233 always use 16-bit offsets. Makes calculated-size jump tables
2234 feasible.
2235
2236Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2237
2238 * i386.h: Fix one-operand forms of in* and out* patterns.
2239
2240Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2241
2242 * m68k.h: Added CPU32 support.
2243
2244Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2245
2246 * mips.h (break): Disassemble the argument. Patch from
2247 jonathan@cs.stanford.edu (Jonathan Stone).
2248
2249Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2250
2251 * m68k.h: merged Motorola and MIT syntax.
2252
2253Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2254
2255 * m68k.h (pmove): make the tests less strict, the 68k book is
2256 wrong.
2257
2258Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2259
2260 * m68k.h (m68ec030): Defined as alias for 68030.
2261 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2262 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2263 them. Tightened description of "fmovex" to distinguish it from
2264 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2265 up descriptions that claimed versions were available for chips not
2266 supporting them. Added "pmovefd".
2267
2268Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2269
2270 * m68k.h: fix where the . goes in divull
2271
2272Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2273
2274 * m68k.h: the cas2 instruction is supposed to be written with
2275 indirection on the last two operands, which can be either data or
2276 address registers. Added a new operand type 'r' which accepts
2277 either register type. Added new cases for cas2l and cas2w which
2278 use them. Corrected masks for cas2 which failed to recognize use
2279 of address register.
2280
2281Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2282
2283 * m68k.h: Merged in patches (mostly m68040-specific) from
2284 Colin Smith <colin@wrs.com>.
2285
2286 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2287 base). Also cleaned up duplicates, re-ordered instructions for
2288 the sake of dis-assembling (so aliases come after standard names).
2289 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2290
2291Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2292
2293 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2294 all missing .s
2295
2296Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2297
2298 * sparc.h: Moved tables to BFD library.
2299
2300 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2301
2302Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2303
2304 * h8300.h: Finish filling in all the holes in the opcode table,
2305 so that the Lucid C compiler can digest this as well...
2306
2307Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2308
2309 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2310 Fix opcodes on various sizes of fild/fist instructions
2311 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2312 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2313
2314Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2315
2316 * h8300.h: Fill in all the holes in the opcode table so that the
2317 losing HPUX C compiler can digest this...
2318
2319Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2320
2321 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2322 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2323
2324Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2325
2326 * sparc.h: Add new architecture variant sparclite; add its scan
2327 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2328
2329Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2330
2331 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2332 fy@lucid.com).
2333
2334Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2335
2336 * rs6k.h: New version from IBM (Metin).
2337
2338Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2339
2340 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2341 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2342
2343Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2344
2345 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2346
2347Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2348
2349 * m68k.h (one, two): Cast macro args to unsigned to suppress
2350 complaints from compiler and lint about integer overflow during
2351 shift.
2352
2353Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2354
2355 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2356
2357Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2358
2359 * mips.h: Make bitfield layout depend on the HOST compiler,
2360 not on the TARGET system.
2361
2362Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2363
2364 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2365 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2366 <TRANLE@INTELLICORP.COM>.
2367
2368Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2369
2370 * h8300.h: turned op_type enum into #define list
2371
2372Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2373
2374 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2375 similar instructions -- they've been renamed to "fitoq", etc.
2376 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2377 number of arguments.
2378 * h8300.h: Remove extra ; which produces compiler warning.
2379
2380Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2381
2382 * sparc.h: fix opcode for tsubcctv.
2383
2384Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2385
2386 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2387
2388Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2389
2390 * sparc.h (nop): Made the 'lose' field be even tighter,
2391 so only a standard 'nop' is disassembled as a nop.
2392
2393Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2394
2395 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2396 disassembled as a nop.
2397
2398Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2399
2400 * sparc.h: fix a typo.
2401
2402Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2403
2404 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2405 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2406 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2407
2408\f
2409Local Variables:
2410version-control: never
2411End:
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