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Patch from Thomas de Lellis to implement --section-start
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
f9e0cf0b
AM		 12000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
2
3 * i386.h: Use sl_FP, not sl_Suf for fild.
4
f660ee8b
FCE		 52000-05-16 Frank Ch. Eigler <fche@redhat.com>
6
7 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
8 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
9 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
10 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
11
558b0a60
AM		 122000-05-13 Alan Modra <alan@linuxcare.com.au>,
13
14 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
15
e413e4e9
AM		 162000-05-13 Alan Modra <alan@linuxcare.com.au>,
17 Alexander Sokolov <robocop@netlink.ru>
18
19 * i386.h (i386_optab): Add cpu_flags for all instructions.
20
212000-05-13 Alan Modra <alan@linuxcare.com.au>
22
23 From Gavin Romig-Koch <gavin@cygnus.com>
24 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
25
5c84d377
TW		 262000-05-04 Timothy Wall <twall@cygnus.com>
27
28 * tic54x.h: New.
29
966f959b
C		 302000-05-03 J.T. Conklin <jtc@redback.com>
31
32 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
33 (PPC_OPERAND_VR): New operand flag for vector registers.
34
c5d05dbb
JL		 352000-05-01 Kazu Hirata <kazu@hxi.com>
36
37 * h8300.h (EOP): Add missing initializer.
38
a7fba0e0
JL		 39Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
40
41 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
42 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
43 New operand types l,y,&,fe,fE,fx added to support above forms.
44 (pa_opcodes): Replaced usage of 'x' as source/target for
45 floating point double-word loads/stores with 'fx'.
46
800eeca4
JW		 47Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
48 David Mosberger <davidm@hpl.hp.com>
49 Timothy Wall <twall@cygnus.com>
50 Jim Wilson <wilson@cygnus.com>
51
52 * ia64.h: New file.
53
ba23e138
NC		 542000-03-27 Nick Clifton <nickc@cygnus.com>
55
56 * d30v.h (SHORT_A1): Fix value.
57 (SHORT_AR): Renumber so that it is at the end of the list of short
58 instructions, not the end of the list of long instructions.
59
d0b47220
AM		 602000-03-26 Alan Modra <alan@linuxcare.com>
61
62 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
63 problem isn't really specific to Unixware.
64 (OLDGCC_COMPAT): Define.
65 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
66 destination %st(0).
67 Fix lots of comments.
68
866afedc
NC		 692000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
70
71 * d30v.h:
72 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
73 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
74 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
75 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
76 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
77 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
78 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
79
cc5ca5ce
AM		 802000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
81
82 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
83 fistpd without suffix.
84
68e324a2
NC		 852000-02-24 Nick Clifton <nickc@cygnus.com>
86
87 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
88 'signed_overflow_ok_p'.
89 Delete prototypes for cgen_set_flags() and cgen_get_flags().
90
60f036a2
AH		 912000-02-24 Andrew Haley <aph@cygnus.com>
92
93 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
94 (CGEN_CPU_TABLE): flags: new field.
95 Add prototypes for new functions.
96
9b9b5cd4
AM		 972000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
98
99 * i386.h: Add some more UNIXWARE_COMPAT comments.
100
5b93d8bb
AM		 1012000-02-23 Linas Vepstas <linas@linas.org>
102
103 * i370.h: New file.
104
87f398dd
AH		 1052000-02-22 Andrew Haley <aph@cygnus.com>
106
107 * mips.h: (OPCODE_IS_MEMBER): Add comment.
108
367c01af
AH		 1091999-12-30 Andrew Haley <aph@cygnus.com>
110
9a1e79ca
AH		 111 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
112 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
113 insns.
367c01af 114
add0c677
AM		 1152000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
116
117 * i386.h: Qualify intel mode far call and jmp with x_Suf.
118
3138f287
AM		 1191999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
120
121 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
122 indirect jumps and calls. Add FF/3 call for intel mode.
123
ccecd07b
JL		 124Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
125
126 * mn10300.h: Add new operand types. Add new instruction formats.
127
b37e19e9
JL		 128Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
129
130 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
131 instruction.
132
5fce5ddf
GRK		 1331999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
134
135 * mips.h (INSN_ISA5): New.
136
2bd7f1f3
GRK		 1371999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
138
139 * mips.h (OPCODE_IS_MEMBER): New.
140
4df2b5c5
NC		 1411999-10-29 Nick Clifton <nickc@cygnus.com>
142
143 * d30v.h (SHORT_AR): Define.
144
446a06c9
MM		 1451999-10-18 Michael Meissner <meissner@cygnus.com>
146
147 * alpha.h (alpha_num_opcodes): Convert to unsigned.
148 (alpha_num_operands): Ditto.
149
eca04c6a
JL		 150Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
151
152 * hppa.h (pa_opcodes): Add load and store cache control to
153 instructions. Add ordered access load and store.
154
155 * hppa.h (pa_opcode): Add new entries for addb and addib.
156
157 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
158
159 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
160
c43185de
DN		 161Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
162
163 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
164
ec3533da
JL		 165Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
166
390f858d
JL		 167 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
168 and "be" using completer prefixes.
169
8c47ebd9
JL		 170 * hppa.h (pa_opcodes): Add initializers to silence compiler.
171
ec3533da
JL		 172 * hppa.h: Update comments about character usage.
173
18369bea
JL		 174Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
175
176 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
177 up the new fstw & bve instructions.
178
c36efdd2
JL		 179Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
180
d3ffb032
JL		 181 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
182 instructions.
183
c49ec3da
JL		 184 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
185
5d2e7ecc
JL		 186 * hppa.h (pa_opcodes): Add long offset double word load/store
187 instructions.
188
6397d1a2
JL		 189 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
190 stores.
191
142f0fe0
JL		 192 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
193
f5a68b45
JL		 194 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
195
8235801e
JL		 196 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
197
35184366
JL		 198 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
199
f0bfde5e
JL		 200 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
201
27bbbb58
JL		 202 * hppa.h (pa_opcodes): Add support for "b,l".
203
c36efdd2
JL		 204 * hppa.h (pa_opcodes): Add support for "b,gate".
205
f2727d04
JL		 206Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
207
9392fb11
JL		 208 * hppa.h (pa_opcodes): Use 'fX' for first register operand
209 in xmpyu.
210
e0c52e99
JL		 211 * hppa.h (pa_opcodes): Fix mask for probe and probei.
212
f2727d04
JL		 213 * hppa.h (pa_opcodes): Fix mask for depwi.
214
52d836e2
JL		 215Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
216
217 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
218 an explicit output argument.
219
90765e3a
JL		 220Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
221
222 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
223 Add a few PA2.0 loads and store variants.
224
8340b17f
ILT		 2251999-09-04 Steve Chamberlain <sac@pobox.com>
226
227 * pj.h: New file.
228
5f47d35b
AM		 2291999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
230
231 * i386.h (i386_regtab): Move %st to top of table, and split off
232 other fp reg entries.
233 (i386_float_regtab): To here.
234
1c143202
JL		 235Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
236
7d8fdb64
JL		 237 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
238 by 'f'.
239
90927b9c
JL		 240 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
241 Add supporting args.
242
1d16bf9c
JL		 243 * hppa.h: Document new completers and args.
244 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
245 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
246 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
247 pmenb and pmdis.
248
96226a68
JL		 249 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
250 hshr, hsub, mixh, mixw, permh.
251
5d4ba527
JL		 252 * hppa.h (pa_opcodes): Change completers in instructions to
253 use 'c' prefix.
254
e9fc28c6
JL		 255 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
256 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
257
1c143202
JL		 258 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
259 fnegabs to use 'I' instead of 'F'.
260
9e525108
AM		 2611999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
262
263 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
264 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
265 Alphabetically sort PIII insns.
266
e8da1bf1
DE		 267Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
268
269 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
270
7d627258
JL		 271Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
272
5696871a
JL		 273 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
274 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
275
7d627258
JL		 276 * hppa.h: Document 64 bit condition completers.
277
c5e52916
JL		 278Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
279
280 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
281
eecb386c
AM		 2821999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
283
284 * i386.h (i386_optab): Add DefaultSize modifier to all insns
285 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
286 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
287
88a380f3
JL		 288Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
289 Jeff Law <law@cygnus.com>
290
291 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
292
293 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 294
295 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
296 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
297
145cf1f0
AM		 2981999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
299
300 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
301
73826640
JL		 302Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
303
304 * hppa.h (struct pa_opcode): Add new field "flags".
305 (FLAGS_STRICT): Define.
306
b65db252
JL		 307Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
308 Jeff Law <law@cygnus.com>
309
f7fc668b
JL		 310 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
311
312 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 313
10084519
AM		 3141999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
315
316 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
317 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
318 flag to fcomi and friends.
319
cd8a80ba
JL		 320Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
321
322 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
323 integer logical instructions.
324
1fca749b
ILT		 3251999-05-28 Linus Nordberg <linus.nordberg@canit.se>
326
327 * m68k.h: Document new formats `E', `G', `H' and new places `N',
328 `n', `o'.
329
330 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
331 and new places `m', `M', `h'.
332
aa008907
JL		 333Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
334
335 * hppa.h (pa_opcodes): Add several processor specific system
336 instructions.
337
e26b85f0
JL		 338Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
339
340 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
341 "addb", and "addib" to be used by the disassembler.
342
c608c12e
AM		 3431999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
344
345 * i386.h (ReverseModrm): Remove all occurences.
346 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
347 movmskps, pextrw, pmovmskb, maskmovq.
348 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
349 ignore the data size prefix.
350
351 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
352 Mostly stolen from Doug Ledford <dledford@redhat.com>
353
45c18104
RH		 354Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
355
356 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
357
252b5132
RH		 3581999-04-14 Doug Evans <devans@casey.cygnus.com>
359
360 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
361 (CGEN_ATTR_TYPE): Update.
362 (CGEN_ATTR_MASK): Number booleans starting at 0.
363 (CGEN_ATTR_VALUE): Update.
364 (CGEN_INSN_ATTR): Update.
365
366Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
367
368 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
369 instructions.
370
371Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
372
373 * hppa.h (bb, bvb): Tweak opcode/mask.
374
375
3761999-03-22 Doug Evans <devans@casey.cygnus.com>
377
378 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
379 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
380 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
381 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
382 Delete member max_insn_size.
383 (enum cgen_cpu_open_arg): New enum.
384 (cpu_open): Update prototype.
385 (cpu_open_1): Declare.
386 (cgen_set_cpu): Delete.
387
3881999-03-11 Doug Evans <devans@casey.cygnus.com>
389
390 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
391 (CGEN_OPERAND_NIL): New macro.
392 (CGEN_OPERAND): New member `type'.
393 (@arch@_cgen_operand_table): Delete decl.
394 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
395 (CGEN_OPERAND_TABLE): New struct.
396 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
397 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
398 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
399 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
400 {get,set}_{int,vma}_operand.
401 (@arch@_cgen_cpu_open): New arg `isa'.
402 (cgen_set_cpu): Ditto.
403
404Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
405
406 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
407
4081999-02-25 Doug Evans <devans@casey.cygnus.com>
409
410 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
411 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
412 enum cgen_hw_type.
413 (CGEN_HW_TABLE): New struct.
414 (hw_table): Delete declaration.
415 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
416 to table entry to enum.
417 (CGEN_OPINST): Ditto.
418 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
419
420Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
421
422 * alpha.h (AXP_OPCODE_EV6): New.
423 (AXP_OPCODE_NOPAL): Include it.
424
4251999-02-09 Doug Evans <devans@casey.cygnus.com>
426
427 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
428 All uses updated. New members int_insn_p, max_insn_size,
429 parse_operand,insert_operand,extract_operand,print_operand,
430 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
431 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
432 extract_handlers,print_handlers.
433 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
434 (CGEN_ATTR_BOOL_OFFSET): New macro.
435 (CGEN_ATTR_MASK): Subtract it to compute bit number.
436 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
437 (cgen_opcode_handler): Renamed from cgen_base.
438 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
439 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
440 all uses updated.
441 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
442 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
443 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
444 (CGEN_OPCODE,CGEN_IBASE): New types.
445 (CGEN_INSN): Rewrite.
446 (CGEN_{ASM,DIS}_HASH*): Delete.
447 (init_opcode_table,init_ibld_table): Declare.
448 (CGEN_INSN_ATTR): New type.
449
450Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
451
452 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
453 (x_FP, d_FP, dls_FP, sldx_FP): Define.
454 Change *Suf definitions to include x and d suffixes.
455 (movsx): Use w_Suf and b_Suf.
456 (movzx): Likewise.
457 (movs): Use bwld_Suf.
458 (fld): Change ordering. Use sld_FP.
459 (fild): Add Intel Syntax equivalent of fildq.
460 (fst): Use sld_FP.
461 (fist): Use sld_FP.
462 (fstp): Use sld_FP. Add x_FP version.
463 (fistp): LLongMem version for Intel Syntax.
464 (fcom, fcomp): Use sld_FP.
465 (fadd, fiadd, fsub): Use sld_FP.
466 (fsubr): Use sld_FP.
467 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
468
4691999-01-27 Doug Evans <devans@casey.cygnus.com>
470
471 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
472 CGEN_MODE_UINT.
473
474Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
475
476 * hppa.h (bv): Fix mask.
477
4781999-01-05 Doug Evans <devans@casey.cygnus.com>
479
480 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
481 (CGEN_ATTR): Use it.
482 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
483 (CGEN_ATTR_TABLE): New member dfault.
484
4851998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
486
487 * mips.h (MIPS16_INSN_BRANCH): New.
488
489Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
490
491 The following is part of a change made by Edith Epstein
492 <eepstein@sophia.cygnus.com> as part of a project to merge in
493 changes by HP; HP did not create ChangeLog entries.
494
495 * hppa.h (completer_chars): list of chars to not put a space
496 after.
497
498Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
499
500 * i386.h (i386_optab): Permit w suffix on processor control and
501 status word instructions.
502
5031998-11-30 Doug Evans <devans@casey.cygnus.com>
504
505 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
506 (struct cgen_keyword_entry): Ditto.
507 (struct cgen_operand): Ditto.
508 (CGEN_IFLD): New typedef, with associated access macros.
509 (CGEN_IFMT): New typedef, with associated access macros.
510 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
511 (CGEN_IVALUE): New typedef.
512 (struct cgen_insn): Delete const on syntax,attrs members.
513 `format' now points to format data. Type of `value' is now
514 CGEN_IVALUE.
515 (struct cgen_opcode_table): New member ifld_table.
516
5171998-11-18 Doug Evans <devans@casey.cygnus.com>
518
519 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
520 (CGEN_OPERAND_INSTANCE): New member `attrs'.
521 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
522 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
523 (cgen_opcode_table): Update type of dis_hash fn.
524 (extract_operand): Update type of `insn_value' arg.
525
526Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
527
528 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
529
530Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
531
532 * mips.h (INSN_MULT): Added.
533
534Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
535
536 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
537
538Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
539
540 * cgen.h (CGEN_INSN_INT): New typedef.
541 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
542 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
543 (CGEN_INSN_BYTES_PTR): New typedef.
544 (CGEN_EXTRACT_INFO): New typedef.
545 (cgen_insert_fn,cgen_extract_fn): Update.
546 (cgen_opcode_table): New member `insn_endian'.
547 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
548 (insert_operand,extract_operand): Update.
549 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
550
551Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
552
553 * cgen.h (CGEN_ATTR_BOOLS): New macro.
554 (struct CGEN_HW_ENTRY): New member `attrs'.
555 (CGEN_HW_ATTR): New macro.
556 (struct CGEN_OPERAND_INSTANCE): New member `name'.
557 (CGEN_INSN_INVALID_P): New macro.
558
559Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
560
561 * hppa.h: Add "fid".
562
563Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
564
565 From Robert Andrew Dale <rob@nb.net>
566 * i386.h (i386_optab): Add AMD 3DNow! instructions.
567 (AMD_3DNOW_OPCODE): Define.
568
569Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
570
571 * d30v.h (EITHER_BUT_PREFER_MU): Define.
572
573Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
574
575 * cgen.h (cgen_insn): #if 0 out element `cdx'.
576
577Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
578
579 Move all global state data into opcode table struct, and treat
580 opcode table as something that is "opened/closed".
581 * cgen.h (CGEN_OPCODE_DESC): New type.
582 (all fns): New first arg of opcode table descriptor.
583 (cgen_set_parse_operand_fn): Add prototype.
584 (cgen_current_machine,cgen_current_endian): Delete.
585 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
586 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
587 dis_hash_table,dis_hash_table_entries.
588 (opcode_open,opcode_close): Add prototypes.
589
590 * cgen.h (cgen_insn): New element `cdx'.
591
592Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
593
594 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
595
596Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
597
598 * mn10300.h: Add "no_match_operands" field for instructions.
599 (MN10300_MAX_OPERANDS): Define.
600
601Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
602
603 * cgen.h (cgen_macro_insn_count): Declare.
604
605Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
606
607 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
608 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
609 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
610 set_{int,vma}_operand.
611
612Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
613
614 * mn10300.h: Add "machine" field for instructions.
615 (MN103, AM30): Define machine types.
616
617Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
618
619 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
620
6211998-06-18 Ulrich Drepper <drepper@cygnus.com>
622
623 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
624
625Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
626
627 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
628 and ud2b.
629 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
630 those that happen to be implemented on pentiums.
631
632Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
633
634 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
635 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
636 with Size16|IgnoreSize or Size32|IgnoreSize.
637
638Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
639
640 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
641 (REPE): Rename to REPE_PREFIX_OPCODE.
642 (i386_regtab_end): Remove.
643 (i386_prefixtab, i386_prefixtab_end): Remove.
644 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
645 of md_begin.
646 (MAX_OPCODE_SIZE): Define.
647 (i386_optab_end): Remove.
648 (sl_Suf): Define.
649 (sl_FP): Use sl_Suf.
650
651 * i386.h (i386_optab): Allow 16 bit displacement for `mov
652 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
653 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
654 data32, dword, and adword prefixes.
655 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
656 regs.
657
658Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
659
660 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
661
662 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
663 register operands, because this is a common idiom. Flag them with
664 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
665 fdivrp because gcc erroneously generates them. Also flag with a
666 warning.
667
668 * i386.h: Add suffix modifiers to most insns, and tighter operand
669 checks in some cases. Fix a number of UnixWare compatibility
670 issues with float insns. Merge some floating point opcodes, using
671 new FloatMF modifier.
672 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
673 consistency.
674
675 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
676 IgnoreDataSize where appropriate.
677
678Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
679
680 * i386.h: (one_byte_segment_defaults): Remove.
681 (two_byte_segment_defaults): Remove.
682 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
683
684Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
685
686 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
687 (cgen_hw_lookup_by_num): Declare.
688
689Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
690
691 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
692 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
693
694Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
695
696 * cgen.h (cgen_asm_init_parse): Delete.
697 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
698 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
699
700Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
701
702 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
703 (cgen_asm_finish_insn): Update prototype.
704 (cgen_insn): New members num, data.
705 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
706 dis_hash, dis_hash_table_size moved to ...
707 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
708 All uses updated. New members asm_hash_p, dis_hash_p.
709 (CGEN_MINSN_EXPANSION): New struct.
710 (cgen_expand_macro_insn): Declare.
711 (cgen_macro_insn_count): Declare.
712 (get_insn_operands): Update prototype.
713 (lookup_get_insn_operands): Declare.
714
715Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
716
717 * i386.h (i386_optab): Change iclrKludge and imulKludge to
718 regKludge. Add operands types for string instructions.
719
720Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
721
722 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
723 table.
724
725Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
726
727 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
728 for `gettext'.
729
730Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
731
732 * i386.h: Remove NoModrm flag from all insns: it's never checked.
733 Add IsString flag to string instructions.
734 (IS_STRING): Don't define.
735 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
736 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
737 (SS_PREFIX_OPCODE): Define.
738
739Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
740
741 * i386.h: Revert March 24 patch; no more LinearAddress.
742
743Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
744
745 * i386.h (i386_optab): Remove fwait (9b) from all floating point
746 instructions, and instead add FWait opcode modifier. Add short
747 form of fldenv and fstenv.
748 (FWAIT_OPCODE): Define.
749
750 * i386.h (i386_optab): Change second operand constraint of `mov
751 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
752 allow legal instructions such as `movl %gs,%esi'
753
754Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
755
756 * h8300.h: Various changes to fully bracket initializers.
757
758Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
759
760 * i386.h: Set LinearAddress for lidt and lgdt.
761
762Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
763
764 * cgen.h (CGEN_BOOL_ATTR): New macro.
765
766Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
767
768 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
769
770Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
771
772 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
773 (cgen_insn): Record syntax and format entries here, rather than
774 separately.
775
776Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
777
778 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
779
780Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
781
782 * cgen.h (cgen_insert_fn): Change type of result to const char *.
783 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
784 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
785
786Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
787
788 * cgen.h (lookup_insn): New argument alias_p.
789
790Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
791
792Fix rac to accept only a0:
793 * d10v.h (OPERAND_ACC): Split into:
794 (OPERAND_ACC0, OPERAND_ACC1) .
795 (OPERAND_GPR): Define.
796
797Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
798
799 * cgen.h (CGEN_FIELDS): Define here.
800 (CGEN_HW_ENTRY): New member `type'.
801 (hw_list): Delete decl.
802 (enum cgen_mode): Declare.
803 (CGEN_OPERAND): New member `hw'.
804 (enum cgen_operand_instance_type): Declare.
805 (CGEN_OPERAND_INSTANCE): New type.
806 (CGEN_INSN): New member `operands'.
807 (CGEN_OPCODE_DATA): Make hw_list const.
808 (get_insn_operands,lookup_insn): Add prototypes for.
809
810Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
811
812 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
813 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
814 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
815 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
816
817Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
818
819 * cgen.h: Correct typo in comment end marker.
820
821Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
822
823 * tic30.h: New file.
824
825Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
826
827 * cgen.h: Add prototypes for cgen_save_fixups(),
828 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
829 of cgen_asm_finish_insn() to return a char *.
830
831Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
832
833 * cgen.h: Formatting changes to improve readability.
834
835Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
836
837 * cgen.h (*): Clean up pass over `struct foo' usage.
838 (CGEN_ATTR): Make unsigned char.
839 (CGEN_ATTR_TYPE): Update.
840 (CGEN_ATTR_{ENTRY,TABLE}): New types.
841 (cgen_base): Move member `attrs' to cgen_insn.
842 (CGEN_KEYWORD): New member `null_entry'.
843 (CGEN_{SYNTAX,FORMAT}): New types.
844 (cgen_insn): Format and syntax separated from each other.
845
846Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
847
848 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
849 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
850 flags_{used,set} long.
851 (d30v_operand): Make flags field long.
852
853Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
854
855 * m68k.h: Fix comment describing operand types.
856
857Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
858
859 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
860 everything else after down.
861
862Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
863
864 * d10v.h (OPERAND_FLAG): Split into:
865 (OPERAND_FFLAG, OPERAND_CFLAG) .
866
867Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
868
869 * mips.h (struct mips_opcode): Changed comments to reflect new
870 field usage.
871
872Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
873
874 * mips.h: Added to comments a quick-ref list of all assigned
875 operand type characters.
876 (OP_{MASK,SH}_PERFREG): New macros.
877
878Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
879
880 * sparc.h: Add '_' and '/' for v9a asr's.
881 Patch from David Miller <davem@vger.rutgers.edu>
882
883Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
884
885 * h8300.h: Bit ops with absolute addresses not in the 8 bit
886 area are not available in the base model (H8/300).
887
888Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
889
890 * m68k.h: Remove documentation of ` operand specifier.
891
892Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
893
894 * m68k.h: Document q and v operand specifiers.
895
896Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
897
898 * v850.h (struct v850_opcode): Add processors field.
899 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
900 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
901 (PROCESSOR_V850EA): New bit constants.
902
903Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
904
905 Merge changes from Martin Hunt:
906
907 * d30v.h: Allow up to 64 control registers. Add
908 SHORT_A5S format.
909
910 * d30v.h (LONG_Db): New form for delayed branches.
911
912 * d30v.h: (LONG_Db): New form for repeati.
913
914 * d30v.h (SHORT_D2B): New form.
915
916 * d30v.h (SHORT_A2): New form.
917
918 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
919 registers are used. Needed for VLIW optimization.
920
921Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
922
923 * cgen.h: Move assembler interface section
924 up so cgen_parse_operand_result is defined for cgen_parse_address.
925 (cgen_parse_address): Update prototype.
926
927Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
928
929 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
930
931Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
932
933 * i386.h (two_byte_segment_defaults): Correct base register 5 in
934 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
935 <paubert@iram.es>.
936
937 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
938 <paubert@iram.es>.
939
940 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
941 <paubert@iram.es>.
942
943 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
944 (JUMP_ON_ECX_ZERO): Remove commented out macro.
945
946Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
947
948 * v850.h (V850_NOT_R0): New flag.
949
950Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
951
952 * v850.h (struct v850_opcode): Remove flags field.
953
954Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
955
956 * v850.h (struct v850_opcode): Add flags field.
957 (struct v850_operand): Extend meaning of 'bits' and 'shift'
958 fields.
959 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
960 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
961
962Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
963
964 * arc.h: New file.
965
966Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
967
968 * sparc.h (sparc_opcodes): Declare as const.
969
970Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
971
972 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
973 uses single or double precision floating point resources.
974 (INSN_NO_ISA, INSN_ISA1): Define.
975 (cpu specific INSN macros): Tweak into bitmasks outside the range
976 of INSN_ISA field.
977
978Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
979
980 * i386.h: Fix pand opcode.
981
982Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
983
984 * mips.h: Widen INSN_ISA and move it to a more convenient
985 bit position. Add INSN_3900.
986
987Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
988
989 * mips.h (struct mips_opcode): added new field membership.
990
991Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
992
993 * i386.h (movd): only Reg32 is allowed.
994
995 * i386.h: add fcomp and ud2. From Wayne Scott
996 <wscott@ichips.intel.com>.
997
998Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
999
1000 * i386.h: Add MMX instructions.
1001
1002Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1003
1004 * i386.h: Remove W modifier from conditional move instructions.
1005
1006Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1007
1008 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1009 with no arguments to match that generated by the UnixWare
1010 assembler.
1011
1012Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1013
1014 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1015 (cgen_parse_operand_fn): Declare.
1016 (cgen_init_parse_operand): Declare.
1017 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1018 new argument `want'.
1019 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1020 (enum cgen_parse_operand_type): New enum.
1021
1022Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1023
1024 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1025
1026Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1027
1028 * cgen.h: New file.
1029
1030Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1031
1032 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1033 fdivrp.
1034
1035Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1036
1037 * v850.h (extract): Make unsigned.
1038
1039Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1040
1041 * i386.h: Add iclr.
1042
1043Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1044
1045 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1046 take a direction bit.
1047
1048Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1049
1050 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1051
1052Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1053
1054 * sparc.h: Include <ansidecl.h>. Update function declarations to
1055 use prototypes, and to use const when appropriate.
1056
1057Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1058
1059 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1060
1061Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1062
1063 * d10v.h: Change pre_defined_registers to
1064 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1065
1066Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1067
1068 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1069 Change mips_opcodes from const array to a pointer,
1070 and change bfd_mips_num_opcodes from const int to int,
1071 so that we can increase the size of the mips opcodes table
1072 dynamically.
1073
1074Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1075
1076 * d30v.h (FLAG_X): Remove unused flag.
1077
1078Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1079
1080 * d30v.h: New file.
1081
1082Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1083
1084 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1085 (PDS_VALUE): Macro to access value field of predefined symbols.
1086 (tic80_next_predefined_symbol): Add prototype.
1087
1088Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1089
1090 * tic80.h (tic80_symbol_to_value): Change prototype to match
1091 change in function, added class parameter.
1092
1093Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1094
1095 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1096 endmask fields, which are somewhat weird in that 0 and 32 are
1097 treated exactly the same.
1098
1099Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1100
1101 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1102 rather than a constant that is 2**X. Reorder them to put bits for
1103 operands that have symbolic names in the upper bits, so they can
1104 be packed into an int where the lower bits contain the value that
1105 corresponds to that symbolic name.
1106 (predefined_symbo): Add struct.
1107 (tic80_predefined_symbols): Declare array of translations.
1108 (tic80_num_predefined_symbols): Declare size of that array.
1109 (tic80_value_to_symbol): Declare function.
1110 (tic80_symbol_to_value): Declare function.
1111
1112Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1113
1114 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1115
1116Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1117
1118 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1119 be the destination register.
1120
1121Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1122
1123 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1124 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1125 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1126 that the opcode can have two vector instructions in a single
1127 32 bit word and we have to encode/decode both.
1128
1129Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1130
1131 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1132 TIC80_OPERAND_RELATIVE for PC relative.
1133 (TIC80_OPERAND_BASEREL): New flag bit for register
1134 base relative.
1135
1136Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1137
1138 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1139
1140Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1141
1142 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1143 ":s" modifier for scaling.
1144
1145Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1146
1147 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1148 (TIC80_OPERAND_M_LI): Ditto
1149
1150Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1151
1152 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1153 (TIC80_OPERAND_CC): New define for condition code operand.
1154 (TIC80_OPERAND_CR): New define for control register operand.
1155
1156Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1157
1158 * tic80.h (struct tic80_opcode): Name changed.
1159 (struct tic80_opcode): Remove format field.
1160 (struct tic80_operand): Add insertion and extraction functions.
1161 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1162 correct ones.
1163 (FMT_*): Ditto.
1164
1165Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1166
1167 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1168 type IV instruction offsets.
1169
1170Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1171
1172 * tic80.h: New file.
1173
1174Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1175
1176 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1177
1178Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1179
1180 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1181 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1182 * v850.h: Fix comment, v850_operand not powerpc_operand.
1183
1184Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1185
1186 * mn10200.h: Flesh out structures and definitions needed by
1187 the mn10200 assembler & disassembler.
1188
1189Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1190
1191 * mips.h: Add mips16 definitions.
1192
1193Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1194
1195 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1196
1197Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1198
1199 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1200 (MN10300_OPERAND_MEMADDR): Define.
1201
1202Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1203
1204 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1205
1206Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1207
1208 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1209
1210Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1211
1212 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1213
1214Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1215
1216 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1217
1218Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1219
1220 * alpha.h: Don't include "bfd.h"; private relocation types are now
1221 negative to minimize problems with shared libraries. Organize
1222 instruction subsets by AMASK extensions and PALcode
1223 implementation.
1224 (struct alpha_operand): Move flags slot for better packing.
1225
1226Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1227
1228 * v850.h (V850_OPERAND_RELAX): New operand flag.
1229
1230Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1231
1232 * mn10300.h (FMT_*): Move operand format definitions
1233 here.
1234
1235Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1236
1237 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1238
1239Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1240
1241 * mn10300.h (mn10300_opcode): Add "format" field.
1242 (MN10300_OPERAND_*): Define.
1243
1244Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1245
1246 * mn10x00.h: Delete.
1247 * mn10200.h, mn10300.h: New files.
1248
1249Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1250
1251 * mn10x00.h: New file.
1252
1253Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1254
1255 * v850.h: Add new flag to indicate this instruction uses a PC
1256 displacement.
1257
1258Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1259
1260 * h8300.h (stmac): Add missing instruction.
1261
1262Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1263
1264 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1265 field.
1266
1267Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1268
1269 * v850.h (V850_OPERAND_EP): Define.
1270
1271 * v850.h (v850_opcode): Add size field.
1272
1273Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1274
1275 * v850.h (v850_operands): Add insert and extract fields, pointers
1276 to functions used to handle unusual operand encoding.
1277 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1278 V850_OPERAND_SIGNED): Defined.
1279
1280Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1281
1282 * v850.h (v850_operands): Add flags field.
1283 (OPERAND_REG, OPERAND_NUM): Defined.
1284
1285Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1286
1287 * v850.h: New file.
1288
1289Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1290
1291 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1292 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1293 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1294 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1295 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1296 Defined.
1297
1298Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1299
1300 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1301 a 3 bit space id instead of a 2 bit space id.
1302
1303Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1304
1305 * d10v.h: Add some additional defines to support the
1306 assembler in determining which operations can be done in parallel.
1307
1308Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1309
1310 * h8300.h (SN): Define.
1311 (eepmov.b): Renamed from "eepmov"
1312 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1313 with them.
1314
1315Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1316
1317 * d10v.h (OPERAND_SHIFT): New operand flag.
1318
1319Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1320
1321 * d10v.h: Changes for divs, parallel-only instructions, and
1322 signed numbers.
1323
1324Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1325
1326 * d10v.h (pd_reg): Define. Putting the definition here allows
1327 the assembler and disassembler to share the same struct.
1328
1329Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1330
1331 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1332 Williams <steve@icarus.com>.
1333
1334Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1335
1336 * d10v.h: New file.
1337
1338Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1339
1340 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1341
1342Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1343
1344 * m68k.h (mcf5200): New macro.
1345 Document names of coldfire control registers.
1346
1347Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1348
1349 * h8300.h (SRC_IN_DST): Define.
1350
1351 * h8300.h (UNOP3): Mark the register operand in this insn
1352 as a source operand, not a destination operand.
1353 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1354 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1355 register operand with SRC_IN_DST.
1356
1357Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1358
1359 * alpha.h: New file.
1360
1361Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1362
1363 * rs6k.h: Remove obsolete file.
1364
1365Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1366
1367 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1368 fdivp, and fdivrp. Add ffreep.
1369
1370Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1371
1372 * h8300.h: Reorder various #defines for readability.
1373 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1374 (BITOP): Accept additional (unused) argument. All callers changed.
1375 (EBITOP): Likewise.
1376 (O_LAST): Bump.
1377 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1378
1379 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1380 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1381 (BITOP, EBITOP): Handle new H8/S addressing modes for
1382 bit insns.
1383 (UNOP3): Handle new shift/rotate insns on the H8/S.
1384 (insns using exr): New instructions.
1385 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1386
1387Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1388
1389 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1390 was incorrect.
1391
1392Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1393
1394 * h8300.h (START): Remove.
1395 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1396 and mov.l insns that can be relaxed.
1397
1398Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1399
1400 * i386.h: Remove Abs32 from lcall.
1401
1402Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1403
1404 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1405 (SLCPOP): New macro.
1406 Mark X,Y opcode letters as in use.
1407
1408Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1409
1410 * sparc.h (F_FLOAT, F_FBR): Define.
1411
1412Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1413
1414 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1415 from all insns.
1416 (ABS8SRC,ABS8DST): Add ABS8MEM.
1417 (add.l): Fix reg+reg variant.
1418 (eepmov.w): Renamed from eepmovw.
1419 (ldc,stc): Fix many cases.
1420
1421Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1422
1423 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1424
1425Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1426
1427 * sparc.h (O): Mark operand letter as in use.
1428
1429Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1430
1431 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1432 Mark operand letters uU as in use.
1433
1434Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1435
1436 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1437 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1438 (SPARC_OPCODE_SUPPORTED): New macro.
1439 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1440 (F_NOTV9): Delete.
1441
1442Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1443
1444 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1445 declaration consistent with return type in definition.
1446
1447Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1448
1449 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1450
1451Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1452
1453 * i386.h (i386_regtab): Add 80486 test registers.
1454
1455Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1456
1457 * i960.h (I_HX): Define.
1458 (i960_opcodes): Add HX instruction.
1459
1460Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1461
1462 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1463 and fclex.
1464
1465Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1466
1467 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1468 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1469 (bfd_* defines): Delete.
1470 (sparc_opcode_archs): Replaces architecture_pname.
1471 (sparc_opcode_lookup_arch): Declare.
1472 (NUMOPCODES): Delete.
1473
1474Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1475
1476 * sparc.h (enum sparc_architecture): Add v9a.
1477 (ARCHITECTURES_CONFLICT_P): Update.
1478
1479Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1480
1481 * i386.h: Added Pentium Pro instructions.
1482
1483Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1484
1485 * m68k.h: Document new 'W' operand place.
1486
1487Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1488
1489 * hppa.h: Add lci and syncdma instructions.
1490
1491Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1492
1493 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1494 instructions.
1495
1496Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1497
1498 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1499 assembler's -mcom and -many switches.
1500
1501Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1502
1503 * i386.h: Fix cmpxchg8b extension opcode description.
1504
1505Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1506
1507 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1508 and register cr4.
1509
1510Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1511
1512 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1513
1514Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1515
1516 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1517
1518Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1519
1520 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1521
1522Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1523
1524 * m68kmri.h: Remove.
1525
1526 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1527 declarations. Remove F_ALIAS and flag field of struct
1528 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1529 int. Make name and args fields of struct m68k_opcode const.
1530
1531Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1532
1533 * sparc.h (F_NOTV9): Define.
1534
1535Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1536
1537 * mips.h (INSN_4010): Define.
1538
1539Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1540
1541 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1542
1543 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1544 * m68k.h: Fix argument descriptions of coprocessor
1545 instructions to allow only alterable operands where appropriate.
1546 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1547 (m68k_opcode_aliases): Add more aliases.
1548
1549Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1550
1551 * m68k.h: Added explcitly short-sized conditional branches, and a
1552 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1553 svr4-based configurations.
1554
1555Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1556
1557 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1558 * i386.h: added missing Data16/Data32 flags to a few instructions.
1559
1560Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1561
1562 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1563 (OP_MASK_BCC, OP_SH_BCC): Define.
1564 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1565 (OP_MASK_CCC, OP_SH_CCC): Define.
1566 (INSN_READ_FPR_R): Define.
1567 (INSN_RFE): Delete.
1568
1569Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1570
1571 * m68k.h (enum m68k_architecture): Deleted.
1572 (struct m68k_opcode_alias): New type.
1573 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1574 matching constraints, values and flags. As a side effect of this,
1575 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1576 as I know were never used, now may need re-examining.
1577 (numopcodes): Now const.
1578 (m68k_opcode_aliases, numaliases): New variables.
1579 (endop): Deleted.
1580 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1581 m68k_opcode_aliases; update declaration of m68k_opcodes.
1582
1583Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1584
1585 * hppa.h (delay_type): Delete unused enumeration.
1586 (pa_opcode): Replace unused delayed field with an architecture
1587 field.
1588 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1589
1590Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1591
1592 * mips.h (INSN_ISA4): Define.
1593
1594Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1595
1596 * mips.h (M_DLA_AB, M_DLI): Define.
1597
1598Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1599
1600 * hppa.h (fstwx): Fix single-bit error.
1601
1602Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1603
1604 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1605
1606Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1607
1608 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1609 debug registers. From Charles Hannum (mycroft@netbsd.org).
1610
1611Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1612
1613 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1614 i386 support:
1615 * i386.h (MOV_AX_DISP32): New macro.
1616 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1617 of several call/return instructions.
1618 (ADDR_PREFIX_OPCODE): New macro.
1619
1620Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1621
1622 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1623
1624 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1625 it pointer to const char;
1626 (struct vot, field `name'): ditto.
1627
1628Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1629
1630 * vax.h: Supply and properly group all values in end sentinel.
1631
1632Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1633
1634 * mips.h (INSN_ISA, INSN_4650): Define.
1635
1636Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1637
1638 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1639 systems with a separate instruction and data cache, such as the
1640 29040, these instructions take an optional argument.
1641
1642Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1643
1644 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1645 INSN_TRAP.
1646
1647Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1648
1649 * mips.h (INSN_STORE_MEMORY): Define.
1650
1651Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1652
1653 * sparc.h: Document new operand type 'x'.
1654
1655Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1656
1657 * i960.h (I_CX2): New instruction category. It includes
1658 instructions available on Cx and Jx processors.
1659 (I_JX): New instruction category, for JX-only instructions.
1660 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1661 Jx-only instructions, in I_JX category.
1662
1663Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1664
1665 * ns32k.h (endop): Made pointer const too.
1666
1667Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1668
1669 * ns32k.h: Drop Q operand type as there is no correct use
1670 for it. Add I and Z operand types which allow better checking.
1671
1672Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1673
1674 * h8300.h (xor.l) :fix bit pattern.
1675 (L_2): New size of operand.
1676 (trapa): Use it.
1677
1678Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1679
1680 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1681
1682Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1683
1684 * sparc.h: Include v9 definitions.
1685
1686Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1687
1688 * m68k.h (m68060): Defined.
1689 (m68040up, mfloat, mmmu): Include it.
1690 (struct m68k_opcode): Widen `arch' field.
1691 (m68k_opcodes): Updated for M68060. Removed comments that were
1692 instructions commented out by "JF" years ago.
1693
1694Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1695
1696 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1697 add a one-bit `flags' field.
1698 (F_ALIAS): New macro.
1699
1700Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1701
1702 * h8300.h (dec, inc): Get encoding right.
1703
1704Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1705
1706 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1707 a flag instead.
1708 (PPC_OPERAND_SIGNED): Define.
1709 (PPC_OPERAND_SIGNOPT): Define.
1710
1711Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1712
1713 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1714 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1715
1716Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1717
1718 * i386.h: Reverse last change. It'll be handled in gas instead.
1719
1720Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1721
1722 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1723 slower on the 486 and used the implicit shift count despite the
1724 explicit operand. The one-operand form is still available to get
1725 the shorter form with the implicit shift count.
1726
1727Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1728
1729 * hppa.h: Fix typo in fstws arg string.
1730
1731Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1732
1733 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1734
1735Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1736
1737 * ppc.h (PPC_OPCODE_601): Define.
1738
1739Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1740
1741 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1742 (so we can determine valid completers for both addb and addb[tf].)
1743
1744 * hppa.h (xmpyu): No floating point format specifier for the
1745 xmpyu instruction.
1746
1747Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1748
1749 * ppc.h (PPC_OPERAND_NEXT): Define.
1750 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1751 (struct powerpc_macro): Define.
1752 (powerpc_macros, powerpc_num_macros): Declare.
1753
1754Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1755
1756 * ppc.h: New file. Header file for PowerPC opcode table.
1757
1758Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1759
1760 * hppa.h: More minor template fixes for sfu and copr (to allow
1761 for easier disassembly).
1762
1763 * hppa.h: Fix templates for all the sfu and copr instructions.
1764
1765Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1766
1767 * i386.h (push): Permit Imm16 operand too.
1768
1769Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1770
1771 * h8300.h (andc): Exists in base arch.
1772
1773Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1774
1775 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1776 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1777
1778Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1779
1780 * hppa.h: Add FP quadword store instructions.
1781
1782Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1783
1784 * mips.h: (M_J_A): Added.
1785 (M_LA): Removed.
1786
1787Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1788
1789 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1790 <mellon@pepper.ncd.com>.
1791
1792Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1793
1794 * hppa.h: Immediate field in probei instructions is unsigned,
1795 not low-sign extended.
1796
1797Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1798
1799 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1800
1801Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1802
1803 * i386.h: Add "fxch" without operand.
1804
1805Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1806
1807 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1808
1809Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1810
1811 * hppa.h: Add gfw and gfr to the opcode table.
1812
1813Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1814
1815 * m88k.h: extended to handle m88110.
1816
1817Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1818
1819 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1820 addresses.
1821
1822Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1823
1824 * i960.h (i960_opcodes): Properly bracket initializers.
1825
1826Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1827
1828 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1829
1830Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1831
1832 * m68k.h (two): Protect second argument with parentheses.
1833
1834Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1835
1836 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1837 Deleted old in/out instructions in "#if 0" section.
1838
1839Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1840
1841 * i386.h (i386_optab): Properly bracket initializers.
1842
1843Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1844
1845 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1846 Jeff Law, law@cs.utah.edu).
1847
1848Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1849
1850 * i386.h (lcall): Accept Imm32 operand also.
1851
1852Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1853
1854 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1855 (M_DABS): Added.
1856
1857Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1858
1859 * mips.h (INSN_*): Changed values. Removed unused definitions.
1860 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1861 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1862 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1863 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1864 (M_*): Added new values for r6000 and r4000 macros.
1865 (ANY_DELAY): Removed.
1866
1867Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1868
1869 * mips.h: Added M_LI_S and M_LI_SS.
1870
1871Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1872
1873 * h8300.h: Get some rare mov.bs correct.
1874
1875Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1876
1877 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1878 been included.
1879
1880Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1881
1882 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1883 jump instructions, for use in disassemblers.
1884
1885Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1886
1887 * m88k.h: Make bitfields just unsigned, not unsigned long or
1888 unsigned short.
1889
1890Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1891
1892 * hppa.h: New argument type 'y'. Use in various float instructions.
1893
1894Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1895
1896 * hppa.h (break): First immediate field is unsigned.
1897
1898 * hppa.h: Add rfir instruction.
1899
1900Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1901
1902 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1903
1904Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1905
1906 * mips.h: Reworked the hazard information somewhat, and fixed some
1907 bugs in the instruction hazard descriptions.
1908
1909Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1910
1911 * m88k.h: Corrected a couple of opcodes.
1912
1913Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1914
1915 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1916 new version includes instruction hazard information, but is
1917 otherwise reasonably similar.
1918
1919Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1920
1921 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1922
1923Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1924
1925 Patches from Jeff Law, law@cs.utah.edu:
1926 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1927 Make the tables be the same for the following instructions:
1928 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1929 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1930 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1931 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1932 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1933 "fcmp", and "ftest".
1934
1935 * hppa.h: Make new and old tables the same for "break", "mtctl",
1936 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1937 Fix typo in last patch. Collapse several #ifdefs into a
1938 single #ifdef.
1939
1940 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1941 of the comments up-to-date.
1942
1943 * hppa.h: Update "free list" of letters and update
1944 comments describing each letter's function.
1945
1946Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1947
1948 * h8300.h: checkpoint, includes H8/300-H opcodes.
1949
1950Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1951
1952 * Patches from Jeffrey Law <law@cs.utah.edu>.
1953 * hppa.h: Rework single precision FP
1954 instructions so that they correctly disassemble code
1955 PA1.1 code.
1956
1957Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1958
1959 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1960 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1961
1962Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1963
1964 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1965 gdb will define it for now.
1966
1967Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1968
1969 * sparc.h: Don't end enumerator list with comma.
1970
1971Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1972
1973 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1974 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1975 ("bc2t"): Correct typo.
1976 ("[ls]wc[023]"): Use T rather than t.
1977 ("c[0123]"): Define general coprocessor instructions.
1978
1979Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1980
1981 * m68k.h: Move split point for gcc compilation more towards
1982 middle.
1983
1984Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1985
1986 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1987 simply wrong, ics, rfi, & rfsvc were missing).
1988 Add "a" to opr_ext for "bb". Doc fix.
1989
1990Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1991
1992 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1993 * mips.h: Add casts, to suppress warnings about shifting too much.
1994 * m68k.h: Document the placement code '9'.
1995
1996Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1997
1998 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1999 allows callers to break up the large initialized struct full of
2000 opcodes into two half-sized ones. This permits GCC to compile
2001 this module, since it takes exponential space for initializers.
2002 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2003
2004Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2005
2006 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2007 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2008 initialized structs in it.
2009
2010Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2011
2012 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2013 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2014 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2015
2016Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2017
2018 * mips.h: document "i" and "j" operands correctly.
2019
2020Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2021
2022 * mips.h: Removed endianness dependency.
2023
2024Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2025
2026 * h8300.h: include info on number of cycles per instruction.
2027
2028Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2029
2030 * hppa.h: Move handy aliases to the front. Fix masks for extract
2031 and deposit instructions.
2032
2033Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2034
2035 * i386.h: accept shld and shrd both with and without the shift
2036 count argument, which is always %cl.
2037
2038Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2039
2040 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2041 (one_byte_segment_defaults, two_byte_segment_defaults,
2042 i386_prefixtab_end): Ditto.
2043
2044Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2045
2046 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2047 for operand 2; from John Carr, jfc@dsg.dec.com.
2048
2049Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2050
2051 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2052 always use 16-bit offsets. Makes calculated-size jump tables
2053 feasible.
2054
2055Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2056
2057 * i386.h: Fix one-operand forms of in* and out* patterns.
2058
2059Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2060
2061 * m68k.h: Added CPU32 support.
2062
2063Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2064
2065 * mips.h (break): Disassemble the argument. Patch from
2066 jonathan@cs.stanford.edu (Jonathan Stone).
2067
2068Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2069
2070 * m68k.h: merged Motorola and MIT syntax.
2071
2072Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2073
2074 * m68k.h (pmove): make the tests less strict, the 68k book is
2075 wrong.
2076
2077Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2078
2079 * m68k.h (m68ec030): Defined as alias for 68030.
2080 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2081 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2082 them. Tightened description of "fmovex" to distinguish it from
2083 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2084 up descriptions that claimed versions were available for chips not
2085 supporting them. Added "pmovefd".
2086
2087Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2088
2089 * m68k.h: fix where the . goes in divull
2090
2091Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2092
2093 * m68k.h: the cas2 instruction is supposed to be written with
2094 indirection on the last two operands, which can be either data or
2095 address registers. Added a new operand type 'r' which accepts
2096 either register type. Added new cases for cas2l and cas2w which
2097 use them. Corrected masks for cas2 which failed to recognize use
2098 of address register.
2099
2100Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2101
2102 * m68k.h: Merged in patches (mostly m68040-specific) from
2103 Colin Smith <colin@wrs.com>.
2104
2105 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2106 base). Also cleaned up duplicates, re-ordered instructions for
2107 the sake of dis-assembling (so aliases come after standard names).
2108 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2109
2110Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2111
2112 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2113 all missing .s
2114
2115Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2116
2117 * sparc.h: Moved tables to BFD library.
2118
2119 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2120
2121Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2122
2123 * h8300.h: Finish filling in all the holes in the opcode table,
2124 so that the Lucid C compiler can digest this as well...
2125
2126Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2127
2128 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2129 Fix opcodes on various sizes of fild/fist instructions
2130 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2131 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2132
2133Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2134
2135 * h8300.h: Fill in all the holes in the opcode table so that the
2136 losing HPUX C compiler can digest this...
2137
2138Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2139
2140 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2141 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2142
2143Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2144
2145 * sparc.h: Add new architecture variant sparclite; add its scan
2146 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2147
2148Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2149
2150 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2151 fy@lucid.com).
2152
2153Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2154
2155 * rs6k.h: New version from IBM (Metin).
2156
2157Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2158
2159 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2160 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2161
2162Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2163
2164 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2165
2166Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2167
2168 * m68k.h (one, two): Cast macro args to unsigned to suppress
2169 complaints from compiler and lint about integer overflow during
2170 shift.
2171
2172Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2173
2174 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2175
2176Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2177
2178 * mips.h: Make bitfield layout depend on the HOST compiler,
2179 not on the TARGET system.
2180
2181Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2182
2183 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2184 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2185 <TRANLE@INTELLICORP.COM>.
2186
2187Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2188
2189 * h8300.h: turned op_type enum into #define list
2190
2191Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2192
2193 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2194 similar instructions -- they've been renamed to "fitoq", etc.
2195 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2196 number of arguments.
2197 * h8300.h: Remove extra ; which produces compiler warning.
2198
2199Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2200
2201 * sparc.h: fix opcode for tsubcctv.
2202
2203Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2204
2205 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2206
2207Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2208
2209 * sparc.h (nop): Made the 'lose' field be even tighter,
2210 so only a standard 'nop' is disassembled as a nop.
2211
2212Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2213
2214 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2215 disassembled as a nop.
2216
2217Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2218
2219 * sparc.h: fix a typo.
2220
2221Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2222
2223 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2224 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2225 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2226
2227\f
2228Local Variables:
2229version-control: never
2230End:
GDB Binutils - Deliverables
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