2003-09-29 Andrew Cagney <cagney@redhat.com>
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
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12003-09-04 Nick Clifton <nickc@redhat.com>
2
3 * v850.h (PROCESSOR_V850E1): Define.
4
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52003-08-19 Alan Modra <amodra@bigpond.net.au>
6
7 * ppc.h (PPC_OPCODE_440): Define. Formatting. Use hex for other
8 PPC_OPCODE_* defines.
9
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102003-08-16 Jason Eckhardt <jle@rice.edu>
11
12 * i860.h (fmov.ds): Expand as famov.ds.
13 (fmov.sd): Expand as famov.sd.
14 (pfmov.ds): Expand as pfamov.ds.
15
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162003-08-07 Michael Meissner <gnu@the-meissners.org>
17
18 * cgen.h: Remove PARAM macro usage in all prototypes.
19 (CGEN_EXTRACT_INFO): Use void * instead of PTR.
20 (cgen_print_fn): Ditto.
21 (CGEN_HW_ENTRY): Ditto.
22 (CGEN_MAYBE_MULTI_IFLD): Ditto.
23 (struct cgen_insn): Ditto.
24 (CGEN_CPU_TABLE): Ditto.
25
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262003-08-07 Alan Modra <amodra@bigpond.net.au>
27
28 * alpha.h: Remove PARAMS macro.
29 * arc.h: Likewise.
30 * d10v.h: Likewise.
31 * d30v.h: Likewise.
32 * i370.h: Likewise.
33 * or32.h: Likewise.
34 * pj.h: Likewise.
35 * ppc.h: Likewise.
36 * sparc.h: Likewise.
37 * tic80.h: Likewise.
38 * v850.h: Likewise.
39
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402003-07-18 Michael Snyder <msnyder@redhat.com>
41
42 * include/opcode/h8sx.h (DO_MOVA1, DO_MOVA2): Reformatting.
43
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442003-07-15 Richard Sandiford <rsandifo@redhat.com>
45
46 * mips.h (CPU_RM7000): New macro.
47 (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
48
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492003-07-09 Alexandre Oliva <aoliva@redhat.com>
50
51 2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
52 * mn10300.h (AM33_2): Renamed from AM33.
53 2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
54 * mn10300.h (AM332, FMT_D3): Defined.
55 (MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise.
56 (MN10300_OPERAND_FPCR): Likewise.
57
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582003-07-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
59
60 * s390.h (s390_opcode_cpu_val): Add enum for cpu type z990.
61
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622003-06-25 Richard Sandiford <rsandifo@redhat.com>
63
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64 * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
65 (IMM8U, IMM8U_NS): Define.
66 (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
67
682003-06-25 Richard Sandiford <rsandifo@redhat.com>
69
70 * h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and
71 mov.l ERs,@(dd:32,ERd) entries.
8d1e520a 72
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732003-06-23 H.J. Lu <hongjiu.lu@intel.com>
74
75 * i386.h (i386_optab): Support Intel Precott New Instructions.
76
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772003-06-10 Gary Hade <garyhade@us.ibm.com>
78
79 * ppc.h (PPC_OPERAND_DQ): Define.
80
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812003-06-10 Richard Sandiford <rsandifo@redhat.com>
82
83 * h8300.h (IMM4_NS, IMM8_NS): New.
84 (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
85 Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
86
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872003-06-03 Michael Snyder <msnyder@redhat.com>
88
50649e42 89 * h8300.h (enum h8_model): Add AV_H8S to distinguish from H8H.
adadcc0c 90 (ldc): Split ccr ops from exr ops (which are only available
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91 on H8S or H8SX).
92 (stc): Ditto.
93 (andc, orc, xorc): Ditto.
94 (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
95
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962003-06-03 Michael Snyder <msnyder@redhat.com>
97 and Bernd Schmidt <bernds@redhat.com>
98 and Alexandre Oliva <aoliva@redhat.com>
99 * h8300.h: Add support for h8300sx instruction set.
100
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1012003-05-23 Jason Eckhardt <jle@rice.edu>
102
103 * i860.h (expand_type): Add XP_ONLY.
104 (scyc.b): New XP instruction.
105 (ldio.l): Likewise.
106 (ldio.s): Likewise.
107 (ldio.b): Likewise.
108 (ldint.l): Likewise.
109 (ldint.s): Likewise.
110 (ldint.b): Likewise.
111 (stio.l): Likewise.
112 (stio.s): Likewise.
113 (stio.b): Likewise.
114 (pfld.q): Likewise.
115
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1162003-05-20 Jason Eckhardt <jle@rice.edu>
117
14218d5f 118 * i860.h (flush): Set lower 3 bits properly and use 'L'
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119 for the immediate operand type instead of 'i'.
120
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1212003-05-20 Jason Eckhardt <jle@rice.edu>
122
14218d5f 123 * i860.h (fzchks): Both S and R bits must be set.
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124 (pfzchks): Likewise.
125 (faddp): Likewise.
126 (pfaddp): Likewise.
127 (fix.ss): Remove (invalid instruction).
128 (pfix.ss): Likewise.
129 (ftrunc.ss): Likewise.
130 (pftrunc.ss): Likewise.
131
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1322003-05-18 Jason Eckhardt <jle@rice.edu>
133
134 * i860.h (form, pform): Add missing .dd suffix.
135
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1362003-05-13 Stephane Carrez <stcarrez@nerim.fr>
137
138 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
139
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1402003-04-07 Michael Snyder <msnyder@redhat.com>
141
142 * h8300.h (ldc/stc): Fix up src/dst swaps.
143
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1442003-04-09 J. Grant <jg-binutils@jguk.org>
145
146 * mips.h: Correct comment typo.
147
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1482003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
149
150 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
151 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
152 (s390_opcode): Remove architecture. Add modes and min_cpu.
153
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1542003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
155
156 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
157 processing.
158
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1592003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
160
161 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
162
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1632003-01-23 Alan Modra <amodra@bigpond.net.au>
164
165 * m68hc11.h (cpu6812s): Define.
166
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1672003-01-07 Chris Demetriou <cgd@broadcom.com>
168
169 * mips.h: Fix missing space in comment.
170 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
171 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
172 by four bits.
173
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1742003-01-02 Chris Demetriou <cgd@broadcom.com>
175
176 * mips.h: Update copyright years to include 2002 (which had
177 been missed previously) and 2003. Make comments about "+A",
178 "+B", and "+C" operand types more descriptive.
179
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1802002-12-31 Chris Demetriou <cgd@broadcom.com>
181
182 * mips.h: Note that the "+D" operand type name is now used.
183
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1842002-12-30 Chris Demetriou <cgd@broadcom.com>
185
186 * mips.h: Document "+" as the start of two-character operand
187 type names, and add new "K", "+A", "+B", and "+C" operand types.
188 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
189 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
190 defines.
191
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1922002-12-24 Dmitry Diky <diwil@mail.ru>
193
194 * msp430.h: New file. Defines msp430 opcodes.
195
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1962002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
197
198 * h8300.h: Added some more pseudo opcodes for system call
199 processing.
200
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2012002-12-19 Chris Demetriou <cgd@broadcom.com>
202
203 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
204 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
205 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
206 (OP_OP_SDC2, OP_OP_SDC3): Define.
207
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2082002-12-16 Alan Modra <amodra@bigpond.net.au>
209
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210 * hppa.h (completer_chars): #if 0 out.
211
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212 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
213 "default_args".
214 (struct not_wot): Constify "args".
215 (struct not): Constify "name".
216 (numopcodes): Delete.
217 (endop): Delete.
218
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2192002-12-13 Alan Modra <amodra@bigpond.net.au>
220
221 * pj.h (pj_opc_info_t): Add union.
222
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2232002-12-04 David Mosberger <davidm@hpl.hp.com>
224
225 * ia64.h: Fix copyright message.
226 (IA64_OPND_AR_CSD): New operand kind.
227
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2282002-12-03 Richard Henderson <rth@redhat.com>
229
230 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
231
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2322002-12-03 Alan Modra <amodra@bigpond.net.au>
233
234 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
235 Constify "leaf" and "multi".
236
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2372002-11-19 Klee Dienes <kdienes@apple.com>
238
239 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
240 fields.
241 (h8_opcodes). Modify initializer and initializer macros to no
242 longer initialize the removed fields.
adadcc0c 243
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2442002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
245
246 * tic4x.h (c4x_insts): Fixed LDHI constraint
247
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2482002-11-18 Klee Dienes <kdienes@apple.com>
249
250 * h8300.h (h8_opcode): Remove 'length' field.
251 (h8_opcodes): Mark as 'const' (both the declaration and
252 definition). Modify initializer and initializer macros to no
253 longer initialize the length field.
254
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2552002-11-18 Klee Dienes <kdienes@apple.com>
256
257 * arc.h (arc_ext_opcodes): Declare as extern.
258 (arc_ext_operands): Declare as extern.
259 * i860.h (i860_opcodes): Declare as const.
260
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2612002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
262
263 * tic4x.h: File reordering. Added enhanced opcodes.
264
2652002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
266
267 * tic4x.h: Major rewrite of entire file. Define instruction
268 classes, and put each instruction into a class.
269
2702002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
271
272 * tic4x.h: Added new opcodes and corrected some bugs. Add support
273 for new DSP types.
274
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2752002-10-14 Alan Modra <amodra@bigpond.net.au>
276
277 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
278
701b80cd 2792002-09-30 Gavin Romig-Koch <gavin@redhat.com>
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280 Ken Raeburn <raeburn@cygnus.com>
281 Aldy Hernandez <aldyh@redhat.com>
282 Eric Christopher <echristo@redhat.com>
283 Richard Sandiford <rsandifo@redhat.com>
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284
285 * mips.h: Update comment for new opcodes.
286 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
287 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
288 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
289 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
290 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
291 Don't match CPU_R4111 with INSN_4100.
292
0449635d 2932002-08-19 Elena Zannoni <ezannoni@redhat.com>
0449635d 294
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295 From matthew green <mrg@redhat.com>
296
297 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
0449635d 298 instructions.
adadcc0c 299 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
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300 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
301 e500x2 Integer select, branch locking, performance monitor,
302 cache locking and machine check APUs, respectively.
303 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
304 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
305
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3062002-08-13 Stephane Carrez <stcarrez@nerim.fr>
307
308 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
309 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
310 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
311 memory banks.
312 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
313
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3142002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
315
316 * mips.h (INSN_MIPS16): New define.
317
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3182002-07-08 Alan Modra <amodra@bigpond.net.au>
319
320 * i386.h: Remove IgnoreSize from movsx and movzx.
321
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3222002-06-08 Alan Modra <amodra@bigpond.net.au>
323
324 * a29k.h: Replace CONST with const.
325 (CONST): Don't define.
326 * convex.h: Replace CONST with const.
327 (CONST): Don't define.
328 * dlx.h: Replace CONST with const.
329 * or32.h (CONST): Don't define.
330
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3312002-05-30 Chris G. Demetriou <cgd@broadcom.com>
332
333 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
334 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
335 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
336 (INSN_MDMX): New constants, for MDMX support.
337 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
338
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3392002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
340
341 * dlx.h: New file.
342
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3432002-05-25 Alan Modra <amodra@bigpond.net.au>
344
345 * ia64.h: Use #include "" instead of <> for local header files.
346 * sparc.h: Likewise.
347
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3482002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
349
350 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
351
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3522002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
353
adadcc0c 354 * h8300.h: Corrected defs of all control regs
b9c9142c 355 and eepmov instr.
adadcc0c 356
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3572002-04-11 Alan Modra <amodra@bigpond.net.au>
358
359 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 360 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 361
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3622002-03-15 Chris G. Demetriou <cgd@broadcom.com>
363
364 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
365 instructions.
366 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
367 may be passed along with the ISA bitmask.
368
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3692002-03-05 Paul Koning <pkoning@equallogic.com>
370
371 * pdp11.h: Add format codes for float instruction formats.
372
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3732002-02-25 Alan Modra <amodra@bigpond.net.au>
374
375 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
376
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377Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
378
379 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
380
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381Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
382
383 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
384 (xchg): Fix.
385 (in, out): Disable 64bit operands.
386 (call, jmp): Avoid REX prefixes.
387 (jcxz): Prohibit in 64bit mode
388 (jrcxz, loop): Add 64bit variants.
389 (movq): Fix patterns.
390 (movmskps, pextrw, pinstrw): Add 64bit variants.
391
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3922002-01-31 Ivan Guzvinec <ivang@opencores.org>
393
394 * or32.h: New file.
395
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3962002-01-22 Graydon Hoare <graydon@redhat.com>
397
398 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
399 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
400
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4012002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
402
403 * h8300.h: Comment typo fix.
404
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4052002-01-03 matthew green <mrg@redhat.com>
406
407 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
408 (PPC_OPCODE_BOOKE64): Likewise.
409
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410Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
411
412 * hppa.h (call, ret): Move to end of table.
413 (addb, addib): PA2.0 variants should have been PA2.0W.
414 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
415 happy.
416 (fldw, fldd, fstw, fstd, bb): Likewise.
417 (short loads/stores): Tweak format specifier slightly to keep
418 disassembler happy.
419 (indexed loads/stores): Likewise.
420 (absolute loads/stores): Likewise.
421
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4222001-12-04 Alexandre Oliva <aoliva@redhat.com>
423
424 * d10v.h (OPERAND_NOSP): New macro.
425
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4262001-11-29 Alexandre Oliva <aoliva@redhat.com>
427
428 * d10v.h (OPERAND_SP): New macro.
429
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4302001-11-15 Alan Modra <amodra@bigpond.net.au>
431
432 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
433
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4342001-11-11 Timothy Wall <twall@alum.mit.edu>
435
436 * tic54x.h: Revise opcode layout; don't really need a separate
437 structure for parallel opcodes.
438
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4392001-11-13 Zack Weinberg <zack@codesourcery.com>
440 Alan Modra <amodra@bigpond.net.au>
441
442 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
443 accept WordReg.
444
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4452001-11-04 Chris Demetriou <cgd@broadcom.com>
446
447 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
448
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4492001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
450
451 * mmix.h: New file.
452
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4532001-10-18 Chris Demetriou <cgd@broadcom.com>
454
455 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
456 of the expression, to make source code merging easier.
457
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4582001-10-17 Chris Demetriou <cgd@broadcom.com>
459
460 * mips.h: Sort coprocessor instruction argument characters
461 in comment, add a few more words of description for "H".
462
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4632001-10-17 Chris Demetriou <cgd@broadcom.com>
464
465 * mips.h (INSN_SB1): New cpu-specific instruction bit.
466 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
467 if cpu is CPU_SB1.
468
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4692001-10-17 matthew green <mrg@redhat.com>
470
471 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
472
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4732001-10-12 matthew green <mrg@redhat.com>
474
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475 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
476 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
477 instructions, respectively.
418c1742 478
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4792001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
480
481 * v850.h: Remove spurious comment.
482
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4832001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
484
485 * h8300.h: Fix compile time warning messages
486
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4872001-09-04 Richard Henderson <rth@redhat.com>
488
489 * alpha.h (struct alpha_operand): Pack elements into bitfields.
490
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4912001-08-31 Eric Christopher <echristo@redhat.com>
492
493 * mips.h: Remove CPU_MIPS32_4K.
494
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4952001-08-27 Torbjorn Granlund <tege@swox.com>
496
497 * ppc.h (PPC_OPERAND_DS): Define.
498
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4992001-08-25 Andreas Jaeger <aj@suse.de>
500
501 * d30v.h: Fix declaration of reg_name_cnt.
502
503 * d10v.h: Fix declaration of d10v_reg_name_cnt.
504
505 * arc.h: Add prototypes from opcodes/arc-opc.c.
506
99c14723
TS
5072001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
508
509 * mips.h (INSN_10000): Define.
510 (OPCODE_IS_MEMBER): Check for INSN_10000.
511
11b37b7b
AM
5122001-08-10 Alan Modra <amodra@one.net.au>
513
514 * ppc.h: Revert 2001-08-08.
515
3b16e843
NC
5162001-08-10 Richard Sandiford <rsandifo@redhat.com>
517
518 * mips.h (INSN_GP32): Remove.
519 (OPCODE_IS_MEMBER): Remove gp32 parameter.
520 (M_MOVE): New macro identifier.
521
0f1bac05
AM
5222001-08-08 Alan Modra <amodra@one.net.au>
523
524 1999-10-25 Torbjorn Granlund <tege@swox.com>
525 * ppc.h (struct powerpc_operand): New field `reloc'.
526
3b16e843
NC
5272001-08-01 Aldy Hernandez <aldyh@redhat.com>
528
529 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
530
5312001-07-12 Jeff Johnston <jjohnstn@redhat.com>
532
533 * cgen.h (CGEN_INSN): Add regex support.
534 (build_insn_regex): Declare.
535
81f6038f
FCE
5362001-07-11 Frank Ch. Eigler <fche@redhat.com>
537
538 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
539 (cgen_cpu_desc): Ditto.
540
32cfffe3
BE
5412001-07-07 Ben Elliston <bje@redhat.com>
542
543 * m88k.h: Clean up and reformat. Remove unused code.
544
3e890047
GK
5452001-06-14 Geoffrey Keating <geoffk@redhat.com>
546
547 * cgen.h (cgen_keyword): Add nonalpha_chars field.
548
d1cf510e
NC
5492001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
550
551 * mips.h (CPU_R12000): Define.
552
e281c457
JH
5532001-05-23 John Healy <jhealy@redhat.com>
554
555 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 556
aa5f19f2
NC
5572001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
558
559 * mips.h (INSN_ISA_MASK): Define.
560
67d6227d
AM
5612001-05-12 Alan Modra <amodra@one.net.au>
562
563 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
564 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
565 and use InvMem as these insns must have register operands.
566
992aaec9
AM
5672001-05-04 Alan Modra <amodra@one.net.au>
568
569 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
570 and pextrw to swap reg/rm assignments.
571
4ef7f0bf
HPN
5722001-04-05 Hans-Peter Nilsson <hp@axis.com>
573
574 * cris.h (enum cris_insn_version_usage): Correct comment for
575 cris_ver_v3p.
576
0f17484f
AM
5772001-03-24 Alan Modra <alan@linuxcare.com.au>
578
579 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
580 Add InvMem to first operand of "maskmovdqu".
581
7ccb5238
HPN
5822001-03-22 Hans-Peter Nilsson <hp@axis.com>
583
584 * cris.h (ADD_PC_INCR_OPCODE): New macro.
585
361bfa20
KH
5862001-03-21 Kazu Hirata <kazu@hxi.com>
587
588 * h8300.h: Fix formatting.
589
87890af0
AM
5902001-03-22 Alan Modra <alan@linuxcare.com.au>
591
592 * i386.h (i386_optab): Add paddq, psubq.
593
2e98d2de
AM
5942001-03-19 Alan Modra <alan@linuxcare.com.au>
595
596 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
597
80a523c2
NC
5982001-02-28 Igor Shevlyakov <igor@windriver.com>
599
600 * m68k.h: new defines for Coldfire V4. Update mcf to know
601 about mcf5407.
602
e135f41b
NC
6032001-02-18 lars brinkhoff <lars@nocrew.org>
604
605 * pdp11.h: New file.
606
6072001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
608
609 * i386.h (i386_optab): SSE integer converison instructions have
610 64bit versions on x86-64.
611
8eaec934
NC
6122001-02-10 Nick Clifton <nickc@redhat.com>
613
614 * mips.h: Remove extraneous whitespace. Formating change to allow
615 for future contribution.
616
a85d7ed0
NC
6172001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
618
619 * s390.h: New file.
620
0715dc88
PM
6212001-02-02 Patrick Macdonald <patrickm@redhat.com>
622
adadcc0c
AM
623 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
624 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
625 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
0715dc88 626
296bc568
AM
6272001-01-24 Karsten Keil <kkeil@suse.de>
628
629 * i386.h (i386_optab): Fix swapgs
630
1328dc98
AM
6312001-01-14 Alan Modra <alan@linuxcare.com.au>
632
633 * hppa.h: Describe new '<' and '>' operand types, and tidy
634 existing comments.
635 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
636 Remove duplicate "ldw j(s,b),x". Sort some entries.
637
e135f41b 6382001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
639
640 * i386.h (i386_optab): Fix pusha and ret templates.
641
0d2bcfaf
NC
6422001-01-11 Peter Targett <peter.targett@arccores.com>
643
644 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
645 definitions for masking cpu type.
646 (arc_ext_operand_value) New structure for storing extended
647 operands.
648 (ARC_OPERAND_*) Flags for operand values.
649
6502001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
651
652 * i386.h (pinsrw): Add.
653 (pshufw): Remove.
654 (cvttpd2dq): Fix operands.
655 (cvttps2dq): Likewise.
656 (movq2q): Rename to movdq2q.
657
079966a8
AM
6582001-01-10 Richard Schaal <richard.schaal@intel.com>
659
660 * i386.h: Correct movnti instruction.
661
8c1f9e76
JJ
6622001-01-09 Jeff Johnston <jjohnstn@redhat.com>
663
664 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
665 of operands (unsigned char or unsigned short).
666 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
667 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
668
0d2bcfaf 6692001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
670
671 * i386.h (i386_optab): Make [sml]fence template to use immext field.
672
0d2bcfaf 6732001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
674
675 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
676 introduced by Pentium4
677
0d2bcfaf 6782000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
679
680 * i386.h (i386_optab): Add "rex*" instructions;
681 add swapgs; disable jmp/call far direct instructions for
682 64bit mode; add syscall and sysret; disable registers for 0xc6
683 template. Add 'q' suffixes to extendable instructions, disable
079966a8 684 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
685 (i386_regtab): Add extended registers.
686 (*Suf): Add No_qSuf.
687 (q_Suf, wlq_Suf, bwlq_Suf): New.
688
0d2bcfaf 6892000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
690
691 * i386.h (i386_optab): Replace "Imm" with "EncImm".
692 (i386_regtab): Add flags field.
d83c6548 693
bf40d919
NC
6942000-12-12 Nick Clifton <nickc@redhat.com>
695
696 * mips.h: Fix formatting.
697
4372b673
NC
6982000-12-01 Chris Demetriou <cgd@sibyte.com>
699
adadcc0c
AM
700 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
701 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
702 OP_*_SYSCALL definitions.
703 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
704 19 bit wait codes.
705 (MIPS operand specifier comments): Remove 'm', add 'U' and
706 'J', and update the meaning of 'B' so that it's more general.
707
708 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
709 INSN_ISA5): Renumber, redefine to mean the ISA at which the
710 instruction was added.
711 (INSN_ISA32): New constant.
712 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
713 Renumber to avoid new and/or renumbered INSN_* constants.
714 (INSN_MIPS32): Delete.
715 (ISA_UNKNOWN): New constant to indicate unknown ISA.
716 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
717 ISA_MIPS32): New constants, defined to be the mask of INSN_*
718 constants available at that ISA level.
719 (CPU_UNKNOWN): New constant to indicate unknown CPU.
720 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
721 define it with a unique value.
722 (OPCODE_IS_MEMBER): Update for new ISA membership-related
723 constant meanings.
724
725 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
726 definitions.
727
728 * mips.h (CPU_SB1): New constant.
c6c98b38 729
19f7b010
JJ
7302000-10-20 Jakub Jelinek <jakub@redhat.com>
731
732 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
733 Note that '3' is used for siam operand.
734
139368c9
JW
7352000-09-22 Jim Wilson <wilson@cygnus.com>
736
737 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
738
156c2f8b 7392000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 740
156c2f8b
NC
741 * mips.h: Use defines instead of hard-coded processor numbers.
742 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 743 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
744 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
745 CPU_4KC, CPU_4KM, CPU_4KP): Define..
746 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 747 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 748 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
749 Add 'P' to used characters.
750 Use 'H' for coprocessor select field.
156c2f8b 751 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
752 Document new arg characters and add to used characters.
753 (INSN_MIPS32): New define for MIPS32 extensions.
754 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 755
3c5ce02e
AM
7562000-09-05 Alan Modra <alan@linuxcare.com.au>
757
758 * hppa.h: Mention cz completer.
759
50b81f19
JW
7602000-08-16 Jim Wilson <wilson@cygnus.com>
761
762 * ia64.h (IA64_OPCODE_POSTINC): New.
763
fc29466d
L
7642000-08-15 H.J. Lu <hjl@gnu.org>
765
766 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
767 IgnoreSize change.
768
4f1d9bd8
NC
7692000-08-08 Jason Eckhardt <jle@cygnus.com>
770
771 * i860.h: Small formatting adjustments.
772
45ee1401
DC
7732000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
774
775 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
776 Move related opcodes closer to each other.
777 Minor changes in comments, list undefined opcodes.
778
9d551405
DB
7792000-07-26 Dave Brolley <brolley@redhat.com>
780
781 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
782
4f1d9bd8
NC
7832000-07-22 Jason Eckhardt <jle@cygnus.com>
784
785 * i860.h (btne, bte, bla): Changed these opcodes
786 to use sbroff ('r') instead of split16 ('s').
787 (J, K, L, M): New operand types for 16-bit aligned fields.
788 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
789 use I, J, K, L, M instead of just I.
790 (T, U): New operand types for split 16-bit aligned fields.
791 (st.x): Changed these opcodes to use S, T, U instead of just S.
792 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
793 exist on the i860.
794 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
795 (pfeq.ss, pfeq.dd): New opcodes.
796 (st.s): Fixed incorrect mask bits.
797 (fmlow): Fixed incorrect mask bits.
798 (fzchkl, pfzchkl): Fixed incorrect mask bits.
799 (faddz, pfaddz): Fixed incorrect mask bits.
800 (form, pform): Fixed incorrect mask bits.
801 (pfld.l): Fixed incorrect mask bits.
802 (fst.q): Fixed incorrect mask bits.
803 (all floating point opcodes): Fixed incorrect mask bits for
804 handling of dual bit.
805
c8488617
HPN
8062000-07-20 Hans-Peter Nilsson <hp@axis.com>
807
808 cris.h: New file.
809
65aa24b6
NC
8102000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
811
812 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
813 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
814 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
815 (AVR_ISA_M83): Define for ATmega83, ATmega85.
816 (espm): Remove, because ESPM removed in databook update.
817 (eicall, eijmp): Move to the end of opcode table.
818
60bcf0fa
NC
8192000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
820
821 * m68hc11.h: New file for support of Motorola 68hc11.
822
60a2978a
DC
823Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
824
825 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
826
68ab2dd9
DC
827Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
828
829 * avr.h: New file with AVR opcodes.
830
f0662e27
DL
831Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
832
833 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
834
b722f2be
AM
8352000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
836
837 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
838
f9e0cf0b
AM
8392000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
840
841 * i386.h: Use sl_FP, not sl_Suf for fild.
842
f660ee8b
FCE
8432000-05-16 Frank Ch. Eigler <fche@redhat.com>
844
845 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
846 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
847 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
848 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
849
558b0a60
AM
8502000-05-13 Alan Modra <alan@linuxcare.com.au>,
851
852 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
853
e413e4e9
AM
8542000-05-13 Alan Modra <alan@linuxcare.com.au>,
855 Alexander Sokolov <robocop@netlink.ru>
856
857 * i386.h (i386_optab): Add cpu_flags for all instructions.
858
8592000-05-13 Alan Modra <alan@linuxcare.com.au>
860
861 From Gavin Romig-Koch <gavin@cygnus.com>
862 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
863
5c84d377
TW
8642000-05-04 Timothy Wall <twall@cygnus.com>
865
866 * tic54x.h: New.
867
966f959b
C
8682000-05-03 J.T. Conklin <jtc@redback.com>
869
870 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
871 (PPC_OPERAND_VR): New operand flag for vector registers.
872
c5d05dbb
JL
8732000-05-01 Kazu Hirata <kazu@hxi.com>
874
875 * h8300.h (EOP): Add missing initializer.
876
a7fba0e0
JL
877Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
878
879 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
880 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
881 New operand types l,y,&,fe,fE,fx added to support above forms.
882 (pa_opcodes): Replaced usage of 'x' as source/target for
883 floating point double-word loads/stores with 'fx'.
884
800eeca4
JW
885Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
886 David Mosberger <davidm@hpl.hp.com>
887 Timothy Wall <twall@cygnus.com>
888 Jim Wilson <wilson@cygnus.com>
889
890 * ia64.h: New file.
891
ba23e138
NC
8922000-03-27 Nick Clifton <nickc@cygnus.com>
893
894 * d30v.h (SHORT_A1): Fix value.
895 (SHORT_AR): Renumber so that it is at the end of the list of short
896 instructions, not the end of the list of long instructions.
897
d0b47220
AM
8982000-03-26 Alan Modra <alan@linuxcare.com>
899
900 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
901 problem isn't really specific to Unixware.
902 (OLDGCC_COMPAT): Define.
903 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
904 destination %st(0).
905 Fix lots of comments.
906
866afedc
NC
9072000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
908
adadcc0c
AM
909 * d30v.h:
910 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
911 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
912 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
913 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
914 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
915 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
916 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
866afedc 917
cc5ca5ce
AM
9182000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
919
920 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
921 fistpd without suffix.
922
68e324a2
NC
9232000-02-24 Nick Clifton <nickc@cygnus.com>
924
925 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
adadcc0c 926 'signed_overflow_ok_p'.
68e324a2
NC
927 Delete prototypes for cgen_set_flags() and cgen_get_flags().
928
60f036a2
AH
9292000-02-24 Andrew Haley <aph@cygnus.com>
930
931 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
932 (CGEN_CPU_TABLE): flags: new field.
933 Add prototypes for new functions.
d83c6548 934
9b9b5cd4
AM
9352000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
936
937 * i386.h: Add some more UNIXWARE_COMPAT comments.
938
5b93d8bb
AM
9392000-02-23 Linas Vepstas <linas@linas.org>
940
941 * i370.h: New file.
942
4f1d9bd8
NC
9432000-02-22 Chandra Chavva <cchavva@cygnus.com>
944
945 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
946 cannot be combined in parallel with ADD/SUBppp.
947
87f398dd
AH
9482000-02-22 Andrew Haley <aph@cygnus.com>
949
950 * mips.h: (OPCODE_IS_MEMBER): Add comment.
951
367c01af
AH
9521999-12-30 Andrew Haley <aph@cygnus.com>
953
9a1e79ca
AH
954 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
955 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
956 insns.
367c01af 957
add0c677
AM
9582000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
959
960 * i386.h: Qualify intel mode far call and jmp with x_Suf.
961
3138f287
AM
9621999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
963
964 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
965 indirect jumps and calls. Add FF/3 call for intel mode.
966
ccecd07b
JL
967Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
968
969 * mn10300.h: Add new operand types. Add new instruction formats.
970
b37e19e9
JL
971Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
972
973 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
974 instruction.
975
5fce5ddf
GRK
9761999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
977
978 * mips.h (INSN_ISA5): New.
979
2bd7f1f3
GRK
9801999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
981
982 * mips.h (OPCODE_IS_MEMBER): New.
983
4df2b5c5
NC
9841999-10-29 Nick Clifton <nickc@cygnus.com>
985
986 * d30v.h (SHORT_AR): Define.
987
446a06c9
MM
9881999-10-18 Michael Meissner <meissner@cygnus.com>
989
990 * alpha.h (alpha_num_opcodes): Convert to unsigned.
991 (alpha_num_operands): Ditto.
992
eca04c6a
JL
993Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
994
adadcc0c 995 * hppa.h (pa_opcodes): Add load and store cache control to
eca04c6a
JL
996 instructions. Add ordered access load and store.
997
998 * hppa.h (pa_opcode): Add new entries for addb and addib.
999
1000 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
1001
adadcc0c 1002 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
eca04c6a 1003
c43185de
DN
1004Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
1005
1006 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
1007
ec3533da
JL
1008Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1009
390f858d
JL
1010 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
1011 and "be" using completer prefixes.
1012
8c47ebd9
JL
1013 * hppa.h (pa_opcodes): Add initializers to silence compiler.
1014
ec3533da
JL
1015 * hppa.h: Update comments about character usage.
1016
18369bea
JL
1017Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
1018
1019 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
1020 up the new fstw & bve instructions.
1021
c36efdd2
JL
1022Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
1023
d3ffb032
JL
1024 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
1025 instructions.
1026
c49ec3da
JL
1027 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
1028
5d2e7ecc
JL
1029 * hppa.h (pa_opcodes): Add long offset double word load/store
1030 instructions.
1031
6397d1a2
JL
1032 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
1033 stores.
1034
142f0fe0
JL
1035 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
1036
f5a68b45
JL
1037 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
1038
8235801e
JL
1039 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
1040
35184366
JL
1041 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
1042
f0bfde5e
JL
1043 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
1044
27bbbb58
JL
1045 * hppa.h (pa_opcodes): Add support for "b,l".
1046
c36efdd2
JL
1047 * hppa.h (pa_opcodes): Add support for "b,gate".
1048
f2727d04
JL
1049Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
1050
9392fb11 1051 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 1052 in xmpyu.
9392fb11 1053
e0c52e99
JL
1054 * hppa.h (pa_opcodes): Fix mask for probe and probei.
1055
f2727d04
JL
1056 * hppa.h (pa_opcodes): Fix mask for depwi.
1057
52d836e2
JL
1058Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
1059
1060 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
1061 an explicit output argument.
1062
90765e3a
JL
1063Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
1064
1065 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
1066 Add a few PA2.0 loads and store variants.
1067
8340b17f
ILT
10681999-09-04 Steve Chamberlain <sac@pobox.com>
1069
1070 * pj.h: New file.
1071
5f47d35b
AM
10721999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
1073
1074 * i386.h (i386_regtab): Move %st to top of table, and split off
1075 other fp reg entries.
1076 (i386_float_regtab): To here.
1077
1c143202
JL
1078Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1079
7d8fdb64
JL
1080 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
1081 by 'f'.
1082
90927b9c
JL
1083 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1084 Add supporting args.
1085
adadcc0c
AM
1086 * hppa.h: Document new completers and args.
1087 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1d16bf9c
JL
1088 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
1089 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
1090 pmenb and pmdis.
1091
adadcc0c 1092 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
96226a68
JL
1093 hshr, hsub, mixh, mixw, permh.
1094
5d4ba527
JL
1095 * hppa.h (pa_opcodes): Change completers in instructions to
1096 use 'c' prefix.
1097
adadcc0c 1098 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
e9fc28c6
JL
1099 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1100
adadcc0c 1101 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1c143202
JL
1102 fnegabs to use 'I' instead of 'F'.
1103
9e525108
AM
11041999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1105
1106 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1107 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1108 Alphabetically sort PIII insns.
1109
e8da1bf1
DE
1110Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1111
1112 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1113
7d627258
JL
1114Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1115
5696871a
JL
1116 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1117 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1118
adadcc0c 1119 * hppa.h: Document 64 bit condition completers.
7d627258 1120
c5e52916
JL
1121Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1122
1123 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1124
eecb386c
AM
11251999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1126
1127 * i386.h (i386_optab): Add DefaultSize modifier to all insns
1128 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1129 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1130
88a380f3
JL
1131Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1132 Jeff Law <law@cygnus.com>
1133
1134 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1135
1136 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 1137
adadcc0c 1138 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
1139 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1140
145cf1f0
AM
11411999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1142
1143 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1144
73826640
JL
1145Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1146
1147 * hppa.h (struct pa_opcode): Add new field "flags".
1148 (FLAGS_STRICT): Define.
1149
b65db252
JL
1150Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1151 Jeff Law <law@cygnus.com>
1152
f7fc668b
JL
1153 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1154
1155 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 1156
10084519
AM
11571999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1158
1159 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1160 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1161 flag to fcomi and friends.
1162
cd8a80ba
JL
1163Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1164
1165 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 1166 integer logical instructions.
cd8a80ba 1167
1fca749b
ILT
11681999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1169
1170 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1171 `n', `o'.
1172
1173 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1174 and new places `m', `M', `h'.
1175
aa008907
JL
1176Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1177
1178 * hppa.h (pa_opcodes): Add several processor specific system
1179 instructions.
1180
e26b85f0
JL
1181Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1182
d83c6548 1183 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
1184 "addb", and "addib" to be used by the disassembler.
1185
c608c12e
AM
11861999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1187
1188 * i386.h (ReverseModrm): Remove all occurences.
1189 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1190 movmskps, pextrw, pmovmskb, maskmovq.
1191 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1192 ignore the data size prefix.
1193
1194 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1195 Mostly stolen from Doug Ledford <dledford@redhat.com>
1196
45c18104
RH
1197Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1198
1199 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1200
252b5132
RH
12011999-04-14 Doug Evans <devans@casey.cygnus.com>
1202
1203 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1204 (CGEN_ATTR_TYPE): Update.
1205 (CGEN_ATTR_MASK): Number booleans starting at 0.
1206 (CGEN_ATTR_VALUE): Update.
1207 (CGEN_INSN_ATTR): Update.
1208
1209Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1210
1211 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1212 instructions.
1213
1214Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1215
1216 * hppa.h (bb, bvb): Tweak opcode/mask.
1217
1218
12191999-03-22 Doug Evans <devans@casey.cygnus.com>
1220
1221 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1222 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1223 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1224 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1225 Delete member max_insn_size.
1226 (enum cgen_cpu_open_arg): New enum.
1227 (cpu_open): Update prototype.
1228 (cpu_open_1): Declare.
1229 (cgen_set_cpu): Delete.
1230
12311999-03-11 Doug Evans <devans@casey.cygnus.com>
1232
1233 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1234 (CGEN_OPERAND_NIL): New macro.
1235 (CGEN_OPERAND): New member `type'.
1236 (@arch@_cgen_operand_table): Delete decl.
1237 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1238 (CGEN_OPERAND_TABLE): New struct.
1239 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1240 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1241 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1242 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1243 {get,set}_{int,vma}_operand.
1244 (@arch@_cgen_cpu_open): New arg `isa'.
1245 (cgen_set_cpu): Ditto.
1246
1247Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1248
1249 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1250
12511999-02-25 Doug Evans <devans@casey.cygnus.com>
1252
1253 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1254 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1255 enum cgen_hw_type.
1256 (CGEN_HW_TABLE): New struct.
1257 (hw_table): Delete declaration.
1258 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1259 to table entry to enum.
1260 (CGEN_OPINST): Ditto.
1261 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1262
1263Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1264
1265 * alpha.h (AXP_OPCODE_EV6): New.
1266 (AXP_OPCODE_NOPAL): Include it.
1267
12681999-02-09 Doug Evans <devans@casey.cygnus.com>
1269
1270 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1271 All uses updated. New members int_insn_p, max_insn_size,
1272 parse_operand,insert_operand,extract_operand,print_operand,
1273 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1274 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1275 extract_handlers,print_handlers.
1276 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1277 (CGEN_ATTR_BOOL_OFFSET): New macro.
1278 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1279 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1280 (cgen_opcode_handler): Renamed from cgen_base.
1281 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1282 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1283 all uses updated.
1284 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1285 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1286 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1287 (CGEN_OPCODE,CGEN_IBASE): New types.
1288 (CGEN_INSN): Rewrite.
1289 (CGEN_{ASM,DIS}_HASH*): Delete.
1290 (init_opcode_table,init_ibld_table): Declare.
1291 (CGEN_INSN_ATTR): New type.
1292
1293Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1294
adadcc0c
AM
1295 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1296 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1297 Change *Suf definitions to include x and d suffixes.
1298 (movsx): Use w_Suf and b_Suf.
1299 (movzx): Likewise.
1300 (movs): Use bwld_Suf.
1301 (fld): Change ordering. Use sld_FP.
1302 (fild): Add Intel Syntax equivalent of fildq.
1303 (fst): Use sld_FP.
1304 (fist): Use sld_FP.
1305 (fstp): Use sld_FP. Add x_FP version.
1306 (fistp): LLongMem version for Intel Syntax.
1307 (fcom, fcomp): Use sld_FP.
1308 (fadd, fiadd, fsub): Use sld_FP.
1309 (fsubr): Use sld_FP.
1310 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
252b5132
RH
1311
13121999-01-27 Doug Evans <devans@casey.cygnus.com>
1313
1314 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1315 CGEN_MODE_UINT.
1316
e135f41b 13171999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1318
1319 * hppa.h (bv): Fix mask.
1320
13211999-01-05 Doug Evans <devans@casey.cygnus.com>
1322
1323 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1324 (CGEN_ATTR): Use it.
1325 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1326 (CGEN_ATTR_TABLE): New member dfault.
1327
13281998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1329
1330 * mips.h (MIPS16_INSN_BRANCH): New.
1331
1332Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1333
1334 The following is part of a change made by Edith Epstein
d83c6548
AJ
1335 <eepstein@sophia.cygnus.com> as part of a project to merge in
1336 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1337
1338 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1339 after.
252b5132
RH
1340
1341Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1342
1343 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1344 status word instructions.
252b5132
RH
1345
13461998-11-30 Doug Evans <devans@casey.cygnus.com>
1347
1348 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1349 (struct cgen_keyword_entry): Ditto.
1350 (struct cgen_operand): Ditto.
1351 (CGEN_IFLD): New typedef, with associated access macros.
1352 (CGEN_IFMT): New typedef, with associated access macros.
1353 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1354 (CGEN_IVALUE): New typedef.
1355 (struct cgen_insn): Delete const on syntax,attrs members.
1356 `format' now points to format data. Type of `value' is now
1357 CGEN_IVALUE.
1358 (struct cgen_opcode_table): New member ifld_table.
1359
13601998-11-18 Doug Evans <devans@casey.cygnus.com>
1361
1362 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1363 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1364 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1365 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1366 (cgen_opcode_table): Update type of dis_hash fn.
1367 (extract_operand): Update type of `insn_value' arg.
1368
1369Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1370
1371 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1372
1373Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1374
1375 * mips.h (INSN_MULT): Added.
1376
1377Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1378
1379 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1380
1381Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1382
1383 * cgen.h (CGEN_INSN_INT): New typedef.
1384 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1385 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1386 (CGEN_INSN_BYTES_PTR): New typedef.
1387 (CGEN_EXTRACT_INFO): New typedef.
1388 (cgen_insert_fn,cgen_extract_fn): Update.
1389 (cgen_opcode_table): New member `insn_endian'.
1390 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1391 (insert_operand,extract_operand): Update.
1392 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1393
1394Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1395
1396 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1397 (struct CGEN_HW_ENTRY): New member `attrs'.
1398 (CGEN_HW_ATTR): New macro.
1399 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1400 (CGEN_INSN_INVALID_P): New macro.
1401
1402Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1403
1404 * hppa.h: Add "fid".
d83c6548 1405
252b5132
RH
1406Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1407
1408 From Robert Andrew Dale <rob@nb.net>
1409 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1410 (AMD_3DNOW_OPCODE): Define.
1411
1412Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1413
1414 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1415
1416Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1417
1418 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1419
1420Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1421
1422 Move all global state data into opcode table struct, and treat
1423 opcode table as something that is "opened/closed".
1424 * cgen.h (CGEN_OPCODE_DESC): New type.
1425 (all fns): New first arg of opcode table descriptor.
1426 (cgen_set_parse_operand_fn): Add prototype.
1427 (cgen_current_machine,cgen_current_endian): Delete.
1428 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1429 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1430 dis_hash_table,dis_hash_table_entries.
1431 (opcode_open,opcode_close): Add prototypes.
1432
1433 * cgen.h (cgen_insn): New element `cdx'.
1434
1435Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1436
1437 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1438
1439Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1440
1441 * mn10300.h: Add "no_match_operands" field for instructions.
1442 (MN10300_MAX_OPERANDS): Define.
1443
1444Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1445
1446 * cgen.h (cgen_macro_insn_count): Declare.
1447
1448Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1449
1450 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1451 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1452 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1453 set_{int,vma}_operand.
1454
1455Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1456
1457 * mn10300.h: Add "machine" field for instructions.
1458 (MN103, AM30): Define machine types.
d83c6548 1459
252b5132
RH
1460Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1461
1462 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1463
14641998-06-18 Ulrich Drepper <drepper@cygnus.com>
1465
1466 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1467
1468Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1469
1470 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1471 and ud2b.
1472 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1473 those that happen to be implemented on pentiums.
1474
1475Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1476
1477 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1478 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1479 with Size16|IgnoreSize or Size32|IgnoreSize.
1480
1481Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1482
1483 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1484 (REPE): Rename to REPE_PREFIX_OPCODE.
1485 (i386_regtab_end): Remove.
1486 (i386_prefixtab, i386_prefixtab_end): Remove.
1487 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1488 of md_begin.
1489 (MAX_OPCODE_SIZE): Define.
1490 (i386_optab_end): Remove.
1491 (sl_Suf): Define.
1492 (sl_FP): Use sl_Suf.
1493
1494 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1495 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1496 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1497 data32, dword, and adword prefixes.
1498 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1499 regs.
1500
1501Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1502
1503 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1504
1505 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1506 register operands, because this is a common idiom. Flag them with
1507 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1508 fdivrp because gcc erroneously generates them. Also flag with a
1509 warning.
1510
1511 * i386.h: Add suffix modifiers to most insns, and tighter operand
1512 checks in some cases. Fix a number of UnixWare compatibility
1513 issues with float insns. Merge some floating point opcodes, using
1514 new FloatMF modifier.
1515 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1516 consistency.
1517
1518 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1519 IgnoreDataSize where appropriate.
1520
1521Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1522
1523 * i386.h: (one_byte_segment_defaults): Remove.
1524 (two_byte_segment_defaults): Remove.
1525 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1526
1527Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1528
1529 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1530 (cgen_hw_lookup_by_num): Declare.
1531
1532Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1533
1534 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1535 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1536
1537Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1538
1539 * cgen.h (cgen_asm_init_parse): Delete.
1540 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1541 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1542
1543Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1544
1545 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1546 (cgen_asm_finish_insn): Update prototype.
1547 (cgen_insn): New members num, data.
1548 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1549 dis_hash, dis_hash_table_size moved to ...
1550 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1551 All uses updated. New members asm_hash_p, dis_hash_p.
1552 (CGEN_MINSN_EXPANSION): New struct.
1553 (cgen_expand_macro_insn): Declare.
1554 (cgen_macro_insn_count): Declare.
1555 (get_insn_operands): Update prototype.
1556 (lookup_get_insn_operands): Declare.
1557
1558Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1559
1560 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1561 regKludge. Add operands types for string instructions.
1562
1563Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1564
1565 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1566 table.
1567
1568Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1569
1570 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1571 for `gettext'.
1572
1573Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1574
1575 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1576 Add IsString flag to string instructions.
1577 (IS_STRING): Don't define.
1578 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1579 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1580 (SS_PREFIX_OPCODE): Define.
1581
1582Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1583
1584 * i386.h: Revert March 24 patch; no more LinearAddress.
1585
1586Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1587
1588 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1589 instructions, and instead add FWait opcode modifier. Add short
1590 form of fldenv and fstenv.
1591 (FWAIT_OPCODE): Define.
1592
1593 * i386.h (i386_optab): Change second operand constraint of `mov
1594 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1595 allow legal instructions such as `movl %gs,%esi'
1596
1597Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1598
1599 * h8300.h: Various changes to fully bracket initializers.
1600
1601Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1602
1603 * i386.h: Set LinearAddress for lidt and lgdt.
1604
1605Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1606
1607 * cgen.h (CGEN_BOOL_ATTR): New macro.
1608
1609Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1610
1611 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1612
1613Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1614
1615 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1616 (cgen_insn): Record syntax and format entries here, rather than
1617 separately.
1618
1619Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1620
1621 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1622
1623Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1624
1625 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1626 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1627 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1628
1629Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1630
1631 * cgen.h (lookup_insn): New argument alias_p.
1632
1633Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1634
1635Fix rac to accept only a0:
1636 * d10v.h (OPERAND_ACC): Split into:
1637 (OPERAND_ACC0, OPERAND_ACC1) .
1638 (OPERAND_GPR): Define.
1639
1640Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1641
1642 * cgen.h (CGEN_FIELDS): Define here.
1643 (CGEN_HW_ENTRY): New member `type'.
1644 (hw_list): Delete decl.
1645 (enum cgen_mode): Declare.
1646 (CGEN_OPERAND): New member `hw'.
1647 (enum cgen_operand_instance_type): Declare.
1648 (CGEN_OPERAND_INSTANCE): New type.
1649 (CGEN_INSN): New member `operands'.
1650 (CGEN_OPCODE_DATA): Make hw_list const.
1651 (get_insn_operands,lookup_insn): Add prototypes for.
1652
1653Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1654
1655 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1656 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1657 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1658 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1659
1660Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1661
1662 * cgen.h: Correct typo in comment end marker.
1663
1664Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1665
1666 * tic30.h: New file.
1667
5a109b67 1668Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1669
1670 * cgen.h: Add prototypes for cgen_save_fixups(),
1671 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1672 of cgen_asm_finish_insn() to return a char *.
1673
1674Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1675
1676 * cgen.h: Formatting changes to improve readability.
1677
1678Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1679
1680 * cgen.h (*): Clean up pass over `struct foo' usage.
1681 (CGEN_ATTR): Make unsigned char.
1682 (CGEN_ATTR_TYPE): Update.
1683 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1684 (cgen_base): Move member `attrs' to cgen_insn.
1685 (CGEN_KEYWORD): New member `null_entry'.
1686 (CGEN_{SYNTAX,FORMAT}): New types.
1687 (cgen_insn): Format and syntax separated from each other.
1688
1689Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1690
1691 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1692 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1693 flags_{used,set} long.
1694 (d30v_operand): Make flags field long.
1695
1696Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1697
1698 * m68k.h: Fix comment describing operand types.
1699
1700Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1701
1702 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1703 everything else after down.
1704
1705Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1706
1707 * d10v.h (OPERAND_FLAG): Split into:
1708 (OPERAND_FFLAG, OPERAND_CFLAG) .
1709
1710Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1711
1712 * mips.h (struct mips_opcode): Changed comments to reflect new
1713 field usage.
1714
1715Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1716
1717 * mips.h: Added to comments a quick-ref list of all assigned
1718 operand type characters.
1719 (OP_{MASK,SH}_PERFREG): New macros.
1720
1721Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1722
1723 * sparc.h: Add '_' and '/' for v9a asr's.
1724 Patch from David Miller <davem@vger.rutgers.edu>
1725
1726Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1727
1728 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1729 area are not available in the base model (H8/300).
1730
1731Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1732
1733 * m68k.h: Remove documentation of ` operand specifier.
1734
1735Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1736
1737 * m68k.h: Document q and v operand specifiers.
1738
1739Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1740
1741 * v850.h (struct v850_opcode): Add processors field.
1742 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1743 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1744 (PROCESSOR_V850EA): New bit constants.
1745
1746Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1747
1748 Merge changes from Martin Hunt:
1749
1750 * d30v.h: Allow up to 64 control registers. Add
1751 SHORT_A5S format.
1752
1753 * d30v.h (LONG_Db): New form for delayed branches.
1754
1755 * d30v.h: (LONG_Db): New form for repeati.
1756
1757 * d30v.h (SHORT_D2B): New form.
1758
1759 * d30v.h (SHORT_A2): New form.
1760
1761 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1762 registers are used. Needed for VLIW optimization.
1763
1764Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1765
1766 * cgen.h: Move assembler interface section
1767 up so cgen_parse_operand_result is defined for cgen_parse_address.
1768 (cgen_parse_address): Update prototype.
1769
1770Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1771
1772 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1773
1774Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1775
1776 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1777 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1778 <paubert@iram.es>.
1779
1780 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1781 <paubert@iram.es>.
1782
1783 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1784 <paubert@iram.es>.
1785
1786 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1787 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1788
1789Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1790
1791 * v850.h (V850_NOT_R0): New flag.
1792
1793Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1794
1795 * v850.h (struct v850_opcode): Remove flags field.
1796
1797Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1798
1799 * v850.h (struct v850_opcode): Add flags field.
1800 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1801 fields.
1802 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1803 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1804
1805Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1806
1807 * arc.h: New file.
1808
1809Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1810
1811 * sparc.h (sparc_opcodes): Declare as const.
1812
1813Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1814
1815 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1816 uses single or double precision floating point resources.
1817 (INSN_NO_ISA, INSN_ISA1): Define.
1818 (cpu specific INSN macros): Tweak into bitmasks outside the range
1819 of INSN_ISA field.
1820
1821Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1822
1823 * i386.h: Fix pand opcode.
1824
1825Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1826
1827 * mips.h: Widen INSN_ISA and move it to a more convenient
1828 bit position. Add INSN_3900.
1829
1830Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1831
1832 * mips.h (struct mips_opcode): added new field membership.
1833
1834Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1835
1836 * i386.h (movd): only Reg32 is allowed.
1837
1838 * i386.h: add fcomp and ud2. From Wayne Scott
1839 <wscott@ichips.intel.com>.
1840
1841Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1842
1843 * i386.h: Add MMX instructions.
1844
1845Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1846
1847 * i386.h: Remove W modifier from conditional move instructions.
1848
1849Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1850
1851 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1852 with no arguments to match that generated by the UnixWare
1853 assembler.
1854
1855Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1856
1857 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1858 (cgen_parse_operand_fn): Declare.
1859 (cgen_init_parse_operand): Declare.
1860 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1861 new argument `want'.
1862 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1863 (enum cgen_parse_operand_type): New enum.
1864
1865Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1866
1867 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1868
1869Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1870
1871 * cgen.h: New file.
1872
1873Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1874
1875 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1876 fdivrp.
1877
1878Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1879
adadcc0c 1880 * v850.h (extract): Make unsigned.
252b5132
RH
1881
1882Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1883
1884 * i386.h: Add iclr.
1885
1886Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1887
1888 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1889 take a direction bit.
1890
1891Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1892
1893 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1894
1895Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1896
1897 * sparc.h: Include <ansidecl.h>. Update function declarations to
1898 use prototypes, and to use const when appropriate.
1899
1900Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1901
1902 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1903
1904Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1905
1906 * d10v.h: Change pre_defined_registers to
1907 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1908
1909Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1910
1911 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1912 Change mips_opcodes from const array to a pointer,
1913 and change bfd_mips_num_opcodes from const int to int,
1914 so that we can increase the size of the mips opcodes table
1915 dynamically.
1916
1917Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1918
1919 * d30v.h (FLAG_X): Remove unused flag.
1920
1921Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1922
1923 * d30v.h: New file.
1924
1925Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1926
1927 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1928 (PDS_VALUE): Macro to access value field of predefined symbols.
1929 (tic80_next_predefined_symbol): Add prototype.
1930
1931Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1932
1933 * tic80.h (tic80_symbol_to_value): Change prototype to match
1934 change in function, added class parameter.
1935
1936Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1937
1938 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1939 endmask fields, which are somewhat weird in that 0 and 32 are
1940 treated exactly the same.
1941
1942Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1943
1944 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1945 rather than a constant that is 2**X. Reorder them to put bits for
1946 operands that have symbolic names in the upper bits, so they can
1947 be packed into an int where the lower bits contain the value that
1948 corresponds to that symbolic name.
1949 (predefined_symbo): Add struct.
1950 (tic80_predefined_symbols): Declare array of translations.
1951 (tic80_num_predefined_symbols): Declare size of that array.
1952 (tic80_value_to_symbol): Declare function.
1953 (tic80_symbol_to_value): Declare function.
1954
1955Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1956
1957 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1958
1959Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1960
1961 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1962 be the destination register.
1963
1964Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1965
1966 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1967 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1968 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1969 that the opcode can have two vector instructions in a single
1970 32 bit word and we have to encode/decode both.
1971
1972Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1973
1974 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1975 TIC80_OPERAND_RELATIVE for PC relative.
1976 (TIC80_OPERAND_BASEREL): New flag bit for register
1977 base relative.
1978
1979Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1980
1981 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1982
1983Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1984
1985 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1986 ":s" modifier for scaling.
1987
1988Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1989
1990 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1991 (TIC80_OPERAND_M_LI): Ditto
1992
1993Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1994
1995 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1996 (TIC80_OPERAND_CC): New define for condition code operand.
1997 (TIC80_OPERAND_CR): New define for control register operand.
1998
1999Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
2000
2001 * tic80.h (struct tic80_opcode): Name changed.
2002 (struct tic80_opcode): Remove format field.
2003 (struct tic80_operand): Add insertion and extraction functions.
2004 (TIC80_OPERAND_*): Remove old bogus values, start adding new
2005 correct ones.
2006 (FMT_*): Ditto.
2007
2008Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
2009
2010 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
2011 type IV instruction offsets.
2012
2013Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
2014
2015 * tic80.h: New file.
2016
2017Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
2018
2019 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
2020
2021Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
2022
2023 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
2024 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
2025 * v850.h: Fix comment, v850_operand not powerpc_operand.
2026
2027Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
2028
2029 * mn10200.h: Flesh out structures and definitions needed by
2030 the mn10200 assembler & disassembler.
2031
2032Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
2033
2034 * mips.h: Add mips16 definitions.
2035
2036Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
2037
2038 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
2039
2040Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
2041
2042 * mn10300.h (MN10300_OPERAND_PCREL): Define.
2043 (MN10300_OPERAND_MEMADDR): Define.
2044
2045Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
2046
2047 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
2048
2049Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
2050
2051 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
2052
2053Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
2054
2055 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
2056
2057Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
2058
2059 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
2060
2061Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
2062
2063 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
2064 negative to minimize problems with shared libraries. Organize
2065 instruction subsets by AMASK extensions and PALcode
2066 implementation.
252b5132
RH
2067 (struct alpha_operand): Move flags slot for better packing.
2068
2069Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
2070
2071 * v850.h (V850_OPERAND_RELAX): New operand flag.
2072
2073Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
2074
2075 * mn10300.h (FMT_*): Move operand format definitions
2076 here.
2077
2078Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
2079
2080 * mn10300.h (MN10300_OPERAND_PAREN): Define.
2081
2082Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
2083
2084 * mn10300.h (mn10300_opcode): Add "format" field.
2085 (MN10300_OPERAND_*): Define.
2086
2087Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
2088
2089 * mn10x00.h: Delete.
2090 * mn10200.h, mn10300.h: New files.
2091
2092Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
2093
2094 * mn10x00.h: New file.
2095
2096Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2097
adadcc0c 2098 * v850.h: Add new flag to indicate this instruction uses a PC
252b5132
RH
2099 displacement.
2100
2101Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2102
2103 * h8300.h (stmac): Add missing instruction.
2104
2105Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2106
2107 * v850.h (v850_opcode): Remove "size" field. Add "memop"
2108 field.
2109
2110Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2111
2112 * v850.h (V850_OPERAND_EP): Define.
2113
2114 * v850.h (v850_opcode): Add size field.
2115
2116Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2117
2118 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 2119 to functions used to handle unusual operand encoding.
252b5132 2120 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 2121 V850_OPERAND_SIGNED): Defined.
252b5132
RH
2122
2123Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2124
2125 * v850.h (v850_operands): Add flags field.
2126 (OPERAND_REG, OPERAND_NUM): Defined.
2127
2128Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2129
2130 * v850.h: New file.
2131
2132Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2133
2134 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
2135 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2136 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2137 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2138 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2139 Defined.
252b5132
RH
2140
2141Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2142
2143 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2144 a 3 bit space id instead of a 2 bit space id.
2145
2146Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2147
2148 * d10v.h: Add some additional defines to support the
d83c6548 2149 assembler in determining which operations can be done in parallel.
252b5132
RH
2150
2151Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2152
2153 * h8300.h (SN): Define.
2154 (eepmov.b): Renamed from "eepmov"
2155 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2156 with them.
2157
2158Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2159
2160 * d10v.h (OPERAND_SHIFT): New operand flag.
2161
2162Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2163
2164 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 2165 signed numbers.
252b5132
RH
2166
2167Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2168
2169 * d10v.h (pd_reg): Define. Putting the definition here allows
2170 the assembler and disassembler to share the same struct.
2171
2172Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2173
2174 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2175 Williams <steve@icarus.com>.
2176
2177Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2178
2179 * d10v.h: New file.
2180
2181Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2182
2183 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2184
2185Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2186
d83c6548 2187 * m68k.h (mcf5200): New macro.
252b5132
RH
2188 Document names of coldfire control registers.
2189
2190Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2191
2192 * h8300.h (SRC_IN_DST): Define.
2193
2194 * h8300.h (UNOP3): Mark the register operand in this insn
2195 as a source operand, not a destination operand.
2196 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2197 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2198 register operand with SRC_IN_DST.
2199
2200Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2201
2202 * alpha.h: New file.
2203
2204Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2205
2206 * rs6k.h: Remove obsolete file.
2207
2208Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2209
2210 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2211 fdivp, and fdivrp. Add ffreep.
2212
2213Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2214
2215 * h8300.h: Reorder various #defines for readability.
2216 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2217 (BITOP): Accept additional (unused) argument. All callers changed.
2218 (EBITOP): Likewise.
2219 (O_LAST): Bump.
2220 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2221
2222 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2223 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2224 (BITOP, EBITOP): Handle new H8/S addressing modes for
2225 bit insns.
2226 (UNOP3): Handle new shift/rotate insns on the H8/S.
2227 (insns using exr): New instructions.
2228 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2229
2230Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2231
2232 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2233 was incorrect.
2234
2235Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2236
2237 * h8300.h (START): Remove.
2238 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2239 and mov.l insns that can be relaxed.
2240
2241Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2242
2243 * i386.h: Remove Abs32 from lcall.
2244
2245Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2246
2247 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2248 (SLCPOP): New macro.
2249 Mark X,Y opcode letters as in use.
2250
2251Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2252
2253 * sparc.h (F_FLOAT, F_FBR): Define.
2254
2255Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2256
2257 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2258 from all insns.
2259 (ABS8SRC,ABS8DST): Add ABS8MEM.
2260 (add.l): Fix reg+reg variant.
2261 (eepmov.w): Renamed from eepmovw.
2262 (ldc,stc): Fix many cases.
2263
2264Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2265
2266 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2267
2268Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2269
2270 * sparc.h (O): Mark operand letter as in use.
2271
2272Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2273
2274 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2275 Mark operand letters uU as in use.
2276
2277Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2278
2279 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2280 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2281 (SPARC_OPCODE_SUPPORTED): New macro.
2282 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2283 (F_NOTV9): Delete.
2284
2285Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2286
2287 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2288 declaration consistent with return type in definition.
2289
2290Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2291
2292 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2293
2294Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2295
2296 * i386.h (i386_regtab): Add 80486 test registers.
2297
2298Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2299
2300 * i960.h (I_HX): Define.
2301 (i960_opcodes): Add HX instruction.
2302
2303Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2304
2305 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2306 and fclex.
2307
2308Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2309
2310 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2311 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2312 (bfd_* defines): Delete.
2313 (sparc_opcode_archs): Replaces architecture_pname.
2314 (sparc_opcode_lookup_arch): Declare.
2315 (NUMOPCODES): Delete.
2316
2317Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2318
2319 * sparc.h (enum sparc_architecture): Add v9a.
2320 (ARCHITECTURES_CONFLICT_P): Update.
2321
2322Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2323
2324 * i386.h: Added Pentium Pro instructions.
2325
2326Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2327
2328 * m68k.h: Document new 'W' operand place.
2329
2330Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2331
2332 * hppa.h: Add lci and syncdma instructions.
2333
2334Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2335
2336 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2337 instructions.
252b5132
RH
2338
2339Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2340
2341 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2342 assembler's -mcom and -many switches.
2343
2344Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2345
2346 * i386.h: Fix cmpxchg8b extension opcode description.
2347
2348Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2349
2350 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2351 and register cr4.
2352
2353Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2354
2355 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2356
2357Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2358
2359 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2360
2361Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2362
2363 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2364
2365Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2366
2367 * m68kmri.h: Remove.
2368
2369 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2370 declarations. Remove F_ALIAS and flag field of struct
2371 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2372 int. Make name and args fields of struct m68k_opcode const.
2373
2374Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2375
2376 * sparc.h (F_NOTV9): Define.
2377
2378Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2379
2380 * mips.h (INSN_4010): Define.
2381
2382Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2383
2384 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2385
2386 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2387 * m68k.h: Fix argument descriptions of coprocessor
2388 instructions to allow only alterable operands where appropriate.
2389 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2390 (m68k_opcode_aliases): Add more aliases.
2391
2392Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2393
2394 * m68k.h: Added explcitly short-sized conditional branches, and a
2395 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2396 svr4-based configurations.
2397
2398Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2399
2400 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2401 * i386.h: added missing Data16/Data32 flags to a few instructions.
2402
2403Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2404
2405 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2406 (OP_MASK_BCC, OP_SH_BCC): Define.
2407 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2408 (OP_MASK_CCC, OP_SH_CCC): Define.
2409 (INSN_READ_FPR_R): Define.
2410 (INSN_RFE): Delete.
2411
2412Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2413
2414 * m68k.h (enum m68k_architecture): Deleted.
2415 (struct m68k_opcode_alias): New type.
2416 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2417 matching constraints, values and flags. As a side effect of this,
2418 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2419 as I know were never used, now may need re-examining.
2420 (numopcodes): Now const.
2421 (m68k_opcode_aliases, numaliases): New variables.
2422 (endop): Deleted.
2423 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2424 m68k_opcode_aliases; update declaration of m68k_opcodes.
2425
2426Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2427
2428 * hppa.h (delay_type): Delete unused enumeration.
2429 (pa_opcode): Replace unused delayed field with an architecture
2430 field.
2431 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2432
2433Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2434
2435 * mips.h (INSN_ISA4): Define.
2436
2437Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2438
2439 * mips.h (M_DLA_AB, M_DLI): Define.
2440
2441Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2442
2443 * hppa.h (fstwx): Fix single-bit error.
2444
2445Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2446
2447 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2448
2449Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2450
2451 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2452 debug registers. From Charles Hannum (mycroft@netbsd.org).
2453
2454Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2455
2456 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2457 i386 support:
2458 * i386.h (MOV_AX_DISP32): New macro.
2459 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2460 of several call/return instructions.
2461 (ADDR_PREFIX_OPCODE): New macro.
2462
2463Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2464
2465 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2466
adadcc0c 2467 * vax.h (struct vot_wot, field `args'): Make it pointer to const
4f1d9bd8 2468 char.
adadcc0c 2469 (struct vot, field `name'): ditto.
252b5132
RH
2470
2471Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2472
2473 * vax.h: Supply and properly group all values in end sentinel.
2474
2475Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2476
2477 * mips.h (INSN_ISA, INSN_4650): Define.
2478
2479Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2480
2481 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2482 systems with a separate instruction and data cache, such as the
2483 29040, these instructions take an optional argument.
2484
2485Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2486
2487 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2488 INSN_TRAP.
2489
2490Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2491
2492 * mips.h (INSN_STORE_MEMORY): Define.
2493
2494Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2495
2496 * sparc.h: Document new operand type 'x'.
2497
2498Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2499
2500 * i960.h (I_CX2): New instruction category. It includes
2501 instructions available on Cx and Jx processors.
2502 (I_JX): New instruction category, for JX-only instructions.
2503 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2504 Jx-only instructions, in I_JX category.
2505
2506Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2507
2508 * ns32k.h (endop): Made pointer const too.
2509
2510Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2511
2512 * ns32k.h: Drop Q operand type as there is no correct use
2513 for it. Add I and Z operand types which allow better checking.
2514
2515Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2516
2517 * h8300.h (xor.l) :fix bit pattern.
2518 (L_2): New size of operand.
2519 (trapa): Use it.
2520
2521Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2522
2523 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2524
2525Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2526
2527 * sparc.h: Include v9 definitions.
2528
2529Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2530
2531 * m68k.h (m68060): Defined.
2532 (m68040up, mfloat, mmmu): Include it.
2533 (struct m68k_opcode): Widen `arch' field.
2534 (m68k_opcodes): Updated for M68060. Removed comments that were
2535 instructions commented out by "JF" years ago.
2536
2537Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2538
2539 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2540 add a one-bit `flags' field.
2541 (F_ALIAS): New macro.
2542
2543Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2544
2545 * h8300.h (dec, inc): Get encoding right.
2546
2547Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2548
2549 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2550 a flag instead.
2551 (PPC_OPERAND_SIGNED): Define.
2552 (PPC_OPERAND_SIGNOPT): Define.
2553
2554Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2555
2556 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2557 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2558
2559Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2560
2561 * i386.h: Reverse last change. It'll be handled in gas instead.
2562
2563Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2564
2565 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2566 slower on the 486 and used the implicit shift count despite the
2567 explicit operand. The one-operand form is still available to get
2568 the shorter form with the implicit shift count.
2569
2570Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2571
2572 * hppa.h: Fix typo in fstws arg string.
2573
2574Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2575
2576 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2577
2578Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2579
2580 * ppc.h (PPC_OPCODE_601): Define.
2581
2582Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2583
2584 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2585 (so we can determine valid completers for both addb and addb[tf].)
2586
2587 * hppa.h (xmpyu): No floating point format specifier for the
2588 xmpyu instruction.
2589
2590Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2591
2592 * ppc.h (PPC_OPERAND_NEXT): Define.
2593 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2594 (struct powerpc_macro): Define.
2595 (powerpc_macros, powerpc_num_macros): Declare.
2596
2597Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2598
2599 * ppc.h: New file. Header file for PowerPC opcode table.
2600
2601Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2602
2603 * hppa.h: More minor template fixes for sfu and copr (to allow
2604 for easier disassembly).
2605
2606 * hppa.h: Fix templates for all the sfu and copr instructions.
2607
2608Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2609
2610 * i386.h (push): Permit Imm16 operand too.
2611
2612Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2613
2614 * h8300.h (andc): Exists in base arch.
2615
2616Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2617
2618 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2619 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2620
2621Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2622
2623 * hppa.h: Add FP quadword store instructions.
2624
2625Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2626
2627 * mips.h: (M_J_A): Added.
2628 (M_LA): Removed.
2629
2630Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2631
2632 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2633 <mellon@pepper.ncd.com>.
2634
2635Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2636
2637 * hppa.h: Immediate field in probei instructions is unsigned,
2638 not low-sign extended.
2639
2640Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2641
2642 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2643
2644Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2645
2646 * i386.h: Add "fxch" without operand.
2647
2648Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2649
2650 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2651
2652Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2653
2654 * hppa.h: Add gfw and gfr to the opcode table.
2655
2656Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2657
2658 * m88k.h: extended to handle m88110.
2659
2660Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2661
2662 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2663 addresses.
2664
2665Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2666
2667 * i960.h (i960_opcodes): Properly bracket initializers.
2668
2669Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2670
2671 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2672
2673Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2674
2675 * m68k.h (two): Protect second argument with parentheses.
2676
2677Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2678
2679 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2680 Deleted old in/out instructions in "#if 0" section.
2681
2682Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2683
2684 * i386.h (i386_optab): Properly bracket initializers.
2685
2686Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2687
2688 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2689 Jeff Law, law@cs.utah.edu).
2690
2691Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2692
2693 * i386.h (lcall): Accept Imm32 operand also.
2694
2695Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2696
2697 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2698 (M_DABS): Added.
2699
2700Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2701
2702 * mips.h (INSN_*): Changed values. Removed unused definitions.
2703 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2704 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2705 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2706 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2707 (M_*): Added new values for r6000 and r4000 macros.
2708 (ANY_DELAY): Removed.
2709
2710Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2711
2712 * mips.h: Added M_LI_S and M_LI_SS.
2713
2714Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2715
2716 * h8300.h: Get some rare mov.bs correct.
2717
2718Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2719
2720 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2721 been included.
2722
2723Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2724
adadcc0c 2725 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
252b5132
RH
2726 jump instructions, for use in disassemblers.
2727
2728Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2729
2730 * m88k.h: Make bitfields just unsigned, not unsigned long or
2731 unsigned short.
2732
2733Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2734
2735 * hppa.h: New argument type 'y'. Use in various float instructions.
2736
2737Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2738
2739 * hppa.h (break): First immediate field is unsigned.
2740
2741 * hppa.h: Add rfir instruction.
2742
2743Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2744
2745 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2746
2747Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2748
2749 * mips.h: Reworked the hazard information somewhat, and fixed some
2750 bugs in the instruction hazard descriptions.
2751
2752Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2753
2754 * m88k.h: Corrected a couple of opcodes.
2755
2756Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2757
2758 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2759 new version includes instruction hazard information, but is
2760 otherwise reasonably similar.
2761
2762Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2763
2764 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2765
2766Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2767
2768 Patches from Jeff Law, law@cs.utah.edu:
2769 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2770 Make the tables be the same for the following instructions:
2771 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2772 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2773 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2774 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2775 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2776 "fcmp", and "ftest".
2777
2778 * hppa.h: Make new and old tables the same for "break", "mtctl",
2779 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2780 Fix typo in last patch. Collapse several #ifdefs into a
2781 single #ifdef.
2782
2783 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2784 of the comments up-to-date.
2785
2786 * hppa.h: Update "free list" of letters and update
2787 comments describing each letter's function.
2788
4f1d9bd8
NC
2789Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2790
2791 * h8300.h: Lots of little fixes for the h8/300h.
2792
2793Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2794
2795 Support for H8/300-H
2796 * h8300.h: Lots of new opcodes.
2797
252b5132
RH
2798Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2799
2800 * h8300.h: checkpoint, includes H8/300-H opcodes.
2801
2802Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2803
2804 * Patches from Jeffrey Law <law@cs.utah.edu>.
2805 * hppa.h: Rework single precision FP
2806 instructions so that they correctly disassemble code
2807 PA1.1 code.
2808
2809Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2810
2811 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2812 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2813
2814Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2815
2816 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2817 gdb will define it for now.
2818
2819Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2820
2821 * sparc.h: Don't end enumerator list with comma.
2822
2823Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2824
2825 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2826 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2827 ("bc2t"): Correct typo.
2828 ("[ls]wc[023]"): Use T rather than t.
2829 ("c[0123]"): Define general coprocessor instructions.
2830
2831Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2832
2833 * m68k.h: Move split point for gcc compilation more towards
2834 middle.
2835
2836Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2837
2838 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2839 simply wrong, ics, rfi, & rfsvc were missing).
2840 Add "a" to opr_ext for "bb". Doc fix.
2841
2842Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2843
adadcc0c
AM
2844 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2845 * mips.h: Add casts, to suppress warnings about shifting too much.
2846 * m68k.h: Document the placement code '9'.
252b5132
RH
2847
2848Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2849
adadcc0c 2850 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
252b5132
RH
2851 allows callers to break up the large initialized struct full of
2852 opcodes into two half-sized ones. This permits GCC to compile
2853 this module, since it takes exponential space for initializers.
adadcc0c 2854 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
252b5132
RH
2855
2856Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2857
adadcc0c
AM
2858 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2859 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
252b5132
RH
2860 initialized structs in it.
2861
2862Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2863
2864 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
adadcc0c
AM
2865 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2866 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
252b5132
RH
2867
2868Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2869
2870 * mips.h: document "i" and "j" operands correctly.
2871
2872Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2873
2874 * mips.h: Removed endianness dependency.
2875
2876Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2877
2878 * h8300.h: include info on number of cycles per instruction.
2879
2880Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2881
adadcc0c 2882 * hppa.h: Move handy aliases to the front. Fix masks for extract
252b5132
RH
2883 and deposit instructions.
2884
2885Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2886
2887 * i386.h: accept shld and shrd both with and without the shift
2888 count argument, which is always %cl.
2889
2890Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2891
2892 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2893 (one_byte_segment_defaults, two_byte_segment_defaults,
2894 i386_prefixtab_end): Ditto.
2895
2896Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2897
2898 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2899 for operand 2; from John Carr, jfc@dsg.dec.com.
2900
2901Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2902
2903 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2904 always use 16-bit offsets. Makes calculated-size jump tables
2905 feasible.
2906
2907Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2908
2909 * i386.h: Fix one-operand forms of in* and out* patterns.
2910
2911Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2912
2913 * m68k.h: Added CPU32 support.
2914
2915Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2916
adadcc0c 2917 * mips.h (break): Disassemble the argument. Patch from
252b5132
RH
2918 jonathan@cs.stanford.edu (Jonathan Stone).
2919
2920Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2921
2922 * m68k.h: merged Motorola and MIT syntax.
2923
2924Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2925
2926 * m68k.h (pmove): make the tests less strict, the 68k book is
2927 wrong.
2928
2929Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2930
2931 * m68k.h (m68ec030): Defined as alias for 68030.
2932 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2933 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2934 them. Tightened description of "fmovex" to distinguish it from
2935 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2936 up descriptions that claimed versions were available for chips not
2937 supporting them. Added "pmovefd".
2938
2939Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2940
2941 * m68k.h: fix where the . goes in divull
2942
2943Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2944
2945 * m68k.h: the cas2 instruction is supposed to be written with
2946 indirection on the last two operands, which can be either data or
2947 address registers. Added a new operand type 'r' which accepts
2948 either register type. Added new cases for cas2l and cas2w which
2949 use them. Corrected masks for cas2 which failed to recognize use
2950 of address register.
2951
2952Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2953
adadcc0c 2954 * m68k.h: Merged in patches (mostly m68040-specific) from
252b5132
RH
2955 Colin Smith <colin@wrs.com>.
2956
adadcc0c 2957 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
252b5132
RH
2958 base). Also cleaned up duplicates, re-ordered instructions for
2959 the sake of dis-assembling (so aliases come after standard names).
2960 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2961
2962Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2963
2964 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2965 all missing .s
2966
2967Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2968
2969 * sparc.h: Moved tables to BFD library.
2970
2971 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2972
2973Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2974
adadcc0c 2975 * h8300.h: Finish filling in all the holes in the opcode table,
252b5132
RH
2976 so that the Lucid C compiler can digest this as well...
2977
2978Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2979
adadcc0c 2980 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
252b5132
RH
2981 Fix opcodes on various sizes of fild/fist instructions
2982 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2983 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2984
2985Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2986
adadcc0c 2987 * h8300.h: Fill in all the holes in the opcode table so that the
252b5132
RH
2988 losing HPUX C compiler can digest this...
2989
2990Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2991
adadcc0c 2992 * mips.h: Fix decoding of coprocessor instructions, somewhat.
252b5132
RH
2993 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2994
2995Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2996
2997 * sparc.h: Add new architecture variant sparclite; add its scan
2998 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2999
3000Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
3001
adadcc0c 3002 * mips.h: Add some more opcode synonyms (from Frank Yellin,
252b5132
RH
3003 fy@lucid.com).
3004
3005Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
3006
adadcc0c 3007 * rs6k.h: New version from IBM (Metin).
252b5132
RH
3008
3009Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
3010
3011 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
adadcc0c 3012 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
252b5132
RH
3013
3014Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
3015
adadcc0c 3016 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
252b5132
RH
3017
3018Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
3019
adadcc0c 3020 * m68k.h (one, two): Cast macro args to unsigned to suppress
252b5132
RH
3021 complaints from compiler and lint about integer overflow during
3022 shift.
3023
3024Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
3025
adadcc0c 3026 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
252b5132
RH
3027
3028Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
3029
adadcc0c 3030 * mips.h: Make bitfield layout depend on the HOST compiler,
252b5132
RH
3031 not on the TARGET system.
3032
3033Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
3034
3035 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
3036 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
3037 <TRANLE@INTELLICORP.COM>.
3038
3039Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
3040
3041 * h8300.h: turned op_type enum into #define list
3042
3043Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
3044
adadcc0c 3045 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
252b5132
RH
3046 similar instructions -- they've been renamed to "fitoq", etc.
3047 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
3048 number of arguments.
adadcc0c 3049 * h8300.h: Remove extra ; which produces compiler warning.
252b5132
RH
3050
3051Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
3052
adadcc0c 3053 * sparc.h: fix opcode for tsubcctv.
252b5132
RH
3054
3055Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
3056
3057 * sparc.h: fba and cba are now aliases for fb and cb respectively.
3058
3059Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
3060
adadcc0c 3061 * sparc.h (nop): Made the 'lose' field be even tighter,
252b5132
RH
3062 so only a standard 'nop' is disassembled as a nop.
3063
3064Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
3065
3066 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
3067 disassembled as a nop.
3068
4f1d9bd8
NC
3069Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
3070
adadcc0c 3071 * m68k.h, sparc.h: ANSIfy enums.
4f1d9bd8 3072
252b5132
RH
3073Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
3074
3075 * sparc.h: fix a typo.
3076
3077Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
3078
3079 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
3080 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 3081 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
3082
3083\f
3084Local Variables:
3085version-control: never
3086End:
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