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Fix 3 DV bugs, and a few minor cleanups.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
50b81f19
JW		 12000-08-16 Jim Wilson <wilson@cygnus.com>
2
3 * ia64.h (IA64_OPCODE_POSTINC): New.
4
fc29466d
L		 52000-08-15 H.J. Lu <hjl@gnu.org>
6
7 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
8 IgnoreSize change.
9
45ee1401
DC		 102000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
11
12 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
13 Move related opcodes closer to each other.
14 Minor changes in comments, list undefined opcodes.
15
9d551405
DB		 162000-07-26 Dave Brolley <brolley@redhat.com>
17
18 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
19
c8488617
HPN		 202000-07-20 Hans-Peter Nilsson <hp@axis.com>
21
22 cris.h: New file.
23
65aa24b6
NC		 242000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
25
26 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
27 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
28 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
29 (AVR_ISA_M83): Define for ATmega83, ATmega85.
30 (espm): Remove, because ESPM removed in databook update.
31 (eicall, eijmp): Move to the end of opcode table.
32
60bcf0fa
NC		 332000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
34
35 * m68hc11.h: New file for support of Motorola 68hc11.
36
60a2978a
DC		 37Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
38
39 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
40
68ab2dd9
DC		 41Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
42
43 * avr.h: New file with AVR opcodes.
44
f0662e27
DL		 45Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
46
47 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
48
b722f2be
AM		 492000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
50
51 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
52
f9e0cf0b
AM		 532000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
54
55 * i386.h: Use sl_FP, not sl_Suf for fild.
56
f660ee8b
FCE		 572000-05-16 Frank Ch. Eigler <fche@redhat.com>
58
59 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
60 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
61 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
62 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
63
558b0a60
AM		 642000-05-13 Alan Modra <alan@linuxcare.com.au>,
65
66 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
67
e413e4e9
AM		 682000-05-13 Alan Modra <alan@linuxcare.com.au>,
69 Alexander Sokolov <robocop@netlink.ru>
70
71 * i386.h (i386_optab): Add cpu_flags for all instructions.
72
732000-05-13 Alan Modra <alan@linuxcare.com.au>
74
75 From Gavin Romig-Koch <gavin@cygnus.com>
76 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
77
5c84d377
TW		 782000-05-04 Timothy Wall <twall@cygnus.com>
79
80 * tic54x.h: New.
81
966f959b
C		 822000-05-03 J.T. Conklin <jtc@redback.com>
83
84 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
85 (PPC_OPERAND_VR): New operand flag for vector registers.
86
c5d05dbb
JL		 872000-05-01 Kazu Hirata <kazu@hxi.com>
88
89 * h8300.h (EOP): Add missing initializer.
90
a7fba0e0
JL		 91Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
92
93 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
94 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
95 New operand types l,y,&,fe,fE,fx added to support above forms.
96 (pa_opcodes): Replaced usage of 'x' as source/target for
97 floating point double-word loads/stores with 'fx'.
98
800eeca4
JW		 99Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
100 David Mosberger <davidm@hpl.hp.com>
101 Timothy Wall <twall@cygnus.com>
102 Jim Wilson <wilson@cygnus.com>
103
104 * ia64.h: New file.
105
ba23e138
NC		 1062000-03-27 Nick Clifton <nickc@cygnus.com>
107
108 * d30v.h (SHORT_A1): Fix value.
109 (SHORT_AR): Renumber so that it is at the end of the list of short
110 instructions, not the end of the list of long instructions.
111
d0b47220
AM		 1122000-03-26 Alan Modra <alan@linuxcare.com>
113
114 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
115 problem isn't really specific to Unixware.
116 (OLDGCC_COMPAT): Define.
117 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
118 destination %st(0).
119 Fix lots of comments.
120
866afedc
NC		 1212000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
122
123 * d30v.h:
124 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
125 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
126 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
127 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
128 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
129 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
130 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
131
cc5ca5ce
AM		 1322000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
133
134 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
135 fistpd without suffix.
136
68e324a2
NC		 1372000-02-24 Nick Clifton <nickc@cygnus.com>
138
139 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
140 'signed_overflow_ok_p'.
141 Delete prototypes for cgen_set_flags() and cgen_get_flags().
142
60f036a2
AH		 1432000-02-24 Andrew Haley <aph@cygnus.com>
144
145 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
146 (CGEN_CPU_TABLE): flags: new field.
147 Add prototypes for new functions.
148
9b9b5cd4
AM		 1492000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
150
151 * i386.h: Add some more UNIXWARE_COMPAT comments.
152
5b93d8bb
AM		 1532000-02-23 Linas Vepstas <linas@linas.org>
154
155 * i370.h: New file.
156
87f398dd
AH		 1572000-02-22 Andrew Haley <aph@cygnus.com>
158
159 * mips.h: (OPCODE_IS_MEMBER): Add comment.
160
367c01af
AH		 1611999-12-30 Andrew Haley <aph@cygnus.com>
162
9a1e79ca
AH		 163 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
164 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
165 insns.
367c01af 166
add0c677
AM		 1672000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
168
169 * i386.h: Qualify intel mode far call and jmp with x_Suf.
170
3138f287
AM		 1711999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
172
173 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
174 indirect jumps and calls. Add FF/3 call for intel mode.
175
ccecd07b
JL		 176Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
177
178 * mn10300.h: Add new operand types. Add new instruction formats.
179
b37e19e9
JL		 180Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
181
182 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
183 instruction.
184
5fce5ddf
GRK		 1851999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
186
187 * mips.h (INSN_ISA5): New.
188
2bd7f1f3
GRK		 1891999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
190
191 * mips.h (OPCODE_IS_MEMBER): New.
192
4df2b5c5
NC		 1931999-10-29 Nick Clifton <nickc@cygnus.com>
194
195 * d30v.h (SHORT_AR): Define.
196
446a06c9
MM		 1971999-10-18 Michael Meissner <meissner@cygnus.com>
198
199 * alpha.h (alpha_num_opcodes): Convert to unsigned.
200 (alpha_num_operands): Ditto.
201
eca04c6a
JL		 202Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
203
204 * hppa.h (pa_opcodes): Add load and store cache control to
205 instructions. Add ordered access load and store.
206
207 * hppa.h (pa_opcode): Add new entries for addb and addib.
208
209 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
210
211 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
212
c43185de
DN		 213Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
214
215 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
216
ec3533da
JL		 217Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
218
390f858d
JL		 219 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
220 and "be" using completer prefixes.
221
8c47ebd9
JL		 222 * hppa.h (pa_opcodes): Add initializers to silence compiler.
223
ec3533da
JL		 224 * hppa.h: Update comments about character usage.
225
18369bea
JL		 226Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
227
228 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
229 up the new fstw & bve instructions.
230
c36efdd2
JL		 231Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
232
d3ffb032
JL		 233 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
234 instructions.
235
c49ec3da
JL		 236 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
237
5d2e7ecc
JL		 238 * hppa.h (pa_opcodes): Add long offset double word load/store
239 instructions.
240
6397d1a2
JL		 241 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
242 stores.
243
142f0fe0
JL		 244 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
245
f5a68b45
JL		 246 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
247
8235801e
JL		 248 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
249
35184366
JL		 250 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
251
f0bfde5e
JL		 252 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
253
27bbbb58
JL		 254 * hppa.h (pa_opcodes): Add support for "b,l".
255
c36efdd2
JL		 256 * hppa.h (pa_opcodes): Add support for "b,gate".
257
f2727d04
JL		 258Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
259
9392fb11
JL		 260 * hppa.h (pa_opcodes): Use 'fX' for first register operand
261 in xmpyu.
262
e0c52e99
JL		 263 * hppa.h (pa_opcodes): Fix mask for probe and probei.
264
f2727d04
JL		 265 * hppa.h (pa_opcodes): Fix mask for depwi.
266
52d836e2
JL		 267Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
268
269 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
270 an explicit output argument.
271
90765e3a
JL		 272Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
273
274 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
275 Add a few PA2.0 loads and store variants.
276
8340b17f
ILT		 2771999-09-04 Steve Chamberlain <sac@pobox.com>
278
279 * pj.h: New file.
280
5f47d35b
AM		 2811999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
282
283 * i386.h (i386_regtab): Move %st to top of table, and split off
284 other fp reg entries.
285 (i386_float_regtab): To here.
286
1c143202
JL		 287Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
288
7d8fdb64
JL		 289 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
290 by 'f'.
291
90927b9c
JL		 292 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
293 Add supporting args.
294
1d16bf9c
JL		 295 * hppa.h: Document new completers and args.
296 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
297 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
298 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
299 pmenb and pmdis.
300
96226a68
JL		 301 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
302 hshr, hsub, mixh, mixw, permh.
303
5d4ba527
JL		 304 * hppa.h (pa_opcodes): Change completers in instructions to
305 use 'c' prefix.
306
e9fc28c6
JL		 307 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
308 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
309
1c143202
JL		 310 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
311 fnegabs to use 'I' instead of 'F'.
312
9e525108
AM		 3131999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
314
315 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
316 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
317 Alphabetically sort PIII insns.
318
e8da1bf1
DE		 319Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
320
321 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
322
7d627258
JL		 323Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
324
5696871a
JL		 325 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
326 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
327
7d627258
JL		 328 * hppa.h: Document 64 bit condition completers.
329
c5e52916
JL		 330Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
331
332 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
333
eecb386c
AM		 3341999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
335
336 * i386.h (i386_optab): Add DefaultSize modifier to all insns
337 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
338 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
339
88a380f3
JL		 340Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
341 Jeff Law <law@cygnus.com>
342
343 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
344
345 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 346
347 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
348 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
349
145cf1f0
AM		 3501999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
351
352 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
353
73826640
JL		 354Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
355
356 * hppa.h (struct pa_opcode): Add new field "flags".
357 (FLAGS_STRICT): Define.
358
b65db252
JL		 359Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
360 Jeff Law <law@cygnus.com>
361
f7fc668b
JL		 362 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
363
364 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 365
10084519
AM		 3661999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
367
368 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
369 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
370 flag to fcomi and friends.
371
cd8a80ba
JL		 372Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
373
374 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
375 integer logical instructions.
376
1fca749b
ILT		 3771999-05-28 Linus Nordberg <linus.nordberg@canit.se>
378
379 * m68k.h: Document new formats `E', `G', `H' and new places `N',
380 `n', `o'.
381
382 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
383 and new places `m', `M', `h'.
384
aa008907
JL		 385Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
386
387 * hppa.h (pa_opcodes): Add several processor specific system
388 instructions.
389
e26b85f0
JL		 390Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
391
392 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
393 "addb", and "addib" to be used by the disassembler.
394
c608c12e
AM		 3951999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
396
397 * i386.h (ReverseModrm): Remove all occurences.
398 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
399 movmskps, pextrw, pmovmskb, maskmovq.
400 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
401 ignore the data size prefix.
402
403 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
404 Mostly stolen from Doug Ledford <dledford@redhat.com>
405
45c18104
RH		 406Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
407
408 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
409
252b5132
RH		 4101999-04-14 Doug Evans <devans@casey.cygnus.com>
411
412 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
413 (CGEN_ATTR_TYPE): Update.
414 (CGEN_ATTR_MASK): Number booleans starting at 0.
415 (CGEN_ATTR_VALUE): Update.
416 (CGEN_INSN_ATTR): Update.
417
418Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
419
420 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
421 instructions.
422
423Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
424
425 * hppa.h (bb, bvb): Tweak opcode/mask.
426
427
4281999-03-22 Doug Evans <devans@casey.cygnus.com>
429
430 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
431 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
432 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
433 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
434 Delete member max_insn_size.
435 (enum cgen_cpu_open_arg): New enum.
436 (cpu_open): Update prototype.
437 (cpu_open_1): Declare.
438 (cgen_set_cpu): Delete.
439
4401999-03-11 Doug Evans <devans@casey.cygnus.com>
441
442 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
443 (CGEN_OPERAND_NIL): New macro.
444 (CGEN_OPERAND): New member `type'.
445 (@arch@_cgen_operand_table): Delete decl.
446 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
447 (CGEN_OPERAND_TABLE): New struct.
448 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
449 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
450 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
451 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
452 {get,set}_{int,vma}_operand.
453 (@arch@_cgen_cpu_open): New arg `isa'.
454 (cgen_set_cpu): Ditto.
455
456Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
457
458 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
459
4601999-02-25 Doug Evans <devans@casey.cygnus.com>
461
462 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
463 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
464 enum cgen_hw_type.
465 (CGEN_HW_TABLE): New struct.
466 (hw_table): Delete declaration.
467 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
468 to table entry to enum.
469 (CGEN_OPINST): Ditto.
470 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
471
472Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
473
474 * alpha.h (AXP_OPCODE_EV6): New.
475 (AXP_OPCODE_NOPAL): Include it.
476
4771999-02-09 Doug Evans <devans@casey.cygnus.com>
478
479 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
480 All uses updated. New members int_insn_p, max_insn_size,
481 parse_operand,insert_operand,extract_operand,print_operand,
482 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
483 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
484 extract_handlers,print_handlers.
485 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
486 (CGEN_ATTR_BOOL_OFFSET): New macro.
487 (CGEN_ATTR_MASK): Subtract it to compute bit number.
488 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
489 (cgen_opcode_handler): Renamed from cgen_base.
490 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
491 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
492 all uses updated.
493 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
494 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
495 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
496 (CGEN_OPCODE,CGEN_IBASE): New types.
497 (CGEN_INSN): Rewrite.
498 (CGEN_{ASM,DIS}_HASH*): Delete.
499 (init_opcode_table,init_ibld_table): Declare.
500 (CGEN_INSN_ATTR): New type.
501
502Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
503
504 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
505 (x_FP, d_FP, dls_FP, sldx_FP): Define.
506 Change *Suf definitions to include x and d suffixes.
507 (movsx): Use w_Suf and b_Suf.
508 (movzx): Likewise.
509 (movs): Use bwld_Suf.
510 (fld): Change ordering. Use sld_FP.
511 (fild): Add Intel Syntax equivalent of fildq.
512 (fst): Use sld_FP.
513 (fist): Use sld_FP.
514 (fstp): Use sld_FP. Add x_FP version.
515 (fistp): LLongMem version for Intel Syntax.
516 (fcom, fcomp): Use sld_FP.
517 (fadd, fiadd, fsub): Use sld_FP.
518 (fsubr): Use sld_FP.
519 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
520
5211999-01-27 Doug Evans <devans@casey.cygnus.com>
522
523 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
524 CGEN_MODE_UINT.
525
526Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
527
528 * hppa.h (bv): Fix mask.
529
5301999-01-05 Doug Evans <devans@casey.cygnus.com>
531
532 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
533 (CGEN_ATTR): Use it.
534 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
535 (CGEN_ATTR_TABLE): New member dfault.
536
5371998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
538
539 * mips.h (MIPS16_INSN_BRANCH): New.
540
541Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
542
543 The following is part of a change made by Edith Epstein
544 <eepstein@sophia.cygnus.com> as part of a project to merge in
545 changes by HP; HP did not create ChangeLog entries.
546
547 * hppa.h (completer_chars): list of chars to not put a space
548 after.
549
550Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
551
552 * i386.h (i386_optab): Permit w suffix on processor control and
553 status word instructions.
554
5551998-11-30 Doug Evans <devans@casey.cygnus.com>
556
557 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
558 (struct cgen_keyword_entry): Ditto.
559 (struct cgen_operand): Ditto.
560 (CGEN_IFLD): New typedef, with associated access macros.
561 (CGEN_IFMT): New typedef, with associated access macros.
562 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
563 (CGEN_IVALUE): New typedef.
564 (struct cgen_insn): Delete const on syntax,attrs members.
565 `format' now points to format data. Type of `value' is now
566 CGEN_IVALUE.
567 (struct cgen_opcode_table): New member ifld_table.
568
5691998-11-18 Doug Evans <devans@casey.cygnus.com>
570
571 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
572 (CGEN_OPERAND_INSTANCE): New member `attrs'.
573 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
574 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
575 (cgen_opcode_table): Update type of dis_hash fn.
576 (extract_operand): Update type of `insn_value' arg.
577
578Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
579
580 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
581
582Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
583
584 * mips.h (INSN_MULT): Added.
585
586Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
587
588 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
589
590Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
591
592 * cgen.h (CGEN_INSN_INT): New typedef.
593 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
594 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
595 (CGEN_INSN_BYTES_PTR): New typedef.
596 (CGEN_EXTRACT_INFO): New typedef.
597 (cgen_insert_fn,cgen_extract_fn): Update.
598 (cgen_opcode_table): New member `insn_endian'.
599 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
600 (insert_operand,extract_operand): Update.
601 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
602
603Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
604
605 * cgen.h (CGEN_ATTR_BOOLS): New macro.
606 (struct CGEN_HW_ENTRY): New member `attrs'.
607 (CGEN_HW_ATTR): New macro.
608 (struct CGEN_OPERAND_INSTANCE): New member `name'.
609 (CGEN_INSN_INVALID_P): New macro.
610
611Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
612
613 * hppa.h: Add "fid".
614
615Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
616
617 From Robert Andrew Dale <rob@nb.net>
618 * i386.h (i386_optab): Add AMD 3DNow! instructions.
619 (AMD_3DNOW_OPCODE): Define.
620
621Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
622
623 * d30v.h (EITHER_BUT_PREFER_MU): Define.
624
625Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
626
627 * cgen.h (cgen_insn): #if 0 out element `cdx'.
628
629Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
630
631 Move all global state data into opcode table struct, and treat
632 opcode table as something that is "opened/closed".
633 * cgen.h (CGEN_OPCODE_DESC): New type.
634 (all fns): New first arg of opcode table descriptor.
635 (cgen_set_parse_operand_fn): Add prototype.
636 (cgen_current_machine,cgen_current_endian): Delete.
637 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
638 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
639 dis_hash_table,dis_hash_table_entries.
640 (opcode_open,opcode_close): Add prototypes.
641
642 * cgen.h (cgen_insn): New element `cdx'.
643
644Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
645
646 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
647
648Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
649
650 * mn10300.h: Add "no_match_operands" field for instructions.
651 (MN10300_MAX_OPERANDS): Define.
652
653Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
654
655 * cgen.h (cgen_macro_insn_count): Declare.
656
657Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
658
659 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
660 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
661 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
662 set_{int,vma}_operand.
663
664Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
665
666 * mn10300.h: Add "machine" field for instructions.
667 (MN103, AM30): Define machine types.
668
669Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
670
671 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
672
6731998-06-18 Ulrich Drepper <drepper@cygnus.com>
674
675 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
676
677Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
678
679 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
680 and ud2b.
681 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
682 those that happen to be implemented on pentiums.
683
684Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
685
686 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
687 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
688 with Size16|IgnoreSize or Size32|IgnoreSize.
689
690Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
691
692 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
693 (REPE): Rename to REPE_PREFIX_OPCODE.
694 (i386_regtab_end): Remove.
695 (i386_prefixtab, i386_prefixtab_end): Remove.
696 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
697 of md_begin.
698 (MAX_OPCODE_SIZE): Define.
699 (i386_optab_end): Remove.
700 (sl_Suf): Define.
701 (sl_FP): Use sl_Suf.
702
703 * i386.h (i386_optab): Allow 16 bit displacement for `mov
704 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
705 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
706 data32, dword, and adword prefixes.
707 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
708 regs.
709
710Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
711
712 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
713
714 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
715 register operands, because this is a common idiom. Flag them with
716 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
717 fdivrp because gcc erroneously generates them. Also flag with a
718 warning.
719
720 * i386.h: Add suffix modifiers to most insns, and tighter operand
721 checks in some cases. Fix a number of UnixWare compatibility
722 issues with float insns. Merge some floating point opcodes, using
723 new FloatMF modifier.
724 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
725 consistency.
726
727 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
728 IgnoreDataSize where appropriate.
729
730Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
731
732 * i386.h: (one_byte_segment_defaults): Remove.
733 (two_byte_segment_defaults): Remove.
734 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
735
736Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
737
738 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
739 (cgen_hw_lookup_by_num): Declare.
740
741Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
742
743 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
744 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
745
746Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
747
748 * cgen.h (cgen_asm_init_parse): Delete.
749 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
750 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
751
752Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
753
754 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
755 (cgen_asm_finish_insn): Update prototype.
756 (cgen_insn): New members num, data.
757 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
758 dis_hash, dis_hash_table_size moved to ...
759 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
760 All uses updated. New members asm_hash_p, dis_hash_p.
761 (CGEN_MINSN_EXPANSION): New struct.
762 (cgen_expand_macro_insn): Declare.
763 (cgen_macro_insn_count): Declare.
764 (get_insn_operands): Update prototype.
765 (lookup_get_insn_operands): Declare.
766
767Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
768
769 * i386.h (i386_optab): Change iclrKludge and imulKludge to
770 regKludge. Add operands types for string instructions.
771
772Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
773
774 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
775 table.
776
777Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
778
779 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
780 for `gettext'.
781
782Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
783
784 * i386.h: Remove NoModrm flag from all insns: it's never checked.
785 Add IsString flag to string instructions.
786 (IS_STRING): Don't define.
787 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
788 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
789 (SS_PREFIX_OPCODE): Define.
790
791Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
792
793 * i386.h: Revert March 24 patch; no more LinearAddress.
794
795Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
796
797 * i386.h (i386_optab): Remove fwait (9b) from all floating point
798 instructions, and instead add FWait opcode modifier. Add short
799 form of fldenv and fstenv.
800 (FWAIT_OPCODE): Define.
801
802 * i386.h (i386_optab): Change second operand constraint of `mov
803 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
804 allow legal instructions such as `movl %gs,%esi'
805
806Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
807
808 * h8300.h: Various changes to fully bracket initializers.
809
810Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
811
812 * i386.h: Set LinearAddress for lidt and lgdt.
813
814Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
815
816 * cgen.h (CGEN_BOOL_ATTR): New macro.
817
818Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
819
820 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
821
822Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
823
824 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
825 (cgen_insn): Record syntax and format entries here, rather than
826 separately.
827
828Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
829
830 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
831
832Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
833
834 * cgen.h (cgen_insert_fn): Change type of result to const char *.
835 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
836 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
837
838Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
839
840 * cgen.h (lookup_insn): New argument alias_p.
841
842Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
843
844Fix rac to accept only a0:
845 * d10v.h (OPERAND_ACC): Split into:
846 (OPERAND_ACC0, OPERAND_ACC1) .
847 (OPERAND_GPR): Define.
848
849Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
850
851 * cgen.h (CGEN_FIELDS): Define here.
852 (CGEN_HW_ENTRY): New member `type'.
853 (hw_list): Delete decl.
854 (enum cgen_mode): Declare.
855 (CGEN_OPERAND): New member `hw'.
856 (enum cgen_operand_instance_type): Declare.
857 (CGEN_OPERAND_INSTANCE): New type.
858 (CGEN_INSN): New member `operands'.
859 (CGEN_OPCODE_DATA): Make hw_list const.
860 (get_insn_operands,lookup_insn): Add prototypes for.
861
862Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
863
864 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
865 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
866 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
867 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
868
869Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
870
871 * cgen.h: Correct typo in comment end marker.
872
873Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
874
875 * tic30.h: New file.
876
877Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
878
879 * cgen.h: Add prototypes for cgen_save_fixups(),
880 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
881 of cgen_asm_finish_insn() to return a char *.
882
883Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
884
885 * cgen.h: Formatting changes to improve readability.
886
887Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
888
889 * cgen.h (*): Clean up pass over `struct foo' usage.
890 (CGEN_ATTR): Make unsigned char.
891 (CGEN_ATTR_TYPE): Update.
892 (CGEN_ATTR_{ENTRY,TABLE}): New types.
893 (cgen_base): Move member `attrs' to cgen_insn.
894 (CGEN_KEYWORD): New member `null_entry'.
895 (CGEN_{SYNTAX,FORMAT}): New types.
896 (cgen_insn): Format and syntax separated from each other.
897
898Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
899
900 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
901 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
902 flags_{used,set} long.
903 (d30v_operand): Make flags field long.
904
905Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
906
907 * m68k.h: Fix comment describing operand types.
908
909Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
910
911 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
912 everything else after down.
913
914Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
915
916 * d10v.h (OPERAND_FLAG): Split into:
917 (OPERAND_FFLAG, OPERAND_CFLAG) .
918
919Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
920
921 * mips.h (struct mips_opcode): Changed comments to reflect new
922 field usage.
923
924Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
925
926 * mips.h: Added to comments a quick-ref list of all assigned
927 operand type characters.
928 (OP_{MASK,SH}_PERFREG): New macros.
929
930Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
931
932 * sparc.h: Add '_' and '/' for v9a asr's.
933 Patch from David Miller <davem@vger.rutgers.edu>
934
935Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
936
937 * h8300.h: Bit ops with absolute addresses not in the 8 bit
938 area are not available in the base model (H8/300).
939
940Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
941
942 * m68k.h: Remove documentation of ` operand specifier.
943
944Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
945
946 * m68k.h: Document q and v operand specifiers.
947
948Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
949
950 * v850.h (struct v850_opcode): Add processors field.
951 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
952 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
953 (PROCESSOR_V850EA): New bit constants.
954
955Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
956
957 Merge changes from Martin Hunt:
958
959 * d30v.h: Allow up to 64 control registers. Add
960 SHORT_A5S format.
961
962 * d30v.h (LONG_Db): New form for delayed branches.
963
964 * d30v.h: (LONG_Db): New form for repeati.
965
966 * d30v.h (SHORT_D2B): New form.
967
968 * d30v.h (SHORT_A2): New form.
969
970 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
971 registers are used. Needed for VLIW optimization.
972
973Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
974
975 * cgen.h: Move assembler interface section
976 up so cgen_parse_operand_result is defined for cgen_parse_address.
977 (cgen_parse_address): Update prototype.
978
979Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
980
981 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
982
983Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
984
985 * i386.h (two_byte_segment_defaults): Correct base register 5 in
986 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
987 <paubert@iram.es>.
988
989 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
990 <paubert@iram.es>.
991
992 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
993 <paubert@iram.es>.
994
995 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
996 (JUMP_ON_ECX_ZERO): Remove commented out macro.
997
998Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
999
1000 * v850.h (V850_NOT_R0): New flag.
1001
1002Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1003
1004 * v850.h (struct v850_opcode): Remove flags field.
1005
1006Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1007
1008 * v850.h (struct v850_opcode): Add flags field.
1009 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1010 fields.
1011 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1012 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1013
1014Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1015
1016 * arc.h: New file.
1017
1018Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1019
1020 * sparc.h (sparc_opcodes): Declare as const.
1021
1022Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1023
1024 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1025 uses single or double precision floating point resources.
1026 (INSN_NO_ISA, INSN_ISA1): Define.
1027 (cpu specific INSN macros): Tweak into bitmasks outside the range
1028 of INSN_ISA field.
1029
1030Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1031
1032 * i386.h: Fix pand opcode.
1033
1034Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1035
1036 * mips.h: Widen INSN_ISA and move it to a more convenient
1037 bit position. Add INSN_3900.
1038
1039Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1040
1041 * mips.h (struct mips_opcode): added new field membership.
1042
1043Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1044
1045 * i386.h (movd): only Reg32 is allowed.
1046
1047 * i386.h: add fcomp and ud2. From Wayne Scott
1048 <wscott@ichips.intel.com>.
1049
1050Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1051
1052 * i386.h: Add MMX instructions.
1053
1054Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1055
1056 * i386.h: Remove W modifier from conditional move instructions.
1057
1058Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1059
1060 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1061 with no arguments to match that generated by the UnixWare
1062 assembler.
1063
1064Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1065
1066 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1067 (cgen_parse_operand_fn): Declare.
1068 (cgen_init_parse_operand): Declare.
1069 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1070 new argument `want'.
1071 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1072 (enum cgen_parse_operand_type): New enum.
1073
1074Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1075
1076 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1077
1078Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1079
1080 * cgen.h: New file.
1081
1082Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1083
1084 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1085 fdivrp.
1086
1087Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1088
1089 * v850.h (extract): Make unsigned.
1090
1091Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1092
1093 * i386.h: Add iclr.
1094
1095Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1096
1097 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1098 take a direction bit.
1099
1100Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1101
1102 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1103
1104Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1105
1106 * sparc.h: Include <ansidecl.h>. Update function declarations to
1107 use prototypes, and to use const when appropriate.
1108
1109Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1110
1111 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1112
1113Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1114
1115 * d10v.h: Change pre_defined_registers to
1116 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1117
1118Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1119
1120 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1121 Change mips_opcodes from const array to a pointer,
1122 and change bfd_mips_num_opcodes from const int to int,
1123 so that we can increase the size of the mips opcodes table
1124 dynamically.
1125
1126Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1127
1128 * d30v.h (FLAG_X): Remove unused flag.
1129
1130Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1131
1132 * d30v.h: New file.
1133
1134Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1135
1136 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1137 (PDS_VALUE): Macro to access value field of predefined symbols.
1138 (tic80_next_predefined_symbol): Add prototype.
1139
1140Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1141
1142 * tic80.h (tic80_symbol_to_value): Change prototype to match
1143 change in function, added class parameter.
1144
1145Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1146
1147 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1148 endmask fields, which are somewhat weird in that 0 and 32 are
1149 treated exactly the same.
1150
1151Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1152
1153 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1154 rather than a constant that is 2**X. Reorder them to put bits for
1155 operands that have symbolic names in the upper bits, so they can
1156 be packed into an int where the lower bits contain the value that
1157 corresponds to that symbolic name.
1158 (predefined_symbo): Add struct.
1159 (tic80_predefined_symbols): Declare array of translations.
1160 (tic80_num_predefined_symbols): Declare size of that array.
1161 (tic80_value_to_symbol): Declare function.
1162 (tic80_symbol_to_value): Declare function.
1163
1164Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1165
1166 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1167
1168Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1169
1170 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1171 be the destination register.
1172
1173Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1174
1175 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1176 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1177 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1178 that the opcode can have two vector instructions in a single
1179 32 bit word and we have to encode/decode both.
1180
1181Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1182
1183 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1184 TIC80_OPERAND_RELATIVE for PC relative.
1185 (TIC80_OPERAND_BASEREL): New flag bit for register
1186 base relative.
1187
1188Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1189
1190 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1191
1192Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1193
1194 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1195 ":s" modifier for scaling.
1196
1197Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1198
1199 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1200 (TIC80_OPERAND_M_LI): Ditto
1201
1202Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1203
1204 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1205 (TIC80_OPERAND_CC): New define for condition code operand.
1206 (TIC80_OPERAND_CR): New define for control register operand.
1207
1208Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1209
1210 * tic80.h (struct tic80_opcode): Name changed.
1211 (struct tic80_opcode): Remove format field.
1212 (struct tic80_operand): Add insertion and extraction functions.
1213 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1214 correct ones.
1215 (FMT_*): Ditto.
1216
1217Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1218
1219 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1220 type IV instruction offsets.
1221
1222Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1223
1224 * tic80.h: New file.
1225
1226Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1227
1228 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1229
1230Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1231
1232 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1233 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1234 * v850.h: Fix comment, v850_operand not powerpc_operand.
1235
1236Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1237
1238 * mn10200.h: Flesh out structures and definitions needed by
1239 the mn10200 assembler & disassembler.
1240
1241Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1242
1243 * mips.h: Add mips16 definitions.
1244
1245Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1246
1247 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1248
1249Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1250
1251 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1252 (MN10300_OPERAND_MEMADDR): Define.
1253
1254Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1255
1256 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1257
1258Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1259
1260 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1261
1262Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1263
1264 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1265
1266Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1267
1268 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1269
1270Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1271
1272 * alpha.h: Don't include "bfd.h"; private relocation types are now
1273 negative to minimize problems with shared libraries. Organize
1274 instruction subsets by AMASK extensions and PALcode
1275 implementation.
1276 (struct alpha_operand): Move flags slot for better packing.
1277
1278Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1279
1280 * v850.h (V850_OPERAND_RELAX): New operand flag.
1281
1282Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1283
1284 * mn10300.h (FMT_*): Move operand format definitions
1285 here.
1286
1287Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1288
1289 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1290
1291Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1292
1293 * mn10300.h (mn10300_opcode): Add "format" field.
1294 (MN10300_OPERAND_*): Define.
1295
1296Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1297
1298 * mn10x00.h: Delete.
1299 * mn10200.h, mn10300.h: New files.
1300
1301Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1302
1303 * mn10x00.h: New file.
1304
1305Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1306
1307 * v850.h: Add new flag to indicate this instruction uses a PC
1308 displacement.
1309
1310Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1311
1312 * h8300.h (stmac): Add missing instruction.
1313
1314Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1315
1316 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1317 field.
1318
1319Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1320
1321 * v850.h (V850_OPERAND_EP): Define.
1322
1323 * v850.h (v850_opcode): Add size field.
1324
1325Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1326
1327 * v850.h (v850_operands): Add insert and extract fields, pointers
1328 to functions used to handle unusual operand encoding.
1329 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1330 V850_OPERAND_SIGNED): Defined.
1331
1332Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1333
1334 * v850.h (v850_operands): Add flags field.
1335 (OPERAND_REG, OPERAND_NUM): Defined.
1336
1337Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1338
1339 * v850.h: New file.
1340
1341Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1342
1343 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1344 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1345 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1346 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1347 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1348 Defined.
1349
1350Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1351
1352 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1353 a 3 bit space id instead of a 2 bit space id.
1354
1355Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1356
1357 * d10v.h: Add some additional defines to support the
1358 assembler in determining which operations can be done in parallel.
1359
1360Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1361
1362 * h8300.h (SN): Define.
1363 (eepmov.b): Renamed from "eepmov"
1364 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1365 with them.
1366
1367Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1368
1369 * d10v.h (OPERAND_SHIFT): New operand flag.
1370
1371Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1372
1373 * d10v.h: Changes for divs, parallel-only instructions, and
1374 signed numbers.
1375
1376Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1377
1378 * d10v.h (pd_reg): Define. Putting the definition here allows
1379 the assembler and disassembler to share the same struct.
1380
1381Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1382
1383 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1384 Williams <steve@icarus.com>.
1385
1386Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1387
1388 * d10v.h: New file.
1389
1390Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1391
1392 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1393
1394Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1395
1396 * m68k.h (mcf5200): New macro.
1397 Document names of coldfire control registers.
1398
1399Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1400
1401 * h8300.h (SRC_IN_DST): Define.
1402
1403 * h8300.h (UNOP3): Mark the register operand in this insn
1404 as a source operand, not a destination operand.
1405 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1406 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1407 register operand with SRC_IN_DST.
1408
1409Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1410
1411 * alpha.h: New file.
1412
1413Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1414
1415 * rs6k.h: Remove obsolete file.
1416
1417Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1418
1419 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1420 fdivp, and fdivrp. Add ffreep.
1421
1422Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1423
1424 * h8300.h: Reorder various #defines for readability.
1425 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1426 (BITOP): Accept additional (unused) argument. All callers changed.
1427 (EBITOP): Likewise.
1428 (O_LAST): Bump.
1429 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1430
1431 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1432 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1433 (BITOP, EBITOP): Handle new H8/S addressing modes for
1434 bit insns.
1435 (UNOP3): Handle new shift/rotate insns on the H8/S.
1436 (insns using exr): New instructions.
1437 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1438
1439Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1440
1441 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1442 was incorrect.
1443
1444Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1445
1446 * h8300.h (START): Remove.
1447 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1448 and mov.l insns that can be relaxed.
1449
1450Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1451
1452 * i386.h: Remove Abs32 from lcall.
1453
1454Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1455
1456 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1457 (SLCPOP): New macro.
1458 Mark X,Y opcode letters as in use.
1459
1460Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1461
1462 * sparc.h (F_FLOAT, F_FBR): Define.
1463
1464Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1465
1466 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1467 from all insns.
1468 (ABS8SRC,ABS8DST): Add ABS8MEM.
1469 (add.l): Fix reg+reg variant.
1470 (eepmov.w): Renamed from eepmovw.
1471 (ldc,stc): Fix many cases.
1472
1473Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1474
1475 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1476
1477Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1478
1479 * sparc.h (O): Mark operand letter as in use.
1480
1481Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1482
1483 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1484 Mark operand letters uU as in use.
1485
1486Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1487
1488 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1489 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1490 (SPARC_OPCODE_SUPPORTED): New macro.
1491 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1492 (F_NOTV9): Delete.
1493
1494Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1495
1496 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1497 declaration consistent with return type in definition.
1498
1499Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1500
1501 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1502
1503Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1504
1505 * i386.h (i386_regtab): Add 80486 test registers.
1506
1507Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1508
1509 * i960.h (I_HX): Define.
1510 (i960_opcodes): Add HX instruction.
1511
1512Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1513
1514 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1515 and fclex.
1516
1517Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1518
1519 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1520 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1521 (bfd_* defines): Delete.
1522 (sparc_opcode_archs): Replaces architecture_pname.
1523 (sparc_opcode_lookup_arch): Declare.
1524 (NUMOPCODES): Delete.
1525
1526Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1527
1528 * sparc.h (enum sparc_architecture): Add v9a.
1529 (ARCHITECTURES_CONFLICT_P): Update.
1530
1531Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1532
1533 * i386.h: Added Pentium Pro instructions.
1534
1535Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * m68k.h: Document new 'W' operand place.
1538
1539Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1540
1541 * hppa.h: Add lci and syncdma instructions.
1542
1543Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1544
1545 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1546 instructions.
1547
1548Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1549
1550 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1551 assembler's -mcom and -many switches.
1552
1553Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1554
1555 * i386.h: Fix cmpxchg8b extension opcode description.
1556
1557Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1558
1559 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1560 and register cr4.
1561
1562Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1563
1564 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1565
1566Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1567
1568 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1569
1570Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1571
1572 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1573
1574Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1575
1576 * m68kmri.h: Remove.
1577
1578 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1579 declarations. Remove F_ALIAS and flag field of struct
1580 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1581 int. Make name and args fields of struct m68k_opcode const.
1582
1583Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1584
1585 * sparc.h (F_NOTV9): Define.
1586
1587Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1588
1589 * mips.h (INSN_4010): Define.
1590
1591Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1592
1593 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1594
1595 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1596 * m68k.h: Fix argument descriptions of coprocessor
1597 instructions to allow only alterable operands where appropriate.
1598 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1599 (m68k_opcode_aliases): Add more aliases.
1600
1601Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1602
1603 * m68k.h: Added explcitly short-sized conditional branches, and a
1604 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1605 svr4-based configurations.
1606
1607Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1608
1609 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1610 * i386.h: added missing Data16/Data32 flags to a few instructions.
1611
1612Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1613
1614 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1615 (OP_MASK_BCC, OP_SH_BCC): Define.
1616 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1617 (OP_MASK_CCC, OP_SH_CCC): Define.
1618 (INSN_READ_FPR_R): Define.
1619 (INSN_RFE): Delete.
1620
1621Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1622
1623 * m68k.h (enum m68k_architecture): Deleted.
1624 (struct m68k_opcode_alias): New type.
1625 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1626 matching constraints, values and flags. As a side effect of this,
1627 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1628 as I know were never used, now may need re-examining.
1629 (numopcodes): Now const.
1630 (m68k_opcode_aliases, numaliases): New variables.
1631 (endop): Deleted.
1632 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1633 m68k_opcode_aliases; update declaration of m68k_opcodes.
1634
1635Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1636
1637 * hppa.h (delay_type): Delete unused enumeration.
1638 (pa_opcode): Replace unused delayed field with an architecture
1639 field.
1640 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1641
1642Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1643
1644 * mips.h (INSN_ISA4): Define.
1645
1646Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1647
1648 * mips.h (M_DLA_AB, M_DLI): Define.
1649
1650Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1651
1652 * hppa.h (fstwx): Fix single-bit error.
1653
1654Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1655
1656 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1657
1658Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1659
1660 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1661 debug registers. From Charles Hannum (mycroft@netbsd.org).
1662
1663Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1664
1665 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1666 i386 support:
1667 * i386.h (MOV_AX_DISP32): New macro.
1668 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1669 of several call/return instructions.
1670 (ADDR_PREFIX_OPCODE): New macro.
1671
1672Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1673
1674 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1675
1676 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1677 it pointer to const char;
1678 (struct vot, field `name'): ditto.
1679
1680Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1681
1682 * vax.h: Supply and properly group all values in end sentinel.
1683
1684Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1685
1686 * mips.h (INSN_ISA, INSN_4650): Define.
1687
1688Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1689
1690 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1691 systems with a separate instruction and data cache, such as the
1692 29040, these instructions take an optional argument.
1693
1694Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1695
1696 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1697 INSN_TRAP.
1698
1699Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1700
1701 * mips.h (INSN_STORE_MEMORY): Define.
1702
1703Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1704
1705 * sparc.h: Document new operand type 'x'.
1706
1707Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1708
1709 * i960.h (I_CX2): New instruction category. It includes
1710 instructions available on Cx and Jx processors.
1711 (I_JX): New instruction category, for JX-only instructions.
1712 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1713 Jx-only instructions, in I_JX category.
1714
1715Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1716
1717 * ns32k.h (endop): Made pointer const too.
1718
1719Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1720
1721 * ns32k.h: Drop Q operand type as there is no correct use
1722 for it. Add I and Z operand types which allow better checking.
1723
1724Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1725
1726 * h8300.h (xor.l) :fix bit pattern.
1727 (L_2): New size of operand.
1728 (trapa): Use it.
1729
1730Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1731
1732 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1733
1734Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1735
1736 * sparc.h: Include v9 definitions.
1737
1738Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1739
1740 * m68k.h (m68060): Defined.
1741 (m68040up, mfloat, mmmu): Include it.
1742 (struct m68k_opcode): Widen `arch' field.
1743 (m68k_opcodes): Updated for M68060. Removed comments that were
1744 instructions commented out by "JF" years ago.
1745
1746Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1747
1748 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1749 add a one-bit `flags' field.
1750 (F_ALIAS): New macro.
1751
1752Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1753
1754 * h8300.h (dec, inc): Get encoding right.
1755
1756Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1757
1758 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1759 a flag instead.
1760 (PPC_OPERAND_SIGNED): Define.
1761 (PPC_OPERAND_SIGNOPT): Define.
1762
1763Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1764
1765 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1766 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1767
1768Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1769
1770 * i386.h: Reverse last change. It'll be handled in gas instead.
1771
1772Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1773
1774 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1775 slower on the 486 and used the implicit shift count despite the
1776 explicit operand. The one-operand form is still available to get
1777 the shorter form with the implicit shift count.
1778
1779Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1780
1781 * hppa.h: Fix typo in fstws arg string.
1782
1783Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1784
1785 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1786
1787Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1788
1789 * ppc.h (PPC_OPCODE_601): Define.
1790
1791Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1792
1793 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1794 (so we can determine valid completers for both addb and addb[tf].)
1795
1796 * hppa.h (xmpyu): No floating point format specifier for the
1797 xmpyu instruction.
1798
1799Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1800
1801 * ppc.h (PPC_OPERAND_NEXT): Define.
1802 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1803 (struct powerpc_macro): Define.
1804 (powerpc_macros, powerpc_num_macros): Declare.
1805
1806Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1807
1808 * ppc.h: New file. Header file for PowerPC opcode table.
1809
1810Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1811
1812 * hppa.h: More minor template fixes for sfu and copr (to allow
1813 for easier disassembly).
1814
1815 * hppa.h: Fix templates for all the sfu and copr instructions.
1816
1817Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1818
1819 * i386.h (push): Permit Imm16 operand too.
1820
1821Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1822
1823 * h8300.h (andc): Exists in base arch.
1824
1825Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1826
1827 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1828 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1829
1830Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1831
1832 * hppa.h: Add FP quadword store instructions.
1833
1834Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1835
1836 * mips.h: (M_J_A): Added.
1837 (M_LA): Removed.
1838
1839Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1840
1841 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1842 <mellon@pepper.ncd.com>.
1843
1844Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1845
1846 * hppa.h: Immediate field in probei instructions is unsigned,
1847 not low-sign extended.
1848
1849Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1850
1851 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1852
1853Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1854
1855 * i386.h: Add "fxch" without operand.
1856
1857Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1858
1859 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1860
1861Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1862
1863 * hppa.h: Add gfw and gfr to the opcode table.
1864
1865Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1866
1867 * m88k.h: extended to handle m88110.
1868
1869Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1870
1871 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1872 addresses.
1873
1874Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1875
1876 * i960.h (i960_opcodes): Properly bracket initializers.
1877
1878Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1879
1880 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1881
1882Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1883
1884 * m68k.h (two): Protect second argument with parentheses.
1885
1886Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1887
1888 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1889 Deleted old in/out instructions in "#if 0" section.
1890
1891Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1892
1893 * i386.h (i386_optab): Properly bracket initializers.
1894
1895Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1896
1897 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1898 Jeff Law, law@cs.utah.edu).
1899
1900Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1901
1902 * i386.h (lcall): Accept Imm32 operand also.
1903
1904Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1905
1906 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1907 (M_DABS): Added.
1908
1909Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1910
1911 * mips.h (INSN_*): Changed values. Removed unused definitions.
1912 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1913 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1914 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1915 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1916 (M_*): Added new values for r6000 and r4000 macros.
1917 (ANY_DELAY): Removed.
1918
1919Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1920
1921 * mips.h: Added M_LI_S and M_LI_SS.
1922
1923Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1924
1925 * h8300.h: Get some rare mov.bs correct.
1926
1927Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1928
1929 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1930 been included.
1931
1932Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1933
1934 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1935 jump instructions, for use in disassemblers.
1936
1937Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1938
1939 * m88k.h: Make bitfields just unsigned, not unsigned long or
1940 unsigned short.
1941
1942Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1943
1944 * hppa.h: New argument type 'y'. Use in various float instructions.
1945
1946Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1947
1948 * hppa.h (break): First immediate field is unsigned.
1949
1950 * hppa.h: Add rfir instruction.
1951
1952Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1953
1954 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1955
1956Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1957
1958 * mips.h: Reworked the hazard information somewhat, and fixed some
1959 bugs in the instruction hazard descriptions.
1960
1961Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1962
1963 * m88k.h: Corrected a couple of opcodes.
1964
1965Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1966
1967 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1968 new version includes instruction hazard information, but is
1969 otherwise reasonably similar.
1970
1971Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1972
1973 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1974
1975Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1976
1977 Patches from Jeff Law, law@cs.utah.edu:
1978 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1979 Make the tables be the same for the following instructions:
1980 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1981 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1982 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1983 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1984 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1985 "fcmp", and "ftest".
1986
1987 * hppa.h: Make new and old tables the same for "break", "mtctl",
1988 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1989 Fix typo in last patch. Collapse several #ifdefs into a
1990 single #ifdef.
1991
1992 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1993 of the comments up-to-date.
1994
1995 * hppa.h: Update "free list" of letters and update
1996 comments describing each letter's function.
1997
1998Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1999
2000 * h8300.h: checkpoint, includes H8/300-H opcodes.
2001
2002Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2003
2004 * Patches from Jeffrey Law <law@cs.utah.edu>.
2005 * hppa.h: Rework single precision FP
2006 instructions so that they correctly disassemble code
2007 PA1.1 code.
2008
2009Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2010
2011 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2012 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2013
2014Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2015
2016 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2017 gdb will define it for now.
2018
2019Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2020
2021 * sparc.h: Don't end enumerator list with comma.
2022
2023Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2024
2025 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2026 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2027 ("bc2t"): Correct typo.
2028 ("[ls]wc[023]"): Use T rather than t.
2029 ("c[0123]"): Define general coprocessor instructions.
2030
2031Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2032
2033 * m68k.h: Move split point for gcc compilation more towards
2034 middle.
2035
2036Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2037
2038 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2039 simply wrong, ics, rfi, & rfsvc were missing).
2040 Add "a" to opr_ext for "bb". Doc fix.
2041
2042Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2043
2044 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2045 * mips.h: Add casts, to suppress warnings about shifting too much.
2046 * m68k.h: Document the placement code '9'.
2047
2048Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2049
2050 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2051 allows callers to break up the large initialized struct full of
2052 opcodes into two half-sized ones. This permits GCC to compile
2053 this module, since it takes exponential space for initializers.
2054 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2055
2056Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2057
2058 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2059 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2060 initialized structs in it.
2061
2062Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2063
2064 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2065 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2066 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2067
2068Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2069
2070 * mips.h: document "i" and "j" operands correctly.
2071
2072Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2073
2074 * mips.h: Removed endianness dependency.
2075
2076Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2077
2078 * h8300.h: include info on number of cycles per instruction.
2079
2080Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2081
2082 * hppa.h: Move handy aliases to the front. Fix masks for extract
2083 and deposit instructions.
2084
2085Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2086
2087 * i386.h: accept shld and shrd both with and without the shift
2088 count argument, which is always %cl.
2089
2090Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2091
2092 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2093 (one_byte_segment_defaults, two_byte_segment_defaults,
2094 i386_prefixtab_end): Ditto.
2095
2096Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2097
2098 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2099 for operand 2; from John Carr, jfc@dsg.dec.com.
2100
2101Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2102
2103 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2104 always use 16-bit offsets. Makes calculated-size jump tables
2105 feasible.
2106
2107Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2108
2109 * i386.h: Fix one-operand forms of in* and out* patterns.
2110
2111Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2112
2113 * m68k.h: Added CPU32 support.
2114
2115Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2116
2117 * mips.h (break): Disassemble the argument. Patch from
2118 jonathan@cs.stanford.edu (Jonathan Stone).
2119
2120Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2121
2122 * m68k.h: merged Motorola and MIT syntax.
2123
2124Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2125
2126 * m68k.h (pmove): make the tests less strict, the 68k book is
2127 wrong.
2128
2129Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2130
2131 * m68k.h (m68ec030): Defined as alias for 68030.
2132 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2133 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2134 them. Tightened description of "fmovex" to distinguish it from
2135 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2136 up descriptions that claimed versions were available for chips not
2137 supporting them. Added "pmovefd".
2138
2139Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2140
2141 * m68k.h: fix where the . goes in divull
2142
2143Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2144
2145 * m68k.h: the cas2 instruction is supposed to be written with
2146 indirection on the last two operands, which can be either data or
2147 address registers. Added a new operand type 'r' which accepts
2148 either register type. Added new cases for cas2l and cas2w which
2149 use them. Corrected masks for cas2 which failed to recognize use
2150 of address register.
2151
2152Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2153
2154 * m68k.h: Merged in patches (mostly m68040-specific) from
2155 Colin Smith <colin@wrs.com>.
2156
2157 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2158 base). Also cleaned up duplicates, re-ordered instructions for
2159 the sake of dis-assembling (so aliases come after standard names).
2160 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2161
2162Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2163
2164 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2165 all missing .s
2166
2167Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2168
2169 * sparc.h: Moved tables to BFD library.
2170
2171 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2172
2173Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2174
2175 * h8300.h: Finish filling in all the holes in the opcode table,
2176 so that the Lucid C compiler can digest this as well...
2177
2178Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2179
2180 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2181 Fix opcodes on various sizes of fild/fist instructions
2182 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2183 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2184
2185Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2186
2187 * h8300.h: Fill in all the holes in the opcode table so that the
2188 losing HPUX C compiler can digest this...
2189
2190Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2191
2192 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2193 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2194
2195Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2196
2197 * sparc.h: Add new architecture variant sparclite; add its scan
2198 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2199
2200Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2201
2202 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2203 fy@lucid.com).
2204
2205Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2206
2207 * rs6k.h: New version from IBM (Metin).
2208
2209Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2210
2211 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2212 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2213
2214Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2215
2216 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2217
2218Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2219
2220 * m68k.h (one, two): Cast macro args to unsigned to suppress
2221 complaints from compiler and lint about integer overflow during
2222 shift.
2223
2224Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2225
2226 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2227
2228Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2229
2230 * mips.h: Make bitfield layout depend on the HOST compiler,
2231 not on the TARGET system.
2232
2233Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2234
2235 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2236 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2237 <TRANLE@INTELLICORP.COM>.
2238
2239Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2240
2241 * h8300.h: turned op_type enum into #define list
2242
2243Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2244
2245 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2246 similar instructions -- they've been renamed to "fitoq", etc.
2247 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2248 number of arguments.
2249 * h8300.h: Remove extra ; which produces compiler warning.
2250
2251Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2252
2253 * sparc.h: fix opcode for tsubcctv.
2254
2255Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2256
2257 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2258
2259Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2260
2261 * sparc.h (nop): Made the 'lose' field be even tighter,
2262 so only a standard 'nop' is disassembled as a nop.
2263
2264Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2265
2266 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2267 disassembled as a nop.
2268
2269Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2270
2271 * sparc.h: fix a typo.
2272
2273Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2274
2275 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2276 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2277 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2278
2279\f
2280Local Variables:
2281version-control: never
2282End:
GDB Binutils - Deliverables
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