Extend "ld --unique" functionality.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
e2914f48
JH
1Sat Jan 13 09:56:32 MET 2001 Jan Hubicka <jh@suse.cz>
2
3 * i386.h (i386_optab): Fix pusha and ret templates.
4
0d2bcfaf
NC
52001-01-11 Peter Targett <peter.targett@arccores.com>
6
7 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
8 definitions for masking cpu type.
9 (arc_ext_operand_value) New structure for storing extended
10 operands.
11 (ARC_OPERAND_*) Flags for operand values.
12
132001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
14
15 * i386.h (pinsrw): Add.
16 (pshufw): Remove.
17 (cvttpd2dq): Fix operands.
18 (cvttps2dq): Likewise.
19 (movq2q): Rename to movdq2q.
20
079966a8
AM
212001-01-10 Richard Schaal <richard.schaal@intel.com>
22
23 * i386.h: Correct movnti instruction.
24
8c1f9e76
JJ
252001-01-09 Jeff Johnston <jjohnstn@redhat.com>
26
27 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
28 of operands (unsigned char or unsigned short).
29 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
30 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
31
0d2bcfaf 322001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
33
34 * i386.h (i386_optab): Make [sml]fence template to use immext field.
35
0d2bcfaf 362001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
37
38 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
39 introduced by Pentium4
40
0d2bcfaf 412000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
42
43 * i386.h (i386_optab): Add "rex*" instructions;
44 add swapgs; disable jmp/call far direct instructions for
45 64bit mode; add syscall and sysret; disable registers for 0xc6
46 template. Add 'q' suffixes to extendable instructions, disable
079966a8 47 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
48 (i386_regtab): Add extended registers.
49 (*Suf): Add No_qSuf.
50 (q_Suf, wlq_Suf, bwlq_Suf): New.
51
0d2bcfaf 522000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
53
54 * i386.h (i386_optab): Replace "Imm" with "EncImm".
55 (i386_regtab): Add flags field.
56
bf40d919
NC
572000-12-12 Nick Clifton <nickc@redhat.com>
58
59 * mips.h: Fix formatting.
60
4372b673
NC
612000-12-01 Chris Demetriou <cgd@sibyte.com>
62
63 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
64 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
65 OP_*_SYSCALL definitions.
66 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
67 19 bit wait codes.
68 (MIPS operand specifier comments): Remove 'm', add 'U' and
69 'J', and update the meaning of 'B' so that it's more general.
70
e7af610e
NC
71 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
72 INSN_ISA5): Renumber, redefine to mean the ISA at which the
73 instruction was added.
74 (INSN_ISA32): New constant.
75 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
76 Renumber to avoid new and/or renumbered INSN_* constants.
77 (INSN_MIPS32): Delete.
78 (ISA_UNKNOWN): New constant to indicate unknown ISA.
79 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
80 ISA_MIPS32): New constants, defined to be the mask of INSN_*
81 constants available at that ISA level.
82 (CPU_UNKNOWN): New constant to indicate unknown CPU.
83 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
84 define it with a unique value.
85 (OPCODE_IS_MEMBER): Update for new ISA membership-related
86 constant meanings.
87
84ea6cf2
NC
88 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
89 definitions.
90
c6c98b38
NC
91 * mips.h (CPU_SB1): New constant.
92
19f7b010
JJ
932000-10-20 Jakub Jelinek <jakub@redhat.com>
94
95 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
96 Note that '3' is used for siam operand.
97
139368c9
JW
982000-09-22 Jim Wilson <wilson@cygnus.com>
99
100 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
101
156c2f8b
NC
1022000-09-13 Anders Norlander <anorland@acc.umu.se>
103
104 * mips.h: Use defines instead of hard-coded processor numbers.
105 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
106 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
107 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
108 CPU_4KC, CPU_4KM, CPU_4KP): Define..
109 (OPCODE_IS_MEMBER): Use new defines.
110 (OP_MASK_SEL, OP_SH_SEL): Define.
111 (OP_MASK_CODE20, OP_SH_CODE20): Define.
112 Add 'P' to used characters.
113 Use 'H' for coprocessor select field.
114 Use 'm' for 20 bit breakpoint code.
115 Document new arg characters and add to used characters.
116 (INSN_MIPS32): New define for MIPS32 extensions.
117 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
118
3c5ce02e
AM
1192000-09-05 Alan Modra <alan@linuxcare.com.au>
120
121 * hppa.h: Mention cz completer.
122
50b81f19
JW
1232000-08-16 Jim Wilson <wilson@cygnus.com>
124
125 * ia64.h (IA64_OPCODE_POSTINC): New.
126
fc29466d
L
1272000-08-15 H.J. Lu <hjl@gnu.org>
128
129 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
130 IgnoreSize change.
131
45ee1401
DC
1322000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
133
134 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
135 Move related opcodes closer to each other.
136 Minor changes in comments, list undefined opcodes.
137
9d551405
DB
1382000-07-26 Dave Brolley <brolley@redhat.com>
139
140 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
141
c8488617
HPN
1422000-07-20 Hans-Peter Nilsson <hp@axis.com>
143
144 cris.h: New file.
145
65aa24b6
NC
1462000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
147
148 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
149 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
150 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
151 (AVR_ISA_M83): Define for ATmega83, ATmega85.
152 (espm): Remove, because ESPM removed in databook update.
153 (eicall, eijmp): Move to the end of opcode table.
154
60bcf0fa
NC
1552000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
156
157 * m68hc11.h: New file for support of Motorola 68hc11.
158
60a2978a
DC
159Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
160
161 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
162
68ab2dd9
DC
163Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
164
165 * avr.h: New file with AVR opcodes.
166
f0662e27
DL
167Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
168
169 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
170
b722f2be
AM
1712000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
172
173 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
174
f9e0cf0b
AM
1752000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
176
177 * i386.h: Use sl_FP, not sl_Suf for fild.
178
f660ee8b
FCE
1792000-05-16 Frank Ch. Eigler <fche@redhat.com>
180
181 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
182 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
183 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
184 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
185
558b0a60
AM
1862000-05-13 Alan Modra <alan@linuxcare.com.au>,
187
188 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
189
e413e4e9
AM
1902000-05-13 Alan Modra <alan@linuxcare.com.au>,
191 Alexander Sokolov <robocop@netlink.ru>
192
193 * i386.h (i386_optab): Add cpu_flags for all instructions.
194
1952000-05-13 Alan Modra <alan@linuxcare.com.au>
196
197 From Gavin Romig-Koch <gavin@cygnus.com>
198 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
199
5c84d377
TW
2002000-05-04 Timothy Wall <twall@cygnus.com>
201
202 * tic54x.h: New.
203
966f959b
C
2042000-05-03 J.T. Conklin <jtc@redback.com>
205
206 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
207 (PPC_OPERAND_VR): New operand flag for vector registers.
208
c5d05dbb
JL
2092000-05-01 Kazu Hirata <kazu@hxi.com>
210
211 * h8300.h (EOP): Add missing initializer.
212
a7fba0e0
JL
213Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
214
215 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
216 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
217 New operand types l,y,&,fe,fE,fx added to support above forms.
218 (pa_opcodes): Replaced usage of 'x' as source/target for
219 floating point double-word loads/stores with 'fx'.
220
800eeca4
JW
221Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
222 David Mosberger <davidm@hpl.hp.com>
223 Timothy Wall <twall@cygnus.com>
224 Jim Wilson <wilson@cygnus.com>
225
226 * ia64.h: New file.
227
ba23e138
NC
2282000-03-27 Nick Clifton <nickc@cygnus.com>
229
230 * d30v.h (SHORT_A1): Fix value.
231 (SHORT_AR): Renumber so that it is at the end of the list of short
232 instructions, not the end of the list of long instructions.
233
d0b47220
AM
2342000-03-26 Alan Modra <alan@linuxcare.com>
235
236 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
237 problem isn't really specific to Unixware.
238 (OLDGCC_COMPAT): Define.
239 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
240 destination %st(0).
241 Fix lots of comments.
242
866afedc
NC
2432000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
244
245 * d30v.h:
246 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
247 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
248 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
249 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
250 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
251 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
252 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
253
cc5ca5ce
AM
2542000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
255
256 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
257 fistpd without suffix.
258
68e324a2
NC
2592000-02-24 Nick Clifton <nickc@cygnus.com>
260
261 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
262 'signed_overflow_ok_p'.
263 Delete prototypes for cgen_set_flags() and cgen_get_flags().
264
60f036a2
AH
2652000-02-24 Andrew Haley <aph@cygnus.com>
266
267 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
268 (CGEN_CPU_TABLE): flags: new field.
269 Add prototypes for new functions.
270
9b9b5cd4
AM
2712000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
272
273 * i386.h: Add some more UNIXWARE_COMPAT comments.
274
5b93d8bb
AM
2752000-02-23 Linas Vepstas <linas@linas.org>
276
277 * i370.h: New file.
278
87f398dd
AH
2792000-02-22 Andrew Haley <aph@cygnus.com>
280
281 * mips.h: (OPCODE_IS_MEMBER): Add comment.
282
367c01af
AH
2831999-12-30 Andrew Haley <aph@cygnus.com>
284
9a1e79ca
AH
285 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
286 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
287 insns.
367c01af 288
add0c677
AM
2892000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
290
291 * i386.h: Qualify intel mode far call and jmp with x_Suf.
292
3138f287
AM
2931999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
294
295 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
296 indirect jumps and calls. Add FF/3 call for intel mode.
297
ccecd07b
JL
298Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
299
300 * mn10300.h: Add new operand types. Add new instruction formats.
301
b37e19e9
JL
302Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
303
304 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
305 instruction.
306
5fce5ddf
GRK
3071999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
308
309 * mips.h (INSN_ISA5): New.
310
2bd7f1f3
GRK
3111999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
312
313 * mips.h (OPCODE_IS_MEMBER): New.
314
4df2b5c5
NC
3151999-10-29 Nick Clifton <nickc@cygnus.com>
316
317 * d30v.h (SHORT_AR): Define.
318
446a06c9
MM
3191999-10-18 Michael Meissner <meissner@cygnus.com>
320
321 * alpha.h (alpha_num_opcodes): Convert to unsigned.
322 (alpha_num_operands): Ditto.
323
eca04c6a
JL
324Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
325
326 * hppa.h (pa_opcodes): Add load and store cache control to
327 instructions. Add ordered access load and store.
328
329 * hppa.h (pa_opcode): Add new entries for addb and addib.
330
331 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
332
333 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
334
c43185de
DN
335Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
336
337 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
338
ec3533da
JL
339Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
340
390f858d
JL
341 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
342 and "be" using completer prefixes.
343
8c47ebd9
JL
344 * hppa.h (pa_opcodes): Add initializers to silence compiler.
345
ec3533da
JL
346 * hppa.h: Update comments about character usage.
347
18369bea
JL
348Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
349
350 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
351 up the new fstw & bve instructions.
352
c36efdd2
JL
353Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
354
d3ffb032
JL
355 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
356 instructions.
357
c49ec3da
JL
358 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
359
5d2e7ecc
JL
360 * hppa.h (pa_opcodes): Add long offset double word load/store
361 instructions.
362
6397d1a2
JL
363 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
364 stores.
365
142f0fe0
JL
366 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
367
f5a68b45
JL
368 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
369
8235801e
JL
370 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
371
35184366
JL
372 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
373
f0bfde5e
JL
374 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
375
27bbbb58
JL
376 * hppa.h (pa_opcodes): Add support for "b,l".
377
c36efdd2
JL
378 * hppa.h (pa_opcodes): Add support for "b,gate".
379
f2727d04
JL
380Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
381
9392fb11
JL
382 * hppa.h (pa_opcodes): Use 'fX' for first register operand
383 in xmpyu.
384
e0c52e99
JL
385 * hppa.h (pa_opcodes): Fix mask for probe and probei.
386
f2727d04
JL
387 * hppa.h (pa_opcodes): Fix mask for depwi.
388
52d836e2
JL
389Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
390
391 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
392 an explicit output argument.
393
90765e3a
JL
394Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
395
396 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
397 Add a few PA2.0 loads and store variants.
398
8340b17f
ILT
3991999-09-04 Steve Chamberlain <sac@pobox.com>
400
401 * pj.h: New file.
402
5f47d35b
AM
4031999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
404
405 * i386.h (i386_regtab): Move %st to top of table, and split off
406 other fp reg entries.
407 (i386_float_regtab): To here.
408
1c143202
JL
409Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
410
7d8fdb64
JL
411 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
412 by 'f'.
413
90927b9c
JL
414 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
415 Add supporting args.
416
1d16bf9c
JL
417 * hppa.h: Document new completers and args.
418 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
419 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
420 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
421 pmenb and pmdis.
422
96226a68
JL
423 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
424 hshr, hsub, mixh, mixw, permh.
425
5d4ba527
JL
426 * hppa.h (pa_opcodes): Change completers in instructions to
427 use 'c' prefix.
428
e9fc28c6
JL
429 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
430 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
431
1c143202
JL
432 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
433 fnegabs to use 'I' instead of 'F'.
434
9e525108
AM
4351999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
436
437 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
438 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
439 Alphabetically sort PIII insns.
440
e8da1bf1
DE
441Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
442
443 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
444
7d627258
JL
445Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
446
5696871a
JL
447 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
448 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
449
7d627258
JL
450 * hppa.h: Document 64 bit condition completers.
451
c5e52916
JL
452Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
453
454 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
455
eecb386c
AM
4561999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
457
458 * i386.h (i386_optab): Add DefaultSize modifier to all insns
459 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
460 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
461
88a380f3
JL
462Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
463 Jeff Law <law@cygnus.com>
464
465 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
466
467 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
468
469 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
470 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
471
145cf1f0
AM
4721999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
473
474 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
475
73826640
JL
476Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
477
478 * hppa.h (struct pa_opcode): Add new field "flags".
479 (FLAGS_STRICT): Define.
480
b65db252
JL
481Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
482 Jeff Law <law@cygnus.com>
483
f7fc668b
JL
484 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
485
486 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 487
10084519
AM
4881999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
489
490 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
491 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
492 flag to fcomi and friends.
493
cd8a80ba
JL
494Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
495
496 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
497 integer logical instructions.
498
1fca749b
ILT
4991999-05-28 Linus Nordberg <linus.nordberg@canit.se>
500
501 * m68k.h: Document new formats `E', `G', `H' and new places `N',
502 `n', `o'.
503
504 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
505 and new places `m', `M', `h'.
506
aa008907
JL
507Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
508
509 * hppa.h (pa_opcodes): Add several processor specific system
510 instructions.
511
e26b85f0
JL
512Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
513
514 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
515 "addb", and "addib" to be used by the disassembler.
516
c608c12e
AM
5171999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
518
519 * i386.h (ReverseModrm): Remove all occurences.
520 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
521 movmskps, pextrw, pmovmskb, maskmovq.
522 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
523 ignore the data size prefix.
524
525 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
526 Mostly stolen from Doug Ledford <dledford@redhat.com>
527
45c18104
RH
528Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
529
530 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
531
252b5132
RH
5321999-04-14 Doug Evans <devans@casey.cygnus.com>
533
534 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
535 (CGEN_ATTR_TYPE): Update.
536 (CGEN_ATTR_MASK): Number booleans starting at 0.
537 (CGEN_ATTR_VALUE): Update.
538 (CGEN_INSN_ATTR): Update.
539
540Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
541
542 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
543 instructions.
544
545Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
546
547 * hppa.h (bb, bvb): Tweak opcode/mask.
548
549
5501999-03-22 Doug Evans <devans@casey.cygnus.com>
551
552 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
553 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
554 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
555 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
556 Delete member max_insn_size.
557 (enum cgen_cpu_open_arg): New enum.
558 (cpu_open): Update prototype.
559 (cpu_open_1): Declare.
560 (cgen_set_cpu): Delete.
561
5621999-03-11 Doug Evans <devans@casey.cygnus.com>
563
564 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
565 (CGEN_OPERAND_NIL): New macro.
566 (CGEN_OPERAND): New member `type'.
567 (@arch@_cgen_operand_table): Delete decl.
568 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
569 (CGEN_OPERAND_TABLE): New struct.
570 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
571 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
572 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
573 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
574 {get,set}_{int,vma}_operand.
575 (@arch@_cgen_cpu_open): New arg `isa'.
576 (cgen_set_cpu): Ditto.
577
578Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
579
580 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
581
5821999-02-25 Doug Evans <devans@casey.cygnus.com>
583
584 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
585 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
586 enum cgen_hw_type.
587 (CGEN_HW_TABLE): New struct.
588 (hw_table): Delete declaration.
589 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
590 to table entry to enum.
591 (CGEN_OPINST): Ditto.
592 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
593
594Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
595
596 * alpha.h (AXP_OPCODE_EV6): New.
597 (AXP_OPCODE_NOPAL): Include it.
598
5991999-02-09 Doug Evans <devans@casey.cygnus.com>
600
601 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
602 All uses updated. New members int_insn_p, max_insn_size,
603 parse_operand,insert_operand,extract_operand,print_operand,
604 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
605 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
606 extract_handlers,print_handlers.
607 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
608 (CGEN_ATTR_BOOL_OFFSET): New macro.
609 (CGEN_ATTR_MASK): Subtract it to compute bit number.
610 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
611 (cgen_opcode_handler): Renamed from cgen_base.
612 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
613 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
614 all uses updated.
615 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
616 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
617 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
618 (CGEN_OPCODE,CGEN_IBASE): New types.
619 (CGEN_INSN): Rewrite.
620 (CGEN_{ASM,DIS}_HASH*): Delete.
621 (init_opcode_table,init_ibld_table): Declare.
622 (CGEN_INSN_ATTR): New type.
623
624Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
625
626 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
627 (x_FP, d_FP, dls_FP, sldx_FP): Define.
628 Change *Suf definitions to include x and d suffixes.
629 (movsx): Use w_Suf and b_Suf.
630 (movzx): Likewise.
631 (movs): Use bwld_Suf.
632 (fld): Change ordering. Use sld_FP.
633 (fild): Add Intel Syntax equivalent of fildq.
634 (fst): Use sld_FP.
635 (fist): Use sld_FP.
636 (fstp): Use sld_FP. Add x_FP version.
637 (fistp): LLongMem version for Intel Syntax.
638 (fcom, fcomp): Use sld_FP.
639 (fadd, fiadd, fsub): Use sld_FP.
640 (fsubr): Use sld_FP.
641 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
642
6431999-01-27 Doug Evans <devans@casey.cygnus.com>
644
645 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
646 CGEN_MODE_UINT.
647
648Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
649
650 * hppa.h (bv): Fix mask.
651
6521999-01-05 Doug Evans <devans@casey.cygnus.com>
653
654 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
655 (CGEN_ATTR): Use it.
656 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
657 (CGEN_ATTR_TABLE): New member dfault.
658
6591998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
660
661 * mips.h (MIPS16_INSN_BRANCH): New.
662
663Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
664
665 The following is part of a change made by Edith Epstein
666 <eepstein@sophia.cygnus.com> as part of a project to merge in
667 changes by HP; HP did not create ChangeLog entries.
668
669 * hppa.h (completer_chars): list of chars to not put a space
670 after.
671
672Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
673
674 * i386.h (i386_optab): Permit w suffix on processor control and
675 status word instructions.
676
6771998-11-30 Doug Evans <devans@casey.cygnus.com>
678
679 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
680 (struct cgen_keyword_entry): Ditto.
681 (struct cgen_operand): Ditto.
682 (CGEN_IFLD): New typedef, with associated access macros.
683 (CGEN_IFMT): New typedef, with associated access macros.
684 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
685 (CGEN_IVALUE): New typedef.
686 (struct cgen_insn): Delete const on syntax,attrs members.
687 `format' now points to format data. Type of `value' is now
688 CGEN_IVALUE.
689 (struct cgen_opcode_table): New member ifld_table.
690
6911998-11-18 Doug Evans <devans@casey.cygnus.com>
692
693 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
694 (CGEN_OPERAND_INSTANCE): New member `attrs'.
695 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
696 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
697 (cgen_opcode_table): Update type of dis_hash fn.
698 (extract_operand): Update type of `insn_value' arg.
699
700Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
701
702 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
703
704Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
705
706 * mips.h (INSN_MULT): Added.
707
708Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
709
710 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
711
712Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
713
714 * cgen.h (CGEN_INSN_INT): New typedef.
715 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
716 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
717 (CGEN_INSN_BYTES_PTR): New typedef.
718 (CGEN_EXTRACT_INFO): New typedef.
719 (cgen_insert_fn,cgen_extract_fn): Update.
720 (cgen_opcode_table): New member `insn_endian'.
721 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
722 (insert_operand,extract_operand): Update.
723 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
724
725Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
726
727 * cgen.h (CGEN_ATTR_BOOLS): New macro.
728 (struct CGEN_HW_ENTRY): New member `attrs'.
729 (CGEN_HW_ATTR): New macro.
730 (struct CGEN_OPERAND_INSTANCE): New member `name'.
731 (CGEN_INSN_INVALID_P): New macro.
732
733Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
734
735 * hppa.h: Add "fid".
736
737Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
738
739 From Robert Andrew Dale <rob@nb.net>
740 * i386.h (i386_optab): Add AMD 3DNow! instructions.
741 (AMD_3DNOW_OPCODE): Define.
742
743Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
744
745 * d30v.h (EITHER_BUT_PREFER_MU): Define.
746
747Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
748
749 * cgen.h (cgen_insn): #if 0 out element `cdx'.
750
751Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
752
753 Move all global state data into opcode table struct, and treat
754 opcode table as something that is "opened/closed".
755 * cgen.h (CGEN_OPCODE_DESC): New type.
756 (all fns): New first arg of opcode table descriptor.
757 (cgen_set_parse_operand_fn): Add prototype.
758 (cgen_current_machine,cgen_current_endian): Delete.
759 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
760 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
761 dis_hash_table,dis_hash_table_entries.
762 (opcode_open,opcode_close): Add prototypes.
763
764 * cgen.h (cgen_insn): New element `cdx'.
765
766Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
767
768 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
769
770Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
771
772 * mn10300.h: Add "no_match_operands" field for instructions.
773 (MN10300_MAX_OPERANDS): Define.
774
775Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
776
777 * cgen.h (cgen_macro_insn_count): Declare.
778
779Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
780
781 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
782 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
783 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
784 set_{int,vma}_operand.
785
786Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
787
788 * mn10300.h: Add "machine" field for instructions.
789 (MN103, AM30): Define machine types.
790
791Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
792
793 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
794
7951998-06-18 Ulrich Drepper <drepper@cygnus.com>
796
797 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
798
799Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
800
801 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
802 and ud2b.
803 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
804 those that happen to be implemented on pentiums.
805
806Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
807
808 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
809 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
810 with Size16|IgnoreSize or Size32|IgnoreSize.
811
812Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
813
814 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
815 (REPE): Rename to REPE_PREFIX_OPCODE.
816 (i386_regtab_end): Remove.
817 (i386_prefixtab, i386_prefixtab_end): Remove.
818 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
819 of md_begin.
820 (MAX_OPCODE_SIZE): Define.
821 (i386_optab_end): Remove.
822 (sl_Suf): Define.
823 (sl_FP): Use sl_Suf.
824
825 * i386.h (i386_optab): Allow 16 bit displacement for `mov
826 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
827 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
828 data32, dword, and adword prefixes.
829 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
830 regs.
831
832Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
833
834 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
835
836 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
837 register operands, because this is a common idiom. Flag them with
838 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
839 fdivrp because gcc erroneously generates them. Also flag with a
840 warning.
841
842 * i386.h: Add suffix modifiers to most insns, and tighter operand
843 checks in some cases. Fix a number of UnixWare compatibility
844 issues with float insns. Merge some floating point opcodes, using
845 new FloatMF modifier.
846 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
847 consistency.
848
849 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
850 IgnoreDataSize where appropriate.
851
852Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
853
854 * i386.h: (one_byte_segment_defaults): Remove.
855 (two_byte_segment_defaults): Remove.
856 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
857
858Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
859
860 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
861 (cgen_hw_lookup_by_num): Declare.
862
863Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
864
865 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
866 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
867
868Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
869
870 * cgen.h (cgen_asm_init_parse): Delete.
871 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
872 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
873
874Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
875
876 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
877 (cgen_asm_finish_insn): Update prototype.
878 (cgen_insn): New members num, data.
879 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
880 dis_hash, dis_hash_table_size moved to ...
881 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
882 All uses updated. New members asm_hash_p, dis_hash_p.
883 (CGEN_MINSN_EXPANSION): New struct.
884 (cgen_expand_macro_insn): Declare.
885 (cgen_macro_insn_count): Declare.
886 (get_insn_operands): Update prototype.
887 (lookup_get_insn_operands): Declare.
888
889Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
890
891 * i386.h (i386_optab): Change iclrKludge and imulKludge to
892 regKludge. Add operands types for string instructions.
893
894Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
895
896 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
897 table.
898
899Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
900
901 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
902 for `gettext'.
903
904Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
905
906 * i386.h: Remove NoModrm flag from all insns: it's never checked.
907 Add IsString flag to string instructions.
908 (IS_STRING): Don't define.
909 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
910 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
911 (SS_PREFIX_OPCODE): Define.
912
913Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
914
915 * i386.h: Revert March 24 patch; no more LinearAddress.
916
917Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
918
919 * i386.h (i386_optab): Remove fwait (9b) from all floating point
920 instructions, and instead add FWait opcode modifier. Add short
921 form of fldenv and fstenv.
922 (FWAIT_OPCODE): Define.
923
924 * i386.h (i386_optab): Change second operand constraint of `mov
925 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
926 allow legal instructions such as `movl %gs,%esi'
927
928Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
929
930 * h8300.h: Various changes to fully bracket initializers.
931
932Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
933
934 * i386.h: Set LinearAddress for lidt and lgdt.
935
936Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
937
938 * cgen.h (CGEN_BOOL_ATTR): New macro.
939
940Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
941
942 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
943
944Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
945
946 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
947 (cgen_insn): Record syntax and format entries here, rather than
948 separately.
949
950Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
951
952 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
953
954Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
955
956 * cgen.h (cgen_insert_fn): Change type of result to const char *.
957 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
958 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
959
960Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
961
962 * cgen.h (lookup_insn): New argument alias_p.
963
964Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
965
966Fix rac to accept only a0:
967 * d10v.h (OPERAND_ACC): Split into:
968 (OPERAND_ACC0, OPERAND_ACC1) .
969 (OPERAND_GPR): Define.
970
971Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
972
973 * cgen.h (CGEN_FIELDS): Define here.
974 (CGEN_HW_ENTRY): New member `type'.
975 (hw_list): Delete decl.
976 (enum cgen_mode): Declare.
977 (CGEN_OPERAND): New member `hw'.
978 (enum cgen_operand_instance_type): Declare.
979 (CGEN_OPERAND_INSTANCE): New type.
980 (CGEN_INSN): New member `operands'.
981 (CGEN_OPCODE_DATA): Make hw_list const.
982 (get_insn_operands,lookup_insn): Add prototypes for.
983
984Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
985
986 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
987 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
988 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
989 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
990
991Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
992
993 * cgen.h: Correct typo in comment end marker.
994
995Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
996
997 * tic30.h: New file.
998
999Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
1000
1001 * cgen.h: Add prototypes for cgen_save_fixups(),
1002 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1003 of cgen_asm_finish_insn() to return a char *.
1004
1005Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1006
1007 * cgen.h: Formatting changes to improve readability.
1008
1009Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1010
1011 * cgen.h (*): Clean up pass over `struct foo' usage.
1012 (CGEN_ATTR): Make unsigned char.
1013 (CGEN_ATTR_TYPE): Update.
1014 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1015 (cgen_base): Move member `attrs' to cgen_insn.
1016 (CGEN_KEYWORD): New member `null_entry'.
1017 (CGEN_{SYNTAX,FORMAT}): New types.
1018 (cgen_insn): Format and syntax separated from each other.
1019
1020Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1021
1022 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1023 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1024 flags_{used,set} long.
1025 (d30v_operand): Make flags field long.
1026
1027Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1028
1029 * m68k.h: Fix comment describing operand types.
1030
1031Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1032
1033 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1034 everything else after down.
1035
1036Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1037
1038 * d10v.h (OPERAND_FLAG): Split into:
1039 (OPERAND_FFLAG, OPERAND_CFLAG) .
1040
1041Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1042
1043 * mips.h (struct mips_opcode): Changed comments to reflect new
1044 field usage.
1045
1046Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1047
1048 * mips.h: Added to comments a quick-ref list of all assigned
1049 operand type characters.
1050 (OP_{MASK,SH}_PERFREG): New macros.
1051
1052Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1053
1054 * sparc.h: Add '_' and '/' for v9a asr's.
1055 Patch from David Miller <davem@vger.rutgers.edu>
1056
1057Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1058
1059 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1060 area are not available in the base model (H8/300).
1061
1062Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1063
1064 * m68k.h: Remove documentation of ` operand specifier.
1065
1066Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1067
1068 * m68k.h: Document q and v operand specifiers.
1069
1070Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1071
1072 * v850.h (struct v850_opcode): Add processors field.
1073 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1074 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1075 (PROCESSOR_V850EA): New bit constants.
1076
1077Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1078
1079 Merge changes from Martin Hunt:
1080
1081 * d30v.h: Allow up to 64 control registers. Add
1082 SHORT_A5S format.
1083
1084 * d30v.h (LONG_Db): New form for delayed branches.
1085
1086 * d30v.h: (LONG_Db): New form for repeati.
1087
1088 * d30v.h (SHORT_D2B): New form.
1089
1090 * d30v.h (SHORT_A2): New form.
1091
1092 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1093 registers are used. Needed for VLIW optimization.
1094
1095Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1096
1097 * cgen.h: Move assembler interface section
1098 up so cgen_parse_operand_result is defined for cgen_parse_address.
1099 (cgen_parse_address): Update prototype.
1100
1101Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1102
1103 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1104
1105Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1106
1107 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1108 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1109 <paubert@iram.es>.
1110
1111 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1112 <paubert@iram.es>.
1113
1114 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1115 <paubert@iram.es>.
1116
1117 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1118 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1119
1120Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1121
1122 * v850.h (V850_NOT_R0): New flag.
1123
1124Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1125
1126 * v850.h (struct v850_opcode): Remove flags field.
1127
1128Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1129
1130 * v850.h (struct v850_opcode): Add flags field.
1131 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1132 fields.
1133 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1134 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1135
1136Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1137
1138 * arc.h: New file.
1139
1140Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1141
1142 * sparc.h (sparc_opcodes): Declare as const.
1143
1144Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1145
1146 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1147 uses single or double precision floating point resources.
1148 (INSN_NO_ISA, INSN_ISA1): Define.
1149 (cpu specific INSN macros): Tweak into bitmasks outside the range
1150 of INSN_ISA field.
1151
1152Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1153
1154 * i386.h: Fix pand opcode.
1155
1156Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1157
1158 * mips.h: Widen INSN_ISA and move it to a more convenient
1159 bit position. Add INSN_3900.
1160
1161Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1162
1163 * mips.h (struct mips_opcode): added new field membership.
1164
1165Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1166
1167 * i386.h (movd): only Reg32 is allowed.
1168
1169 * i386.h: add fcomp and ud2. From Wayne Scott
1170 <wscott@ichips.intel.com>.
1171
1172Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1173
1174 * i386.h: Add MMX instructions.
1175
1176Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1177
1178 * i386.h: Remove W modifier from conditional move instructions.
1179
1180Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1181
1182 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1183 with no arguments to match that generated by the UnixWare
1184 assembler.
1185
1186Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1187
1188 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1189 (cgen_parse_operand_fn): Declare.
1190 (cgen_init_parse_operand): Declare.
1191 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1192 new argument `want'.
1193 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1194 (enum cgen_parse_operand_type): New enum.
1195
1196Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1197
1198 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1199
1200Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1201
1202 * cgen.h: New file.
1203
1204Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1205
1206 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1207 fdivrp.
1208
1209Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1210
1211 * v850.h (extract): Make unsigned.
1212
1213Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1214
1215 * i386.h: Add iclr.
1216
1217Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1218
1219 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1220 take a direction bit.
1221
1222Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1223
1224 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1225
1226Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1227
1228 * sparc.h: Include <ansidecl.h>. Update function declarations to
1229 use prototypes, and to use const when appropriate.
1230
1231Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1232
1233 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1234
1235Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1236
1237 * d10v.h: Change pre_defined_registers to
1238 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1239
1240Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1241
1242 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1243 Change mips_opcodes from const array to a pointer,
1244 and change bfd_mips_num_opcodes from const int to int,
1245 so that we can increase the size of the mips opcodes table
1246 dynamically.
1247
1248Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1249
1250 * d30v.h (FLAG_X): Remove unused flag.
1251
1252Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1253
1254 * d30v.h: New file.
1255
1256Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1257
1258 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1259 (PDS_VALUE): Macro to access value field of predefined symbols.
1260 (tic80_next_predefined_symbol): Add prototype.
1261
1262Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1263
1264 * tic80.h (tic80_symbol_to_value): Change prototype to match
1265 change in function, added class parameter.
1266
1267Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1268
1269 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1270 endmask fields, which are somewhat weird in that 0 and 32 are
1271 treated exactly the same.
1272
1273Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1274
1275 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1276 rather than a constant that is 2**X. Reorder them to put bits for
1277 operands that have symbolic names in the upper bits, so they can
1278 be packed into an int where the lower bits contain the value that
1279 corresponds to that symbolic name.
1280 (predefined_symbo): Add struct.
1281 (tic80_predefined_symbols): Declare array of translations.
1282 (tic80_num_predefined_symbols): Declare size of that array.
1283 (tic80_value_to_symbol): Declare function.
1284 (tic80_symbol_to_value): Declare function.
1285
1286Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1287
1288 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1289
1290Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1291
1292 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1293 be the destination register.
1294
1295Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1296
1297 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1298 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1299 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1300 that the opcode can have two vector instructions in a single
1301 32 bit word and we have to encode/decode both.
1302
1303Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1304
1305 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1306 TIC80_OPERAND_RELATIVE for PC relative.
1307 (TIC80_OPERAND_BASEREL): New flag bit for register
1308 base relative.
1309
1310Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1311
1312 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1313
1314Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1315
1316 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1317 ":s" modifier for scaling.
1318
1319Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1320
1321 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1322 (TIC80_OPERAND_M_LI): Ditto
1323
1324Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1325
1326 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1327 (TIC80_OPERAND_CC): New define for condition code operand.
1328 (TIC80_OPERAND_CR): New define for control register operand.
1329
1330Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1331
1332 * tic80.h (struct tic80_opcode): Name changed.
1333 (struct tic80_opcode): Remove format field.
1334 (struct tic80_operand): Add insertion and extraction functions.
1335 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1336 correct ones.
1337 (FMT_*): Ditto.
1338
1339Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1340
1341 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1342 type IV instruction offsets.
1343
1344Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1345
1346 * tic80.h: New file.
1347
1348Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1349
1350 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1351
1352Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1353
1354 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1355 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1356 * v850.h: Fix comment, v850_operand not powerpc_operand.
1357
1358Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1359
1360 * mn10200.h: Flesh out structures and definitions needed by
1361 the mn10200 assembler & disassembler.
1362
1363Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1364
1365 * mips.h: Add mips16 definitions.
1366
1367Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1368
1369 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1370
1371Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1372
1373 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1374 (MN10300_OPERAND_MEMADDR): Define.
1375
1376Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1377
1378 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1379
1380Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1381
1382 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1383
1384Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1385
1386 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1387
1388Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1389
1390 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1391
1392Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1393
1394 * alpha.h: Don't include "bfd.h"; private relocation types are now
1395 negative to minimize problems with shared libraries. Organize
1396 instruction subsets by AMASK extensions and PALcode
1397 implementation.
1398 (struct alpha_operand): Move flags slot for better packing.
1399
1400Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1401
1402 * v850.h (V850_OPERAND_RELAX): New operand flag.
1403
1404Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1405
1406 * mn10300.h (FMT_*): Move operand format definitions
1407 here.
1408
1409Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1410
1411 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1412
1413Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1414
1415 * mn10300.h (mn10300_opcode): Add "format" field.
1416 (MN10300_OPERAND_*): Define.
1417
1418Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1419
1420 * mn10x00.h: Delete.
1421 * mn10200.h, mn10300.h: New files.
1422
1423Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1424
1425 * mn10x00.h: New file.
1426
1427Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1428
1429 * v850.h: Add new flag to indicate this instruction uses a PC
1430 displacement.
1431
1432Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1433
1434 * h8300.h (stmac): Add missing instruction.
1435
1436Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1437
1438 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1439 field.
1440
1441Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1442
1443 * v850.h (V850_OPERAND_EP): Define.
1444
1445 * v850.h (v850_opcode): Add size field.
1446
1447Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1448
1449 * v850.h (v850_operands): Add insert and extract fields, pointers
1450 to functions used to handle unusual operand encoding.
1451 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1452 V850_OPERAND_SIGNED): Defined.
1453
1454Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1455
1456 * v850.h (v850_operands): Add flags field.
1457 (OPERAND_REG, OPERAND_NUM): Defined.
1458
1459Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1460
1461 * v850.h: New file.
1462
1463Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1464
1465 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1466 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1467 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1468 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1469 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1470 Defined.
1471
1472Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1473
1474 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1475 a 3 bit space id instead of a 2 bit space id.
1476
1477Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1478
1479 * d10v.h: Add some additional defines to support the
1480 assembler in determining which operations can be done in parallel.
1481
1482Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1483
1484 * h8300.h (SN): Define.
1485 (eepmov.b): Renamed from "eepmov"
1486 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1487 with them.
1488
1489Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1490
1491 * d10v.h (OPERAND_SHIFT): New operand flag.
1492
1493Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1494
1495 * d10v.h: Changes for divs, parallel-only instructions, and
1496 signed numbers.
1497
1498Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1499
1500 * d10v.h (pd_reg): Define. Putting the definition here allows
1501 the assembler and disassembler to share the same struct.
1502
1503Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1504
1505 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1506 Williams <steve@icarus.com>.
1507
1508Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1509
1510 * d10v.h: New file.
1511
1512Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1513
1514 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1515
1516Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1517
1518 * m68k.h (mcf5200): New macro.
1519 Document names of coldfire control registers.
1520
1521Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1522
1523 * h8300.h (SRC_IN_DST): Define.
1524
1525 * h8300.h (UNOP3): Mark the register operand in this insn
1526 as a source operand, not a destination operand.
1527 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1528 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1529 register operand with SRC_IN_DST.
1530
1531Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1532
1533 * alpha.h: New file.
1534
1535Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * rs6k.h: Remove obsolete file.
1538
1539Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1540
1541 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1542 fdivp, and fdivrp. Add ffreep.
1543
1544Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1545
1546 * h8300.h: Reorder various #defines for readability.
1547 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1548 (BITOP): Accept additional (unused) argument. All callers changed.
1549 (EBITOP): Likewise.
1550 (O_LAST): Bump.
1551 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1552
1553 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1554 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1555 (BITOP, EBITOP): Handle new H8/S addressing modes for
1556 bit insns.
1557 (UNOP3): Handle new shift/rotate insns on the H8/S.
1558 (insns using exr): New instructions.
1559 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1560
1561Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1562
1563 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1564 was incorrect.
1565
1566Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1567
1568 * h8300.h (START): Remove.
1569 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1570 and mov.l insns that can be relaxed.
1571
1572Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1573
1574 * i386.h: Remove Abs32 from lcall.
1575
1576Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1577
1578 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1579 (SLCPOP): New macro.
1580 Mark X,Y opcode letters as in use.
1581
1582Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1583
1584 * sparc.h (F_FLOAT, F_FBR): Define.
1585
1586Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1587
1588 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1589 from all insns.
1590 (ABS8SRC,ABS8DST): Add ABS8MEM.
1591 (add.l): Fix reg+reg variant.
1592 (eepmov.w): Renamed from eepmovw.
1593 (ldc,stc): Fix many cases.
1594
1595Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1596
1597 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1598
1599Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1600
1601 * sparc.h (O): Mark operand letter as in use.
1602
1603Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1604
1605 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1606 Mark operand letters uU as in use.
1607
1608Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1609
1610 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1611 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1612 (SPARC_OPCODE_SUPPORTED): New macro.
1613 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1614 (F_NOTV9): Delete.
1615
1616Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1617
1618 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1619 declaration consistent with return type in definition.
1620
1621Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1622
1623 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1624
1625Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1626
1627 * i386.h (i386_regtab): Add 80486 test registers.
1628
1629Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1630
1631 * i960.h (I_HX): Define.
1632 (i960_opcodes): Add HX instruction.
1633
1634Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1635
1636 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1637 and fclex.
1638
1639Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1640
1641 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1642 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1643 (bfd_* defines): Delete.
1644 (sparc_opcode_archs): Replaces architecture_pname.
1645 (sparc_opcode_lookup_arch): Declare.
1646 (NUMOPCODES): Delete.
1647
1648Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1649
1650 * sparc.h (enum sparc_architecture): Add v9a.
1651 (ARCHITECTURES_CONFLICT_P): Update.
1652
1653Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1654
1655 * i386.h: Added Pentium Pro instructions.
1656
1657Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1658
1659 * m68k.h: Document new 'W' operand place.
1660
1661Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1662
1663 * hppa.h: Add lci and syncdma instructions.
1664
1665Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1666
1667 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1668 instructions.
1669
1670Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1671
1672 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1673 assembler's -mcom and -many switches.
1674
1675Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1676
1677 * i386.h: Fix cmpxchg8b extension opcode description.
1678
1679Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1680
1681 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1682 and register cr4.
1683
1684Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1685
1686 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1687
1688Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1689
1690 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1691
1692Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1693
1694 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1695
1696Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1697
1698 * m68kmri.h: Remove.
1699
1700 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1701 declarations. Remove F_ALIAS and flag field of struct
1702 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1703 int. Make name and args fields of struct m68k_opcode const.
1704
1705Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1706
1707 * sparc.h (F_NOTV9): Define.
1708
1709Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1710
1711 * mips.h (INSN_4010): Define.
1712
1713Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1714
1715 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1716
1717 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1718 * m68k.h: Fix argument descriptions of coprocessor
1719 instructions to allow only alterable operands where appropriate.
1720 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1721 (m68k_opcode_aliases): Add more aliases.
1722
1723Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1724
1725 * m68k.h: Added explcitly short-sized conditional branches, and a
1726 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1727 svr4-based configurations.
1728
1729Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1730
1731 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1732 * i386.h: added missing Data16/Data32 flags to a few instructions.
1733
1734Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1735
1736 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1737 (OP_MASK_BCC, OP_SH_BCC): Define.
1738 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1739 (OP_MASK_CCC, OP_SH_CCC): Define.
1740 (INSN_READ_FPR_R): Define.
1741 (INSN_RFE): Delete.
1742
1743Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1744
1745 * m68k.h (enum m68k_architecture): Deleted.
1746 (struct m68k_opcode_alias): New type.
1747 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1748 matching constraints, values and flags. As a side effect of this,
1749 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1750 as I know were never used, now may need re-examining.
1751 (numopcodes): Now const.
1752 (m68k_opcode_aliases, numaliases): New variables.
1753 (endop): Deleted.
1754 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1755 m68k_opcode_aliases; update declaration of m68k_opcodes.
1756
1757Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1758
1759 * hppa.h (delay_type): Delete unused enumeration.
1760 (pa_opcode): Replace unused delayed field with an architecture
1761 field.
1762 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1763
1764Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1765
1766 * mips.h (INSN_ISA4): Define.
1767
1768Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1769
1770 * mips.h (M_DLA_AB, M_DLI): Define.
1771
1772Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1773
1774 * hppa.h (fstwx): Fix single-bit error.
1775
1776Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1777
1778 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1779
1780Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1781
1782 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1783 debug registers. From Charles Hannum (mycroft@netbsd.org).
1784
1785Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1786
1787 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1788 i386 support:
1789 * i386.h (MOV_AX_DISP32): New macro.
1790 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1791 of several call/return instructions.
1792 (ADDR_PREFIX_OPCODE): New macro.
1793
1794Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1795
1796 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1797
1798 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1799 it pointer to const char;
1800 (struct vot, field `name'): ditto.
1801
1802Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1803
1804 * vax.h: Supply and properly group all values in end sentinel.
1805
1806Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1807
1808 * mips.h (INSN_ISA, INSN_4650): Define.
1809
1810Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1811
1812 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1813 systems with a separate instruction and data cache, such as the
1814 29040, these instructions take an optional argument.
1815
1816Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1817
1818 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1819 INSN_TRAP.
1820
1821Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1822
1823 * mips.h (INSN_STORE_MEMORY): Define.
1824
1825Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1826
1827 * sparc.h: Document new operand type 'x'.
1828
1829Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1830
1831 * i960.h (I_CX2): New instruction category. It includes
1832 instructions available on Cx and Jx processors.
1833 (I_JX): New instruction category, for JX-only instructions.
1834 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1835 Jx-only instructions, in I_JX category.
1836
1837Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1838
1839 * ns32k.h (endop): Made pointer const too.
1840
1841Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1842
1843 * ns32k.h: Drop Q operand type as there is no correct use
1844 for it. Add I and Z operand types which allow better checking.
1845
1846Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1847
1848 * h8300.h (xor.l) :fix bit pattern.
1849 (L_2): New size of operand.
1850 (trapa): Use it.
1851
1852Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1853
1854 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1855
1856Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1857
1858 * sparc.h: Include v9 definitions.
1859
1860Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1861
1862 * m68k.h (m68060): Defined.
1863 (m68040up, mfloat, mmmu): Include it.
1864 (struct m68k_opcode): Widen `arch' field.
1865 (m68k_opcodes): Updated for M68060. Removed comments that were
1866 instructions commented out by "JF" years ago.
1867
1868Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1869
1870 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1871 add a one-bit `flags' field.
1872 (F_ALIAS): New macro.
1873
1874Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1875
1876 * h8300.h (dec, inc): Get encoding right.
1877
1878Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1879
1880 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1881 a flag instead.
1882 (PPC_OPERAND_SIGNED): Define.
1883 (PPC_OPERAND_SIGNOPT): Define.
1884
1885Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1886
1887 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1888 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1889
1890Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1891
1892 * i386.h: Reverse last change. It'll be handled in gas instead.
1893
1894Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1895
1896 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1897 slower on the 486 and used the implicit shift count despite the
1898 explicit operand. The one-operand form is still available to get
1899 the shorter form with the implicit shift count.
1900
1901Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1902
1903 * hppa.h: Fix typo in fstws arg string.
1904
1905Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1906
1907 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1908
1909Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1910
1911 * ppc.h (PPC_OPCODE_601): Define.
1912
1913Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1914
1915 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1916 (so we can determine valid completers for both addb and addb[tf].)
1917
1918 * hppa.h (xmpyu): No floating point format specifier for the
1919 xmpyu instruction.
1920
1921Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1922
1923 * ppc.h (PPC_OPERAND_NEXT): Define.
1924 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1925 (struct powerpc_macro): Define.
1926 (powerpc_macros, powerpc_num_macros): Declare.
1927
1928Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1929
1930 * ppc.h: New file. Header file for PowerPC opcode table.
1931
1932Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1933
1934 * hppa.h: More minor template fixes for sfu and copr (to allow
1935 for easier disassembly).
1936
1937 * hppa.h: Fix templates for all the sfu and copr instructions.
1938
1939Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1940
1941 * i386.h (push): Permit Imm16 operand too.
1942
1943Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1944
1945 * h8300.h (andc): Exists in base arch.
1946
1947Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1948
1949 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1950 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1951
1952Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1953
1954 * hppa.h: Add FP quadword store instructions.
1955
1956Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1957
1958 * mips.h: (M_J_A): Added.
1959 (M_LA): Removed.
1960
1961Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1962
1963 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1964 <mellon@pepper.ncd.com>.
1965
1966Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1967
1968 * hppa.h: Immediate field in probei instructions is unsigned,
1969 not low-sign extended.
1970
1971Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1972
1973 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1974
1975Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1976
1977 * i386.h: Add "fxch" without operand.
1978
1979Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1980
1981 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1982
1983Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1984
1985 * hppa.h: Add gfw and gfr to the opcode table.
1986
1987Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1988
1989 * m88k.h: extended to handle m88110.
1990
1991Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1992
1993 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1994 addresses.
1995
1996Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1997
1998 * i960.h (i960_opcodes): Properly bracket initializers.
1999
2000Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2001
2002 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2003
2004Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2005
2006 * m68k.h (two): Protect second argument with parentheses.
2007
2008Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2009
2010 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2011 Deleted old in/out instructions in "#if 0" section.
2012
2013Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2014
2015 * i386.h (i386_optab): Properly bracket initializers.
2016
2017Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2018
2019 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2020 Jeff Law, law@cs.utah.edu).
2021
2022Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2023
2024 * i386.h (lcall): Accept Imm32 operand also.
2025
2026Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2027
2028 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2029 (M_DABS): Added.
2030
2031Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2032
2033 * mips.h (INSN_*): Changed values. Removed unused definitions.
2034 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2035 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2036 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2037 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2038 (M_*): Added new values for r6000 and r4000 macros.
2039 (ANY_DELAY): Removed.
2040
2041Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2042
2043 * mips.h: Added M_LI_S and M_LI_SS.
2044
2045Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2046
2047 * h8300.h: Get some rare mov.bs correct.
2048
2049Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2050
2051 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2052 been included.
2053
2054Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2055
2056 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2057 jump instructions, for use in disassemblers.
2058
2059Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2060
2061 * m88k.h: Make bitfields just unsigned, not unsigned long or
2062 unsigned short.
2063
2064Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2065
2066 * hppa.h: New argument type 'y'. Use in various float instructions.
2067
2068Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2069
2070 * hppa.h (break): First immediate field is unsigned.
2071
2072 * hppa.h: Add rfir instruction.
2073
2074Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2075
2076 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2077
2078Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2079
2080 * mips.h: Reworked the hazard information somewhat, and fixed some
2081 bugs in the instruction hazard descriptions.
2082
2083Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2084
2085 * m88k.h: Corrected a couple of opcodes.
2086
2087Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2088
2089 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2090 new version includes instruction hazard information, but is
2091 otherwise reasonably similar.
2092
2093Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2094
2095 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2096
2097Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2098
2099 Patches from Jeff Law, law@cs.utah.edu:
2100 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2101 Make the tables be the same for the following instructions:
2102 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2103 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2104 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2105 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2106 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2107 "fcmp", and "ftest".
2108
2109 * hppa.h: Make new and old tables the same for "break", "mtctl",
2110 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2111 Fix typo in last patch. Collapse several #ifdefs into a
2112 single #ifdef.
2113
2114 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2115 of the comments up-to-date.
2116
2117 * hppa.h: Update "free list" of letters and update
2118 comments describing each letter's function.
2119
2120Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2121
2122 * h8300.h: checkpoint, includes H8/300-H opcodes.
2123
2124Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2125
2126 * Patches from Jeffrey Law <law@cs.utah.edu>.
2127 * hppa.h: Rework single precision FP
2128 instructions so that they correctly disassemble code
2129 PA1.1 code.
2130
2131Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2132
2133 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2134 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2135
2136Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2137
2138 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2139 gdb will define it for now.
2140
2141Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2142
2143 * sparc.h: Don't end enumerator list with comma.
2144
2145Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2146
2147 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2148 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2149 ("bc2t"): Correct typo.
2150 ("[ls]wc[023]"): Use T rather than t.
2151 ("c[0123]"): Define general coprocessor instructions.
2152
2153Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2154
2155 * m68k.h: Move split point for gcc compilation more towards
2156 middle.
2157
2158Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2159
2160 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2161 simply wrong, ics, rfi, & rfsvc were missing).
2162 Add "a" to opr_ext for "bb". Doc fix.
2163
2164Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2165
2166 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2167 * mips.h: Add casts, to suppress warnings about shifting too much.
2168 * m68k.h: Document the placement code '9'.
2169
2170Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2171
2172 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2173 allows callers to break up the large initialized struct full of
2174 opcodes into two half-sized ones. This permits GCC to compile
2175 this module, since it takes exponential space for initializers.
2176 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2177
2178Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2179
2180 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2181 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2182 initialized structs in it.
2183
2184Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2185
2186 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2187 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2188 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2189
2190Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2191
2192 * mips.h: document "i" and "j" operands correctly.
2193
2194Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2195
2196 * mips.h: Removed endianness dependency.
2197
2198Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2199
2200 * h8300.h: include info on number of cycles per instruction.
2201
2202Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2203
2204 * hppa.h: Move handy aliases to the front. Fix masks for extract
2205 and deposit instructions.
2206
2207Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2208
2209 * i386.h: accept shld and shrd both with and without the shift
2210 count argument, which is always %cl.
2211
2212Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2213
2214 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2215 (one_byte_segment_defaults, two_byte_segment_defaults,
2216 i386_prefixtab_end): Ditto.
2217
2218Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2219
2220 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2221 for operand 2; from John Carr, jfc@dsg.dec.com.
2222
2223Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2224
2225 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2226 always use 16-bit offsets. Makes calculated-size jump tables
2227 feasible.
2228
2229Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2230
2231 * i386.h: Fix one-operand forms of in* and out* patterns.
2232
2233Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2234
2235 * m68k.h: Added CPU32 support.
2236
2237Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2238
2239 * mips.h (break): Disassemble the argument. Patch from
2240 jonathan@cs.stanford.edu (Jonathan Stone).
2241
2242Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2243
2244 * m68k.h: merged Motorola and MIT syntax.
2245
2246Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2247
2248 * m68k.h (pmove): make the tests less strict, the 68k book is
2249 wrong.
2250
2251Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2252
2253 * m68k.h (m68ec030): Defined as alias for 68030.
2254 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2255 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2256 them. Tightened description of "fmovex" to distinguish it from
2257 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2258 up descriptions that claimed versions were available for chips not
2259 supporting them. Added "pmovefd".
2260
2261Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2262
2263 * m68k.h: fix where the . goes in divull
2264
2265Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2266
2267 * m68k.h: the cas2 instruction is supposed to be written with
2268 indirection on the last two operands, which can be either data or
2269 address registers. Added a new operand type 'r' which accepts
2270 either register type. Added new cases for cas2l and cas2w which
2271 use them. Corrected masks for cas2 which failed to recognize use
2272 of address register.
2273
2274Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2275
2276 * m68k.h: Merged in patches (mostly m68040-specific) from
2277 Colin Smith <colin@wrs.com>.
2278
2279 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2280 base). Also cleaned up duplicates, re-ordered instructions for
2281 the sake of dis-assembling (so aliases come after standard names).
2282 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2283
2284Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2285
2286 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2287 all missing .s
2288
2289Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2290
2291 * sparc.h: Moved tables to BFD library.
2292
2293 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2294
2295Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2296
2297 * h8300.h: Finish filling in all the holes in the opcode table,
2298 so that the Lucid C compiler can digest this as well...
2299
2300Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2301
2302 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2303 Fix opcodes on various sizes of fild/fist instructions
2304 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2305 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2306
2307Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2308
2309 * h8300.h: Fill in all the holes in the opcode table so that the
2310 losing HPUX C compiler can digest this...
2311
2312Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2313
2314 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2315 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2316
2317Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2318
2319 * sparc.h: Add new architecture variant sparclite; add its scan
2320 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2321
2322Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2323
2324 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2325 fy@lucid.com).
2326
2327Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2328
2329 * rs6k.h: New version from IBM (Metin).
2330
2331Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2332
2333 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2334 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2335
2336Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2337
2338 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2339
2340Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2341
2342 * m68k.h (one, two): Cast macro args to unsigned to suppress
2343 complaints from compiler and lint about integer overflow during
2344 shift.
2345
2346Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2347
2348 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2349
2350Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2351
2352 * mips.h: Make bitfield layout depend on the HOST compiler,
2353 not on the TARGET system.
2354
2355Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2356
2357 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2358 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2359 <TRANLE@INTELLICORP.COM>.
2360
2361Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2362
2363 * h8300.h: turned op_type enum into #define list
2364
2365Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2366
2367 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2368 similar instructions -- they've been renamed to "fitoq", etc.
2369 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2370 number of arguments.
2371 * h8300.h: Remove extra ; which produces compiler warning.
2372
2373Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2374
2375 * sparc.h: fix opcode for tsubcctv.
2376
2377Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2378
2379 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2380
2381Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2382
2383 * sparc.h (nop): Made the 'lose' field be even tighter,
2384 so only a standard 'nop' is disassembled as a nop.
2385
2386Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2387
2388 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2389 disassembled as a nop.
2390
2391Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2392
2393 * sparc.h: fix a typo.
2394
2395Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2396
2397 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2398 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2399 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2400
2401\f
2402Local Variables:
2403version-control: never
2404End:
This page took 0.190238 seconds and 4 git commands to generate.