[ bfd/ChangeLog ]
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
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12003-09-30 Chris Demetriou <cgd@broadcom.com>
2
3 * mips.h: Document +E, +F, +G, +H, and +I operand types.
4 Update documentation of I, +B and +C operand types.
5 (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
6 (M_DEXT, M_DINS): New enum values.
7
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82003-09-04 Nick Clifton <nickc@redhat.com>
9
10 * v850.h (PROCESSOR_V850E1): Define.
11
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122003-08-19 Alan Modra <amodra@bigpond.net.au>
13
14 * ppc.h (PPC_OPCODE_440): Define. Formatting. Use hex for other
15 PPC_OPCODE_* defines.
16
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172003-08-16 Jason Eckhardt <jle@rice.edu>
18
19 * i860.h (fmov.ds): Expand as famov.ds.
20 (fmov.sd): Expand as famov.sd.
21 (pfmov.ds): Expand as pfamov.ds.
22
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232003-08-07 Michael Meissner <gnu@the-meissners.org>
24
25 * cgen.h: Remove PARAM macro usage in all prototypes.
26 (CGEN_EXTRACT_INFO): Use void * instead of PTR.
27 (cgen_print_fn): Ditto.
28 (CGEN_HW_ENTRY): Ditto.
29 (CGEN_MAYBE_MULTI_IFLD): Ditto.
30 (struct cgen_insn): Ditto.
31 (CGEN_CPU_TABLE): Ditto.
32
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332003-08-07 Alan Modra <amodra@bigpond.net.au>
34
35 * alpha.h: Remove PARAMS macro.
36 * arc.h: Likewise.
37 * d10v.h: Likewise.
38 * d30v.h: Likewise.
39 * i370.h: Likewise.
40 * or32.h: Likewise.
41 * pj.h: Likewise.
42 * ppc.h: Likewise.
43 * sparc.h: Likewise.
44 * tic80.h: Likewise.
45 * v850.h: Likewise.
46
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472003-07-18 Michael Snyder <msnyder@redhat.com>
48
49 * include/opcode/h8sx.h (DO_MOVA1, DO_MOVA2): Reformatting.
50
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512003-07-15 Richard Sandiford <rsandifo@redhat.com>
52
53 * mips.h (CPU_RM7000): New macro.
54 (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
55
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562003-07-09 Alexandre Oliva <aoliva@redhat.com>
57
58 2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
59 * mn10300.h (AM33_2): Renamed from AM33.
60 2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
61 * mn10300.h (AM332, FMT_D3): Defined.
62 (MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise.
63 (MN10300_OPERAND_FPCR): Likewise.
64
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652003-07-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
66
67 * s390.h (s390_opcode_cpu_val): Add enum for cpu type z990.
68
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692003-06-25 Richard Sandiford <rsandifo@redhat.com>
70
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71 * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
72 (IMM8U, IMM8U_NS): Define.
73 (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
74
752003-06-25 Richard Sandiford <rsandifo@redhat.com>
76
77 * h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and
78 mov.l ERs,@(dd:32,ERd) entries.
8d1e520a 79
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802003-06-23 H.J. Lu <hongjiu.lu@intel.com>
81
82 * i386.h (i386_optab): Support Intel Precott New Instructions.
83
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842003-06-10 Gary Hade <garyhade@us.ibm.com>
85
86 * ppc.h (PPC_OPERAND_DQ): Define.
87
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882003-06-10 Richard Sandiford <rsandifo@redhat.com>
89
90 * h8300.h (IMM4_NS, IMM8_NS): New.
91 (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
92 Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
93
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942003-06-03 Michael Snyder <msnyder@redhat.com>
95
50649e42 96 * h8300.h (enum h8_model): Add AV_H8S to distinguish from H8H.
adadcc0c 97 (ldc): Split ccr ops from exr ops (which are only available
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98 on H8S or H8SX).
99 (stc): Ditto.
100 (andc, orc, xorc): Ditto.
101 (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
102
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1032003-06-03 Michael Snyder <msnyder@redhat.com>
104 and Bernd Schmidt <bernds@redhat.com>
105 and Alexandre Oliva <aoliva@redhat.com>
106 * h8300.h: Add support for h8300sx instruction set.
107
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1082003-05-23 Jason Eckhardt <jle@rice.edu>
109
110 * i860.h (expand_type): Add XP_ONLY.
111 (scyc.b): New XP instruction.
112 (ldio.l): Likewise.
113 (ldio.s): Likewise.
114 (ldio.b): Likewise.
115 (ldint.l): Likewise.
116 (ldint.s): Likewise.
117 (ldint.b): Likewise.
118 (stio.l): Likewise.
119 (stio.s): Likewise.
120 (stio.b): Likewise.
121 (pfld.q): Likewise.
122
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1232003-05-20 Jason Eckhardt <jle@rice.edu>
124
14218d5f 125 * i860.h (flush): Set lower 3 bits properly and use 'L'
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126 for the immediate operand type instead of 'i'.
127
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1282003-05-20 Jason Eckhardt <jle@rice.edu>
129
14218d5f 130 * i860.h (fzchks): Both S and R bits must be set.
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131 (pfzchks): Likewise.
132 (faddp): Likewise.
133 (pfaddp): Likewise.
134 (fix.ss): Remove (invalid instruction).
135 (pfix.ss): Likewise.
136 (ftrunc.ss): Likewise.
137 (pftrunc.ss): Likewise.
138
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1392003-05-18 Jason Eckhardt <jle@rice.edu>
140
141 * i860.h (form, pform): Add missing .dd suffix.
142
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1432003-05-13 Stephane Carrez <stcarrez@nerim.fr>
144
145 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
146
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1472003-04-07 Michael Snyder <msnyder@redhat.com>
148
149 * h8300.h (ldc/stc): Fix up src/dst swaps.
150
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1512003-04-09 J. Grant <jg-binutils@jguk.org>
152
153 * mips.h: Correct comment typo.
154
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1552003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
156
157 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
158 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
159 (s390_opcode): Remove architecture. Add modes and min_cpu.
160
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1612003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
162
163 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
164 processing.
165
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1662003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
167
168 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
169
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1702003-01-23 Alan Modra <amodra@bigpond.net.au>
171
172 * m68hc11.h (cpu6812s): Define.
173
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1742003-01-07 Chris Demetriou <cgd@broadcom.com>
175
176 * mips.h: Fix missing space in comment.
177 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
178 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
179 by four bits.
180
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1812003-01-02 Chris Demetriou <cgd@broadcom.com>
182
183 * mips.h: Update copyright years to include 2002 (which had
184 been missed previously) and 2003. Make comments about "+A",
185 "+B", and "+C" operand types more descriptive.
186
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1872002-12-31 Chris Demetriou <cgd@broadcom.com>
188
189 * mips.h: Note that the "+D" operand type name is now used.
190
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1912002-12-30 Chris Demetriou <cgd@broadcom.com>
192
193 * mips.h: Document "+" as the start of two-character operand
194 type names, and add new "K", "+A", "+B", and "+C" operand types.
195 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
196 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
197 defines.
198
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1992002-12-24 Dmitry Diky <diwil@mail.ru>
200
201 * msp430.h: New file. Defines msp430 opcodes.
202
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2032002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
204
205 * h8300.h: Added some more pseudo opcodes for system call
206 processing.
207
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2082002-12-19 Chris Demetriou <cgd@broadcom.com>
209
210 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
211 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
212 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
213 (OP_OP_SDC2, OP_OP_SDC3): Define.
214
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2152002-12-16 Alan Modra <amodra@bigpond.net.au>
216
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217 * hppa.h (completer_chars): #if 0 out.
218
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219 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
220 "default_args".
221 (struct not_wot): Constify "args".
222 (struct not): Constify "name".
223 (numopcodes): Delete.
224 (endop): Delete.
225
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2262002-12-13 Alan Modra <amodra@bigpond.net.au>
227
228 * pj.h (pj_opc_info_t): Add union.
229
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2302002-12-04 David Mosberger <davidm@hpl.hp.com>
231
232 * ia64.h: Fix copyright message.
233 (IA64_OPND_AR_CSD): New operand kind.
234
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2352002-12-03 Richard Henderson <rth@redhat.com>
236
237 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
238
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2392002-12-03 Alan Modra <amodra@bigpond.net.au>
240
241 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
242 Constify "leaf" and "multi".
243
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2442002-11-19 Klee Dienes <kdienes@apple.com>
245
246 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
247 fields.
248 (h8_opcodes). Modify initializer and initializer macros to no
249 longer initialize the removed fields.
adadcc0c 250
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2512002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
252
253 * tic4x.h (c4x_insts): Fixed LDHI constraint
254
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2552002-11-18 Klee Dienes <kdienes@apple.com>
256
257 * h8300.h (h8_opcode): Remove 'length' field.
258 (h8_opcodes): Mark as 'const' (both the declaration and
259 definition). Modify initializer and initializer macros to no
260 longer initialize the length field.
261
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2622002-11-18 Klee Dienes <kdienes@apple.com>
263
264 * arc.h (arc_ext_opcodes): Declare as extern.
265 (arc_ext_operands): Declare as extern.
266 * i860.h (i860_opcodes): Declare as const.
267
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2682002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
269
270 * tic4x.h: File reordering. Added enhanced opcodes.
271
2722002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
273
274 * tic4x.h: Major rewrite of entire file. Define instruction
275 classes, and put each instruction into a class.
276
2772002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
278
279 * tic4x.h: Added new opcodes and corrected some bugs. Add support
280 for new DSP types.
281
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2822002-10-14 Alan Modra <amodra@bigpond.net.au>
283
284 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
285
701b80cd 2862002-09-30 Gavin Romig-Koch <gavin@redhat.com>
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287 Ken Raeburn <raeburn@cygnus.com>
288 Aldy Hernandez <aldyh@redhat.com>
289 Eric Christopher <echristo@redhat.com>
290 Richard Sandiford <rsandifo@redhat.com>
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291
292 * mips.h: Update comment for new opcodes.
293 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
294 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
295 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
296 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
297 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
298 Don't match CPU_R4111 with INSN_4100.
299
0449635d 3002002-08-19 Elena Zannoni <ezannoni@redhat.com>
0449635d 301
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302 From matthew green <mrg@redhat.com>
303
304 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
0449635d 305 instructions.
adadcc0c 306 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
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307 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
308 e500x2 Integer select, branch locking, performance monitor,
309 cache locking and machine check APUs, respectively.
310 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
311 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
312
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3132002-08-13 Stephane Carrez <stcarrez@nerim.fr>
314
315 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
316 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
317 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
318 memory banks.
319 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
320
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3212002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
322
323 * mips.h (INSN_MIPS16): New define.
324
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3252002-07-08 Alan Modra <amodra@bigpond.net.au>
326
327 * i386.h: Remove IgnoreSize from movsx and movzx.
328
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3292002-06-08 Alan Modra <amodra@bigpond.net.au>
330
331 * a29k.h: Replace CONST with const.
332 (CONST): Don't define.
333 * convex.h: Replace CONST with const.
334 (CONST): Don't define.
335 * dlx.h: Replace CONST with const.
336 * or32.h (CONST): Don't define.
337
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3382002-05-30 Chris G. Demetriou <cgd@broadcom.com>
339
340 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
341 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
342 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
343 (INSN_MDMX): New constants, for MDMX support.
344 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
345
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3462002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
347
348 * dlx.h: New file.
349
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3502002-05-25 Alan Modra <amodra@bigpond.net.au>
351
352 * ia64.h: Use #include "" instead of <> for local header files.
353 * sparc.h: Likewise.
354
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3552002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
356
357 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
358
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3592002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
360
adadcc0c 361 * h8300.h: Corrected defs of all control regs
b9c9142c 362 and eepmov instr.
adadcc0c 363
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3642002-04-11 Alan Modra <amodra@bigpond.net.au>
365
366 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 367 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 368
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3692002-03-15 Chris G. Demetriou <cgd@broadcom.com>
370
371 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
372 instructions.
373 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
374 may be passed along with the ISA bitmask.
375
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3762002-03-05 Paul Koning <pkoning@equallogic.com>
377
378 * pdp11.h: Add format codes for float instruction formats.
379
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3802002-02-25 Alan Modra <amodra@bigpond.net.au>
381
382 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
383
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384Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
385
386 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
387
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388Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
389
390 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
391 (xchg): Fix.
392 (in, out): Disable 64bit operands.
393 (call, jmp): Avoid REX prefixes.
394 (jcxz): Prohibit in 64bit mode
395 (jrcxz, loop): Add 64bit variants.
396 (movq): Fix patterns.
397 (movmskps, pextrw, pinstrw): Add 64bit variants.
398
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3992002-01-31 Ivan Guzvinec <ivang@opencores.org>
400
401 * or32.h: New file.
402
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4032002-01-22 Graydon Hoare <graydon@redhat.com>
404
405 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
406 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
407
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4082002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
409
410 * h8300.h: Comment typo fix.
411
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4122002-01-03 matthew green <mrg@redhat.com>
413
414 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
415 (PPC_OPCODE_BOOKE64): Likewise.
416
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417Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
418
419 * hppa.h (call, ret): Move to end of table.
420 (addb, addib): PA2.0 variants should have been PA2.0W.
421 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
422 happy.
423 (fldw, fldd, fstw, fstd, bb): Likewise.
424 (short loads/stores): Tweak format specifier slightly to keep
425 disassembler happy.
426 (indexed loads/stores): Likewise.
427 (absolute loads/stores): Likewise.
428
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4292001-12-04 Alexandre Oliva <aoliva@redhat.com>
430
431 * d10v.h (OPERAND_NOSP): New macro.
432
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4332001-11-29 Alexandre Oliva <aoliva@redhat.com>
434
435 * d10v.h (OPERAND_SP): New macro.
436
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4372001-11-15 Alan Modra <amodra@bigpond.net.au>
438
439 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
440
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4412001-11-11 Timothy Wall <twall@alum.mit.edu>
442
443 * tic54x.h: Revise opcode layout; don't really need a separate
444 structure for parallel opcodes.
445
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4462001-11-13 Zack Weinberg <zack@codesourcery.com>
447 Alan Modra <amodra@bigpond.net.au>
448
449 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
450 accept WordReg.
451
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4522001-11-04 Chris Demetriou <cgd@broadcom.com>
453
454 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
455
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4562001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
457
458 * mmix.h: New file.
459
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4602001-10-18 Chris Demetriou <cgd@broadcom.com>
461
462 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
463 of the expression, to make source code merging easier.
464
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4652001-10-17 Chris Demetriou <cgd@broadcom.com>
466
467 * mips.h: Sort coprocessor instruction argument characters
468 in comment, add a few more words of description for "H".
469
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4702001-10-17 Chris Demetriou <cgd@broadcom.com>
471
472 * mips.h (INSN_SB1): New cpu-specific instruction bit.
473 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
474 if cpu is CPU_SB1.
475
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4762001-10-17 matthew green <mrg@redhat.com>
477
478 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
479
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4802001-10-12 matthew green <mrg@redhat.com>
481
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482 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
483 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
484 instructions, respectively.
418c1742 485
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4862001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
487
488 * v850.h: Remove spurious comment.
489
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4902001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
491
492 * h8300.h: Fix compile time warning messages
493
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4942001-09-04 Richard Henderson <rth@redhat.com>
495
496 * alpha.h (struct alpha_operand): Pack elements into bitfields.
497
a98b9439
EC
4982001-08-31 Eric Christopher <echristo@redhat.com>
499
500 * mips.h: Remove CPU_MIPS32_4K.
501
a6959011
AM
5022001-08-27 Torbjorn Granlund <tege@swox.com>
503
504 * ppc.h (PPC_OPERAND_DS): Define.
505
d83c6548
AJ
5062001-08-25 Andreas Jaeger <aj@suse.de>
507
508 * d30v.h: Fix declaration of reg_name_cnt.
509
510 * d10v.h: Fix declaration of d10v_reg_name_cnt.
511
512 * arc.h: Add prototypes from opcodes/arc-opc.c.
513
99c14723
TS
5142001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
515
516 * mips.h (INSN_10000): Define.
517 (OPCODE_IS_MEMBER): Check for INSN_10000.
518
11b37b7b
AM
5192001-08-10 Alan Modra <amodra@one.net.au>
520
521 * ppc.h: Revert 2001-08-08.
522
3b16e843
NC
5232001-08-10 Richard Sandiford <rsandifo@redhat.com>
524
525 * mips.h (INSN_GP32): Remove.
526 (OPCODE_IS_MEMBER): Remove gp32 parameter.
527 (M_MOVE): New macro identifier.
528
0f1bac05
AM
5292001-08-08 Alan Modra <amodra@one.net.au>
530
531 1999-10-25 Torbjorn Granlund <tege@swox.com>
532 * ppc.h (struct powerpc_operand): New field `reloc'.
533
3b16e843
NC
5342001-08-01 Aldy Hernandez <aldyh@redhat.com>
535
536 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
537
5382001-07-12 Jeff Johnston <jjohnstn@redhat.com>
539
540 * cgen.h (CGEN_INSN): Add regex support.
541 (build_insn_regex): Declare.
542
81f6038f
FCE
5432001-07-11 Frank Ch. Eigler <fche@redhat.com>
544
545 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
546 (cgen_cpu_desc): Ditto.
547
32cfffe3
BE
5482001-07-07 Ben Elliston <bje@redhat.com>
549
550 * m88k.h: Clean up and reformat. Remove unused code.
551
3e890047
GK
5522001-06-14 Geoffrey Keating <geoffk@redhat.com>
553
554 * cgen.h (cgen_keyword): Add nonalpha_chars field.
555
d1cf510e
NC
5562001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
557
558 * mips.h (CPU_R12000): Define.
559
e281c457
JH
5602001-05-23 John Healy <jhealy@redhat.com>
561
562 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 563
aa5f19f2
NC
5642001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
565
566 * mips.h (INSN_ISA_MASK): Define.
567
67d6227d
AM
5682001-05-12 Alan Modra <amodra@one.net.au>
569
570 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
571 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
572 and use InvMem as these insns must have register operands.
573
992aaec9
AM
5742001-05-04 Alan Modra <amodra@one.net.au>
575
576 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
577 and pextrw to swap reg/rm assignments.
578
4ef7f0bf
HPN
5792001-04-05 Hans-Peter Nilsson <hp@axis.com>
580
581 * cris.h (enum cris_insn_version_usage): Correct comment for
582 cris_ver_v3p.
583
0f17484f
AM
5842001-03-24 Alan Modra <alan@linuxcare.com.au>
585
586 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
587 Add InvMem to first operand of "maskmovdqu".
588
7ccb5238
HPN
5892001-03-22 Hans-Peter Nilsson <hp@axis.com>
590
591 * cris.h (ADD_PC_INCR_OPCODE): New macro.
592
361bfa20
KH
5932001-03-21 Kazu Hirata <kazu@hxi.com>
594
595 * h8300.h: Fix formatting.
596
87890af0
AM
5972001-03-22 Alan Modra <alan@linuxcare.com.au>
598
599 * i386.h (i386_optab): Add paddq, psubq.
600
2e98d2de
AM
6012001-03-19 Alan Modra <alan@linuxcare.com.au>
602
603 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
604
80a523c2
NC
6052001-02-28 Igor Shevlyakov <igor@windriver.com>
606
607 * m68k.h: new defines for Coldfire V4. Update mcf to know
608 about mcf5407.
609
e135f41b
NC
6102001-02-18 lars brinkhoff <lars@nocrew.org>
611
612 * pdp11.h: New file.
613
6142001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
615
616 * i386.h (i386_optab): SSE integer converison instructions have
617 64bit versions on x86-64.
618
8eaec934
NC
6192001-02-10 Nick Clifton <nickc@redhat.com>
620
621 * mips.h: Remove extraneous whitespace. Formating change to allow
622 for future contribution.
623
a85d7ed0
NC
6242001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
625
626 * s390.h: New file.
627
0715dc88
PM
6282001-02-02 Patrick Macdonald <patrickm@redhat.com>
629
adadcc0c
AM
630 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
631 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
632 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
0715dc88 633
296bc568
AM
6342001-01-24 Karsten Keil <kkeil@suse.de>
635
636 * i386.h (i386_optab): Fix swapgs
637
1328dc98
AM
6382001-01-14 Alan Modra <alan@linuxcare.com.au>
639
640 * hppa.h: Describe new '<' and '>' operand types, and tidy
641 existing comments.
642 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
643 Remove duplicate "ldw j(s,b),x". Sort some entries.
644
e135f41b 6452001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
646
647 * i386.h (i386_optab): Fix pusha and ret templates.
648
0d2bcfaf
NC
6492001-01-11 Peter Targett <peter.targett@arccores.com>
650
651 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
652 definitions for masking cpu type.
653 (arc_ext_operand_value) New structure for storing extended
654 operands.
655 (ARC_OPERAND_*) Flags for operand values.
656
6572001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
658
659 * i386.h (pinsrw): Add.
660 (pshufw): Remove.
661 (cvttpd2dq): Fix operands.
662 (cvttps2dq): Likewise.
663 (movq2q): Rename to movdq2q.
664
079966a8
AM
6652001-01-10 Richard Schaal <richard.schaal@intel.com>
666
667 * i386.h: Correct movnti instruction.
668
8c1f9e76
JJ
6692001-01-09 Jeff Johnston <jjohnstn@redhat.com>
670
671 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
672 of operands (unsigned char or unsigned short).
673 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
674 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
675
0d2bcfaf 6762001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
677
678 * i386.h (i386_optab): Make [sml]fence template to use immext field.
679
0d2bcfaf 6802001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
681
682 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
683 introduced by Pentium4
684
0d2bcfaf 6852000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
686
687 * i386.h (i386_optab): Add "rex*" instructions;
688 add swapgs; disable jmp/call far direct instructions for
689 64bit mode; add syscall and sysret; disable registers for 0xc6
690 template. Add 'q' suffixes to extendable instructions, disable
079966a8 691 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
692 (i386_regtab): Add extended registers.
693 (*Suf): Add No_qSuf.
694 (q_Suf, wlq_Suf, bwlq_Suf): New.
695
0d2bcfaf 6962000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
697
698 * i386.h (i386_optab): Replace "Imm" with "EncImm".
699 (i386_regtab): Add flags field.
d83c6548 700
bf40d919
NC
7012000-12-12 Nick Clifton <nickc@redhat.com>
702
703 * mips.h: Fix formatting.
704
4372b673
NC
7052000-12-01 Chris Demetriou <cgd@sibyte.com>
706
adadcc0c
AM
707 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
708 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
709 OP_*_SYSCALL definitions.
710 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
711 19 bit wait codes.
712 (MIPS operand specifier comments): Remove 'm', add 'U' and
713 'J', and update the meaning of 'B' so that it's more general.
714
715 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
716 INSN_ISA5): Renumber, redefine to mean the ISA at which the
717 instruction was added.
718 (INSN_ISA32): New constant.
719 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
720 Renumber to avoid new and/or renumbered INSN_* constants.
721 (INSN_MIPS32): Delete.
722 (ISA_UNKNOWN): New constant to indicate unknown ISA.
723 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
724 ISA_MIPS32): New constants, defined to be the mask of INSN_*
725 constants available at that ISA level.
726 (CPU_UNKNOWN): New constant to indicate unknown CPU.
727 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
728 define it with a unique value.
729 (OPCODE_IS_MEMBER): Update for new ISA membership-related
730 constant meanings.
731
732 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
733 definitions.
734
735 * mips.h (CPU_SB1): New constant.
c6c98b38 736
19f7b010
JJ
7372000-10-20 Jakub Jelinek <jakub@redhat.com>
738
739 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
740 Note that '3' is used for siam operand.
741
139368c9
JW
7422000-09-22 Jim Wilson <wilson@cygnus.com>
743
744 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
745
156c2f8b 7462000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 747
156c2f8b
NC
748 * mips.h: Use defines instead of hard-coded processor numbers.
749 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 750 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
751 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
752 CPU_4KC, CPU_4KM, CPU_4KP): Define..
753 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 754 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 755 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
756 Add 'P' to used characters.
757 Use 'H' for coprocessor select field.
156c2f8b 758 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
759 Document new arg characters and add to used characters.
760 (INSN_MIPS32): New define for MIPS32 extensions.
761 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 762
3c5ce02e
AM
7632000-09-05 Alan Modra <alan@linuxcare.com.au>
764
765 * hppa.h: Mention cz completer.
766
50b81f19
JW
7672000-08-16 Jim Wilson <wilson@cygnus.com>
768
769 * ia64.h (IA64_OPCODE_POSTINC): New.
770
fc29466d
L
7712000-08-15 H.J. Lu <hjl@gnu.org>
772
773 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
774 IgnoreSize change.
775
4f1d9bd8
NC
7762000-08-08 Jason Eckhardt <jle@cygnus.com>
777
778 * i860.h: Small formatting adjustments.
779
45ee1401
DC
7802000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
781
782 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
783 Move related opcodes closer to each other.
784 Minor changes in comments, list undefined opcodes.
785
9d551405
DB
7862000-07-26 Dave Brolley <brolley@redhat.com>
787
788 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
789
4f1d9bd8
NC
7902000-07-22 Jason Eckhardt <jle@cygnus.com>
791
792 * i860.h (btne, bte, bla): Changed these opcodes
793 to use sbroff ('r') instead of split16 ('s').
794 (J, K, L, M): New operand types for 16-bit aligned fields.
795 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
796 use I, J, K, L, M instead of just I.
797 (T, U): New operand types for split 16-bit aligned fields.
798 (st.x): Changed these opcodes to use S, T, U instead of just S.
799 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
800 exist on the i860.
801 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
802 (pfeq.ss, pfeq.dd): New opcodes.
803 (st.s): Fixed incorrect mask bits.
804 (fmlow): Fixed incorrect mask bits.
805 (fzchkl, pfzchkl): Fixed incorrect mask bits.
806 (faddz, pfaddz): Fixed incorrect mask bits.
807 (form, pform): Fixed incorrect mask bits.
808 (pfld.l): Fixed incorrect mask bits.
809 (fst.q): Fixed incorrect mask bits.
810 (all floating point opcodes): Fixed incorrect mask bits for
811 handling of dual bit.
812
c8488617
HPN
8132000-07-20 Hans-Peter Nilsson <hp@axis.com>
814
815 cris.h: New file.
816
65aa24b6
NC
8172000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
818
819 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
820 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
821 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
822 (AVR_ISA_M83): Define for ATmega83, ATmega85.
823 (espm): Remove, because ESPM removed in databook update.
824 (eicall, eijmp): Move to the end of opcode table.
825
60bcf0fa
NC
8262000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
827
828 * m68hc11.h: New file for support of Motorola 68hc11.
829
60a2978a
DC
830Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
831
832 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
833
68ab2dd9
DC
834Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
835
836 * avr.h: New file with AVR opcodes.
837
f0662e27
DL
838Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
839
840 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
841
b722f2be
AM
8422000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
843
844 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
845
f9e0cf0b
AM
8462000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
847
848 * i386.h: Use sl_FP, not sl_Suf for fild.
849
f660ee8b
FCE
8502000-05-16 Frank Ch. Eigler <fche@redhat.com>
851
852 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
853 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
854 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
855 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
856
558b0a60
AM
8572000-05-13 Alan Modra <alan@linuxcare.com.au>,
858
859 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
860
e413e4e9
AM
8612000-05-13 Alan Modra <alan@linuxcare.com.au>,
862 Alexander Sokolov <robocop@netlink.ru>
863
864 * i386.h (i386_optab): Add cpu_flags for all instructions.
865
8662000-05-13 Alan Modra <alan@linuxcare.com.au>
867
868 From Gavin Romig-Koch <gavin@cygnus.com>
869 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
870
5c84d377
TW
8712000-05-04 Timothy Wall <twall@cygnus.com>
872
873 * tic54x.h: New.
874
966f959b
C
8752000-05-03 J.T. Conklin <jtc@redback.com>
876
877 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
878 (PPC_OPERAND_VR): New operand flag for vector registers.
879
c5d05dbb
JL
8802000-05-01 Kazu Hirata <kazu@hxi.com>
881
882 * h8300.h (EOP): Add missing initializer.
883
a7fba0e0
JL
884Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
885
886 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
887 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
888 New operand types l,y,&,fe,fE,fx added to support above forms.
889 (pa_opcodes): Replaced usage of 'x' as source/target for
890 floating point double-word loads/stores with 'fx'.
891
800eeca4
JW
892Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
893 David Mosberger <davidm@hpl.hp.com>
894 Timothy Wall <twall@cygnus.com>
895 Jim Wilson <wilson@cygnus.com>
896
897 * ia64.h: New file.
898
ba23e138
NC
8992000-03-27 Nick Clifton <nickc@cygnus.com>
900
901 * d30v.h (SHORT_A1): Fix value.
902 (SHORT_AR): Renumber so that it is at the end of the list of short
903 instructions, not the end of the list of long instructions.
904
d0b47220
AM
9052000-03-26 Alan Modra <alan@linuxcare.com>
906
907 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
908 problem isn't really specific to Unixware.
909 (OLDGCC_COMPAT): Define.
910 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
911 destination %st(0).
912 Fix lots of comments.
913
866afedc
NC
9142000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
915
adadcc0c
AM
916 * d30v.h:
917 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
918 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
919 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
920 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
921 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
922 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
923 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
866afedc 924
cc5ca5ce
AM
9252000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
926
927 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
928 fistpd without suffix.
929
68e324a2
NC
9302000-02-24 Nick Clifton <nickc@cygnus.com>
931
932 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
adadcc0c 933 'signed_overflow_ok_p'.
68e324a2
NC
934 Delete prototypes for cgen_set_flags() and cgen_get_flags().
935
60f036a2
AH
9362000-02-24 Andrew Haley <aph@cygnus.com>
937
938 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
939 (CGEN_CPU_TABLE): flags: new field.
940 Add prototypes for new functions.
d83c6548 941
9b9b5cd4
AM
9422000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
943
944 * i386.h: Add some more UNIXWARE_COMPAT comments.
945
5b93d8bb
AM
9462000-02-23 Linas Vepstas <linas@linas.org>
947
948 * i370.h: New file.
949
4f1d9bd8
NC
9502000-02-22 Chandra Chavva <cchavva@cygnus.com>
951
952 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
953 cannot be combined in parallel with ADD/SUBppp.
954
87f398dd
AH
9552000-02-22 Andrew Haley <aph@cygnus.com>
956
957 * mips.h: (OPCODE_IS_MEMBER): Add comment.
958
367c01af
AH
9591999-12-30 Andrew Haley <aph@cygnus.com>
960
9a1e79ca
AH
961 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
962 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
963 insns.
367c01af 964
add0c677
AM
9652000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
966
967 * i386.h: Qualify intel mode far call and jmp with x_Suf.
968
3138f287
AM
9691999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
970
971 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
972 indirect jumps and calls. Add FF/3 call for intel mode.
973
ccecd07b
JL
974Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
975
976 * mn10300.h: Add new operand types. Add new instruction formats.
977
b37e19e9
JL
978Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
979
980 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
981 instruction.
982
5fce5ddf
GRK
9831999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
984
985 * mips.h (INSN_ISA5): New.
986
2bd7f1f3
GRK
9871999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
988
989 * mips.h (OPCODE_IS_MEMBER): New.
990
4df2b5c5
NC
9911999-10-29 Nick Clifton <nickc@cygnus.com>
992
993 * d30v.h (SHORT_AR): Define.
994
446a06c9
MM
9951999-10-18 Michael Meissner <meissner@cygnus.com>
996
997 * alpha.h (alpha_num_opcodes): Convert to unsigned.
998 (alpha_num_operands): Ditto.
999
eca04c6a
JL
1000Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
1001
adadcc0c 1002 * hppa.h (pa_opcodes): Add load and store cache control to
eca04c6a
JL
1003 instructions. Add ordered access load and store.
1004
1005 * hppa.h (pa_opcode): Add new entries for addb and addib.
1006
1007 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
1008
adadcc0c 1009 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
eca04c6a 1010
c43185de
DN
1011Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
1012
1013 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
1014
ec3533da
JL
1015Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1016
390f858d
JL
1017 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
1018 and "be" using completer prefixes.
1019
8c47ebd9
JL
1020 * hppa.h (pa_opcodes): Add initializers to silence compiler.
1021
ec3533da
JL
1022 * hppa.h: Update comments about character usage.
1023
18369bea
JL
1024Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
1025
1026 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
1027 up the new fstw & bve instructions.
1028
c36efdd2
JL
1029Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
1030
d3ffb032
JL
1031 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
1032 instructions.
1033
c49ec3da
JL
1034 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
1035
5d2e7ecc
JL
1036 * hppa.h (pa_opcodes): Add long offset double word load/store
1037 instructions.
1038
6397d1a2
JL
1039 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
1040 stores.
1041
142f0fe0
JL
1042 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
1043
f5a68b45
JL
1044 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
1045
8235801e
JL
1046 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
1047
35184366
JL
1048 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
1049
f0bfde5e
JL
1050 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
1051
27bbbb58
JL
1052 * hppa.h (pa_opcodes): Add support for "b,l".
1053
c36efdd2
JL
1054 * hppa.h (pa_opcodes): Add support for "b,gate".
1055
f2727d04
JL
1056Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
1057
9392fb11 1058 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 1059 in xmpyu.
9392fb11 1060
e0c52e99
JL
1061 * hppa.h (pa_opcodes): Fix mask for probe and probei.
1062
f2727d04
JL
1063 * hppa.h (pa_opcodes): Fix mask for depwi.
1064
52d836e2
JL
1065Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
1066
1067 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
1068 an explicit output argument.
1069
90765e3a
JL
1070Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
1071
1072 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
1073 Add a few PA2.0 loads and store variants.
1074
8340b17f
ILT
10751999-09-04 Steve Chamberlain <sac@pobox.com>
1076
1077 * pj.h: New file.
1078
5f47d35b
AM
10791999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
1080
1081 * i386.h (i386_regtab): Move %st to top of table, and split off
1082 other fp reg entries.
1083 (i386_float_regtab): To here.
1084
1c143202
JL
1085Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1086
7d8fdb64
JL
1087 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
1088 by 'f'.
1089
90927b9c
JL
1090 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1091 Add supporting args.
1092
adadcc0c
AM
1093 * hppa.h: Document new completers and args.
1094 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1d16bf9c
JL
1095 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
1096 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
1097 pmenb and pmdis.
1098
adadcc0c 1099 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
96226a68
JL
1100 hshr, hsub, mixh, mixw, permh.
1101
5d4ba527
JL
1102 * hppa.h (pa_opcodes): Change completers in instructions to
1103 use 'c' prefix.
1104
adadcc0c 1105 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
e9fc28c6
JL
1106 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1107
adadcc0c 1108 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1c143202
JL
1109 fnegabs to use 'I' instead of 'F'.
1110
9e525108
AM
11111999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1112
1113 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1114 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1115 Alphabetically sort PIII insns.
1116
e8da1bf1
DE
1117Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1118
1119 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1120
7d627258
JL
1121Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1122
5696871a
JL
1123 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1124 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1125
adadcc0c 1126 * hppa.h: Document 64 bit condition completers.
7d627258 1127
c5e52916
JL
1128Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1129
1130 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1131
eecb386c
AM
11321999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1133
1134 * i386.h (i386_optab): Add DefaultSize modifier to all insns
1135 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1136 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1137
88a380f3
JL
1138Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1139 Jeff Law <law@cygnus.com>
1140
1141 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1142
1143 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 1144
adadcc0c 1145 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
1146 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1147
145cf1f0
AM
11481999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1149
1150 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1151
73826640
JL
1152Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1153
1154 * hppa.h (struct pa_opcode): Add new field "flags".
1155 (FLAGS_STRICT): Define.
1156
b65db252
JL
1157Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1158 Jeff Law <law@cygnus.com>
1159
f7fc668b
JL
1160 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1161
1162 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 1163
10084519
AM
11641999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1165
1166 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1167 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1168 flag to fcomi and friends.
1169
cd8a80ba
JL
1170Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1171
1172 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 1173 integer logical instructions.
cd8a80ba 1174
1fca749b
ILT
11751999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1176
1177 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1178 `n', `o'.
1179
1180 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1181 and new places `m', `M', `h'.
1182
aa008907
JL
1183Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1184
1185 * hppa.h (pa_opcodes): Add several processor specific system
1186 instructions.
1187
e26b85f0
JL
1188Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1189
d83c6548 1190 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
1191 "addb", and "addib" to be used by the disassembler.
1192
c608c12e
AM
11931999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1194
1195 * i386.h (ReverseModrm): Remove all occurences.
1196 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1197 movmskps, pextrw, pmovmskb, maskmovq.
1198 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1199 ignore the data size prefix.
1200
1201 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1202 Mostly stolen from Doug Ledford <dledford@redhat.com>
1203
45c18104
RH
1204Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1205
1206 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1207
252b5132
RH
12081999-04-14 Doug Evans <devans@casey.cygnus.com>
1209
1210 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1211 (CGEN_ATTR_TYPE): Update.
1212 (CGEN_ATTR_MASK): Number booleans starting at 0.
1213 (CGEN_ATTR_VALUE): Update.
1214 (CGEN_INSN_ATTR): Update.
1215
1216Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1217
1218 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1219 instructions.
1220
1221Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1222
1223 * hppa.h (bb, bvb): Tweak opcode/mask.
1224
1225
12261999-03-22 Doug Evans <devans@casey.cygnus.com>
1227
1228 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1229 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1230 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1231 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1232 Delete member max_insn_size.
1233 (enum cgen_cpu_open_arg): New enum.
1234 (cpu_open): Update prototype.
1235 (cpu_open_1): Declare.
1236 (cgen_set_cpu): Delete.
1237
12381999-03-11 Doug Evans <devans@casey.cygnus.com>
1239
1240 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1241 (CGEN_OPERAND_NIL): New macro.
1242 (CGEN_OPERAND): New member `type'.
1243 (@arch@_cgen_operand_table): Delete decl.
1244 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1245 (CGEN_OPERAND_TABLE): New struct.
1246 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1247 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1248 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1249 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1250 {get,set}_{int,vma}_operand.
1251 (@arch@_cgen_cpu_open): New arg `isa'.
1252 (cgen_set_cpu): Ditto.
1253
1254Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1255
1256 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1257
12581999-02-25 Doug Evans <devans@casey.cygnus.com>
1259
1260 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1261 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1262 enum cgen_hw_type.
1263 (CGEN_HW_TABLE): New struct.
1264 (hw_table): Delete declaration.
1265 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1266 to table entry to enum.
1267 (CGEN_OPINST): Ditto.
1268 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1269
1270Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1271
1272 * alpha.h (AXP_OPCODE_EV6): New.
1273 (AXP_OPCODE_NOPAL): Include it.
1274
12751999-02-09 Doug Evans <devans@casey.cygnus.com>
1276
1277 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1278 All uses updated. New members int_insn_p, max_insn_size,
1279 parse_operand,insert_operand,extract_operand,print_operand,
1280 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1281 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1282 extract_handlers,print_handlers.
1283 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1284 (CGEN_ATTR_BOOL_OFFSET): New macro.
1285 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1286 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1287 (cgen_opcode_handler): Renamed from cgen_base.
1288 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1289 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1290 all uses updated.
1291 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1292 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1293 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1294 (CGEN_OPCODE,CGEN_IBASE): New types.
1295 (CGEN_INSN): Rewrite.
1296 (CGEN_{ASM,DIS}_HASH*): Delete.
1297 (init_opcode_table,init_ibld_table): Declare.
1298 (CGEN_INSN_ATTR): New type.
1299
1300Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1301
adadcc0c
AM
1302 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1303 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1304 Change *Suf definitions to include x and d suffixes.
1305 (movsx): Use w_Suf and b_Suf.
1306 (movzx): Likewise.
1307 (movs): Use bwld_Suf.
1308 (fld): Change ordering. Use sld_FP.
1309 (fild): Add Intel Syntax equivalent of fildq.
1310 (fst): Use sld_FP.
1311 (fist): Use sld_FP.
1312 (fstp): Use sld_FP. Add x_FP version.
1313 (fistp): LLongMem version for Intel Syntax.
1314 (fcom, fcomp): Use sld_FP.
1315 (fadd, fiadd, fsub): Use sld_FP.
1316 (fsubr): Use sld_FP.
1317 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
252b5132
RH
1318
13191999-01-27 Doug Evans <devans@casey.cygnus.com>
1320
1321 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1322 CGEN_MODE_UINT.
1323
e135f41b 13241999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1325
1326 * hppa.h (bv): Fix mask.
1327
13281999-01-05 Doug Evans <devans@casey.cygnus.com>
1329
1330 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1331 (CGEN_ATTR): Use it.
1332 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1333 (CGEN_ATTR_TABLE): New member dfault.
1334
13351998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1336
1337 * mips.h (MIPS16_INSN_BRANCH): New.
1338
1339Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1340
1341 The following is part of a change made by Edith Epstein
d83c6548
AJ
1342 <eepstein@sophia.cygnus.com> as part of a project to merge in
1343 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1344
1345 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1346 after.
252b5132
RH
1347
1348Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1349
1350 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1351 status word instructions.
252b5132
RH
1352
13531998-11-30 Doug Evans <devans@casey.cygnus.com>
1354
1355 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1356 (struct cgen_keyword_entry): Ditto.
1357 (struct cgen_operand): Ditto.
1358 (CGEN_IFLD): New typedef, with associated access macros.
1359 (CGEN_IFMT): New typedef, with associated access macros.
1360 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1361 (CGEN_IVALUE): New typedef.
1362 (struct cgen_insn): Delete const on syntax,attrs members.
1363 `format' now points to format data. Type of `value' is now
1364 CGEN_IVALUE.
1365 (struct cgen_opcode_table): New member ifld_table.
1366
13671998-11-18 Doug Evans <devans@casey.cygnus.com>
1368
1369 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1370 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1371 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1372 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1373 (cgen_opcode_table): Update type of dis_hash fn.
1374 (extract_operand): Update type of `insn_value' arg.
1375
1376Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1377
1378 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1379
1380Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1381
1382 * mips.h (INSN_MULT): Added.
1383
1384Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1385
1386 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1387
1388Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1389
1390 * cgen.h (CGEN_INSN_INT): New typedef.
1391 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1392 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1393 (CGEN_INSN_BYTES_PTR): New typedef.
1394 (CGEN_EXTRACT_INFO): New typedef.
1395 (cgen_insert_fn,cgen_extract_fn): Update.
1396 (cgen_opcode_table): New member `insn_endian'.
1397 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1398 (insert_operand,extract_operand): Update.
1399 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1400
1401Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1402
1403 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1404 (struct CGEN_HW_ENTRY): New member `attrs'.
1405 (CGEN_HW_ATTR): New macro.
1406 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1407 (CGEN_INSN_INVALID_P): New macro.
1408
1409Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1410
1411 * hppa.h: Add "fid".
d83c6548 1412
252b5132
RH
1413Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1414
1415 From Robert Andrew Dale <rob@nb.net>
1416 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1417 (AMD_3DNOW_OPCODE): Define.
1418
1419Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1420
1421 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1422
1423Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1424
1425 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1426
1427Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1428
1429 Move all global state data into opcode table struct, and treat
1430 opcode table as something that is "opened/closed".
1431 * cgen.h (CGEN_OPCODE_DESC): New type.
1432 (all fns): New first arg of opcode table descriptor.
1433 (cgen_set_parse_operand_fn): Add prototype.
1434 (cgen_current_machine,cgen_current_endian): Delete.
1435 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1436 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1437 dis_hash_table,dis_hash_table_entries.
1438 (opcode_open,opcode_close): Add prototypes.
1439
1440 * cgen.h (cgen_insn): New element `cdx'.
1441
1442Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1443
1444 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1445
1446Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1447
1448 * mn10300.h: Add "no_match_operands" field for instructions.
1449 (MN10300_MAX_OPERANDS): Define.
1450
1451Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1452
1453 * cgen.h (cgen_macro_insn_count): Declare.
1454
1455Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1456
1457 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1458 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1459 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1460 set_{int,vma}_operand.
1461
1462Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1463
1464 * mn10300.h: Add "machine" field for instructions.
1465 (MN103, AM30): Define machine types.
d83c6548 1466
252b5132
RH
1467Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1468
1469 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1470
14711998-06-18 Ulrich Drepper <drepper@cygnus.com>
1472
1473 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1474
1475Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1476
1477 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1478 and ud2b.
1479 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1480 those that happen to be implemented on pentiums.
1481
1482Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1483
1484 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1485 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1486 with Size16|IgnoreSize or Size32|IgnoreSize.
1487
1488Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1489
1490 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1491 (REPE): Rename to REPE_PREFIX_OPCODE.
1492 (i386_regtab_end): Remove.
1493 (i386_prefixtab, i386_prefixtab_end): Remove.
1494 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1495 of md_begin.
1496 (MAX_OPCODE_SIZE): Define.
1497 (i386_optab_end): Remove.
1498 (sl_Suf): Define.
1499 (sl_FP): Use sl_Suf.
1500
1501 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1502 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1503 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1504 data32, dword, and adword prefixes.
1505 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1506 regs.
1507
1508Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1509
1510 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1511
1512 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1513 register operands, because this is a common idiom. Flag them with
1514 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1515 fdivrp because gcc erroneously generates them. Also flag with a
1516 warning.
1517
1518 * i386.h: Add suffix modifiers to most insns, and tighter operand
1519 checks in some cases. Fix a number of UnixWare compatibility
1520 issues with float insns. Merge some floating point opcodes, using
1521 new FloatMF modifier.
1522 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1523 consistency.
1524
1525 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1526 IgnoreDataSize where appropriate.
1527
1528Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1529
1530 * i386.h: (one_byte_segment_defaults): Remove.
1531 (two_byte_segment_defaults): Remove.
1532 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1533
1534Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1535
1536 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1537 (cgen_hw_lookup_by_num): Declare.
1538
1539Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1540
1541 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1542 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1543
1544Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1545
1546 * cgen.h (cgen_asm_init_parse): Delete.
1547 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1548 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1549
1550Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1551
1552 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1553 (cgen_asm_finish_insn): Update prototype.
1554 (cgen_insn): New members num, data.
1555 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1556 dis_hash, dis_hash_table_size moved to ...
1557 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1558 All uses updated. New members asm_hash_p, dis_hash_p.
1559 (CGEN_MINSN_EXPANSION): New struct.
1560 (cgen_expand_macro_insn): Declare.
1561 (cgen_macro_insn_count): Declare.
1562 (get_insn_operands): Update prototype.
1563 (lookup_get_insn_operands): Declare.
1564
1565Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1566
1567 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1568 regKludge. Add operands types for string instructions.
1569
1570Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1571
1572 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1573 table.
1574
1575Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1576
1577 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1578 for `gettext'.
1579
1580Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1581
1582 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1583 Add IsString flag to string instructions.
1584 (IS_STRING): Don't define.
1585 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1586 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1587 (SS_PREFIX_OPCODE): Define.
1588
1589Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1590
1591 * i386.h: Revert March 24 patch; no more LinearAddress.
1592
1593Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1594
1595 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1596 instructions, and instead add FWait opcode modifier. Add short
1597 form of fldenv and fstenv.
1598 (FWAIT_OPCODE): Define.
1599
1600 * i386.h (i386_optab): Change second operand constraint of `mov
1601 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1602 allow legal instructions such as `movl %gs,%esi'
1603
1604Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1605
1606 * h8300.h: Various changes to fully bracket initializers.
1607
1608Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1609
1610 * i386.h: Set LinearAddress for lidt and lgdt.
1611
1612Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1613
1614 * cgen.h (CGEN_BOOL_ATTR): New macro.
1615
1616Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1617
1618 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1619
1620Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1621
1622 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1623 (cgen_insn): Record syntax and format entries here, rather than
1624 separately.
1625
1626Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1627
1628 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1629
1630Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1631
1632 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1633 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1634 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1635
1636Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1637
1638 * cgen.h (lookup_insn): New argument alias_p.
1639
1640Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1641
1642Fix rac to accept only a0:
1643 * d10v.h (OPERAND_ACC): Split into:
1644 (OPERAND_ACC0, OPERAND_ACC1) .
1645 (OPERAND_GPR): Define.
1646
1647Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1648
1649 * cgen.h (CGEN_FIELDS): Define here.
1650 (CGEN_HW_ENTRY): New member `type'.
1651 (hw_list): Delete decl.
1652 (enum cgen_mode): Declare.
1653 (CGEN_OPERAND): New member `hw'.
1654 (enum cgen_operand_instance_type): Declare.
1655 (CGEN_OPERAND_INSTANCE): New type.
1656 (CGEN_INSN): New member `operands'.
1657 (CGEN_OPCODE_DATA): Make hw_list const.
1658 (get_insn_operands,lookup_insn): Add prototypes for.
1659
1660Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1661
1662 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1663 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1664 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1665 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1666
1667Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1668
1669 * cgen.h: Correct typo in comment end marker.
1670
1671Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1672
1673 * tic30.h: New file.
1674
5a109b67 1675Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1676
1677 * cgen.h: Add prototypes for cgen_save_fixups(),
1678 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1679 of cgen_asm_finish_insn() to return a char *.
1680
1681Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1682
1683 * cgen.h: Formatting changes to improve readability.
1684
1685Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1686
1687 * cgen.h (*): Clean up pass over `struct foo' usage.
1688 (CGEN_ATTR): Make unsigned char.
1689 (CGEN_ATTR_TYPE): Update.
1690 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1691 (cgen_base): Move member `attrs' to cgen_insn.
1692 (CGEN_KEYWORD): New member `null_entry'.
1693 (CGEN_{SYNTAX,FORMAT}): New types.
1694 (cgen_insn): Format and syntax separated from each other.
1695
1696Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1697
1698 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1699 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1700 flags_{used,set} long.
1701 (d30v_operand): Make flags field long.
1702
1703Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1704
1705 * m68k.h: Fix comment describing operand types.
1706
1707Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1708
1709 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1710 everything else after down.
1711
1712Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1713
1714 * d10v.h (OPERAND_FLAG): Split into:
1715 (OPERAND_FFLAG, OPERAND_CFLAG) .
1716
1717Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1718
1719 * mips.h (struct mips_opcode): Changed comments to reflect new
1720 field usage.
1721
1722Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1723
1724 * mips.h: Added to comments a quick-ref list of all assigned
1725 operand type characters.
1726 (OP_{MASK,SH}_PERFREG): New macros.
1727
1728Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1729
1730 * sparc.h: Add '_' and '/' for v9a asr's.
1731 Patch from David Miller <davem@vger.rutgers.edu>
1732
1733Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1734
1735 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1736 area are not available in the base model (H8/300).
1737
1738Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1739
1740 * m68k.h: Remove documentation of ` operand specifier.
1741
1742Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1743
1744 * m68k.h: Document q and v operand specifiers.
1745
1746Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1747
1748 * v850.h (struct v850_opcode): Add processors field.
1749 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1750 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1751 (PROCESSOR_V850EA): New bit constants.
1752
1753Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1754
1755 Merge changes from Martin Hunt:
1756
1757 * d30v.h: Allow up to 64 control registers. Add
1758 SHORT_A5S format.
1759
1760 * d30v.h (LONG_Db): New form for delayed branches.
1761
1762 * d30v.h: (LONG_Db): New form for repeati.
1763
1764 * d30v.h (SHORT_D2B): New form.
1765
1766 * d30v.h (SHORT_A2): New form.
1767
1768 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1769 registers are used. Needed for VLIW optimization.
1770
1771Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1772
1773 * cgen.h: Move assembler interface section
1774 up so cgen_parse_operand_result is defined for cgen_parse_address.
1775 (cgen_parse_address): Update prototype.
1776
1777Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1778
1779 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1780
1781Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1782
1783 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1784 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1785 <paubert@iram.es>.
1786
1787 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1788 <paubert@iram.es>.
1789
1790 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1791 <paubert@iram.es>.
1792
1793 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1794 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1795
1796Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1797
1798 * v850.h (V850_NOT_R0): New flag.
1799
1800Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1801
1802 * v850.h (struct v850_opcode): Remove flags field.
1803
1804Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1805
1806 * v850.h (struct v850_opcode): Add flags field.
1807 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1808 fields.
1809 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1810 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1811
1812Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1813
1814 * arc.h: New file.
1815
1816Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1817
1818 * sparc.h (sparc_opcodes): Declare as const.
1819
1820Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1821
1822 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1823 uses single or double precision floating point resources.
1824 (INSN_NO_ISA, INSN_ISA1): Define.
1825 (cpu specific INSN macros): Tweak into bitmasks outside the range
1826 of INSN_ISA field.
1827
1828Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1829
1830 * i386.h: Fix pand opcode.
1831
1832Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1833
1834 * mips.h: Widen INSN_ISA and move it to a more convenient
1835 bit position. Add INSN_3900.
1836
1837Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1838
1839 * mips.h (struct mips_opcode): added new field membership.
1840
1841Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1842
1843 * i386.h (movd): only Reg32 is allowed.
1844
1845 * i386.h: add fcomp and ud2. From Wayne Scott
1846 <wscott@ichips.intel.com>.
1847
1848Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1849
1850 * i386.h: Add MMX instructions.
1851
1852Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1853
1854 * i386.h: Remove W modifier from conditional move instructions.
1855
1856Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1857
1858 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1859 with no arguments to match that generated by the UnixWare
1860 assembler.
1861
1862Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1863
1864 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1865 (cgen_parse_operand_fn): Declare.
1866 (cgen_init_parse_operand): Declare.
1867 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1868 new argument `want'.
1869 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1870 (enum cgen_parse_operand_type): New enum.
1871
1872Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1873
1874 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1875
1876Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1877
1878 * cgen.h: New file.
1879
1880Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1881
1882 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1883 fdivrp.
1884
1885Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1886
adadcc0c 1887 * v850.h (extract): Make unsigned.
252b5132
RH
1888
1889Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1890
1891 * i386.h: Add iclr.
1892
1893Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1894
1895 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1896 take a direction bit.
1897
1898Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1899
1900 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1901
1902Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1903
1904 * sparc.h: Include <ansidecl.h>. Update function declarations to
1905 use prototypes, and to use const when appropriate.
1906
1907Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1908
1909 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1910
1911Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1912
1913 * d10v.h: Change pre_defined_registers to
1914 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1915
1916Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1917
1918 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1919 Change mips_opcodes from const array to a pointer,
1920 and change bfd_mips_num_opcodes from const int to int,
1921 so that we can increase the size of the mips opcodes table
1922 dynamically.
1923
1924Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1925
1926 * d30v.h (FLAG_X): Remove unused flag.
1927
1928Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1929
1930 * d30v.h: New file.
1931
1932Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1933
1934 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1935 (PDS_VALUE): Macro to access value field of predefined symbols.
1936 (tic80_next_predefined_symbol): Add prototype.
1937
1938Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1939
1940 * tic80.h (tic80_symbol_to_value): Change prototype to match
1941 change in function, added class parameter.
1942
1943Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1944
1945 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1946 endmask fields, which are somewhat weird in that 0 and 32 are
1947 treated exactly the same.
1948
1949Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1950
1951 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1952 rather than a constant that is 2**X. Reorder them to put bits for
1953 operands that have symbolic names in the upper bits, so they can
1954 be packed into an int where the lower bits contain the value that
1955 corresponds to that symbolic name.
1956 (predefined_symbo): Add struct.
1957 (tic80_predefined_symbols): Declare array of translations.
1958 (tic80_num_predefined_symbols): Declare size of that array.
1959 (tic80_value_to_symbol): Declare function.
1960 (tic80_symbol_to_value): Declare function.
1961
1962Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1963
1964 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1965
1966Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1967
1968 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1969 be the destination register.
1970
1971Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1972
1973 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1974 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1975 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1976 that the opcode can have two vector instructions in a single
1977 32 bit word and we have to encode/decode both.
1978
1979Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1980
1981 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1982 TIC80_OPERAND_RELATIVE for PC relative.
1983 (TIC80_OPERAND_BASEREL): New flag bit for register
1984 base relative.
1985
1986Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1987
1988 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1989
1990Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1991
1992 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1993 ":s" modifier for scaling.
1994
1995Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1996
1997 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1998 (TIC80_OPERAND_M_LI): Ditto
1999
2000Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
2001
2002 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
2003 (TIC80_OPERAND_CC): New define for condition code operand.
2004 (TIC80_OPERAND_CR): New define for control register operand.
2005
2006Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
2007
2008 * tic80.h (struct tic80_opcode): Name changed.
2009 (struct tic80_opcode): Remove format field.
2010 (struct tic80_operand): Add insertion and extraction functions.
2011 (TIC80_OPERAND_*): Remove old bogus values, start adding new
2012 correct ones.
2013 (FMT_*): Ditto.
2014
2015Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
2016
2017 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
2018 type IV instruction offsets.
2019
2020Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
2021
2022 * tic80.h: New file.
2023
2024Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
2025
2026 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
2027
2028Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
2029
2030 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
2031 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
2032 * v850.h: Fix comment, v850_operand not powerpc_operand.
2033
2034Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
2035
2036 * mn10200.h: Flesh out structures and definitions needed by
2037 the mn10200 assembler & disassembler.
2038
2039Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
2040
2041 * mips.h: Add mips16 definitions.
2042
2043Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
2044
2045 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
2046
2047Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
2048
2049 * mn10300.h (MN10300_OPERAND_PCREL): Define.
2050 (MN10300_OPERAND_MEMADDR): Define.
2051
2052Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
2053
2054 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
2055
2056Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
2057
2058 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
2059
2060Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
2061
2062 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
2063
2064Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
2065
2066 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
2067
2068Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
2069
2070 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
2071 negative to minimize problems with shared libraries. Organize
2072 instruction subsets by AMASK extensions and PALcode
2073 implementation.
252b5132
RH
2074 (struct alpha_operand): Move flags slot for better packing.
2075
2076Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
2077
2078 * v850.h (V850_OPERAND_RELAX): New operand flag.
2079
2080Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
2081
2082 * mn10300.h (FMT_*): Move operand format definitions
2083 here.
2084
2085Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
2086
2087 * mn10300.h (MN10300_OPERAND_PAREN): Define.
2088
2089Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
2090
2091 * mn10300.h (mn10300_opcode): Add "format" field.
2092 (MN10300_OPERAND_*): Define.
2093
2094Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
2095
2096 * mn10x00.h: Delete.
2097 * mn10200.h, mn10300.h: New files.
2098
2099Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
2100
2101 * mn10x00.h: New file.
2102
2103Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2104
adadcc0c 2105 * v850.h: Add new flag to indicate this instruction uses a PC
252b5132
RH
2106 displacement.
2107
2108Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2109
2110 * h8300.h (stmac): Add missing instruction.
2111
2112Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2113
2114 * v850.h (v850_opcode): Remove "size" field. Add "memop"
2115 field.
2116
2117Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2118
2119 * v850.h (V850_OPERAND_EP): Define.
2120
2121 * v850.h (v850_opcode): Add size field.
2122
2123Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2124
2125 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 2126 to functions used to handle unusual operand encoding.
252b5132 2127 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 2128 V850_OPERAND_SIGNED): Defined.
252b5132
RH
2129
2130Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2131
2132 * v850.h (v850_operands): Add flags field.
2133 (OPERAND_REG, OPERAND_NUM): Defined.
2134
2135Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2136
2137 * v850.h: New file.
2138
2139Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2140
2141 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
2142 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2143 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2144 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2145 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2146 Defined.
252b5132
RH
2147
2148Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2149
2150 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2151 a 3 bit space id instead of a 2 bit space id.
2152
2153Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2154
2155 * d10v.h: Add some additional defines to support the
d83c6548 2156 assembler in determining which operations can be done in parallel.
252b5132
RH
2157
2158Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2159
2160 * h8300.h (SN): Define.
2161 (eepmov.b): Renamed from "eepmov"
2162 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2163 with them.
2164
2165Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2166
2167 * d10v.h (OPERAND_SHIFT): New operand flag.
2168
2169Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2170
2171 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 2172 signed numbers.
252b5132
RH
2173
2174Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2175
2176 * d10v.h (pd_reg): Define. Putting the definition here allows
2177 the assembler and disassembler to share the same struct.
2178
2179Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2180
2181 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2182 Williams <steve@icarus.com>.
2183
2184Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2185
2186 * d10v.h: New file.
2187
2188Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2189
2190 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2191
2192Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2193
d83c6548 2194 * m68k.h (mcf5200): New macro.
252b5132
RH
2195 Document names of coldfire control registers.
2196
2197Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2198
2199 * h8300.h (SRC_IN_DST): Define.
2200
2201 * h8300.h (UNOP3): Mark the register operand in this insn
2202 as a source operand, not a destination operand.
2203 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2204 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2205 register operand with SRC_IN_DST.
2206
2207Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2208
2209 * alpha.h: New file.
2210
2211Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2212
2213 * rs6k.h: Remove obsolete file.
2214
2215Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2216
2217 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2218 fdivp, and fdivrp. Add ffreep.
2219
2220Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2221
2222 * h8300.h: Reorder various #defines for readability.
2223 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2224 (BITOP): Accept additional (unused) argument. All callers changed.
2225 (EBITOP): Likewise.
2226 (O_LAST): Bump.
2227 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2228
2229 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2230 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2231 (BITOP, EBITOP): Handle new H8/S addressing modes for
2232 bit insns.
2233 (UNOP3): Handle new shift/rotate insns on the H8/S.
2234 (insns using exr): New instructions.
2235 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2236
2237Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2238
2239 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2240 was incorrect.
2241
2242Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2243
2244 * h8300.h (START): Remove.
2245 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2246 and mov.l insns that can be relaxed.
2247
2248Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2249
2250 * i386.h: Remove Abs32 from lcall.
2251
2252Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2253
2254 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2255 (SLCPOP): New macro.
2256 Mark X,Y opcode letters as in use.
2257
2258Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2259
2260 * sparc.h (F_FLOAT, F_FBR): Define.
2261
2262Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2263
2264 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2265 from all insns.
2266 (ABS8SRC,ABS8DST): Add ABS8MEM.
2267 (add.l): Fix reg+reg variant.
2268 (eepmov.w): Renamed from eepmovw.
2269 (ldc,stc): Fix many cases.
2270
2271Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2272
2273 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2274
2275Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2276
2277 * sparc.h (O): Mark operand letter as in use.
2278
2279Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2280
2281 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2282 Mark operand letters uU as in use.
2283
2284Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2285
2286 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2287 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2288 (SPARC_OPCODE_SUPPORTED): New macro.
2289 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2290 (F_NOTV9): Delete.
2291
2292Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2293
2294 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2295 declaration consistent with return type in definition.
2296
2297Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2298
2299 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2300
2301Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2302
2303 * i386.h (i386_regtab): Add 80486 test registers.
2304
2305Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2306
2307 * i960.h (I_HX): Define.
2308 (i960_opcodes): Add HX instruction.
2309
2310Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2311
2312 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2313 and fclex.
2314
2315Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2316
2317 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2318 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2319 (bfd_* defines): Delete.
2320 (sparc_opcode_archs): Replaces architecture_pname.
2321 (sparc_opcode_lookup_arch): Declare.
2322 (NUMOPCODES): Delete.
2323
2324Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2325
2326 * sparc.h (enum sparc_architecture): Add v9a.
2327 (ARCHITECTURES_CONFLICT_P): Update.
2328
2329Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2330
2331 * i386.h: Added Pentium Pro instructions.
2332
2333Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2334
2335 * m68k.h: Document new 'W' operand place.
2336
2337Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2338
2339 * hppa.h: Add lci and syncdma instructions.
2340
2341Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2342
2343 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2344 instructions.
252b5132
RH
2345
2346Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2347
2348 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2349 assembler's -mcom and -many switches.
2350
2351Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2352
2353 * i386.h: Fix cmpxchg8b extension opcode description.
2354
2355Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2356
2357 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2358 and register cr4.
2359
2360Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2361
2362 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2363
2364Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2365
2366 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2367
2368Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2369
2370 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2371
2372Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2373
2374 * m68kmri.h: Remove.
2375
2376 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2377 declarations. Remove F_ALIAS and flag field of struct
2378 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2379 int. Make name and args fields of struct m68k_opcode const.
2380
2381Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2382
2383 * sparc.h (F_NOTV9): Define.
2384
2385Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2386
2387 * mips.h (INSN_4010): Define.
2388
2389Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2390
2391 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2392
2393 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2394 * m68k.h: Fix argument descriptions of coprocessor
2395 instructions to allow only alterable operands where appropriate.
2396 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2397 (m68k_opcode_aliases): Add more aliases.
2398
2399Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2400
2401 * m68k.h: Added explcitly short-sized conditional branches, and a
2402 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2403 svr4-based configurations.
2404
2405Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2406
2407 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2408 * i386.h: added missing Data16/Data32 flags to a few instructions.
2409
2410Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2411
2412 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2413 (OP_MASK_BCC, OP_SH_BCC): Define.
2414 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2415 (OP_MASK_CCC, OP_SH_CCC): Define.
2416 (INSN_READ_FPR_R): Define.
2417 (INSN_RFE): Delete.
2418
2419Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2420
2421 * m68k.h (enum m68k_architecture): Deleted.
2422 (struct m68k_opcode_alias): New type.
2423 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2424 matching constraints, values and flags. As a side effect of this,
2425 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2426 as I know were never used, now may need re-examining.
2427 (numopcodes): Now const.
2428 (m68k_opcode_aliases, numaliases): New variables.
2429 (endop): Deleted.
2430 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2431 m68k_opcode_aliases; update declaration of m68k_opcodes.
2432
2433Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2434
2435 * hppa.h (delay_type): Delete unused enumeration.
2436 (pa_opcode): Replace unused delayed field with an architecture
2437 field.
2438 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2439
2440Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2441
2442 * mips.h (INSN_ISA4): Define.
2443
2444Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2445
2446 * mips.h (M_DLA_AB, M_DLI): Define.
2447
2448Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2449
2450 * hppa.h (fstwx): Fix single-bit error.
2451
2452Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2453
2454 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2455
2456Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2457
2458 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2459 debug registers. From Charles Hannum (mycroft@netbsd.org).
2460
2461Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2462
2463 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2464 i386 support:
2465 * i386.h (MOV_AX_DISP32): New macro.
2466 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2467 of several call/return instructions.
2468 (ADDR_PREFIX_OPCODE): New macro.
2469
2470Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2471
2472 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2473
adadcc0c 2474 * vax.h (struct vot_wot, field `args'): Make it pointer to const
4f1d9bd8 2475 char.
adadcc0c 2476 (struct vot, field `name'): ditto.
252b5132
RH
2477
2478Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2479
2480 * vax.h: Supply and properly group all values in end sentinel.
2481
2482Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2483
2484 * mips.h (INSN_ISA, INSN_4650): Define.
2485
2486Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2487
2488 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2489 systems with a separate instruction and data cache, such as the
2490 29040, these instructions take an optional argument.
2491
2492Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2493
2494 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2495 INSN_TRAP.
2496
2497Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2498
2499 * mips.h (INSN_STORE_MEMORY): Define.
2500
2501Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2502
2503 * sparc.h: Document new operand type 'x'.
2504
2505Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2506
2507 * i960.h (I_CX2): New instruction category. It includes
2508 instructions available on Cx and Jx processors.
2509 (I_JX): New instruction category, for JX-only instructions.
2510 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2511 Jx-only instructions, in I_JX category.
2512
2513Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2514
2515 * ns32k.h (endop): Made pointer const too.
2516
2517Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2518
2519 * ns32k.h: Drop Q operand type as there is no correct use
2520 for it. Add I and Z operand types which allow better checking.
2521
2522Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2523
2524 * h8300.h (xor.l) :fix bit pattern.
2525 (L_2): New size of operand.
2526 (trapa): Use it.
2527
2528Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2529
2530 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2531
2532Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2533
2534 * sparc.h: Include v9 definitions.
2535
2536Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2537
2538 * m68k.h (m68060): Defined.
2539 (m68040up, mfloat, mmmu): Include it.
2540 (struct m68k_opcode): Widen `arch' field.
2541 (m68k_opcodes): Updated for M68060. Removed comments that were
2542 instructions commented out by "JF" years ago.
2543
2544Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2545
2546 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2547 add a one-bit `flags' field.
2548 (F_ALIAS): New macro.
2549
2550Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2551
2552 * h8300.h (dec, inc): Get encoding right.
2553
2554Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2555
2556 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2557 a flag instead.
2558 (PPC_OPERAND_SIGNED): Define.
2559 (PPC_OPERAND_SIGNOPT): Define.
2560
2561Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2562
2563 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2564 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2565
2566Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2567
2568 * i386.h: Reverse last change. It'll be handled in gas instead.
2569
2570Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2571
2572 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2573 slower on the 486 and used the implicit shift count despite the
2574 explicit operand. The one-operand form is still available to get
2575 the shorter form with the implicit shift count.
2576
2577Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2578
2579 * hppa.h: Fix typo in fstws arg string.
2580
2581Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2582
2583 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2584
2585Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2586
2587 * ppc.h (PPC_OPCODE_601): Define.
2588
2589Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2590
2591 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2592 (so we can determine valid completers for both addb and addb[tf].)
2593
2594 * hppa.h (xmpyu): No floating point format specifier for the
2595 xmpyu instruction.
2596
2597Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2598
2599 * ppc.h (PPC_OPERAND_NEXT): Define.
2600 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2601 (struct powerpc_macro): Define.
2602 (powerpc_macros, powerpc_num_macros): Declare.
2603
2604Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2605
2606 * ppc.h: New file. Header file for PowerPC opcode table.
2607
2608Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2609
2610 * hppa.h: More minor template fixes for sfu and copr (to allow
2611 for easier disassembly).
2612
2613 * hppa.h: Fix templates for all the sfu and copr instructions.
2614
2615Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2616
2617 * i386.h (push): Permit Imm16 operand too.
2618
2619Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2620
2621 * h8300.h (andc): Exists in base arch.
2622
2623Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2624
2625 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2626 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2627
2628Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2629
2630 * hppa.h: Add FP quadword store instructions.
2631
2632Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2633
2634 * mips.h: (M_J_A): Added.
2635 (M_LA): Removed.
2636
2637Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2638
2639 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2640 <mellon@pepper.ncd.com>.
2641
2642Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2643
2644 * hppa.h: Immediate field in probei instructions is unsigned,
2645 not low-sign extended.
2646
2647Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2648
2649 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2650
2651Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2652
2653 * i386.h: Add "fxch" without operand.
2654
2655Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2656
2657 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2658
2659Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2660
2661 * hppa.h: Add gfw and gfr to the opcode table.
2662
2663Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2664
2665 * m88k.h: extended to handle m88110.
2666
2667Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2668
2669 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2670 addresses.
2671
2672Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2673
2674 * i960.h (i960_opcodes): Properly bracket initializers.
2675
2676Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2677
2678 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2679
2680Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2681
2682 * m68k.h (two): Protect second argument with parentheses.
2683
2684Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2685
2686 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2687 Deleted old in/out instructions in "#if 0" section.
2688
2689Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2690
2691 * i386.h (i386_optab): Properly bracket initializers.
2692
2693Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2694
2695 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2696 Jeff Law, law@cs.utah.edu).
2697
2698Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2699
2700 * i386.h (lcall): Accept Imm32 operand also.
2701
2702Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2703
2704 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2705 (M_DABS): Added.
2706
2707Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2708
2709 * mips.h (INSN_*): Changed values. Removed unused definitions.
2710 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2711 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2712 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2713 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2714 (M_*): Added new values for r6000 and r4000 macros.
2715 (ANY_DELAY): Removed.
2716
2717Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2718
2719 * mips.h: Added M_LI_S and M_LI_SS.
2720
2721Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2722
2723 * h8300.h: Get some rare mov.bs correct.
2724
2725Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2726
2727 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2728 been included.
2729
2730Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2731
adadcc0c 2732 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
252b5132
RH
2733 jump instructions, for use in disassemblers.
2734
2735Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2736
2737 * m88k.h: Make bitfields just unsigned, not unsigned long or
2738 unsigned short.
2739
2740Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2741
2742 * hppa.h: New argument type 'y'. Use in various float instructions.
2743
2744Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2745
2746 * hppa.h (break): First immediate field is unsigned.
2747
2748 * hppa.h: Add rfir instruction.
2749
2750Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2751
2752 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2753
2754Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2755
2756 * mips.h: Reworked the hazard information somewhat, and fixed some
2757 bugs in the instruction hazard descriptions.
2758
2759Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2760
2761 * m88k.h: Corrected a couple of opcodes.
2762
2763Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2764
2765 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2766 new version includes instruction hazard information, but is
2767 otherwise reasonably similar.
2768
2769Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2770
2771 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2772
2773Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2774
2775 Patches from Jeff Law, law@cs.utah.edu:
2776 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2777 Make the tables be the same for the following instructions:
2778 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2779 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2780 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2781 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2782 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2783 "fcmp", and "ftest".
2784
2785 * hppa.h: Make new and old tables the same for "break", "mtctl",
2786 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2787 Fix typo in last patch. Collapse several #ifdefs into a
2788 single #ifdef.
2789
2790 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2791 of the comments up-to-date.
2792
2793 * hppa.h: Update "free list" of letters and update
2794 comments describing each letter's function.
2795
4f1d9bd8
NC
2796Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2797
2798 * h8300.h: Lots of little fixes for the h8/300h.
2799
2800Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2801
2802 Support for H8/300-H
2803 * h8300.h: Lots of new opcodes.
2804
252b5132
RH
2805Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2806
2807 * h8300.h: checkpoint, includes H8/300-H opcodes.
2808
2809Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2810
2811 * Patches from Jeffrey Law <law@cs.utah.edu>.
2812 * hppa.h: Rework single precision FP
2813 instructions so that they correctly disassemble code
2814 PA1.1 code.
2815
2816Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2817
2818 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2819 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2820
2821Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2822
2823 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2824 gdb will define it for now.
2825
2826Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2827
2828 * sparc.h: Don't end enumerator list with comma.
2829
2830Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2831
2832 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2833 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2834 ("bc2t"): Correct typo.
2835 ("[ls]wc[023]"): Use T rather than t.
2836 ("c[0123]"): Define general coprocessor instructions.
2837
2838Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2839
2840 * m68k.h: Move split point for gcc compilation more towards
2841 middle.
2842
2843Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2844
2845 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2846 simply wrong, ics, rfi, & rfsvc were missing).
2847 Add "a" to opr_ext for "bb". Doc fix.
2848
2849Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2850
adadcc0c
AM
2851 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2852 * mips.h: Add casts, to suppress warnings about shifting too much.
2853 * m68k.h: Document the placement code '9'.
252b5132
RH
2854
2855Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2856
adadcc0c 2857 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
252b5132
RH
2858 allows callers to break up the large initialized struct full of
2859 opcodes into two half-sized ones. This permits GCC to compile
2860 this module, since it takes exponential space for initializers.
adadcc0c 2861 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
252b5132
RH
2862
2863Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2864
adadcc0c
AM
2865 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2866 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
252b5132
RH
2867 initialized structs in it.
2868
2869Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2870
2871 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
adadcc0c
AM
2872 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2873 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
252b5132
RH
2874
2875Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2876
2877 * mips.h: document "i" and "j" operands correctly.
2878
2879Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2880
2881 * mips.h: Removed endianness dependency.
2882
2883Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2884
2885 * h8300.h: include info on number of cycles per instruction.
2886
2887Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2888
adadcc0c 2889 * hppa.h: Move handy aliases to the front. Fix masks for extract
252b5132
RH
2890 and deposit instructions.
2891
2892Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2893
2894 * i386.h: accept shld and shrd both with and without the shift
2895 count argument, which is always %cl.
2896
2897Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2898
2899 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2900 (one_byte_segment_defaults, two_byte_segment_defaults,
2901 i386_prefixtab_end): Ditto.
2902
2903Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2904
2905 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2906 for operand 2; from John Carr, jfc@dsg.dec.com.
2907
2908Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2909
2910 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2911 always use 16-bit offsets. Makes calculated-size jump tables
2912 feasible.
2913
2914Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2915
2916 * i386.h: Fix one-operand forms of in* and out* patterns.
2917
2918Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2919
2920 * m68k.h: Added CPU32 support.
2921
2922Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2923
adadcc0c 2924 * mips.h (break): Disassemble the argument. Patch from
252b5132
RH
2925 jonathan@cs.stanford.edu (Jonathan Stone).
2926
2927Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2928
2929 * m68k.h: merged Motorola and MIT syntax.
2930
2931Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2932
2933 * m68k.h (pmove): make the tests less strict, the 68k book is
2934 wrong.
2935
2936Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2937
2938 * m68k.h (m68ec030): Defined as alias for 68030.
2939 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2940 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2941 them. Tightened description of "fmovex" to distinguish it from
2942 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2943 up descriptions that claimed versions were available for chips not
2944 supporting them. Added "pmovefd".
2945
2946Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2947
2948 * m68k.h: fix where the . goes in divull
2949
2950Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2951
2952 * m68k.h: the cas2 instruction is supposed to be written with
2953 indirection on the last two operands, which can be either data or
2954 address registers. Added a new operand type 'r' which accepts
2955 either register type. Added new cases for cas2l and cas2w which
2956 use them. Corrected masks for cas2 which failed to recognize use
2957 of address register.
2958
2959Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2960
adadcc0c 2961 * m68k.h: Merged in patches (mostly m68040-specific) from
252b5132
RH
2962 Colin Smith <colin@wrs.com>.
2963
adadcc0c 2964 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
252b5132
RH
2965 base). Also cleaned up duplicates, re-ordered instructions for
2966 the sake of dis-assembling (so aliases come after standard names).
2967 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2968
2969Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2970
2971 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2972 all missing .s
2973
2974Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2975
2976 * sparc.h: Moved tables to BFD library.
2977
2978 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2979
2980Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2981
adadcc0c 2982 * h8300.h: Finish filling in all the holes in the opcode table,
252b5132
RH
2983 so that the Lucid C compiler can digest this as well...
2984
2985Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2986
adadcc0c 2987 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
252b5132
RH
2988 Fix opcodes on various sizes of fild/fist instructions
2989 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2990 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2991
2992Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2993
adadcc0c 2994 * h8300.h: Fill in all the holes in the opcode table so that the
252b5132
RH
2995 losing HPUX C compiler can digest this...
2996
2997Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2998
adadcc0c 2999 * mips.h: Fix decoding of coprocessor instructions, somewhat.
252b5132
RH
3000 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
3001
3002Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
3003
3004 * sparc.h: Add new architecture variant sparclite; add its scan
3005 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
3006
3007Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
3008
adadcc0c 3009 * mips.h: Add some more opcode synonyms (from Frank Yellin,
252b5132
RH
3010 fy@lucid.com).
3011
3012Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
3013
adadcc0c 3014 * rs6k.h: New version from IBM (Metin).
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RH
3015
3016Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
3017
3018 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
adadcc0c 3019 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
252b5132
RH
3020
3021Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
3022
adadcc0c 3023 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
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RH
3024
3025Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
3026
adadcc0c 3027 * m68k.h (one, two): Cast macro args to unsigned to suppress
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RH
3028 complaints from compiler and lint about integer overflow during
3029 shift.
3030
3031Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
3032
adadcc0c 3033 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
252b5132
RH
3034
3035Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
3036
adadcc0c 3037 * mips.h: Make bitfield layout depend on the HOST compiler,
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RH
3038 not on the TARGET system.
3039
3040Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
3041
3042 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
3043 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
3044 <TRANLE@INTELLICORP.COM>.
3045
3046Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
3047
3048 * h8300.h: turned op_type enum into #define list
3049
3050Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
3051
adadcc0c 3052 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
252b5132
RH
3053 similar instructions -- they've been renamed to "fitoq", etc.
3054 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
3055 number of arguments.
adadcc0c 3056 * h8300.h: Remove extra ; which produces compiler warning.
252b5132
RH
3057
3058Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
3059
adadcc0c 3060 * sparc.h: fix opcode for tsubcctv.
252b5132
RH
3061
3062Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
3063
3064 * sparc.h: fba and cba are now aliases for fb and cb respectively.
3065
3066Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
3067
adadcc0c 3068 * sparc.h (nop): Made the 'lose' field be even tighter,
252b5132
RH
3069 so only a standard 'nop' is disassembled as a nop.
3070
3071Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
3072
3073 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
3074 disassembled as a nop.
3075
4f1d9bd8
NC
3076Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
3077
adadcc0c 3078 * m68k.h, sparc.h: ANSIfy enums.
4f1d9bd8 3079
252b5132
RH
3080Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
3081
3082 * sparc.h: fix a typo.
3083
3084Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
3085
3086 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
3087 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 3088 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
3089
3090\f
3091Local Variables:
3092version-control: never
3093End:
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