projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Apply patch from Charles Wilson to make PE ports search for dynamic libraries
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
f660ee8b
FCE		 12000-05-16 Frank Ch. Eigler <fche@redhat.com>
2
3 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
4 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
5 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
6 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
7
558b0a60
AM		 82000-05-13 Alan Modra <alan@linuxcare.com.au>,
9
10 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
11
e413e4e9
AM		 122000-05-13 Alan Modra <alan@linuxcare.com.au>,
13 Alexander Sokolov <robocop@netlink.ru>
14
15 * i386.h (i386_optab): Add cpu_flags for all instructions.
16
172000-05-13 Alan Modra <alan@linuxcare.com.au>
18
19 From Gavin Romig-Koch <gavin@cygnus.com>
20 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
21
5c84d377
TW		 222000-05-04 Timothy Wall <twall@cygnus.com>
23
24 * tic54x.h: New.
25
966f959b
C		 262000-05-03 J.T. Conklin <jtc@redback.com>
27
28 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
29 (PPC_OPERAND_VR): New operand flag for vector registers.
30
c5d05dbb
JL		 312000-05-01 Kazu Hirata <kazu@hxi.com>
32
33 * h8300.h (EOP): Add missing initializer.
34
a7fba0e0
JL		 35Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
36
37 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
38 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
39 New operand types l,y,&,fe,fE,fx added to support above forms.
40 (pa_opcodes): Replaced usage of 'x' as source/target for
41 floating point double-word loads/stores with 'fx'.
42
800eeca4
JW		 43Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
44 David Mosberger <davidm@hpl.hp.com>
45 Timothy Wall <twall@cygnus.com>
46 Jim Wilson <wilson@cygnus.com>
47
48 * ia64.h: New file.
49
ba23e138
NC		 502000-03-27 Nick Clifton <nickc@cygnus.com>
51
52 * d30v.h (SHORT_A1): Fix value.
53 (SHORT_AR): Renumber so that it is at the end of the list of short
54 instructions, not the end of the list of long instructions.
55
d0b47220
AM		 562000-03-26 Alan Modra <alan@linuxcare.com>
57
58 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
59 problem isn't really specific to Unixware.
60 (OLDGCC_COMPAT): Define.
61 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
62 destination %st(0).
63 Fix lots of comments.
64
866afedc
NC		 652000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
66
67 * d30v.h:
68 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
69 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
70 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
71 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
72 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
73 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
74 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
75
cc5ca5ce
AM		 762000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
77
78 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
79 fistpd without suffix.
80
68e324a2
NC		 812000-02-24 Nick Clifton <nickc@cygnus.com>
82
83 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
84 'signed_overflow_ok_p'.
85 Delete prototypes for cgen_set_flags() and cgen_get_flags().
86
60f036a2
AH		 872000-02-24 Andrew Haley <aph@cygnus.com>
88
89 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
90 (CGEN_CPU_TABLE): flags: new field.
91 Add prototypes for new functions.
92
9b9b5cd4
AM		 932000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
94
95 * i386.h: Add some more UNIXWARE_COMPAT comments.
96
5b93d8bb
AM		 972000-02-23 Linas Vepstas <linas@linas.org>
98
99 * i370.h: New file.
100
87f398dd
AH		 1012000-02-22 Andrew Haley <aph@cygnus.com>
102
103 * mips.h: (OPCODE_IS_MEMBER): Add comment.
104
367c01af
AH		 1051999-12-30 Andrew Haley <aph@cygnus.com>
106
9a1e79ca
AH		 107 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
108 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
109 insns.
367c01af 110
add0c677
AM		 1112000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
112
113 * i386.h: Qualify intel mode far call and jmp with x_Suf.
114
3138f287
AM		 1151999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
116
117 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
118 indirect jumps and calls. Add FF/3 call for intel mode.
119
ccecd07b
JL		 120Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
121
122 * mn10300.h: Add new operand types. Add new instruction formats.
123
b37e19e9
JL		 124Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
125
126 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
127 instruction.
128
5fce5ddf
GRK		 1291999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
130
131 * mips.h (INSN_ISA5): New.
132
2bd7f1f3
GRK		 1331999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
134
135 * mips.h (OPCODE_IS_MEMBER): New.
136
4df2b5c5
NC		 1371999-10-29 Nick Clifton <nickc@cygnus.com>
138
139 * d30v.h (SHORT_AR): Define.
140
446a06c9
MM		 1411999-10-18 Michael Meissner <meissner@cygnus.com>
142
143 * alpha.h (alpha_num_opcodes): Convert to unsigned.
144 (alpha_num_operands): Ditto.
145
eca04c6a
JL		 146Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
147
148 * hppa.h (pa_opcodes): Add load and store cache control to
149 instructions. Add ordered access load and store.
150
151 * hppa.h (pa_opcode): Add new entries for addb and addib.
152
153 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
154
155 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
156
c43185de
DN		 157Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
158
159 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
160
ec3533da
JL		 161Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
162
390f858d
JL		 163 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
164 and "be" using completer prefixes.
165
8c47ebd9
JL		 166 * hppa.h (pa_opcodes): Add initializers to silence compiler.
167
ec3533da
JL		 168 * hppa.h: Update comments about character usage.
169
18369bea
JL		 170Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
171
172 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
173 up the new fstw & bve instructions.
174
c36efdd2
JL		 175Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
176
d3ffb032
JL		 177 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
178 instructions.
179
c49ec3da
JL		 180 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
181
5d2e7ecc
JL		 182 * hppa.h (pa_opcodes): Add long offset double word load/store
183 instructions.
184
6397d1a2
JL		 185 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
186 stores.
187
142f0fe0
JL		 188 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
189
f5a68b45
JL		 190 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
191
8235801e
JL		 192 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
193
35184366
JL		 194 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
195
f0bfde5e
JL		 196 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
197
27bbbb58
JL		 198 * hppa.h (pa_opcodes): Add support for "b,l".
199
c36efdd2
JL		 200 * hppa.h (pa_opcodes): Add support for "b,gate".
201
f2727d04
JL		 202Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
203
9392fb11
JL		 204 * hppa.h (pa_opcodes): Use 'fX' for first register operand
205 in xmpyu.
206
e0c52e99
JL		 207 * hppa.h (pa_opcodes): Fix mask for probe and probei.
208
f2727d04
JL		 209 * hppa.h (pa_opcodes): Fix mask for depwi.
210
52d836e2
JL		 211Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
212
213 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
214 an explicit output argument.
215
90765e3a
JL		 216Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
217
218 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
219 Add a few PA2.0 loads and store variants.
220
8340b17f
ILT		 2211999-09-04 Steve Chamberlain <sac@pobox.com>
222
223 * pj.h: New file.
224
5f47d35b
AM		 2251999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
226
227 * i386.h (i386_regtab): Move %st to top of table, and split off
228 other fp reg entries.
229 (i386_float_regtab): To here.
230
1c143202
JL		 231Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
232
7d8fdb64
JL		 233 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
234 by 'f'.
235
90927b9c
JL		 236 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
237 Add supporting args.
238
1d16bf9c
JL		 239 * hppa.h: Document new completers and args.
240 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
241 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
242 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
243 pmenb and pmdis.
244
96226a68
JL		 245 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
246 hshr, hsub, mixh, mixw, permh.
247
5d4ba527
JL		 248 * hppa.h (pa_opcodes): Change completers in instructions to
249 use 'c' prefix.
250
e9fc28c6
JL		 251 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
252 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
253
1c143202
JL		 254 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
255 fnegabs to use 'I' instead of 'F'.
256
9e525108
AM		 2571999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
258
259 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
260 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
261 Alphabetically sort PIII insns.
262
e8da1bf1
DE		 263Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
264
265 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
266
7d627258
JL		 267Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
268
5696871a
JL		 269 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
270 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
271
7d627258
JL		 272 * hppa.h: Document 64 bit condition completers.
273
c5e52916
JL		 274Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
275
276 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
277
eecb386c
AM		 2781999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
279
280 * i386.h (i386_optab): Add DefaultSize modifier to all insns
281 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
282 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
283
88a380f3
JL		 284Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
285 Jeff Law <law@cygnus.com>
286
287 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
288
289 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 290
291 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
292 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
293
145cf1f0
AM		 2941999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
295
296 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
297
73826640
JL		 298Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
299
300 * hppa.h (struct pa_opcode): Add new field "flags".
301 (FLAGS_STRICT): Define.
302
b65db252
JL		 303Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
304 Jeff Law <law@cygnus.com>
305
f7fc668b
JL		 306 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
307
308 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 309
10084519
AM		 3101999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
311
312 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
313 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
314 flag to fcomi and friends.
315
cd8a80ba
JL		 316Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
317
318 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
319 integer logical instructions.
320
1fca749b
ILT		 3211999-05-28 Linus Nordberg <linus.nordberg@canit.se>
322
323 * m68k.h: Document new formats `E', `G', `H' and new places `N',
324 `n', `o'.
325
326 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
327 and new places `m', `M', `h'.
328
aa008907
JL		 329Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
330
331 * hppa.h (pa_opcodes): Add several processor specific system
332 instructions.
333
e26b85f0
JL		 334Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
335
336 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
337 "addb", and "addib" to be used by the disassembler.
338
c608c12e
AM		 3391999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
340
341 * i386.h (ReverseModrm): Remove all occurences.
342 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
343 movmskps, pextrw, pmovmskb, maskmovq.
344 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
345 ignore the data size prefix.
346
347 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
348 Mostly stolen from Doug Ledford <dledford@redhat.com>
349
45c18104
RH		 350Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
351
352 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
353
252b5132
RH		 3541999-04-14 Doug Evans <devans@casey.cygnus.com>
355
356 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
357 (CGEN_ATTR_TYPE): Update.
358 (CGEN_ATTR_MASK): Number booleans starting at 0.
359 (CGEN_ATTR_VALUE): Update.
360 (CGEN_INSN_ATTR): Update.
361
362Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
363
364 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
365 instructions.
366
367Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
368
369 * hppa.h (bb, bvb): Tweak opcode/mask.
370
371
3721999-03-22 Doug Evans <devans@casey.cygnus.com>
373
374 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
375 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
376 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
377 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
378 Delete member max_insn_size.
379 (enum cgen_cpu_open_arg): New enum.
380 (cpu_open): Update prototype.
381 (cpu_open_1): Declare.
382 (cgen_set_cpu): Delete.
383
3841999-03-11 Doug Evans <devans@casey.cygnus.com>
385
386 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
387 (CGEN_OPERAND_NIL): New macro.
388 (CGEN_OPERAND): New member `type'.
389 (@arch@_cgen_operand_table): Delete decl.
390 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
391 (CGEN_OPERAND_TABLE): New struct.
392 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
393 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
394 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
395 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
396 {get,set}_{int,vma}_operand.
397 (@arch@_cgen_cpu_open): New arg `isa'.
398 (cgen_set_cpu): Ditto.
399
400Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
401
402 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
403
4041999-02-25 Doug Evans <devans@casey.cygnus.com>
405
406 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
407 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
408 enum cgen_hw_type.
409 (CGEN_HW_TABLE): New struct.
410 (hw_table): Delete declaration.
411 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
412 to table entry to enum.
413 (CGEN_OPINST): Ditto.
414 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
415
416Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
417
418 * alpha.h (AXP_OPCODE_EV6): New.
419 (AXP_OPCODE_NOPAL): Include it.
420
4211999-02-09 Doug Evans <devans@casey.cygnus.com>
422
423 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
424 All uses updated. New members int_insn_p, max_insn_size,
425 parse_operand,insert_operand,extract_operand,print_operand,
426 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
427 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
428 extract_handlers,print_handlers.
429 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
430 (CGEN_ATTR_BOOL_OFFSET): New macro.
431 (CGEN_ATTR_MASK): Subtract it to compute bit number.
432 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
433 (cgen_opcode_handler): Renamed from cgen_base.
434 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
435 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
436 all uses updated.
437 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
438 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
439 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
440 (CGEN_OPCODE,CGEN_IBASE): New types.
441 (CGEN_INSN): Rewrite.
442 (CGEN_{ASM,DIS}_HASH*): Delete.
443 (init_opcode_table,init_ibld_table): Declare.
444 (CGEN_INSN_ATTR): New type.
445
446Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
447
448 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
449 (x_FP, d_FP, dls_FP, sldx_FP): Define.
450 Change *Suf definitions to include x and d suffixes.
451 (movsx): Use w_Suf and b_Suf.
452 (movzx): Likewise.
453 (movs): Use bwld_Suf.
454 (fld): Change ordering. Use sld_FP.
455 (fild): Add Intel Syntax equivalent of fildq.
456 (fst): Use sld_FP.
457 (fist): Use sld_FP.
458 (fstp): Use sld_FP. Add x_FP version.
459 (fistp): LLongMem version for Intel Syntax.
460 (fcom, fcomp): Use sld_FP.
461 (fadd, fiadd, fsub): Use sld_FP.
462 (fsubr): Use sld_FP.
463 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
464
4651999-01-27 Doug Evans <devans@casey.cygnus.com>
466
467 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
468 CGEN_MODE_UINT.
469
470Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
471
472 * hppa.h (bv): Fix mask.
473
4741999-01-05 Doug Evans <devans@casey.cygnus.com>
475
476 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
477 (CGEN_ATTR): Use it.
478 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
479 (CGEN_ATTR_TABLE): New member dfault.
480
4811998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
482
483 * mips.h (MIPS16_INSN_BRANCH): New.
484
485Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
486
487 The following is part of a change made by Edith Epstein
488 <eepstein@sophia.cygnus.com> as part of a project to merge in
489 changes by HP; HP did not create ChangeLog entries.
490
491 * hppa.h (completer_chars): list of chars to not put a space
492 after.
493
494Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
495
496 * i386.h (i386_optab): Permit w suffix on processor control and
497 status word instructions.
498
4991998-11-30 Doug Evans <devans@casey.cygnus.com>
500
501 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
502 (struct cgen_keyword_entry): Ditto.
503 (struct cgen_operand): Ditto.
504 (CGEN_IFLD): New typedef, with associated access macros.
505 (CGEN_IFMT): New typedef, with associated access macros.
506 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
507 (CGEN_IVALUE): New typedef.
508 (struct cgen_insn): Delete const on syntax,attrs members.
509 `format' now points to format data. Type of `value' is now
510 CGEN_IVALUE.
511 (struct cgen_opcode_table): New member ifld_table.
512
5131998-11-18 Doug Evans <devans@casey.cygnus.com>
514
515 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
516 (CGEN_OPERAND_INSTANCE): New member `attrs'.
517 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
518 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
519 (cgen_opcode_table): Update type of dis_hash fn.
520 (extract_operand): Update type of `insn_value' arg.
521
522Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
523
524 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
525
526Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
527
528 * mips.h (INSN_MULT): Added.
529
530Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
531
532 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
533
534Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
535
536 * cgen.h (CGEN_INSN_INT): New typedef.
537 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
538 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
539 (CGEN_INSN_BYTES_PTR): New typedef.
540 (CGEN_EXTRACT_INFO): New typedef.
541 (cgen_insert_fn,cgen_extract_fn): Update.
542 (cgen_opcode_table): New member `insn_endian'.
543 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
544 (insert_operand,extract_operand): Update.
545 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
546
547Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
548
549 * cgen.h (CGEN_ATTR_BOOLS): New macro.
550 (struct CGEN_HW_ENTRY): New member `attrs'.
551 (CGEN_HW_ATTR): New macro.
552 (struct CGEN_OPERAND_INSTANCE): New member `name'.
553 (CGEN_INSN_INVALID_P): New macro.
554
555Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
556
557 * hppa.h: Add "fid".
558
559Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
560
561 From Robert Andrew Dale <rob@nb.net>
562 * i386.h (i386_optab): Add AMD 3DNow! instructions.
563 (AMD_3DNOW_OPCODE): Define.
564
565Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
566
567 * d30v.h (EITHER_BUT_PREFER_MU): Define.
568
569Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
570
571 * cgen.h (cgen_insn): #if 0 out element `cdx'.
572
573Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
574
575 Move all global state data into opcode table struct, and treat
576 opcode table as something that is "opened/closed".
577 * cgen.h (CGEN_OPCODE_DESC): New type.
578 (all fns): New first arg of opcode table descriptor.
579 (cgen_set_parse_operand_fn): Add prototype.
580 (cgen_current_machine,cgen_current_endian): Delete.
581 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
582 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
583 dis_hash_table,dis_hash_table_entries.
584 (opcode_open,opcode_close): Add prototypes.
585
586 * cgen.h (cgen_insn): New element `cdx'.
587
588Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
589
590 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
591
592Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
593
594 * mn10300.h: Add "no_match_operands" field for instructions.
595 (MN10300_MAX_OPERANDS): Define.
596
597Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
598
599 * cgen.h (cgen_macro_insn_count): Declare.
600
601Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
602
603 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
604 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
605 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
606 set_{int,vma}_operand.
607
608Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
609
610 * mn10300.h: Add "machine" field for instructions.
611 (MN103, AM30): Define machine types.
612
613Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
614
615 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
616
6171998-06-18 Ulrich Drepper <drepper@cygnus.com>
618
619 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
620
621Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
622
623 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
624 and ud2b.
625 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
626 those that happen to be implemented on pentiums.
627
628Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
629
630 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
631 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
632 with Size16|IgnoreSize or Size32|IgnoreSize.
633
634Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
635
636 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
637 (REPE): Rename to REPE_PREFIX_OPCODE.
638 (i386_regtab_end): Remove.
639 (i386_prefixtab, i386_prefixtab_end): Remove.
640 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
641 of md_begin.
642 (MAX_OPCODE_SIZE): Define.
643 (i386_optab_end): Remove.
644 (sl_Suf): Define.
645 (sl_FP): Use sl_Suf.
646
647 * i386.h (i386_optab): Allow 16 bit displacement for `mov
648 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
649 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
650 data32, dword, and adword prefixes.
651 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
652 regs.
653
654Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
655
656 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
657
658 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
659 register operands, because this is a common idiom. Flag them with
660 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
661 fdivrp because gcc erroneously generates them. Also flag with a
662 warning.
663
664 * i386.h: Add suffix modifiers to most insns, and tighter operand
665 checks in some cases. Fix a number of UnixWare compatibility
666 issues with float insns. Merge some floating point opcodes, using
667 new FloatMF modifier.
668 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
669 consistency.
670
671 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
672 IgnoreDataSize where appropriate.
673
674Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
675
676 * i386.h: (one_byte_segment_defaults): Remove.
677 (two_byte_segment_defaults): Remove.
678 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
679
680Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
681
682 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
683 (cgen_hw_lookup_by_num): Declare.
684
685Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
686
687 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
688 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
689
690Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
691
692 * cgen.h (cgen_asm_init_parse): Delete.
693 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
694 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
695
696Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
697
698 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
699 (cgen_asm_finish_insn): Update prototype.
700 (cgen_insn): New members num, data.
701 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
702 dis_hash, dis_hash_table_size moved to ...
703 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
704 All uses updated. New members asm_hash_p, dis_hash_p.
705 (CGEN_MINSN_EXPANSION): New struct.
706 (cgen_expand_macro_insn): Declare.
707 (cgen_macro_insn_count): Declare.
708 (get_insn_operands): Update prototype.
709 (lookup_get_insn_operands): Declare.
710
711Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
712
713 * i386.h (i386_optab): Change iclrKludge and imulKludge to
714 regKludge. Add operands types for string instructions.
715
716Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
717
718 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
719 table.
720
721Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
722
723 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
724 for `gettext'.
725
726Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
727
728 * i386.h: Remove NoModrm flag from all insns: it's never checked.
729 Add IsString flag to string instructions.
730 (IS_STRING): Don't define.
731 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
732 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
733 (SS_PREFIX_OPCODE): Define.
734
735Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
736
737 * i386.h: Revert March 24 patch; no more LinearAddress.
738
739Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
740
741 * i386.h (i386_optab): Remove fwait (9b) from all floating point
742 instructions, and instead add FWait opcode modifier. Add short
743 form of fldenv and fstenv.
744 (FWAIT_OPCODE): Define.
745
746 * i386.h (i386_optab): Change second operand constraint of `mov
747 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
748 allow legal instructions such as `movl %gs,%esi'
749
750Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
751
752 * h8300.h: Various changes to fully bracket initializers.
753
754Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
755
756 * i386.h: Set LinearAddress for lidt and lgdt.
757
758Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
759
760 * cgen.h (CGEN_BOOL_ATTR): New macro.
761
762Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
763
764 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
765
766Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
767
768 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
769 (cgen_insn): Record syntax and format entries here, rather than
770 separately.
771
772Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
773
774 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
775
776Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
777
778 * cgen.h (cgen_insert_fn): Change type of result to const char *.
779 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
780 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
781
782Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
783
784 * cgen.h (lookup_insn): New argument alias_p.
785
786Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
787
788Fix rac to accept only a0:
789 * d10v.h (OPERAND_ACC): Split into:
790 (OPERAND_ACC0, OPERAND_ACC1) .
791 (OPERAND_GPR): Define.
792
793Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
794
795 * cgen.h (CGEN_FIELDS): Define here.
796 (CGEN_HW_ENTRY): New member `type'.
797 (hw_list): Delete decl.
798 (enum cgen_mode): Declare.
799 (CGEN_OPERAND): New member `hw'.
800 (enum cgen_operand_instance_type): Declare.
801 (CGEN_OPERAND_INSTANCE): New type.
802 (CGEN_INSN): New member `operands'.
803 (CGEN_OPCODE_DATA): Make hw_list const.
804 (get_insn_operands,lookup_insn): Add prototypes for.
805
806Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
807
808 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
809 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
810 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
811 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
812
813Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
814
815 * cgen.h: Correct typo in comment end marker.
816
817Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
818
819 * tic30.h: New file.
820
821Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
822
823 * cgen.h: Add prototypes for cgen_save_fixups(),
824 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
825 of cgen_asm_finish_insn() to return a char *.
826
827Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
828
829 * cgen.h: Formatting changes to improve readability.
830
831Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
832
833 * cgen.h (*): Clean up pass over `struct foo' usage.
834 (CGEN_ATTR): Make unsigned char.
835 (CGEN_ATTR_TYPE): Update.
836 (CGEN_ATTR_{ENTRY,TABLE}): New types.
837 (cgen_base): Move member `attrs' to cgen_insn.
838 (CGEN_KEYWORD): New member `null_entry'.
839 (CGEN_{SYNTAX,FORMAT}): New types.
840 (cgen_insn): Format and syntax separated from each other.
841
842Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
843
844 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
845 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
846 flags_{used,set} long.
847 (d30v_operand): Make flags field long.
848
849Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
850
851 * m68k.h: Fix comment describing operand types.
852
853Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
854
855 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
856 everything else after down.
857
858Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
859
860 * d10v.h (OPERAND_FLAG): Split into:
861 (OPERAND_FFLAG, OPERAND_CFLAG) .
862
863Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
864
865 * mips.h (struct mips_opcode): Changed comments to reflect new
866 field usage.
867
868Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
869
870 * mips.h: Added to comments a quick-ref list of all assigned
871 operand type characters.
872 (OP_{MASK,SH}_PERFREG): New macros.
873
874Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
875
876 * sparc.h: Add '_' and '/' for v9a asr's.
877 Patch from David Miller <davem@vger.rutgers.edu>
878
879Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
880
881 * h8300.h: Bit ops with absolute addresses not in the 8 bit
882 area are not available in the base model (H8/300).
883
884Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
885
886 * m68k.h: Remove documentation of ` operand specifier.
887
888Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
889
890 * m68k.h: Document q and v operand specifiers.
891
892Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
893
894 * v850.h (struct v850_opcode): Add processors field.
895 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
896 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
897 (PROCESSOR_V850EA): New bit constants.
898
899Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
900
901 Merge changes from Martin Hunt:
902
903 * d30v.h: Allow up to 64 control registers. Add
904 SHORT_A5S format.
905
906 * d30v.h (LONG_Db): New form for delayed branches.
907
908 * d30v.h: (LONG_Db): New form for repeati.
909
910 * d30v.h (SHORT_D2B): New form.
911
912 * d30v.h (SHORT_A2): New form.
913
914 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
915 registers are used. Needed for VLIW optimization.
916
917Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
918
919 * cgen.h: Move assembler interface section
920 up so cgen_parse_operand_result is defined for cgen_parse_address.
921 (cgen_parse_address): Update prototype.
922
923Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
924
925 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
926
927Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
928
929 * i386.h (two_byte_segment_defaults): Correct base register 5 in
930 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
931 <paubert@iram.es>.
932
933 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
934 <paubert@iram.es>.
935
936 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
937 <paubert@iram.es>.
938
939 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
940 (JUMP_ON_ECX_ZERO): Remove commented out macro.
941
942Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
943
944 * v850.h (V850_NOT_R0): New flag.
945
946Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
947
948 * v850.h (struct v850_opcode): Remove flags field.
949
950Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
951
952 * v850.h (struct v850_opcode): Add flags field.
953 (struct v850_operand): Extend meaning of 'bits' and 'shift'
954 fields.
955 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
956 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
957
958Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
959
960 * arc.h: New file.
961
962Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
963
964 * sparc.h (sparc_opcodes): Declare as const.
965
966Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
967
968 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
969 uses single or double precision floating point resources.
970 (INSN_NO_ISA, INSN_ISA1): Define.
971 (cpu specific INSN macros): Tweak into bitmasks outside the range
972 of INSN_ISA field.
973
974Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
975
976 * i386.h: Fix pand opcode.
977
978Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
979
980 * mips.h: Widen INSN_ISA and move it to a more convenient
981 bit position. Add INSN_3900.
982
983Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
984
985 * mips.h (struct mips_opcode): added new field membership.
986
987Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
988
989 * i386.h (movd): only Reg32 is allowed.
990
991 * i386.h: add fcomp and ud2. From Wayne Scott
992 <wscott@ichips.intel.com>.
993
994Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
995
996 * i386.h: Add MMX instructions.
997
998Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
999
1000 * i386.h: Remove W modifier from conditional move instructions.
1001
1002Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1003
1004 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1005 with no arguments to match that generated by the UnixWare
1006 assembler.
1007
1008Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1009
1010 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1011 (cgen_parse_operand_fn): Declare.
1012 (cgen_init_parse_operand): Declare.
1013 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1014 new argument `want'.
1015 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1016 (enum cgen_parse_operand_type): New enum.
1017
1018Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1019
1020 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1021
1022Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1023
1024 * cgen.h: New file.
1025
1026Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1027
1028 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1029 fdivrp.
1030
1031Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1032
1033 * v850.h (extract): Make unsigned.
1034
1035Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1036
1037 * i386.h: Add iclr.
1038
1039Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1040
1041 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1042 take a direction bit.
1043
1044Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1045
1046 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1047
1048Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1049
1050 * sparc.h: Include <ansidecl.h>. Update function declarations to
1051 use prototypes, and to use const when appropriate.
1052
1053Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1054
1055 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1056
1057Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1058
1059 * d10v.h: Change pre_defined_registers to
1060 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1061
1062Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1063
1064 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1065 Change mips_opcodes from const array to a pointer,
1066 and change bfd_mips_num_opcodes from const int to int,
1067 so that we can increase the size of the mips opcodes table
1068 dynamically.
1069
1070Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1071
1072 * d30v.h (FLAG_X): Remove unused flag.
1073
1074Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1075
1076 * d30v.h: New file.
1077
1078Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1079
1080 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1081 (PDS_VALUE): Macro to access value field of predefined symbols.
1082 (tic80_next_predefined_symbol): Add prototype.
1083
1084Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1085
1086 * tic80.h (tic80_symbol_to_value): Change prototype to match
1087 change in function, added class parameter.
1088
1089Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1090
1091 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1092 endmask fields, which are somewhat weird in that 0 and 32 are
1093 treated exactly the same.
1094
1095Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1096
1097 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1098 rather than a constant that is 2**X. Reorder them to put bits for
1099 operands that have symbolic names in the upper bits, so they can
1100 be packed into an int where the lower bits contain the value that
1101 corresponds to that symbolic name.
1102 (predefined_symbo): Add struct.
1103 (tic80_predefined_symbols): Declare array of translations.
1104 (tic80_num_predefined_symbols): Declare size of that array.
1105 (tic80_value_to_symbol): Declare function.
1106 (tic80_symbol_to_value): Declare function.
1107
1108Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1109
1110 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1111
1112Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1113
1114 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1115 be the destination register.
1116
1117Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1118
1119 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1120 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1121 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1122 that the opcode can have two vector instructions in a single
1123 32 bit word and we have to encode/decode both.
1124
1125Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1126
1127 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1128 TIC80_OPERAND_RELATIVE for PC relative.
1129 (TIC80_OPERAND_BASEREL): New flag bit for register
1130 base relative.
1131
1132Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1133
1134 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1135
1136Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1137
1138 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1139 ":s" modifier for scaling.
1140
1141Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1142
1143 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1144 (TIC80_OPERAND_M_LI): Ditto
1145
1146Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1147
1148 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1149 (TIC80_OPERAND_CC): New define for condition code operand.
1150 (TIC80_OPERAND_CR): New define for control register operand.
1151
1152Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1153
1154 * tic80.h (struct tic80_opcode): Name changed.
1155 (struct tic80_opcode): Remove format field.
1156 (struct tic80_operand): Add insertion and extraction functions.
1157 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1158 correct ones.
1159 (FMT_*): Ditto.
1160
1161Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1162
1163 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1164 type IV instruction offsets.
1165
1166Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1167
1168 * tic80.h: New file.
1169
1170Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1171
1172 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1173
1174Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1175
1176 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1177 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1178 * v850.h: Fix comment, v850_operand not powerpc_operand.
1179
1180Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1181
1182 * mn10200.h: Flesh out structures and definitions needed by
1183 the mn10200 assembler & disassembler.
1184
1185Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1186
1187 * mips.h: Add mips16 definitions.
1188
1189Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1190
1191 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1192
1193Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1194
1195 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1196 (MN10300_OPERAND_MEMADDR): Define.
1197
1198Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1199
1200 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1201
1202Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1203
1204 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1205
1206Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1207
1208 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1209
1210Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1211
1212 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1213
1214Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1215
1216 * alpha.h: Don't include "bfd.h"; private relocation types are now
1217 negative to minimize problems with shared libraries. Organize
1218 instruction subsets by AMASK extensions and PALcode
1219 implementation.
1220 (struct alpha_operand): Move flags slot for better packing.
1221
1222Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1223
1224 * v850.h (V850_OPERAND_RELAX): New operand flag.
1225
1226Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1227
1228 * mn10300.h (FMT_*): Move operand format definitions
1229 here.
1230
1231Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1232
1233 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1234
1235Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1236
1237 * mn10300.h (mn10300_opcode): Add "format" field.
1238 (MN10300_OPERAND_*): Define.
1239
1240Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1241
1242 * mn10x00.h: Delete.
1243 * mn10200.h, mn10300.h: New files.
1244
1245Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1246
1247 * mn10x00.h: New file.
1248
1249Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1250
1251 * v850.h: Add new flag to indicate this instruction uses a PC
1252 displacement.
1253
1254Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1255
1256 * h8300.h (stmac): Add missing instruction.
1257
1258Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1259
1260 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1261 field.
1262
1263Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1264
1265 * v850.h (V850_OPERAND_EP): Define.
1266
1267 * v850.h (v850_opcode): Add size field.
1268
1269Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1270
1271 * v850.h (v850_operands): Add insert and extract fields, pointers
1272 to functions used to handle unusual operand encoding.
1273 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1274 V850_OPERAND_SIGNED): Defined.
1275
1276Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1277
1278 * v850.h (v850_operands): Add flags field.
1279 (OPERAND_REG, OPERAND_NUM): Defined.
1280
1281Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1282
1283 * v850.h: New file.
1284
1285Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1286
1287 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1288 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1289 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1290 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1291 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1292 Defined.
1293
1294Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1295
1296 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1297 a 3 bit space id instead of a 2 bit space id.
1298
1299Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1300
1301 * d10v.h: Add some additional defines to support the
1302 assembler in determining which operations can be done in parallel.
1303
1304Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1305
1306 * h8300.h (SN): Define.
1307 (eepmov.b): Renamed from "eepmov"
1308 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1309 with them.
1310
1311Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1312
1313 * d10v.h (OPERAND_SHIFT): New operand flag.
1314
1315Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1316
1317 * d10v.h: Changes for divs, parallel-only instructions, and
1318 signed numbers.
1319
1320Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1321
1322 * d10v.h (pd_reg): Define. Putting the definition here allows
1323 the assembler and disassembler to share the same struct.
1324
1325Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1326
1327 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1328 Williams <steve@icarus.com>.
1329
1330Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1331
1332 * d10v.h: New file.
1333
1334Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1335
1336 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1337
1338Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1339
1340 * m68k.h (mcf5200): New macro.
1341 Document names of coldfire control registers.
1342
1343Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1344
1345 * h8300.h (SRC_IN_DST): Define.
1346
1347 * h8300.h (UNOP3): Mark the register operand in this insn
1348 as a source operand, not a destination operand.
1349 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1350 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1351 register operand with SRC_IN_DST.
1352
1353Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1354
1355 * alpha.h: New file.
1356
1357Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1358
1359 * rs6k.h: Remove obsolete file.
1360
1361Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1362
1363 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1364 fdivp, and fdivrp. Add ffreep.
1365
1366Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1367
1368 * h8300.h: Reorder various #defines for readability.
1369 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1370 (BITOP): Accept additional (unused) argument. All callers changed.
1371 (EBITOP): Likewise.
1372 (O_LAST): Bump.
1373 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1374
1375 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1376 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1377 (BITOP, EBITOP): Handle new H8/S addressing modes for
1378 bit insns.
1379 (UNOP3): Handle new shift/rotate insns on the H8/S.
1380 (insns using exr): New instructions.
1381 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1382
1383Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1384
1385 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1386 was incorrect.
1387
1388Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1389
1390 * h8300.h (START): Remove.
1391 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1392 and mov.l insns that can be relaxed.
1393
1394Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1395
1396 * i386.h: Remove Abs32 from lcall.
1397
1398Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1399
1400 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1401 (SLCPOP): New macro.
1402 Mark X,Y opcode letters as in use.
1403
1404Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1405
1406 * sparc.h (F_FLOAT, F_FBR): Define.
1407
1408Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1409
1410 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1411 from all insns.
1412 (ABS8SRC,ABS8DST): Add ABS8MEM.
1413 (add.l): Fix reg+reg variant.
1414 (eepmov.w): Renamed from eepmovw.
1415 (ldc,stc): Fix many cases.
1416
1417Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1418
1419 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1420
1421Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1422
1423 * sparc.h (O): Mark operand letter as in use.
1424
1425Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1426
1427 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1428 Mark operand letters uU as in use.
1429
1430Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1431
1432 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1433 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1434 (SPARC_OPCODE_SUPPORTED): New macro.
1435 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1436 (F_NOTV9): Delete.
1437
1438Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1439
1440 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1441 declaration consistent with return type in definition.
1442
1443Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1444
1445 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1446
1447Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1448
1449 * i386.h (i386_regtab): Add 80486 test registers.
1450
1451Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1452
1453 * i960.h (I_HX): Define.
1454 (i960_opcodes): Add HX instruction.
1455
1456Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1457
1458 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1459 and fclex.
1460
1461Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1462
1463 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1464 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1465 (bfd_* defines): Delete.
1466 (sparc_opcode_archs): Replaces architecture_pname.
1467 (sparc_opcode_lookup_arch): Declare.
1468 (NUMOPCODES): Delete.
1469
1470Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1471
1472 * sparc.h (enum sparc_architecture): Add v9a.
1473 (ARCHITECTURES_CONFLICT_P): Update.
1474
1475Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1476
1477 * i386.h: Added Pentium Pro instructions.
1478
1479Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1480
1481 * m68k.h: Document new 'W' operand place.
1482
1483Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1484
1485 * hppa.h: Add lci and syncdma instructions.
1486
1487Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1488
1489 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1490 instructions.
1491
1492Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1493
1494 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1495 assembler's -mcom and -many switches.
1496
1497Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1498
1499 * i386.h: Fix cmpxchg8b extension opcode description.
1500
1501Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1502
1503 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1504 and register cr4.
1505
1506Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1507
1508 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1509
1510Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1511
1512 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1513
1514Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1515
1516 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1517
1518Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1519
1520 * m68kmri.h: Remove.
1521
1522 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1523 declarations. Remove F_ALIAS and flag field of struct
1524 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1525 int. Make name and args fields of struct m68k_opcode const.
1526
1527Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1528
1529 * sparc.h (F_NOTV9): Define.
1530
1531Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1532
1533 * mips.h (INSN_4010): Define.
1534
1535Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1536
1537 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1538
1539 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1540 * m68k.h: Fix argument descriptions of coprocessor
1541 instructions to allow only alterable operands where appropriate.
1542 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1543 (m68k_opcode_aliases): Add more aliases.
1544
1545Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1546
1547 * m68k.h: Added explcitly short-sized conditional branches, and a
1548 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1549 svr4-based configurations.
1550
1551Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1552
1553 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1554 * i386.h: added missing Data16/Data32 flags to a few instructions.
1555
1556Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1557
1558 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1559 (OP_MASK_BCC, OP_SH_BCC): Define.
1560 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1561 (OP_MASK_CCC, OP_SH_CCC): Define.
1562 (INSN_READ_FPR_R): Define.
1563 (INSN_RFE): Delete.
1564
1565Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1566
1567 * m68k.h (enum m68k_architecture): Deleted.
1568 (struct m68k_opcode_alias): New type.
1569 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1570 matching constraints, values and flags. As a side effect of this,
1571 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1572 as I know were never used, now may need re-examining.
1573 (numopcodes): Now const.
1574 (m68k_opcode_aliases, numaliases): New variables.
1575 (endop): Deleted.
1576 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1577 m68k_opcode_aliases; update declaration of m68k_opcodes.
1578
1579Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1580
1581 * hppa.h (delay_type): Delete unused enumeration.
1582 (pa_opcode): Replace unused delayed field with an architecture
1583 field.
1584 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1585
1586Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1587
1588 * mips.h (INSN_ISA4): Define.
1589
1590Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1591
1592 * mips.h (M_DLA_AB, M_DLI): Define.
1593
1594Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1595
1596 * hppa.h (fstwx): Fix single-bit error.
1597
1598Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1599
1600 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1601
1602Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1603
1604 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1605 debug registers. From Charles Hannum (mycroft@netbsd.org).
1606
1607Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1608
1609 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1610 i386 support:
1611 * i386.h (MOV_AX_DISP32): New macro.
1612 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1613 of several call/return instructions.
1614 (ADDR_PREFIX_OPCODE): New macro.
1615
1616Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1617
1618 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1619
1620 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1621 it pointer to const char;
1622 (struct vot, field `name'): ditto.
1623
1624Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1625
1626 * vax.h: Supply and properly group all values in end sentinel.
1627
1628Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1629
1630 * mips.h (INSN_ISA, INSN_4650): Define.
1631
1632Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1633
1634 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1635 systems with a separate instruction and data cache, such as the
1636 29040, these instructions take an optional argument.
1637
1638Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1639
1640 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1641 INSN_TRAP.
1642
1643Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1644
1645 * mips.h (INSN_STORE_MEMORY): Define.
1646
1647Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1648
1649 * sparc.h: Document new operand type 'x'.
1650
1651Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1652
1653 * i960.h (I_CX2): New instruction category. It includes
1654 instructions available on Cx and Jx processors.
1655 (I_JX): New instruction category, for JX-only instructions.
1656 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1657 Jx-only instructions, in I_JX category.
1658
1659Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1660
1661 * ns32k.h (endop): Made pointer const too.
1662
1663Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1664
1665 * ns32k.h: Drop Q operand type as there is no correct use
1666 for it. Add I and Z operand types which allow better checking.
1667
1668Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1669
1670 * h8300.h (xor.l) :fix bit pattern.
1671 (L_2): New size of operand.
1672 (trapa): Use it.
1673
1674Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1675
1676 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1677
1678Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1679
1680 * sparc.h: Include v9 definitions.
1681
1682Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1683
1684 * m68k.h (m68060): Defined.
1685 (m68040up, mfloat, mmmu): Include it.
1686 (struct m68k_opcode): Widen `arch' field.
1687 (m68k_opcodes): Updated for M68060. Removed comments that were
1688 instructions commented out by "JF" years ago.
1689
1690Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1691
1692 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1693 add a one-bit `flags' field.
1694 (F_ALIAS): New macro.
1695
1696Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1697
1698 * h8300.h (dec, inc): Get encoding right.
1699
1700Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1701
1702 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1703 a flag instead.
1704 (PPC_OPERAND_SIGNED): Define.
1705 (PPC_OPERAND_SIGNOPT): Define.
1706
1707Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1708
1709 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1710 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1711
1712Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1713
1714 * i386.h: Reverse last change. It'll be handled in gas instead.
1715
1716Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1717
1718 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1719 slower on the 486 and used the implicit shift count despite the
1720 explicit operand. The one-operand form is still available to get
1721 the shorter form with the implicit shift count.
1722
1723Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1724
1725 * hppa.h: Fix typo in fstws arg string.
1726
1727Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1728
1729 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1730
1731Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1732
1733 * ppc.h (PPC_OPCODE_601): Define.
1734
1735Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1736
1737 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1738 (so we can determine valid completers for both addb and addb[tf].)
1739
1740 * hppa.h (xmpyu): No floating point format specifier for the
1741 xmpyu instruction.
1742
1743Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1744
1745 * ppc.h (PPC_OPERAND_NEXT): Define.
1746 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1747 (struct powerpc_macro): Define.
1748 (powerpc_macros, powerpc_num_macros): Declare.
1749
1750Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1751
1752 * ppc.h: New file. Header file for PowerPC opcode table.
1753
1754Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1755
1756 * hppa.h: More minor template fixes for sfu and copr (to allow
1757 for easier disassembly).
1758
1759 * hppa.h: Fix templates for all the sfu and copr instructions.
1760
1761Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1762
1763 * i386.h (push): Permit Imm16 operand too.
1764
1765Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1766
1767 * h8300.h (andc): Exists in base arch.
1768
1769Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1770
1771 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1772 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1773
1774Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1775
1776 * hppa.h: Add FP quadword store instructions.
1777
1778Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1779
1780 * mips.h: (M_J_A): Added.
1781 (M_LA): Removed.
1782
1783Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1784
1785 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1786 <mellon@pepper.ncd.com>.
1787
1788Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1789
1790 * hppa.h: Immediate field in probei instructions is unsigned,
1791 not low-sign extended.
1792
1793Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1794
1795 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1796
1797Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1798
1799 * i386.h: Add "fxch" without operand.
1800
1801Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1802
1803 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1804
1805Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1806
1807 * hppa.h: Add gfw and gfr to the opcode table.
1808
1809Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1810
1811 * m88k.h: extended to handle m88110.
1812
1813Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1814
1815 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1816 addresses.
1817
1818Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1819
1820 * i960.h (i960_opcodes): Properly bracket initializers.
1821
1822Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1823
1824 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1825
1826Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1827
1828 * m68k.h (two): Protect second argument with parentheses.
1829
1830Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1831
1832 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1833 Deleted old in/out instructions in "#if 0" section.
1834
1835Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1836
1837 * i386.h (i386_optab): Properly bracket initializers.
1838
1839Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1840
1841 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1842 Jeff Law, law@cs.utah.edu).
1843
1844Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1845
1846 * i386.h (lcall): Accept Imm32 operand also.
1847
1848Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1849
1850 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1851 (M_DABS): Added.
1852
1853Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1854
1855 * mips.h (INSN_*): Changed values. Removed unused definitions.
1856 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1857 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1858 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1859 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1860 (M_*): Added new values for r6000 and r4000 macros.
1861 (ANY_DELAY): Removed.
1862
1863Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1864
1865 * mips.h: Added M_LI_S and M_LI_SS.
1866
1867Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1868
1869 * h8300.h: Get some rare mov.bs correct.
1870
1871Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1872
1873 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1874 been included.
1875
1876Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1877
1878 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1879 jump instructions, for use in disassemblers.
1880
1881Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1882
1883 * m88k.h: Make bitfields just unsigned, not unsigned long or
1884 unsigned short.
1885
1886Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1887
1888 * hppa.h: New argument type 'y'. Use in various float instructions.
1889
1890Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1891
1892 * hppa.h (break): First immediate field is unsigned.
1893
1894 * hppa.h: Add rfir instruction.
1895
1896Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1897
1898 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1899
1900Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1901
1902 * mips.h: Reworked the hazard information somewhat, and fixed some
1903 bugs in the instruction hazard descriptions.
1904
1905Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1906
1907 * m88k.h: Corrected a couple of opcodes.
1908
1909Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1910
1911 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1912 new version includes instruction hazard information, but is
1913 otherwise reasonably similar.
1914
1915Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1916
1917 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1918
1919Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1920
1921 Patches from Jeff Law, law@cs.utah.edu:
1922 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1923 Make the tables be the same for the following instructions:
1924 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1925 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1926 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1927 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1928 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1929 "fcmp", and "ftest".
1930
1931 * hppa.h: Make new and old tables the same for "break", "mtctl",
1932 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1933 Fix typo in last patch. Collapse several #ifdefs into a
1934 single #ifdef.
1935
1936 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1937 of the comments up-to-date.
1938
1939 * hppa.h: Update "free list" of letters and update
1940 comments describing each letter's function.
1941
1942Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1943
1944 * h8300.h: checkpoint, includes H8/300-H opcodes.
1945
1946Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1947
1948 * Patches from Jeffrey Law <law@cs.utah.edu>.
1949 * hppa.h: Rework single precision FP
1950 instructions so that they correctly disassemble code
1951 PA1.1 code.
1952
1953Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1954
1955 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1956 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1957
1958Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1959
1960 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1961 gdb will define it for now.
1962
1963Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1964
1965 * sparc.h: Don't end enumerator list with comma.
1966
1967Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1968
1969 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1970 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1971 ("bc2t"): Correct typo.
1972 ("[ls]wc[023]"): Use T rather than t.
1973 ("c[0123]"): Define general coprocessor instructions.
1974
1975Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1976
1977 * m68k.h: Move split point for gcc compilation more towards
1978 middle.
1979
1980Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1981
1982 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1983 simply wrong, ics, rfi, & rfsvc were missing).
1984 Add "a" to opr_ext for "bb". Doc fix.
1985
1986Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1987
1988 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1989 * mips.h: Add casts, to suppress warnings about shifting too much.
1990 * m68k.h: Document the placement code '9'.
1991
1992Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1993
1994 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1995 allows callers to break up the large initialized struct full of
1996 opcodes into two half-sized ones. This permits GCC to compile
1997 this module, since it takes exponential space for initializers.
1998 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1999
2000Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2001
2002 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2003 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2004 initialized structs in it.
2005
2006Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2007
2008 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2009 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2010 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2011
2012Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2013
2014 * mips.h: document "i" and "j" operands correctly.
2015
2016Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2017
2018 * mips.h: Removed endianness dependency.
2019
2020Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2021
2022 * h8300.h: include info on number of cycles per instruction.
2023
2024Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2025
2026 * hppa.h: Move handy aliases to the front. Fix masks for extract
2027 and deposit instructions.
2028
2029Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2030
2031 * i386.h: accept shld and shrd both with and without the shift
2032 count argument, which is always %cl.
2033
2034Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2035
2036 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2037 (one_byte_segment_defaults, two_byte_segment_defaults,
2038 i386_prefixtab_end): Ditto.
2039
2040Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2041
2042 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2043 for operand 2; from John Carr, jfc@dsg.dec.com.
2044
2045Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2046
2047 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2048 always use 16-bit offsets. Makes calculated-size jump tables
2049 feasible.
2050
2051Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2052
2053 * i386.h: Fix one-operand forms of in* and out* patterns.
2054
2055Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2056
2057 * m68k.h: Added CPU32 support.
2058
2059Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2060
2061 * mips.h (break): Disassemble the argument. Patch from
2062 jonathan@cs.stanford.edu (Jonathan Stone).
2063
2064Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2065
2066 * m68k.h: merged Motorola and MIT syntax.
2067
2068Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2069
2070 * m68k.h (pmove): make the tests less strict, the 68k book is
2071 wrong.
2072
2073Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2074
2075 * m68k.h (m68ec030): Defined as alias for 68030.
2076 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2077 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2078 them. Tightened description of "fmovex" to distinguish it from
2079 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2080 up descriptions that claimed versions were available for chips not
2081 supporting them. Added "pmovefd".
2082
2083Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2084
2085 * m68k.h: fix where the . goes in divull
2086
2087Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2088
2089 * m68k.h: the cas2 instruction is supposed to be written with
2090 indirection on the last two operands, which can be either data or
2091 address registers. Added a new operand type 'r' which accepts
2092 either register type. Added new cases for cas2l and cas2w which
2093 use them. Corrected masks for cas2 which failed to recognize use
2094 of address register.
2095
2096Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2097
2098 * m68k.h: Merged in patches (mostly m68040-specific) from
2099 Colin Smith <colin@wrs.com>.
2100
2101 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2102 base). Also cleaned up duplicates, re-ordered instructions for
2103 the sake of dis-assembling (so aliases come after standard names).
2104 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2105
2106Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2107
2108 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2109 all missing .s
2110
2111Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2112
2113 * sparc.h: Moved tables to BFD library.
2114
2115 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2116
2117Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2118
2119 * h8300.h: Finish filling in all the holes in the opcode table,
2120 so that the Lucid C compiler can digest this as well...
2121
2122Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2123
2124 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2125 Fix opcodes on various sizes of fild/fist instructions
2126 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2127 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2128
2129Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2130
2131 * h8300.h: Fill in all the holes in the opcode table so that the
2132 losing HPUX C compiler can digest this...
2133
2134Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2135
2136 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2137 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2138
2139Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2140
2141 * sparc.h: Add new architecture variant sparclite; add its scan
2142 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2143
2144Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2145
2146 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2147 fy@lucid.com).
2148
2149Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2150
2151 * rs6k.h: New version from IBM (Metin).
2152
2153Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2154
2155 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2156 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2157
2158Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2159
2160 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2161
2162Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2163
2164 * m68k.h (one, two): Cast macro args to unsigned to suppress
2165 complaints from compiler and lint about integer overflow during
2166 shift.
2167
2168Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2169
2170 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2171
2172Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2173
2174 * mips.h: Make bitfield layout depend on the HOST compiler,
2175 not on the TARGET system.
2176
2177Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2178
2179 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2180 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2181 <TRANLE@INTELLICORP.COM>.
2182
2183Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2184
2185 * h8300.h: turned op_type enum into #define list
2186
2187Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2188
2189 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2190 similar instructions -- they've been renamed to "fitoq", etc.
2191 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2192 number of arguments.
2193 * h8300.h: Remove extra ; which produces compiler warning.
2194
2195Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2196
2197 * sparc.h: fix opcode for tsubcctv.
2198
2199Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2200
2201 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2202
2203Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2204
2205 * sparc.h (nop): Made the 'lose' field be even tighter,
2206 so only a standard 'nop' is disassembled as a nop.
2207
2208Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2209
2210 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2211 disassembled as a nop.
2212
2213Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2214
2215 * sparc.h: fix a typo.
2216
2217Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2218
2219 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2220 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2221 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2222
2223\f
2224Local Variables:
2225version-control: never
2226End:
GDB Binutils - Deliverables
This page took 0.136546 seconds and 4 git commands to generate.