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Fix tic54x testsuite failures and Lmem disassembly bugs.
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
6e917903
TW		 12001-11-11 Timothy Wall <twall@alum.mit.edu>
2
3 * tic54x.h: Revise opcode layout; don't really need a separate
4 structure for parallel opcodes.
5
e5470cdc
AM		 62001-11-13 Zack Weinberg <zack@codesourcery.com>
7 Alan Modra <amodra@bigpond.net.au>
8
9 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
10 accept WordReg.
11
5d84d93f
CD		 122001-11-04 Chris Demetriou <cgd@broadcom.com>
13
14 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
15
3c3bdf30
NC		 162001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
17
18 * mmix.h: New file.
19
e4432525
CD		 202001-10-18 Chris Demetriou <cgd@broadcom.com>
21
22 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
23 of the expression, to make source code merging easier.
24
8ff529d8
CD		 252001-10-17 Chris Demetriou <cgd@broadcom.com>
26
27 * mips.h: Sort coprocessor instruction argument characters
28 in comment, add a few more words of description for "H".
29
2228315b
CD		 302001-10-17 Chris Demetriou <cgd@broadcom.com>
31
32 * mips.h (INSN_SB1): New cpu-specific instruction bit.
33 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
34 if cpu is CPU_SB1.
35
f5c120c5
MG		 362001-10-17 matthew green <mrg@redhat.com>
37
38 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
39
418c1742
MG		 402001-10-12 matthew green <mrg@redhat.com>
41
0716ce0d
MG		 42 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
43 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
44 instructions, respectively.
418c1742 45
6ff2f2ba
NC		 462001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
47
48 * v850.h: Remove spurious comment.
49
015cf428
NC		 502001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
51
52 * h8300.h: Fix compile time warning messages
53
847b8b31
RH		 542001-09-04 Richard Henderson <rth@redhat.com>
55
56 * alpha.h (struct alpha_operand): Pack elements into bitfields.
57
a98b9439
EC		 582001-08-31 Eric Christopher <echristo@redhat.com>
59
60 * mips.h: Remove CPU_MIPS32_4K.
61
a6959011
AM		 622001-08-27 Torbjorn Granlund <tege@swox.com>
63
64 * ppc.h (PPC_OPERAND_DS): Define.
65
d83c6548
AJ		 662001-08-25 Andreas Jaeger <aj@suse.de>
67
68 * d30v.h: Fix declaration of reg_name_cnt.
69
70 * d10v.h: Fix declaration of d10v_reg_name_cnt.
71
72 * arc.h: Add prototypes from opcodes/arc-opc.c.
73
99c14723
TS		 742001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
75
76 * mips.h (INSN_10000): Define.
77 (OPCODE_IS_MEMBER): Check for INSN_10000.
78
11b37b7b
AM		 792001-08-10 Alan Modra <amodra@one.net.au>
80
81 * ppc.h: Revert 2001-08-08.
82
0f1bac05
AM		 832001-08-08 Alan Modra <amodra@one.net.au>
84
85 1999-10-25 Torbjorn Granlund <tege@swox.com>
86 * ppc.h (struct powerpc_operand): New field `reloc'.
87
81f6038f
FCE		 882001-07-11 Frank Ch. Eigler <fche@redhat.com>
89
90 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
91 (cgen_cpu_desc): Ditto.
92
32cfffe3
BE		 932001-07-07 Ben Elliston <bje@redhat.com>
94
95 * m88k.h: Clean up and reformat. Remove unused code.
96
3e890047
GK		 972001-06-14 Geoffrey Keating <geoffk@redhat.com>
98
99 * cgen.h (cgen_keyword): Add nonalpha_chars field.
100
d1cf510e
NC		 1012001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
102
103 * mips.h (CPU_R12000): Define.
104
e281c457
JH		 1052001-05-23 John Healy <jhealy@redhat.com>
106
107 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 108
aa5f19f2
NC		 1092001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
110
111 * mips.h (INSN_ISA_MASK): Define.
112
67d6227d
AM		 1132001-05-12 Alan Modra <amodra@one.net.au>
114
115 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
116 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
117 and use InvMem as these insns must have register operands.
118
992aaec9
AM		 1192001-05-04 Alan Modra <amodra@one.net.au>
120
121 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
122 and pextrw to swap reg/rm assignments.
123
4ef7f0bf
HPN		 1242001-04-05 Hans-Peter Nilsson <hp@axis.com>
125
126 * cris.h (enum cris_insn_version_usage): Correct comment for
127 cris_ver_v3p.
128
0f17484f
AM		 1292001-03-24 Alan Modra <alan@linuxcare.com.au>
130
131 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
132 Add InvMem to first operand of "maskmovdqu".
133
7ccb5238
HPN		 1342001-03-22 Hans-Peter Nilsson <hp@axis.com>
135
136 * cris.h (ADD_PC_INCR_OPCODE): New macro.
137
361bfa20
KH		 1382001-03-21 Kazu Hirata <kazu@hxi.com>
139
140 * h8300.h: Fix formatting.
141
87890af0
AM		 1422001-03-22 Alan Modra <alan@linuxcare.com.au>
143
144 * i386.h (i386_optab): Add paddq, psubq.
145
2e98d2de
AM		 1462001-03-19 Alan Modra <alan@linuxcare.com.au>
147
148 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
149
80a523c2
NC		 1502001-02-28 Igor Shevlyakov <igor@windriver.com>
151
152 * m68k.h: new defines for Coldfire V4. Update mcf to know
153 about mcf5407.
154
e135f41b
NC		 1552001-02-18 lars brinkhoff <lars@nocrew.org>
156
157 * pdp11.h: New file.
158
1592001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH		 160
161 * i386.h (i386_optab): SSE integer converison instructions have
162 64bit versions on x86-64.
163
8eaec934
NC		 1642001-02-10 Nick Clifton <nickc@redhat.com>
165
166 * mips.h: Remove extraneous whitespace. Formating change to allow
167 for future contribution.
168
a85d7ed0
NC		 1692001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
170
171 * s390.h: New file.
172
0715dc88
PM		 1732001-02-02 Patrick Macdonald <patrickm@redhat.com>
174
175 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
176 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
177 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
178
296bc568
AM		 1792001-01-24 Karsten Keil <kkeil@suse.de>
180
181 * i386.h (i386_optab): Fix swapgs
182
1328dc98
AM		 1832001-01-14 Alan Modra <alan@linuxcare.com.au>
184
185 * hppa.h: Describe new '<' and '>' operand types, and tidy
186 existing comments.
187 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
188 Remove duplicate "ldw j(s,b),x". Sort some entries.
189
e135f41b 1902001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH		 191
192 * i386.h (i386_optab): Fix pusha and ret templates.
193
0d2bcfaf
NC		 1942001-01-11 Peter Targett <peter.targett@arccores.com>
195
196 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
197 definitions for masking cpu type.
198 (arc_ext_operand_value) New structure for storing extended
199 operands.
200 (ARC_OPERAND_*) Flags for operand values.
201
2022001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH		 203
204 * i386.h (pinsrw): Add.
205 (pshufw): Remove.
206 (cvttpd2dq): Fix operands.
207 (cvttps2dq): Likewise.
208 (movq2q): Rename to movdq2q.
209
079966a8
AM		 2102001-01-10 Richard Schaal <richard.schaal@intel.com>
211
212 * i386.h: Correct movnti instruction.
213
8c1f9e76
JJ		 2142001-01-09 Jeff Johnston <jjohnstn@redhat.com>
215
216 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
217 of operands (unsigned char or unsigned short).
218 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
219 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
220
0d2bcfaf 2212001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH		 222
223 * i386.h (i386_optab): Make [sml]fence template to use immext field.
224
0d2bcfaf 2252001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH		 226
227 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
228 introduced by Pentium4
229
0d2bcfaf 2302000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH		 231
232 * i386.h (i386_optab): Add "rex*" instructions;
233 add swapgs; disable jmp/call far direct instructions for
234 64bit mode; add syscall and sysret; disable registers for 0xc6
235 template. Add 'q' suffixes to extendable instructions, disable
079966a8 236 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH		 237 (i386_regtab): Add extended registers.
238 (*Suf): Add No_qSuf.
239 (q_Suf, wlq_Suf, bwlq_Suf): New.
240
0d2bcfaf 2412000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH		 242
243 * i386.h (i386_optab): Replace "Imm" with "EncImm".
244 (i386_regtab): Add flags field.
d83c6548 245
bf40d919
NC		 2462000-12-12 Nick Clifton <nickc@redhat.com>
247
248 * mips.h: Fix formatting.
249
4372b673
NC		 2502000-12-01 Chris Demetriou <cgd@sibyte.com>
251
252 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
253 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
254 OP_*_SYSCALL definitions.
255 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
256 19 bit wait codes.
257 (MIPS operand specifier comments): Remove 'm', add 'U' and
258 'J', and update the meaning of 'B' so that it's more general.
259
e7af610e
NC		 260 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
261 INSN_ISA5): Renumber, redefine to mean the ISA at which the
262 instruction was added.
263 (INSN_ISA32): New constant.
264 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
265 Renumber to avoid new and/or renumbered INSN_* constants.
266 (INSN_MIPS32): Delete.
267 (ISA_UNKNOWN): New constant to indicate unknown ISA.
268 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
269 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 270 constants available at that ISA level.
e7af610e
NC		 271 (CPU_UNKNOWN): New constant to indicate unknown CPU.
272 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
273 define it with a unique value.
274 (OPCODE_IS_MEMBER): Update for new ISA membership-related
275 constant meanings.
276
84ea6cf2 277 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 278 definitions.
84ea6cf2 279
c6c98b38
NC		 280 * mips.h (CPU_SB1): New constant.
281
19f7b010
JJ		 2822000-10-20 Jakub Jelinek <jakub@redhat.com>
283
284 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
285 Note that '3' is used for siam operand.
286
139368c9
JW		 2872000-09-22 Jim Wilson <wilson@cygnus.com>
288
289 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
290
156c2f8b 2912000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 292
156c2f8b
NC		 293 * mips.h: Use defines instead of hard-coded processor numbers.
294 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 295 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC		 296 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
297 CPU_4KC, CPU_4KM, CPU_4KP): Define..
298 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 299 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 300 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ		 301 Add 'P' to used characters.
302 Use 'H' for coprocessor select field.
156c2f8b 303 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ		 304 Document new arg characters and add to used characters.
305 (INSN_MIPS32): New define for MIPS32 extensions.
306 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 307
3c5ce02e
AM		 3082000-09-05 Alan Modra <alan@linuxcare.com.au>
309
310 * hppa.h: Mention cz completer.
311
50b81f19
JW		 3122000-08-16 Jim Wilson <wilson@cygnus.com>
313
314 * ia64.h (IA64_OPCODE_POSTINC): New.
315
fc29466d
L		 3162000-08-15 H.J. Lu <hjl@gnu.org>
317
318 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
319 IgnoreSize change.
320
4f1d9bd8
NC		 3212000-08-08 Jason Eckhardt <jle@cygnus.com>
322
323 * i860.h: Small formatting adjustments.
324
45ee1401
DC		 3252000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
326
327 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
328 Move related opcodes closer to each other.
329 Minor changes in comments, list undefined opcodes.
330
9d551405
DB		 3312000-07-26 Dave Brolley <brolley@redhat.com>
332
333 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
334
4f1d9bd8
NC		 3352000-07-22 Jason Eckhardt <jle@cygnus.com>
336
337 * i860.h (btne, bte, bla): Changed these opcodes
338 to use sbroff ('r') instead of split16 ('s').
339 (J, K, L, M): New operand types for 16-bit aligned fields.
340 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
341 use I, J, K, L, M instead of just I.
342 (T, U): New operand types for split 16-bit aligned fields.
343 (st.x): Changed these opcodes to use S, T, U instead of just S.
344 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
345 exist on the i860.
346 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
347 (pfeq.ss, pfeq.dd): New opcodes.
348 (st.s): Fixed incorrect mask bits.
349 (fmlow): Fixed incorrect mask bits.
350 (fzchkl, pfzchkl): Fixed incorrect mask bits.
351 (faddz, pfaddz): Fixed incorrect mask bits.
352 (form, pform): Fixed incorrect mask bits.
353 (pfld.l): Fixed incorrect mask bits.
354 (fst.q): Fixed incorrect mask bits.
355 (all floating point opcodes): Fixed incorrect mask bits for
356 handling of dual bit.
357
c8488617
HPN		 3582000-07-20 Hans-Peter Nilsson <hp@axis.com>
359
360 cris.h: New file.
361
65aa24b6
NC		 3622000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
363
364 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
365 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
366 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
367 (AVR_ISA_M83): Define for ATmega83, ATmega85.
368 (espm): Remove, because ESPM removed in databook update.
369 (eicall, eijmp): Move to the end of opcode table.
370
60bcf0fa
NC		 3712000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
372
373 * m68hc11.h: New file for support of Motorola 68hc11.
374
60a2978a
DC		 375Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
376
377 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
378
68ab2dd9
DC		 379Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
380
381 * avr.h: New file with AVR opcodes.
382
f0662e27
DL		 383Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
384
385 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
386
b722f2be
AM		 3872000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
388
389 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
390
f9e0cf0b
AM		 3912000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
392
393 * i386.h: Use sl_FP, not sl_Suf for fild.
394
f660ee8b
FCE		 3952000-05-16 Frank Ch. Eigler <fche@redhat.com>
396
397 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
398 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
399 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
400 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
401
558b0a60
AM		 4022000-05-13 Alan Modra <alan@linuxcare.com.au>,
403
404 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
405
e413e4e9
AM		 4062000-05-13 Alan Modra <alan@linuxcare.com.au>,
407 Alexander Sokolov <robocop@netlink.ru>
408
409 * i386.h (i386_optab): Add cpu_flags for all instructions.
410
4112000-05-13 Alan Modra <alan@linuxcare.com.au>
412
413 From Gavin Romig-Koch <gavin@cygnus.com>
414 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
415
5c84d377
TW		 4162000-05-04 Timothy Wall <twall@cygnus.com>
417
418 * tic54x.h: New.
419
966f959b
C		 4202000-05-03 J.T. Conklin <jtc@redback.com>
421
422 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
423 (PPC_OPERAND_VR): New operand flag for vector registers.
424
c5d05dbb
JL		 4252000-05-01 Kazu Hirata <kazu@hxi.com>
426
427 * h8300.h (EOP): Add missing initializer.
428
a7fba0e0
JL		 429Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
430
431 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
432 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
433 New operand types l,y,&,fe,fE,fx added to support above forms.
434 (pa_opcodes): Replaced usage of 'x' as source/target for
435 floating point double-word loads/stores with 'fx'.
436
800eeca4
JW		 437Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
438 David Mosberger <davidm@hpl.hp.com>
439 Timothy Wall <twall@cygnus.com>
440 Jim Wilson <wilson@cygnus.com>
441
442 * ia64.h: New file.
443
ba23e138
NC		 4442000-03-27 Nick Clifton <nickc@cygnus.com>
445
446 * d30v.h (SHORT_A1): Fix value.
447 (SHORT_AR): Renumber so that it is at the end of the list of short
448 instructions, not the end of the list of long instructions.
449
d0b47220
AM		 4502000-03-26 Alan Modra <alan@linuxcare.com>
451
452 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
453 problem isn't really specific to Unixware.
454 (OLDGCC_COMPAT): Define.
455 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
456 destination %st(0).
457 Fix lots of comments.
458
866afedc
NC		 4592000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
460
461 * d30v.h:
462 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
463 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
464 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
465 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
466 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
467 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
468 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
469
cc5ca5ce
AM		 4702000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
471
472 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
473 fistpd without suffix.
474
68e324a2
NC		 4752000-02-24 Nick Clifton <nickc@cygnus.com>
476
477 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
478 'signed_overflow_ok_p'.
479 Delete prototypes for cgen_set_flags() and cgen_get_flags().
480
60f036a2
AH		 4812000-02-24 Andrew Haley <aph@cygnus.com>
482
483 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
484 (CGEN_CPU_TABLE): flags: new field.
485 Add prototypes for new functions.
d83c6548 486
9b9b5cd4
AM		 4872000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
488
489 * i386.h: Add some more UNIXWARE_COMPAT comments.
490
5b93d8bb
AM		 4912000-02-23 Linas Vepstas <linas@linas.org>
492
493 * i370.h: New file.
494
4f1d9bd8
NC		 4952000-02-22 Chandra Chavva <cchavva@cygnus.com>
496
497 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
498 cannot be combined in parallel with ADD/SUBppp.
499
87f398dd
AH		 5002000-02-22 Andrew Haley <aph@cygnus.com>
501
502 * mips.h: (OPCODE_IS_MEMBER): Add comment.
503
367c01af
AH		 5041999-12-30 Andrew Haley <aph@cygnus.com>
505
9a1e79ca
AH		 506 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
507 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
508 insns.
367c01af 509
add0c677
AM		 5102000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
511
512 * i386.h: Qualify intel mode far call and jmp with x_Suf.
513
3138f287
AM		 5141999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
515
516 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
517 indirect jumps and calls. Add FF/3 call for intel mode.
518
ccecd07b
JL		 519Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
520
521 * mn10300.h: Add new operand types. Add new instruction formats.
522
b37e19e9
JL		 523Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
524
525 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
526 instruction.
527
5fce5ddf
GRK		 5281999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
529
530 * mips.h (INSN_ISA5): New.
531
2bd7f1f3
GRK		 5321999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
533
534 * mips.h (OPCODE_IS_MEMBER): New.
535
4df2b5c5
NC		 5361999-10-29 Nick Clifton <nickc@cygnus.com>
537
538 * d30v.h (SHORT_AR): Define.
539
446a06c9
MM		 5401999-10-18 Michael Meissner <meissner@cygnus.com>
541
542 * alpha.h (alpha_num_opcodes): Convert to unsigned.
543 (alpha_num_operands): Ditto.
544
eca04c6a
JL		 545Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
546
547 * hppa.h (pa_opcodes): Add load and store cache control to
548 instructions. Add ordered access load and store.
549
550 * hppa.h (pa_opcode): Add new entries for addb and addib.
551
552 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
553
554 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
555
c43185de
DN		 556Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
557
558 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
559
ec3533da
JL		 560Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
561
390f858d
JL		 562 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
563 and "be" using completer prefixes.
564
8c47ebd9
JL		 565 * hppa.h (pa_opcodes): Add initializers to silence compiler.
566
ec3533da
JL		 567 * hppa.h: Update comments about character usage.
568
18369bea
JL		 569Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
570
571 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
572 up the new fstw & bve instructions.
573
c36efdd2
JL		 574Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
575
d3ffb032
JL		 576 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
577 instructions.
578
c49ec3da
JL		 579 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
580
5d2e7ecc
JL		 581 * hppa.h (pa_opcodes): Add long offset double word load/store
582 instructions.
583
6397d1a2
JL		 584 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
585 stores.
586
142f0fe0
JL		 587 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
588
f5a68b45
JL		 589 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
590
8235801e
JL		 591 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
592
35184366
JL		 593 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
594
f0bfde5e
JL		 595 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
596
27bbbb58
JL		 597 * hppa.h (pa_opcodes): Add support for "b,l".
598
c36efdd2
JL		 599 * hppa.h (pa_opcodes): Add support for "b,gate".
600
f2727d04
JL		 601Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
602
9392fb11 603 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 604 in xmpyu.
9392fb11 605
e0c52e99
JL		 606 * hppa.h (pa_opcodes): Fix mask for probe and probei.
607
f2727d04
JL		 608 * hppa.h (pa_opcodes): Fix mask for depwi.
609
52d836e2
JL		 610Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
611
612 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
613 an explicit output argument.
614
90765e3a
JL		 615Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
616
617 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
618 Add a few PA2.0 loads and store variants.
619
8340b17f
ILT		 6201999-09-04 Steve Chamberlain <sac@pobox.com>
621
622 * pj.h: New file.
623
5f47d35b
AM		 6241999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
625
626 * i386.h (i386_regtab): Move %st to top of table, and split off
627 other fp reg entries.
628 (i386_float_regtab): To here.
629
1c143202
JL		 630Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
631
7d8fdb64
JL		 632 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
633 by 'f'.
634
90927b9c
JL		 635 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
636 Add supporting args.
637
1d16bf9c
JL		 638 * hppa.h: Document new completers and args.
639 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
640 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
641 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
642 pmenb and pmdis.
643
96226a68
JL		 644 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
645 hshr, hsub, mixh, mixw, permh.
646
5d4ba527
JL		 647 * hppa.h (pa_opcodes): Change completers in instructions to
648 use 'c' prefix.
649
e9fc28c6
JL		 650 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
651 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
652
1c143202
JL		 653 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
654 fnegabs to use 'I' instead of 'F'.
655
9e525108
AM		 6561999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
657
658 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
659 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
660 Alphabetically sort PIII insns.
661
e8da1bf1
DE		 662Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
663
664 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
665
7d627258
JL		 666Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
667
5696871a
JL		 668 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
669 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
670
7d627258
JL		 671 * hppa.h: Document 64 bit condition completers.
672
c5e52916
JL		 673Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
674
675 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
676
eecb386c
AM		 6771999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
678
679 * i386.h (i386_optab): Add DefaultSize modifier to all insns
680 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
681 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
682
88a380f3
JL		 683Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
684 Jeff Law <law@cygnus.com>
685
686 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
687
688 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 689
d83c6548 690 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL		 691 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
692
145cf1f0
AM		 6931999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
694
695 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
696
73826640
JL		 697Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
698
699 * hppa.h (struct pa_opcode): Add new field "flags".
700 (FLAGS_STRICT): Define.
701
b65db252
JL		 702Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
703 Jeff Law <law@cygnus.com>
704
f7fc668b
JL		 705 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
706
707 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 708
10084519
AM		 7091999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
710
711 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
712 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
713 flag to fcomi and friends.
714
cd8a80ba
JL		 715Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
716
717 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 718 integer logical instructions.
cd8a80ba 719
1fca749b
ILT		 7201999-05-28 Linus Nordberg <linus.nordberg@canit.se>
721
722 * m68k.h: Document new formats `E', `G', `H' and new places `N',
723 `n', `o'.
724
725 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
726 and new places `m', `M', `h'.
727
aa008907
JL		 728Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
729
730 * hppa.h (pa_opcodes): Add several processor specific system
731 instructions.
732
e26b85f0
JL		 733Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
734
d83c6548 735 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL		 736 "addb", and "addib" to be used by the disassembler.
737
c608c12e
AM		 7381999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
739
740 * i386.h (ReverseModrm): Remove all occurences.
741 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
742 movmskps, pextrw, pmovmskb, maskmovq.
743 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
744 ignore the data size prefix.
745
746 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
747 Mostly stolen from Doug Ledford <dledford@redhat.com>
748
45c18104
RH		 749Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
750
751 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
752
252b5132
RH		 7531999-04-14 Doug Evans <devans@casey.cygnus.com>
754
755 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
756 (CGEN_ATTR_TYPE): Update.
757 (CGEN_ATTR_MASK): Number booleans starting at 0.
758 (CGEN_ATTR_VALUE): Update.
759 (CGEN_INSN_ATTR): Update.
760
761Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
762
763 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
764 instructions.
765
766Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
767
768 * hppa.h (bb, bvb): Tweak opcode/mask.
769
770
7711999-03-22 Doug Evans <devans@casey.cygnus.com>
772
773 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
774 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
775 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
776 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
777 Delete member max_insn_size.
778 (enum cgen_cpu_open_arg): New enum.
779 (cpu_open): Update prototype.
780 (cpu_open_1): Declare.
781 (cgen_set_cpu): Delete.
782
7831999-03-11 Doug Evans <devans@casey.cygnus.com>
784
785 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
786 (CGEN_OPERAND_NIL): New macro.
787 (CGEN_OPERAND): New member `type'.
788 (@arch@_cgen_operand_table): Delete decl.
789 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
790 (CGEN_OPERAND_TABLE): New struct.
791 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
792 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
793 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
794 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
795 {get,set}_{int,vma}_operand.
796 (@arch@_cgen_cpu_open): New arg `isa'.
797 (cgen_set_cpu): Ditto.
798
799Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
800
801 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
802
8031999-02-25 Doug Evans <devans@casey.cygnus.com>
804
805 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
806 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
807 enum cgen_hw_type.
808 (CGEN_HW_TABLE): New struct.
809 (hw_table): Delete declaration.
810 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
811 to table entry to enum.
812 (CGEN_OPINST): Ditto.
813 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
814
815Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
816
817 * alpha.h (AXP_OPCODE_EV6): New.
818 (AXP_OPCODE_NOPAL): Include it.
819
8201999-02-09 Doug Evans <devans@casey.cygnus.com>
821
822 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
823 All uses updated. New members int_insn_p, max_insn_size,
824 parse_operand,insert_operand,extract_operand,print_operand,
825 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
826 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
827 extract_handlers,print_handlers.
828 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
829 (CGEN_ATTR_BOOL_OFFSET): New macro.
830 (CGEN_ATTR_MASK): Subtract it to compute bit number.
831 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
832 (cgen_opcode_handler): Renamed from cgen_base.
833 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
834 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
835 all uses updated.
836 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
837 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
838 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
839 (CGEN_OPCODE,CGEN_IBASE): New types.
840 (CGEN_INSN): Rewrite.
841 (CGEN_{ASM,DIS}_HASH*): Delete.
842 (init_opcode_table,init_ibld_table): Declare.
843 (CGEN_INSN_ATTR): New type.
844
845Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 846
252b5132
RH		 847 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
848 (x_FP, d_FP, dls_FP, sldx_FP): Define.
849 Change *Suf definitions to include x and d suffixes.
850 (movsx): Use w_Suf and b_Suf.
851 (movzx): Likewise.
852 (movs): Use bwld_Suf.
853 (fld): Change ordering. Use sld_FP.
854 (fild): Add Intel Syntax equivalent of fildq.
855 (fst): Use sld_FP.
856 (fist): Use sld_FP.
857 (fstp): Use sld_FP. Add x_FP version.
858 (fistp): LLongMem version for Intel Syntax.
859 (fcom, fcomp): Use sld_FP.
860 (fadd, fiadd, fsub): Use sld_FP.
861 (fsubr): Use sld_FP.
862 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
863
8641999-01-27 Doug Evans <devans@casey.cygnus.com>
865
866 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
867 CGEN_MODE_UINT.
868
e135f41b 8691999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH		 870
871 * hppa.h (bv): Fix mask.
872
8731999-01-05 Doug Evans <devans@casey.cygnus.com>
874
875 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
876 (CGEN_ATTR): Use it.
877 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
878 (CGEN_ATTR_TABLE): New member dfault.
879
8801998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
881
882 * mips.h (MIPS16_INSN_BRANCH): New.
883
884Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
885
886 The following is part of a change made by Edith Epstein
d83c6548
AJ		 887 <eepstein@sophia.cygnus.com> as part of a project to merge in
888 changes by HP; HP did not create ChangeLog entries.
252b5132
RH		 889
890 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 891 after.
252b5132
RH		 892
893Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
894
895 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 896 status word instructions.
252b5132
RH		 897
8981998-11-30 Doug Evans <devans@casey.cygnus.com>
899
900 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
901 (struct cgen_keyword_entry): Ditto.
902 (struct cgen_operand): Ditto.
903 (CGEN_IFLD): New typedef, with associated access macros.
904 (CGEN_IFMT): New typedef, with associated access macros.
905 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
906 (CGEN_IVALUE): New typedef.
907 (struct cgen_insn): Delete const on syntax,attrs members.
908 `format' now points to format data. Type of `value' is now
909 CGEN_IVALUE.
910 (struct cgen_opcode_table): New member ifld_table.
911
9121998-11-18 Doug Evans <devans@casey.cygnus.com>
913
914 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
915 (CGEN_OPERAND_INSTANCE): New member `attrs'.
916 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
917 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
918 (cgen_opcode_table): Update type of dis_hash fn.
919 (extract_operand): Update type of `insn_value' arg.
920
921Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
922
923 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
924
925Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
926
927 * mips.h (INSN_MULT): Added.
928
929Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
930
931 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
932
933Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
934
935 * cgen.h (CGEN_INSN_INT): New typedef.
936 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
937 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
938 (CGEN_INSN_BYTES_PTR): New typedef.
939 (CGEN_EXTRACT_INFO): New typedef.
940 (cgen_insert_fn,cgen_extract_fn): Update.
941 (cgen_opcode_table): New member `insn_endian'.
942 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
943 (insert_operand,extract_operand): Update.
944 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
945
946Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
947
948 * cgen.h (CGEN_ATTR_BOOLS): New macro.
949 (struct CGEN_HW_ENTRY): New member `attrs'.
950 (CGEN_HW_ATTR): New macro.
951 (struct CGEN_OPERAND_INSTANCE): New member `name'.
952 (CGEN_INSN_INVALID_P): New macro.
953
954Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
955
956 * hppa.h: Add "fid".
d83c6548 957
252b5132
RH		 958Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
959
960 From Robert Andrew Dale <rob@nb.net>
961 * i386.h (i386_optab): Add AMD 3DNow! instructions.
962 (AMD_3DNOW_OPCODE): Define.
963
964Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
965
966 * d30v.h (EITHER_BUT_PREFER_MU): Define.
967
968Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
969
970 * cgen.h (cgen_insn): #if 0 out element `cdx'.
971
972Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
973
974 Move all global state data into opcode table struct, and treat
975 opcode table as something that is "opened/closed".
976 * cgen.h (CGEN_OPCODE_DESC): New type.
977 (all fns): New first arg of opcode table descriptor.
978 (cgen_set_parse_operand_fn): Add prototype.
979 (cgen_current_machine,cgen_current_endian): Delete.
980 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
981 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
982 dis_hash_table,dis_hash_table_entries.
983 (opcode_open,opcode_close): Add prototypes.
984
985 * cgen.h (cgen_insn): New element `cdx'.
986
987Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
988
989 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
990
991Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
992
993 * mn10300.h: Add "no_match_operands" field for instructions.
994 (MN10300_MAX_OPERANDS): Define.
995
996Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
997
998 * cgen.h (cgen_macro_insn_count): Declare.
999
1000Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1001
1002 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1003 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1004 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1005 set_{int,vma}_operand.
1006
1007Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1008
1009 * mn10300.h: Add "machine" field for instructions.
1010 (MN103, AM30): Define machine types.
d83c6548 1011
252b5132
RH		 1012Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1013
1014 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1015
10161998-06-18 Ulrich Drepper <drepper@cygnus.com>
1017
1018 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1019
1020Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1021
1022 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1023 and ud2b.
1024 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1025 those that happen to be implemented on pentiums.
1026
1027Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1028
1029 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1030 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1031 with Size16|IgnoreSize or Size32|IgnoreSize.
1032
1033Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1034
1035 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1036 (REPE): Rename to REPE_PREFIX_OPCODE.
1037 (i386_regtab_end): Remove.
1038 (i386_prefixtab, i386_prefixtab_end): Remove.
1039 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1040 of md_begin.
1041 (MAX_OPCODE_SIZE): Define.
1042 (i386_optab_end): Remove.
1043 (sl_Suf): Define.
1044 (sl_FP): Use sl_Suf.
1045
1046 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1047 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1048 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1049 data32, dword, and adword prefixes.
1050 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1051 regs.
1052
1053Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1054
1055 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1056
1057 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1058 register operands, because this is a common idiom. Flag them with
1059 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1060 fdivrp because gcc erroneously generates them. Also flag with a
1061 warning.
1062
1063 * i386.h: Add suffix modifiers to most insns, and tighter operand
1064 checks in some cases. Fix a number of UnixWare compatibility
1065 issues with float insns. Merge some floating point opcodes, using
1066 new FloatMF modifier.
1067 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1068 consistency.
1069
1070 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1071 IgnoreDataSize where appropriate.
1072
1073Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1074
1075 * i386.h: (one_byte_segment_defaults): Remove.
1076 (two_byte_segment_defaults): Remove.
1077 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1078
1079Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1080
1081 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1082 (cgen_hw_lookup_by_num): Declare.
1083
1084Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1085
1086 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1087 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1088
1089Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1090
1091 * cgen.h (cgen_asm_init_parse): Delete.
1092 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1093 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1094
1095Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1096
1097 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1098 (cgen_asm_finish_insn): Update prototype.
1099 (cgen_insn): New members num, data.
1100 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1101 dis_hash, dis_hash_table_size moved to ...
1102 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1103 All uses updated. New members asm_hash_p, dis_hash_p.
1104 (CGEN_MINSN_EXPANSION): New struct.
1105 (cgen_expand_macro_insn): Declare.
1106 (cgen_macro_insn_count): Declare.
1107 (get_insn_operands): Update prototype.
1108 (lookup_get_insn_operands): Declare.
1109
1110Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1111
1112 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1113 regKludge. Add operands types for string instructions.
1114
1115Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1116
1117 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1118 table.
1119
1120Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1121
1122 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1123 for `gettext'.
1124
1125Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1126
1127 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1128 Add IsString flag to string instructions.
1129 (IS_STRING): Don't define.
1130 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1131 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1132 (SS_PREFIX_OPCODE): Define.
1133
1134Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1135
1136 * i386.h: Revert March 24 patch; no more LinearAddress.
1137
1138Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1139
1140 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1141 instructions, and instead add FWait opcode modifier. Add short
1142 form of fldenv and fstenv.
1143 (FWAIT_OPCODE): Define.
1144
1145 * i386.h (i386_optab): Change second operand constraint of `mov
1146 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1147 allow legal instructions such as `movl %gs,%esi'
1148
1149Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1150
1151 * h8300.h: Various changes to fully bracket initializers.
1152
1153Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1154
1155 * i386.h: Set LinearAddress for lidt and lgdt.
1156
1157Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1158
1159 * cgen.h (CGEN_BOOL_ATTR): New macro.
1160
1161Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1162
1163 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1164
1165Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1166
1167 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1168 (cgen_insn): Record syntax and format entries here, rather than
1169 separately.
1170
1171Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1172
1173 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1174
1175Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1176
1177 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1178 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1179 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1180
1181Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1182
1183 * cgen.h (lookup_insn): New argument alias_p.
1184
1185Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1186
1187Fix rac to accept only a0:
1188 * d10v.h (OPERAND_ACC): Split into:
1189 (OPERAND_ACC0, OPERAND_ACC1) .
1190 (OPERAND_GPR): Define.
1191
1192Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1193
1194 * cgen.h (CGEN_FIELDS): Define here.
1195 (CGEN_HW_ENTRY): New member `type'.
1196 (hw_list): Delete decl.
1197 (enum cgen_mode): Declare.
1198 (CGEN_OPERAND): New member `hw'.
1199 (enum cgen_operand_instance_type): Declare.
1200 (CGEN_OPERAND_INSTANCE): New type.
1201 (CGEN_INSN): New member `operands'.
1202 (CGEN_OPCODE_DATA): Make hw_list const.
1203 (get_insn_operands,lookup_insn): Add prototypes for.
1204
1205Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1206
1207 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1208 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1209 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1210 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1211
1212Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1213
1214 * cgen.h: Correct typo in comment end marker.
1215
1216Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1217
1218 * tic30.h: New file.
1219
5a109b67 1220Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH		 1221
1222 * cgen.h: Add prototypes for cgen_save_fixups(),
1223 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1224 of cgen_asm_finish_insn() to return a char *.
1225
1226Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1227
1228 * cgen.h: Formatting changes to improve readability.
1229
1230Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1231
1232 * cgen.h (*): Clean up pass over `struct foo' usage.
1233 (CGEN_ATTR): Make unsigned char.
1234 (CGEN_ATTR_TYPE): Update.
1235 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1236 (cgen_base): Move member `attrs' to cgen_insn.
1237 (CGEN_KEYWORD): New member `null_entry'.
1238 (CGEN_{SYNTAX,FORMAT}): New types.
1239 (cgen_insn): Format and syntax separated from each other.
1240
1241Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1242
1243 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1244 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1245 flags_{used,set} long.
1246 (d30v_operand): Make flags field long.
1247
1248Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1249
1250 * m68k.h: Fix comment describing operand types.
1251
1252Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1253
1254 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1255 everything else after down.
1256
1257Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1258
1259 * d10v.h (OPERAND_FLAG): Split into:
1260 (OPERAND_FFLAG, OPERAND_CFLAG) .
1261
1262Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1263
1264 * mips.h (struct mips_opcode): Changed comments to reflect new
1265 field usage.
1266
1267Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1268
1269 * mips.h: Added to comments a quick-ref list of all assigned
1270 operand type characters.
1271 (OP_{MASK,SH}_PERFREG): New macros.
1272
1273Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1274
1275 * sparc.h: Add '_' and '/' for v9a asr's.
1276 Patch from David Miller <davem@vger.rutgers.edu>
1277
1278Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1279
1280 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1281 area are not available in the base model (H8/300).
1282
1283Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1284
1285 * m68k.h: Remove documentation of ` operand specifier.
1286
1287Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1288
1289 * m68k.h: Document q and v operand specifiers.
1290
1291Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1292
1293 * v850.h (struct v850_opcode): Add processors field.
1294 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1295 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1296 (PROCESSOR_V850EA): New bit constants.
1297
1298Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1299
1300 Merge changes from Martin Hunt:
1301
1302 * d30v.h: Allow up to 64 control registers. Add
1303 SHORT_A5S format.
1304
1305 * d30v.h (LONG_Db): New form for delayed branches.
1306
1307 * d30v.h: (LONG_Db): New form for repeati.
1308
1309 * d30v.h (SHORT_D2B): New form.
1310
1311 * d30v.h (SHORT_A2): New form.
1312
1313 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1314 registers are used. Needed for VLIW optimization.
1315
1316Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1317
1318 * cgen.h: Move assembler interface section
1319 up so cgen_parse_operand_result is defined for cgen_parse_address.
1320 (cgen_parse_address): Update prototype.
1321
1322Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1323
1324 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1325
1326Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1327
1328 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1329 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1330 <paubert@iram.es>.
1331
1332 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1333 <paubert@iram.es>.
1334
1335 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1336 <paubert@iram.es>.
1337
1338 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1339 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1340
1341Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1342
1343 * v850.h (V850_NOT_R0): New flag.
1344
1345Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1346
1347 * v850.h (struct v850_opcode): Remove flags field.
1348
1349Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1350
1351 * v850.h (struct v850_opcode): Add flags field.
1352 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1353 fields.
1354 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1355 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1356
1357Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1358
1359 * arc.h: New file.
1360
1361Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1362
1363 * sparc.h (sparc_opcodes): Declare as const.
1364
1365Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1366
1367 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1368 uses single or double precision floating point resources.
1369 (INSN_NO_ISA, INSN_ISA1): Define.
1370 (cpu specific INSN macros): Tweak into bitmasks outside the range
1371 of INSN_ISA field.
1372
1373Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1374
1375 * i386.h: Fix pand opcode.
1376
1377Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1378
1379 * mips.h: Widen INSN_ISA and move it to a more convenient
1380 bit position. Add INSN_3900.
1381
1382Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1383
1384 * mips.h (struct mips_opcode): added new field membership.
1385
1386Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1387
1388 * i386.h (movd): only Reg32 is allowed.
1389
1390 * i386.h: add fcomp and ud2. From Wayne Scott
1391 <wscott@ichips.intel.com>.
1392
1393Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1394
1395 * i386.h: Add MMX instructions.
1396
1397Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1398
1399 * i386.h: Remove W modifier from conditional move instructions.
1400
1401Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1402
1403 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1404 with no arguments to match that generated by the UnixWare
1405 assembler.
1406
1407Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1408
1409 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1410 (cgen_parse_operand_fn): Declare.
1411 (cgen_init_parse_operand): Declare.
1412 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1413 new argument `want'.
1414 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1415 (enum cgen_parse_operand_type): New enum.
1416
1417Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1418
1419 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1420
1421Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1422
1423 * cgen.h: New file.
1424
1425Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1426
1427 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1428 fdivrp.
1429
1430Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1431
1432 * v850.h (extract): Make unsigned.
1433
1434Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1435
1436 * i386.h: Add iclr.
1437
1438Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1439
1440 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1441 take a direction bit.
1442
1443Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1444
1445 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1446
1447Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1448
1449 * sparc.h: Include <ansidecl.h>. Update function declarations to
1450 use prototypes, and to use const when appropriate.
1451
1452Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1453
1454 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1455
1456Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1457
1458 * d10v.h: Change pre_defined_registers to
1459 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1460
1461Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1462
1463 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1464 Change mips_opcodes from const array to a pointer,
1465 and change bfd_mips_num_opcodes from const int to int,
1466 so that we can increase the size of the mips opcodes table
1467 dynamically.
1468
1469Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1470
1471 * d30v.h (FLAG_X): Remove unused flag.
1472
1473Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1474
1475 * d30v.h: New file.
1476
1477Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1478
1479 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1480 (PDS_VALUE): Macro to access value field of predefined symbols.
1481 (tic80_next_predefined_symbol): Add prototype.
1482
1483Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1484
1485 * tic80.h (tic80_symbol_to_value): Change prototype to match
1486 change in function, added class parameter.
1487
1488Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1489
1490 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1491 endmask fields, which are somewhat weird in that 0 and 32 are
1492 treated exactly the same.
1493
1494Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1495
1496 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1497 rather than a constant that is 2**X. Reorder them to put bits for
1498 operands that have symbolic names in the upper bits, so they can
1499 be packed into an int where the lower bits contain the value that
1500 corresponds to that symbolic name.
1501 (predefined_symbo): Add struct.
1502 (tic80_predefined_symbols): Declare array of translations.
1503 (tic80_num_predefined_symbols): Declare size of that array.
1504 (tic80_value_to_symbol): Declare function.
1505 (tic80_symbol_to_value): Declare function.
1506
1507Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1508
1509 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1510
1511Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1512
1513 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1514 be the destination register.
1515
1516Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1517
1518 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1519 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1520 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1521 that the opcode can have two vector instructions in a single
1522 32 bit word and we have to encode/decode both.
1523
1524Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1525
1526 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1527 TIC80_OPERAND_RELATIVE for PC relative.
1528 (TIC80_OPERAND_BASEREL): New flag bit for register
1529 base relative.
1530
1531Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1532
1533 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1534
1535Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1536
1537 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1538 ":s" modifier for scaling.
1539
1540Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1541
1542 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1543 (TIC80_OPERAND_M_LI): Ditto
1544
1545Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1546
1547 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1548 (TIC80_OPERAND_CC): New define for condition code operand.
1549 (TIC80_OPERAND_CR): New define for control register operand.
1550
1551Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1552
1553 * tic80.h (struct tic80_opcode): Name changed.
1554 (struct tic80_opcode): Remove format field.
1555 (struct tic80_operand): Add insertion and extraction functions.
1556 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1557 correct ones.
1558 (FMT_*): Ditto.
1559
1560Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1561
1562 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1563 type IV instruction offsets.
1564
1565Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1566
1567 * tic80.h: New file.
1568
1569Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1570
1571 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1572
1573Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1574
1575 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1576 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1577 * v850.h: Fix comment, v850_operand not powerpc_operand.
1578
1579Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1580
1581 * mn10200.h: Flesh out structures and definitions needed by
1582 the mn10200 assembler & disassembler.
1583
1584Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1585
1586 * mips.h: Add mips16 definitions.
1587
1588Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1589
1590 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1591
1592Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1593
1594 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1595 (MN10300_OPERAND_MEMADDR): Define.
1596
1597Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1598
1599 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1600
1601Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1602
1603 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1604
1605Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1606
1607 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1608
1609Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1610
1611 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1612
1613Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1614
1615 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ		 1616 negative to minimize problems with shared libraries. Organize
1617 instruction subsets by AMASK extensions and PALcode
1618 implementation.
252b5132
RH		 1619 (struct alpha_operand): Move flags slot for better packing.
1620
1621Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1622
1623 * v850.h (V850_OPERAND_RELAX): New operand flag.
1624
1625Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1626
1627 * mn10300.h (FMT_*): Move operand format definitions
1628 here.
1629
1630Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1631
1632 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1633
1634Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1635
1636 * mn10300.h (mn10300_opcode): Add "format" field.
1637 (MN10300_OPERAND_*): Define.
1638
1639Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1640
1641 * mn10x00.h: Delete.
1642 * mn10200.h, mn10300.h: New files.
1643
1644Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1645
1646 * mn10x00.h: New file.
1647
1648Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1649
1650 * v850.h: Add new flag to indicate this instruction uses a PC
1651 displacement.
1652
1653Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1654
1655 * h8300.h (stmac): Add missing instruction.
1656
1657Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1658
1659 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1660 field.
1661
1662Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1663
1664 * v850.h (V850_OPERAND_EP): Define.
1665
1666 * v850.h (v850_opcode): Add size field.
1667
1668Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1669
1670 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1671 to functions used to handle unusual operand encoding.
252b5132 1672 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1673 V850_OPERAND_SIGNED): Defined.
252b5132
RH		 1674
1675Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1676
1677 * v850.h (v850_operands): Add flags field.
1678 (OPERAND_REG, OPERAND_NUM): Defined.
1679
1680Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1681
1682 * v850.h: New file.
1683
1684Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1685
1686 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ		 1687 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1688 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1689 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1690 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1691 Defined.
252b5132
RH		 1692
1693Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1694
1695 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1696 a 3 bit space id instead of a 2 bit space id.
1697
1698Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1699
1700 * d10v.h: Add some additional defines to support the
d83c6548 1701 assembler in determining which operations can be done in parallel.
252b5132
RH		 1702
1703Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1704
1705 * h8300.h (SN): Define.
1706 (eepmov.b): Renamed from "eepmov"
1707 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1708 with them.
1709
1710Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1711
1712 * d10v.h (OPERAND_SHIFT): New operand flag.
1713
1714Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1715
1716 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1717 signed numbers.
252b5132
RH		 1718
1719Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1720
1721 * d10v.h (pd_reg): Define. Putting the definition here allows
1722 the assembler and disassembler to share the same struct.
1723
1724Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1725
1726 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1727 Williams <steve@icarus.com>.
1728
1729Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1730
1731 * d10v.h: New file.
1732
1733Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1734
1735 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1736
1737Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1738
d83c6548 1739 * m68k.h (mcf5200): New macro.
252b5132
RH		 1740 Document names of coldfire control registers.
1741
1742Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1743
1744 * h8300.h (SRC_IN_DST): Define.
1745
1746 * h8300.h (UNOP3): Mark the register operand in this insn
1747 as a source operand, not a destination operand.
1748 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1749 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1750 register operand with SRC_IN_DST.
1751
1752Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1753
1754 * alpha.h: New file.
1755
1756Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1757
1758 * rs6k.h: Remove obsolete file.
1759
1760Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1761
1762 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1763 fdivp, and fdivrp. Add ffreep.
1764
1765Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1766
1767 * h8300.h: Reorder various #defines for readability.
1768 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1769 (BITOP): Accept additional (unused) argument. All callers changed.
1770 (EBITOP): Likewise.
1771 (O_LAST): Bump.
1772 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1773
1774 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1775 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1776 (BITOP, EBITOP): Handle new H8/S addressing modes for
1777 bit insns.
1778 (UNOP3): Handle new shift/rotate insns on the H8/S.
1779 (insns using exr): New instructions.
1780 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1781
1782Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1783
1784 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1785 was incorrect.
1786
1787Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1788
1789 * h8300.h (START): Remove.
1790 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1791 and mov.l insns that can be relaxed.
1792
1793Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1794
1795 * i386.h: Remove Abs32 from lcall.
1796
1797Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1798
1799 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1800 (SLCPOP): New macro.
1801 Mark X,Y opcode letters as in use.
1802
1803Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1804
1805 * sparc.h (F_FLOAT, F_FBR): Define.
1806
1807Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1808
1809 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1810 from all insns.
1811 (ABS8SRC,ABS8DST): Add ABS8MEM.
1812 (add.l): Fix reg+reg variant.
1813 (eepmov.w): Renamed from eepmovw.
1814 (ldc,stc): Fix many cases.
1815
1816Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1817
1818 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1819
1820Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1821
1822 * sparc.h (O): Mark operand letter as in use.
1823
1824Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1825
1826 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1827 Mark operand letters uU as in use.
1828
1829Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1830
1831 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1832 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1833 (SPARC_OPCODE_SUPPORTED): New macro.
1834 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1835 (F_NOTV9): Delete.
1836
1837Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1838
1839 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1840 declaration consistent with return type in definition.
1841
1842Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1843
1844 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1845
1846Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1847
1848 * i386.h (i386_regtab): Add 80486 test registers.
1849
1850Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1851
1852 * i960.h (I_HX): Define.
1853 (i960_opcodes): Add HX instruction.
1854
1855Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1856
1857 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1858 and fclex.
1859
1860Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1861
1862 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1863 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1864 (bfd_* defines): Delete.
1865 (sparc_opcode_archs): Replaces architecture_pname.
1866 (sparc_opcode_lookup_arch): Declare.
1867 (NUMOPCODES): Delete.
1868
1869Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1870
1871 * sparc.h (enum sparc_architecture): Add v9a.
1872 (ARCHITECTURES_CONFLICT_P): Update.
1873
1874Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1875
1876 * i386.h: Added Pentium Pro instructions.
1877
1878Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1879
1880 * m68k.h: Document new 'W' operand place.
1881
1882Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1883
1884 * hppa.h: Add lci and syncdma instructions.
1885
1886Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1887
1888 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1889 instructions.
252b5132
RH		 1890
1891Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1892
1893 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1894 assembler's -mcom and -many switches.
1895
1896Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1897
1898 * i386.h: Fix cmpxchg8b extension opcode description.
1899
1900Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1901
1902 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1903 and register cr4.
1904
1905Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1906
1907 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1908
1909Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1910
1911 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1912
1913Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1914
1915 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1916
1917Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1918
1919 * m68kmri.h: Remove.
1920
1921 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1922 declarations. Remove F_ALIAS and flag field of struct
1923 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1924 int. Make name and args fields of struct m68k_opcode const.
1925
1926Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1927
1928 * sparc.h (F_NOTV9): Define.
1929
1930Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1931
1932 * mips.h (INSN_4010): Define.
1933
1934Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1935
1936 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1937
1938 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1939 * m68k.h: Fix argument descriptions of coprocessor
1940 instructions to allow only alterable operands where appropriate.
1941 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1942 (m68k_opcode_aliases): Add more aliases.
1943
1944Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1945
1946 * m68k.h: Added explcitly short-sized conditional branches, and a
1947 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1948 svr4-based configurations.
1949
1950Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1951
1952 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1953 * i386.h: added missing Data16/Data32 flags to a few instructions.
1954
1955Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1956
1957 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1958 (OP_MASK_BCC, OP_SH_BCC): Define.
1959 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1960 (OP_MASK_CCC, OP_SH_CCC): Define.
1961 (INSN_READ_FPR_R): Define.
1962 (INSN_RFE): Delete.
1963
1964Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1965
1966 * m68k.h (enum m68k_architecture): Deleted.
1967 (struct m68k_opcode_alias): New type.
1968 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1969 matching constraints, values and flags. As a side effect of this,
1970 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1971 as I know were never used, now may need re-examining.
1972 (numopcodes): Now const.
1973 (m68k_opcode_aliases, numaliases): New variables.
1974 (endop): Deleted.
1975 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1976 m68k_opcode_aliases; update declaration of m68k_opcodes.
1977
1978Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1979
1980 * hppa.h (delay_type): Delete unused enumeration.
1981 (pa_opcode): Replace unused delayed field with an architecture
1982 field.
1983 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1984
1985Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1986
1987 * mips.h (INSN_ISA4): Define.
1988
1989Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1990
1991 * mips.h (M_DLA_AB, M_DLI): Define.
1992
1993Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1994
1995 * hppa.h (fstwx): Fix single-bit error.
1996
1997Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1998
1999 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2000
2001Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2002
2003 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2004 debug registers. From Charles Hannum (mycroft@netbsd.org).
2005
2006Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2007
2008 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2009 i386 support:
2010 * i386.h (MOV_AX_DISP32): New macro.
2011 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2012 of several call/return instructions.
2013 (ADDR_PREFIX_OPCODE): New macro.
2014
2015Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2016
2017 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2018
4f1d9bd8
NC		 2019 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2020 char.
252b5132
RH		 2021 (struct vot, field `name'): ditto.
2022
2023Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2024
2025 * vax.h: Supply and properly group all values in end sentinel.
2026
2027Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2028
2029 * mips.h (INSN_ISA, INSN_4650): Define.
2030
2031Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2032
2033 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2034 systems with a separate instruction and data cache, such as the
2035 29040, these instructions take an optional argument.
2036
2037Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2038
2039 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2040 INSN_TRAP.
2041
2042Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2043
2044 * mips.h (INSN_STORE_MEMORY): Define.
2045
2046Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2047
2048 * sparc.h: Document new operand type 'x'.
2049
2050Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2051
2052 * i960.h (I_CX2): New instruction category. It includes
2053 instructions available on Cx and Jx processors.
2054 (I_JX): New instruction category, for JX-only instructions.
2055 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2056 Jx-only instructions, in I_JX category.
2057
2058Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2059
2060 * ns32k.h (endop): Made pointer const too.
2061
2062Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2063
2064 * ns32k.h: Drop Q operand type as there is no correct use
2065 for it. Add I and Z operand types which allow better checking.
2066
2067Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2068
2069 * h8300.h (xor.l) :fix bit pattern.
2070 (L_2): New size of operand.
2071 (trapa): Use it.
2072
2073Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2074
2075 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2076
2077Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2078
2079 * sparc.h: Include v9 definitions.
2080
2081Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2082
2083 * m68k.h (m68060): Defined.
2084 (m68040up, mfloat, mmmu): Include it.
2085 (struct m68k_opcode): Widen `arch' field.
2086 (m68k_opcodes): Updated for M68060. Removed comments that were
2087 instructions commented out by "JF" years ago.
2088
2089Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2090
2091 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2092 add a one-bit `flags' field.
2093 (F_ALIAS): New macro.
2094
2095Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2096
2097 * h8300.h (dec, inc): Get encoding right.
2098
2099Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2100
2101 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2102 a flag instead.
2103 (PPC_OPERAND_SIGNED): Define.
2104 (PPC_OPERAND_SIGNOPT): Define.
2105
2106Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2107
2108 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2109 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2110
2111Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2112
2113 * i386.h: Reverse last change. It'll be handled in gas instead.
2114
2115Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2116
2117 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2118 slower on the 486 and used the implicit shift count despite the
2119 explicit operand. The one-operand form is still available to get
2120 the shorter form with the implicit shift count.
2121
2122Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2123
2124 * hppa.h: Fix typo in fstws arg string.
2125
2126Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2127
2128 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2129
2130Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2131
2132 * ppc.h (PPC_OPCODE_601): Define.
2133
2134Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2135
2136 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2137 (so we can determine valid completers for both addb and addb[tf].)
2138
2139 * hppa.h (xmpyu): No floating point format specifier for the
2140 xmpyu instruction.
2141
2142Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2143
2144 * ppc.h (PPC_OPERAND_NEXT): Define.
2145 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2146 (struct powerpc_macro): Define.
2147 (powerpc_macros, powerpc_num_macros): Declare.
2148
2149Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2150
2151 * ppc.h: New file. Header file for PowerPC opcode table.
2152
2153Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2154
2155 * hppa.h: More minor template fixes for sfu and copr (to allow
2156 for easier disassembly).
2157
2158 * hppa.h: Fix templates for all the sfu and copr instructions.
2159
2160Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2161
2162 * i386.h (push): Permit Imm16 operand too.
2163
2164Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2165
2166 * h8300.h (andc): Exists in base arch.
2167
2168Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2169
2170 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2171 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2172
2173Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2174
2175 * hppa.h: Add FP quadword store instructions.
2176
2177Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2178
2179 * mips.h: (M_J_A): Added.
2180 (M_LA): Removed.
2181
2182Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2183
2184 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2185 <mellon@pepper.ncd.com>.
2186
2187Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2188
2189 * hppa.h: Immediate field in probei instructions is unsigned,
2190 not low-sign extended.
2191
2192Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2193
2194 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2195
2196Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2197
2198 * i386.h: Add "fxch" without operand.
2199
2200Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2201
2202 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2203
2204Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2205
2206 * hppa.h: Add gfw and gfr to the opcode table.
2207
2208Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2209
2210 * m88k.h: extended to handle m88110.
2211
2212Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2213
2214 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2215 addresses.
2216
2217Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2218
2219 * i960.h (i960_opcodes): Properly bracket initializers.
2220
2221Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2222
2223 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2224
2225Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2226
2227 * m68k.h (two): Protect second argument with parentheses.
2228
2229Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2230
2231 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2232 Deleted old in/out instructions in "#if 0" section.
2233
2234Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2235
2236 * i386.h (i386_optab): Properly bracket initializers.
2237
2238Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2239
2240 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2241 Jeff Law, law@cs.utah.edu).
2242
2243Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2244
2245 * i386.h (lcall): Accept Imm32 operand also.
2246
2247Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2248
2249 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2250 (M_DABS): Added.
2251
2252Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2253
2254 * mips.h (INSN_*): Changed values. Removed unused definitions.
2255 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2256 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2257 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2258 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2259 (M_*): Added new values for r6000 and r4000 macros.
2260 (ANY_DELAY): Removed.
2261
2262Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2263
2264 * mips.h: Added M_LI_S and M_LI_SS.
2265
2266Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2267
2268 * h8300.h: Get some rare mov.bs correct.
2269
2270Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2271
2272 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2273 been included.
2274
2275Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2276
2277 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2278 jump instructions, for use in disassemblers.
2279
2280Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2281
2282 * m88k.h: Make bitfields just unsigned, not unsigned long or
2283 unsigned short.
2284
2285Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2286
2287 * hppa.h: New argument type 'y'. Use in various float instructions.
2288
2289Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2290
2291 * hppa.h (break): First immediate field is unsigned.
2292
2293 * hppa.h: Add rfir instruction.
2294
2295Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2296
2297 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2298
2299Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2300
2301 * mips.h: Reworked the hazard information somewhat, and fixed some
2302 bugs in the instruction hazard descriptions.
2303
2304Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2305
2306 * m88k.h: Corrected a couple of opcodes.
2307
2308Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2309
2310 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2311 new version includes instruction hazard information, but is
2312 otherwise reasonably similar.
2313
2314Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2315
2316 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2317
2318Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2319
2320 Patches from Jeff Law, law@cs.utah.edu:
2321 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2322 Make the tables be the same for the following instructions:
2323 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2324 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2325 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2326 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2327 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2328 "fcmp", and "ftest".
2329
2330 * hppa.h: Make new and old tables the same for "break", "mtctl",
2331 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2332 Fix typo in last patch. Collapse several #ifdefs into a
2333 single #ifdef.
2334
2335 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2336 of the comments up-to-date.
2337
2338 * hppa.h: Update "free list" of letters and update
2339 comments describing each letter's function.
2340
4f1d9bd8
NC		 2341Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2342
2343 * h8300.h: Lots of little fixes for the h8/300h.
2344
2345Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2346
2347 Support for H8/300-H
2348 * h8300.h: Lots of new opcodes.
2349
252b5132
RH		 2350Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2351
2352 * h8300.h: checkpoint, includes H8/300-H opcodes.
2353
2354Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2355
2356 * Patches from Jeffrey Law <law@cs.utah.edu>.
2357 * hppa.h: Rework single precision FP
2358 instructions so that they correctly disassemble code
2359 PA1.1 code.
2360
2361Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2362
2363 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2364 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2365
2366Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2367
2368 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2369 gdb will define it for now.
2370
2371Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2372
2373 * sparc.h: Don't end enumerator list with comma.
2374
2375Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2376
2377 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2378 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2379 ("bc2t"): Correct typo.
2380 ("[ls]wc[023]"): Use T rather than t.
2381 ("c[0123]"): Define general coprocessor instructions.
2382
2383Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2384
2385 * m68k.h: Move split point for gcc compilation more towards
2386 middle.
2387
2388Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2389
2390 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2391 simply wrong, ics, rfi, & rfsvc were missing).
2392 Add "a" to opr_ext for "bb". Doc fix.
2393
2394Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2395
2396 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2397 * mips.h: Add casts, to suppress warnings about shifting too much.
2398 * m68k.h: Document the placement code '9'.
2399
2400Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2401
2402 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2403 allows callers to break up the large initialized struct full of
2404 opcodes into two half-sized ones. This permits GCC to compile
2405 this module, since it takes exponential space for initializers.
2406 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2407
2408Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2409
2410 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2411 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2412 initialized structs in it.
2413
2414Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2415
2416 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2417 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2418 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2419
2420Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2421
2422 * mips.h: document "i" and "j" operands correctly.
2423
2424Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2425
2426 * mips.h: Removed endianness dependency.
2427
2428Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2429
2430 * h8300.h: include info on number of cycles per instruction.
2431
2432Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2433
2434 * hppa.h: Move handy aliases to the front. Fix masks for extract
2435 and deposit instructions.
2436
2437Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2438
2439 * i386.h: accept shld and shrd both with and without the shift
2440 count argument, which is always %cl.
2441
2442Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2443
2444 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2445 (one_byte_segment_defaults, two_byte_segment_defaults,
2446 i386_prefixtab_end): Ditto.
2447
2448Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2449
2450 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2451 for operand 2; from John Carr, jfc@dsg.dec.com.
2452
2453Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2454
2455 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2456 always use 16-bit offsets. Makes calculated-size jump tables
2457 feasible.
2458
2459Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2460
2461 * i386.h: Fix one-operand forms of in* and out* patterns.
2462
2463Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2464
2465 * m68k.h: Added CPU32 support.
2466
2467Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2468
2469 * mips.h (break): Disassemble the argument. Patch from
2470 jonathan@cs.stanford.edu (Jonathan Stone).
2471
2472Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2473
2474 * m68k.h: merged Motorola and MIT syntax.
2475
2476Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2477
2478 * m68k.h (pmove): make the tests less strict, the 68k book is
2479 wrong.
2480
2481Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2482
2483 * m68k.h (m68ec030): Defined as alias for 68030.
2484 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2485 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2486 them. Tightened description of "fmovex" to distinguish it from
2487 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2488 up descriptions that claimed versions were available for chips not
2489 supporting them. Added "pmovefd".
2490
2491Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2492
2493 * m68k.h: fix where the . goes in divull
2494
2495Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2496
2497 * m68k.h: the cas2 instruction is supposed to be written with
2498 indirection on the last two operands, which can be either data or
2499 address registers. Added a new operand type 'r' which accepts
2500 either register type. Added new cases for cas2l and cas2w which
2501 use them. Corrected masks for cas2 which failed to recognize use
2502 of address register.
2503
2504Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2505
2506 * m68k.h: Merged in patches (mostly m68040-specific) from
2507 Colin Smith <colin@wrs.com>.
2508
2509 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2510 base). Also cleaned up duplicates, re-ordered instructions for
2511 the sake of dis-assembling (so aliases come after standard names).
2512 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2513
2514Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2515
2516 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2517 all missing .s
2518
2519Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2520
2521 * sparc.h: Moved tables to BFD library.
2522
2523 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2524
2525Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2526
2527 * h8300.h: Finish filling in all the holes in the opcode table,
2528 so that the Lucid C compiler can digest this as well...
2529
2530Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2531
2532 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2533 Fix opcodes on various sizes of fild/fist instructions
2534 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2535 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2536
2537Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2538
2539 * h8300.h: Fill in all the holes in the opcode table so that the
2540 losing HPUX C compiler can digest this...
2541
2542Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2543
2544 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2545 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2546
2547Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2548
2549 * sparc.h: Add new architecture variant sparclite; add its scan
2550 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2551
2552Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2553
2554 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2555 fy@lucid.com).
2556
2557Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2558
2559 * rs6k.h: New version from IBM (Metin).
2560
2561Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2562
2563 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2564 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2565
2566Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2567
2568 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2569
2570Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2571
2572 * m68k.h (one, two): Cast macro args to unsigned to suppress
2573 complaints from compiler and lint about integer overflow during
2574 shift.
2575
2576Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2577
2578 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2579
2580Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2581
2582 * mips.h: Make bitfield layout depend on the HOST compiler,
2583 not on the TARGET system.
2584
2585Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2586
2587 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2588 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2589 <TRANLE@INTELLICORP.COM>.
2590
2591Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2592
2593 * h8300.h: turned op_type enum into #define list
2594
2595Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2596
2597 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2598 similar instructions -- they've been renamed to "fitoq", etc.
2599 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2600 number of arguments.
2601 * h8300.h: Remove extra ; which produces compiler warning.
2602
2603Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2604
2605 * sparc.h: fix opcode for tsubcctv.
2606
2607Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2608
2609 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2610
2611Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2612
2613 * sparc.h (nop): Made the 'lose' field be even tighter,
2614 so only a standard 'nop' is disassembled as a nop.
2615
2616Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2617
2618 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2619 disassembled as a nop.
2620
4f1d9bd8
NC		 2621Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2622
2623 * m68k.h, sparc.h: ANSIfy enums.
2624
252b5132
RH		 2625Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2626
2627 * sparc.h: fix a typo.
2628
2629Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2630
2631 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2632 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2633 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH		 2634
2635\f
2636Local Variables:
2637version-control: never
2638End:
GDB Binutils - Deliverables
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