* dv-m68hc11tim.c (cycle_to_string): Add flags parameter to better
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
8cf3f354
AM
12003-08-07 Alan Modra <amodra@bigpond.net.au>
2
3 * alpha.h: Remove PARAMS macro.
4 * arc.h: Likewise.
5 * d10v.h: Likewise.
6 * d30v.h: Likewise.
7 * i370.h: Likewise.
8 * or32.h: Likewise.
9 * pj.h: Likewise.
10 * ppc.h: Likewise.
11 * sparc.h: Likewise.
12 * tic80.h: Likewise.
13 * v850.h: Likewise.
14
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152003-07-18 Michael Snyder <msnyder@redhat.com>
16
17 * include/opcode/h8sx.h (DO_MOVA1, DO_MOVA2): Reformatting.
18
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192003-07-15 Richard Sandiford <rsandifo@redhat.com>
20
21 * mips.h (CPU_RM7000): New macro.
22 (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
23
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AO
242003-07-09 Alexandre Oliva <aoliva@redhat.com>
25
26 2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
27 * mn10300.h (AM33_2): Renamed from AM33.
28 2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
29 * mn10300.h (AM332, FMT_D3): Defined.
30 (MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise.
31 (MN10300_OPERAND_FPCR): Likewise.
32
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332003-07-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
34
35 * s390.h (s390_opcode_cpu_val): Add enum for cpu type z990.
36
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372003-06-25 Richard Sandiford <rsandifo@redhat.com>
38
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39 * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
40 (IMM8U, IMM8U_NS): Define.
41 (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
42
432003-06-25 Richard Sandiford <rsandifo@redhat.com>
44
45 * h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and
46 mov.l ERs,@(dd:32,ERd) entries.
8d1e520a 47
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482003-06-23 H.J. Lu <hongjiu.lu@intel.com>
49
50 * i386.h (i386_optab): Support Intel Precott New Instructions.
51
adadcc0c
AM
522003-06-10 Gary Hade <garyhade@us.ibm.com>
53
54 * ppc.h (PPC_OPERAND_DQ): Define.
55
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562003-06-10 Richard Sandiford <rsandifo@redhat.com>
57
58 * h8300.h (IMM4_NS, IMM8_NS): New.
59 (h8_opcodes): Replace IMM4 with IMM4_NS in mov.b and mov.w entries.
60 Likewise IMM8 for mov.w and mov.l. Likewise IMM16U for mov.l.
61
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622003-06-03 Michael Snyder <msnyder@redhat.com>
63
50649e42 64 * h8300.h (enum h8_model): Add AV_H8S to distinguish from H8H.
adadcc0c 65 (ldc): Split ccr ops from exr ops (which are only available
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MS
66 on H8S or H8SX).
67 (stc): Ditto.
68 (andc, orc, xorc): Ditto.
69 (ldmac, stmac, clrmac, mac): Change access to AV_H8S.
70
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712003-06-03 Michael Snyder <msnyder@redhat.com>
72 and Bernd Schmidt <bernds@redhat.com>
73 and Alexandre Oliva <aoliva@redhat.com>
74 * h8300.h: Add support for h8300sx instruction set.
75
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762003-05-23 Jason Eckhardt <jle@rice.edu>
77
78 * i860.h (expand_type): Add XP_ONLY.
79 (scyc.b): New XP instruction.
80 (ldio.l): Likewise.
81 (ldio.s): Likewise.
82 (ldio.b): Likewise.
83 (ldint.l): Likewise.
84 (ldint.s): Likewise.
85 (ldint.b): Likewise.
86 (stio.l): Likewise.
87 (stio.s): Likewise.
88 (stio.b): Likewise.
89 (pfld.q): Likewise.
90
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912003-05-20 Jason Eckhardt <jle@rice.edu>
92
14218d5f 93 * i860.h (flush): Set lower 3 bits properly and use 'L'
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94 for the immediate operand type instead of 'i'.
95
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962003-05-20 Jason Eckhardt <jle@rice.edu>
97
14218d5f 98 * i860.h (fzchks): Both S and R bits must be set.
ca464f37
JE
99 (pfzchks): Likewise.
100 (faddp): Likewise.
101 (pfaddp): Likewise.
102 (fix.ss): Remove (invalid instruction).
103 (pfix.ss): Likewise.
104 (ftrunc.ss): Likewise.
105 (pftrunc.ss): Likewise.
106
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1072003-05-18 Jason Eckhardt <jle@rice.edu>
108
109 * i860.h (form, pform): Add missing .dd suffix.
110
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1112003-05-13 Stephane Carrez <stcarrez@nerim.fr>
112
113 * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
114
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1152003-04-07 Michael Snyder <msnyder@redhat.com>
116
117 * h8300.h (ldc/stc): Fix up src/dst swaps.
118
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AM
1192003-04-09 J. Grant <jg-binutils@jguk.org>
120
121 * mips.h: Correct comment typo.
122
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1232003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
124
125 * s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
126 (S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
127 (s390_opcode): Remove architecture. Add modes and min_cpu.
128
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1292003-03-17 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
130
131 * h8300.h (O_SYS_CMDLINE): New pseudo opcode for command line
132 processing.
133
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NC
1342003-02-21 Noida D.Venkatasubramanian <dvenkat@noida.hcltech.com>
135
136 * h8300.h (ldmac, stmac): Replace MACREG with MS32 and MD32.
137
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1382003-01-23 Alan Modra <amodra@bigpond.net.au>
139
140 * m68hc11.h (cpu6812s): Define.
141
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1422003-01-07 Chris Demetriou <cgd@broadcom.com>
143
144 * mips.h: Fix missing space in comment.
145 (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
146 (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
147 by four bits.
148
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1492003-01-02 Chris Demetriou <cgd@broadcom.com>
150
151 * mips.h: Update copyright years to include 2002 (which had
152 been missed previously) and 2003. Make comments about "+A",
153 "+B", and "+C" operand types more descriptive.
154
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1552002-12-31 Chris Demetriou <cgd@broadcom.com>
156
157 * mips.h: Note that the "+D" operand type name is now used.
158
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1592002-12-30 Chris Demetriou <cgd@broadcom.com>
160
161 * mips.h: Document "+" as the start of two-character operand
162 type names, and add new "K", "+A", "+B", and "+C" operand types.
163 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
164 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
165 defines.
166
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1672002-12-24 Dmitry Diky <diwil@mail.ru>
168
169 * msp430.h: New file. Defines msp430 opcodes.
170
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1712002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
172
173 * h8300.h: Added some more pseudo opcodes for system call
174 processing.
175
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1762002-12-19 Chris Demetriou <cgd@broadcom.com>
177
178 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
179 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
180 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
181 (OP_OP_SDC2, OP_OP_SDC3): Define.
182
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1832002-12-16 Alan Modra <amodra@bigpond.net.au>
184
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185 * hppa.h (completer_chars): #if 0 out.
186
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187 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
188 "default_args".
189 (struct not_wot): Constify "args".
190 (struct not): Constify "name".
191 (numopcodes): Delete.
192 (endop): Delete.
193
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1942002-12-13 Alan Modra <amodra@bigpond.net.au>
195
196 * pj.h (pj_opc_info_t): Add union.
197
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JW
1982002-12-04 David Mosberger <davidm@hpl.hp.com>
199
200 * ia64.h: Fix copyright message.
201 (IA64_OPND_AR_CSD): New operand kind.
202
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RH
2032002-12-03 Richard Henderson <rth@redhat.com>
204
205 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
206
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AM
2072002-12-03 Alan Modra <amodra@bigpond.net.au>
208
209 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
210 Constify "leaf" and "multi".
211
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KD
2122002-11-19 Klee Dienes <kdienes@apple.com>
213
214 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
215 fields.
216 (h8_opcodes). Modify initializer and initializer macros to no
217 longer initialize the removed fields.
adadcc0c 218
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SS
2192002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
220
221 * tic4x.h (c4x_insts): Fixed LDHI constraint
222
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KD
2232002-11-18 Klee Dienes <kdienes@apple.com>
224
225 * h8300.h (h8_opcode): Remove 'length' field.
226 (h8_opcodes): Mark as 'const' (both the declaration and
227 definition). Modify initializer and initializer macros to no
228 longer initialize the length field.
229
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2302002-11-18 Klee Dienes <kdienes@apple.com>
231
232 * arc.h (arc_ext_opcodes): Declare as extern.
233 (arc_ext_operands): Declare as extern.
234 * i860.h (i860_opcodes): Declare as const.
235
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SS
2362002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
237
238 * tic4x.h: File reordering. Added enhanced opcodes.
239
2402002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
241
242 * tic4x.h: Major rewrite of entire file. Define instruction
243 classes, and put each instruction into a class.
244
2452002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
246
247 * tic4x.h: Added new opcodes and corrected some bugs. Add support
248 for new DSP types.
249
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AM
2502002-10-14 Alan Modra <amodra@bigpond.net.au>
251
252 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
253
701b80cd 2542002-09-30 Gavin Romig-Koch <gavin@redhat.com>
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AM
255 Ken Raeburn <raeburn@cygnus.com>
256 Aldy Hernandez <aldyh@redhat.com>
257 Eric Christopher <echristo@redhat.com>
258 Richard Sandiford <rsandifo@redhat.com>
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RS
259
260 * mips.h: Update comment for new opcodes.
261 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
262 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
263 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
264 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
265 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
266 Don't match CPU_R4111 with INSN_4100.
267
0449635d 2682002-08-19 Elena Zannoni <ezannoni@redhat.com>
0449635d 269
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AM
270 From matthew green <mrg@redhat.com>
271
272 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
0449635d 273 instructions.
adadcc0c 274 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
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EZ
275 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
276 e500x2 Integer select, branch locking, performance monitor,
277 cache locking and machine check APUs, respectively.
278 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
279 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
280
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SC
2812002-08-13 Stephane Carrez <stcarrez@nerim.fr>
282
283 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
284 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
285 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
286 memory banks.
287 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
288
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2892002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
290
291 * mips.h (INSN_MIPS16): New define.
292
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2932002-07-08 Alan Modra <amodra@bigpond.net.au>
294
295 * i386.h: Remove IgnoreSize from movsx and movzx.
296
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2972002-06-08 Alan Modra <amodra@bigpond.net.au>
298
299 * a29k.h: Replace CONST with const.
300 (CONST): Don't define.
301 * convex.h: Replace CONST with const.
302 (CONST): Don't define.
303 * dlx.h: Replace CONST with const.
304 * or32.h (CONST): Don't define.
305
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3062002-05-30 Chris G. Demetriou <cgd@broadcom.com>
307
308 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
309 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
310 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
311 (INSN_MDMX): New constants, for MDMX support.
312 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
313
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3142002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
315
316 * dlx.h: New file.
317
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3182002-05-25 Alan Modra <amodra@bigpond.net.au>
319
320 * ia64.h: Use #include "" instead of <> for local header files.
321 * sparc.h: Likewise.
322
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3232002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
324
325 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
326
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3272002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
328
adadcc0c 329 * h8300.h: Corrected defs of all control regs
b9c9142c 330 and eepmov instr.
adadcc0c 331
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3322002-04-11 Alan Modra <amodra@bigpond.net.au>
333
334 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 335 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 336
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3372002-03-15 Chris G. Demetriou <cgd@broadcom.com>
338
339 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
340 instructions.
341 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
342 may be passed along with the ISA bitmask.
343
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3442002-03-05 Paul Koning <pkoning@equallogic.com>
345
346 * pdp11.h: Add format codes for float instruction formats.
347
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3482002-02-25 Alan Modra <amodra@bigpond.net.au>
349
350 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
351
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352Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
353
354 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
355
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356Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
357
358 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
359 (xchg): Fix.
360 (in, out): Disable 64bit operands.
361 (call, jmp): Avoid REX prefixes.
362 (jcxz): Prohibit in 64bit mode
363 (jrcxz, loop): Add 64bit variants.
364 (movq): Fix patterns.
365 (movmskps, pextrw, pinstrw): Add 64bit variants.
366
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3672002-01-31 Ivan Guzvinec <ivang@opencores.org>
368
369 * or32.h: New file.
370
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3712002-01-22 Graydon Hoare <graydon@redhat.com>
372
373 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
374 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
375
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3762002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
377
378 * h8300.h: Comment typo fix.
379
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3802002-01-03 matthew green <mrg@redhat.com>
381
382 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
383 (PPC_OPCODE_BOOKE64): Likewise.
384
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385Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
386
387 * hppa.h (call, ret): Move to end of table.
388 (addb, addib): PA2.0 variants should have been PA2.0W.
389 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
390 happy.
391 (fldw, fldd, fstw, fstd, bb): Likewise.
392 (short loads/stores): Tweak format specifier slightly to keep
393 disassembler happy.
394 (indexed loads/stores): Likewise.
395 (absolute loads/stores): Likewise.
396
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3972001-12-04 Alexandre Oliva <aoliva@redhat.com>
398
399 * d10v.h (OPERAND_NOSP): New macro.
400
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4012001-11-29 Alexandre Oliva <aoliva@redhat.com>
402
403 * d10v.h (OPERAND_SP): New macro.
404
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4052001-11-15 Alan Modra <amodra@bigpond.net.au>
406
407 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
408
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4092001-11-11 Timothy Wall <twall@alum.mit.edu>
410
411 * tic54x.h: Revise opcode layout; don't really need a separate
412 structure for parallel opcodes.
413
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4142001-11-13 Zack Weinberg <zack@codesourcery.com>
415 Alan Modra <amodra@bigpond.net.au>
416
417 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
418 accept WordReg.
419
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4202001-11-04 Chris Demetriou <cgd@broadcom.com>
421
422 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
423
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4242001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
425
426 * mmix.h: New file.
427
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4282001-10-18 Chris Demetriou <cgd@broadcom.com>
429
430 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
431 of the expression, to make source code merging easier.
432
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4332001-10-17 Chris Demetriou <cgd@broadcom.com>
434
435 * mips.h: Sort coprocessor instruction argument characters
436 in comment, add a few more words of description for "H".
437
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4382001-10-17 Chris Demetriou <cgd@broadcom.com>
439
440 * mips.h (INSN_SB1): New cpu-specific instruction bit.
441 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
442 if cpu is CPU_SB1.
443
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MG
4442001-10-17 matthew green <mrg@redhat.com>
445
446 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
447
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MG
4482001-10-12 matthew green <mrg@redhat.com>
449
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450 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
451 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
452 instructions, respectively.
418c1742 453
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NC
4542001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
455
456 * v850.h: Remove spurious comment.
457
015cf428
NC
4582001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
459
460 * h8300.h: Fix compile time warning messages
461
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4622001-09-04 Richard Henderson <rth@redhat.com>
463
464 * alpha.h (struct alpha_operand): Pack elements into bitfields.
465
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4662001-08-31 Eric Christopher <echristo@redhat.com>
467
468 * mips.h: Remove CPU_MIPS32_4K.
469
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4702001-08-27 Torbjorn Granlund <tege@swox.com>
471
472 * ppc.h (PPC_OPERAND_DS): Define.
473
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AJ
4742001-08-25 Andreas Jaeger <aj@suse.de>
475
476 * d30v.h: Fix declaration of reg_name_cnt.
477
478 * d10v.h: Fix declaration of d10v_reg_name_cnt.
479
480 * arc.h: Add prototypes from opcodes/arc-opc.c.
481
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4822001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
483
484 * mips.h (INSN_10000): Define.
485 (OPCODE_IS_MEMBER): Check for INSN_10000.
486
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4872001-08-10 Alan Modra <amodra@one.net.au>
488
489 * ppc.h: Revert 2001-08-08.
490
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4912001-08-10 Richard Sandiford <rsandifo@redhat.com>
492
493 * mips.h (INSN_GP32): Remove.
494 (OPCODE_IS_MEMBER): Remove gp32 parameter.
495 (M_MOVE): New macro identifier.
496
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4972001-08-08 Alan Modra <amodra@one.net.au>
498
499 1999-10-25 Torbjorn Granlund <tege@swox.com>
500 * ppc.h (struct powerpc_operand): New field `reloc'.
501
3b16e843
NC
5022001-08-01 Aldy Hernandez <aldyh@redhat.com>
503
504 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
505
5062001-07-12 Jeff Johnston <jjohnstn@redhat.com>
507
508 * cgen.h (CGEN_INSN): Add regex support.
509 (build_insn_regex): Declare.
510
81f6038f
FCE
5112001-07-11 Frank Ch. Eigler <fche@redhat.com>
512
513 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
514 (cgen_cpu_desc): Ditto.
515
32cfffe3
BE
5162001-07-07 Ben Elliston <bje@redhat.com>
517
518 * m88k.h: Clean up and reformat. Remove unused code.
519
3e890047
GK
5202001-06-14 Geoffrey Keating <geoffk@redhat.com>
521
522 * cgen.h (cgen_keyword): Add nonalpha_chars field.
523
d1cf510e
NC
5242001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
525
526 * mips.h (CPU_R12000): Define.
527
e281c457
JH
5282001-05-23 John Healy <jhealy@redhat.com>
529
530 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 531
aa5f19f2
NC
5322001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
533
534 * mips.h (INSN_ISA_MASK): Define.
535
67d6227d
AM
5362001-05-12 Alan Modra <amodra@one.net.au>
537
538 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
539 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
540 and use InvMem as these insns must have register operands.
541
992aaec9
AM
5422001-05-04 Alan Modra <amodra@one.net.au>
543
544 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
545 and pextrw to swap reg/rm assignments.
546
4ef7f0bf
HPN
5472001-04-05 Hans-Peter Nilsson <hp@axis.com>
548
549 * cris.h (enum cris_insn_version_usage): Correct comment for
550 cris_ver_v3p.
551
0f17484f
AM
5522001-03-24 Alan Modra <alan@linuxcare.com.au>
553
554 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
555 Add InvMem to first operand of "maskmovdqu".
556
7ccb5238
HPN
5572001-03-22 Hans-Peter Nilsson <hp@axis.com>
558
559 * cris.h (ADD_PC_INCR_OPCODE): New macro.
560
361bfa20
KH
5612001-03-21 Kazu Hirata <kazu@hxi.com>
562
563 * h8300.h: Fix formatting.
564
87890af0
AM
5652001-03-22 Alan Modra <alan@linuxcare.com.au>
566
567 * i386.h (i386_optab): Add paddq, psubq.
568
2e98d2de
AM
5692001-03-19 Alan Modra <alan@linuxcare.com.au>
570
571 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
572
80a523c2
NC
5732001-02-28 Igor Shevlyakov <igor@windriver.com>
574
575 * m68k.h: new defines for Coldfire V4. Update mcf to know
576 about mcf5407.
577
e135f41b
NC
5782001-02-18 lars brinkhoff <lars@nocrew.org>
579
580 * pdp11.h: New file.
581
5822001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
583
584 * i386.h (i386_optab): SSE integer converison instructions have
585 64bit versions on x86-64.
586
8eaec934
NC
5872001-02-10 Nick Clifton <nickc@redhat.com>
588
589 * mips.h: Remove extraneous whitespace. Formating change to allow
590 for future contribution.
591
a85d7ed0
NC
5922001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
593
594 * s390.h: New file.
595
0715dc88
PM
5962001-02-02 Patrick Macdonald <patrickm@redhat.com>
597
adadcc0c
AM
598 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
599 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
600 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
0715dc88 601
296bc568
AM
6022001-01-24 Karsten Keil <kkeil@suse.de>
603
604 * i386.h (i386_optab): Fix swapgs
605
1328dc98
AM
6062001-01-14 Alan Modra <alan@linuxcare.com.au>
607
608 * hppa.h: Describe new '<' and '>' operand types, and tidy
609 existing comments.
610 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
611 Remove duplicate "ldw j(s,b),x". Sort some entries.
612
e135f41b 6132001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
614
615 * i386.h (i386_optab): Fix pusha and ret templates.
616
0d2bcfaf
NC
6172001-01-11 Peter Targett <peter.targett@arccores.com>
618
619 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
620 definitions for masking cpu type.
621 (arc_ext_operand_value) New structure for storing extended
622 operands.
623 (ARC_OPERAND_*) Flags for operand values.
624
6252001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
626
627 * i386.h (pinsrw): Add.
628 (pshufw): Remove.
629 (cvttpd2dq): Fix operands.
630 (cvttps2dq): Likewise.
631 (movq2q): Rename to movdq2q.
632
079966a8
AM
6332001-01-10 Richard Schaal <richard.schaal@intel.com>
634
635 * i386.h: Correct movnti instruction.
636
8c1f9e76
JJ
6372001-01-09 Jeff Johnston <jjohnstn@redhat.com>
638
639 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
640 of operands (unsigned char or unsigned short).
641 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
642 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
643
0d2bcfaf 6442001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
645
646 * i386.h (i386_optab): Make [sml]fence template to use immext field.
647
0d2bcfaf 6482001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
649
650 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
651 introduced by Pentium4
652
0d2bcfaf 6532000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
654
655 * i386.h (i386_optab): Add "rex*" instructions;
656 add swapgs; disable jmp/call far direct instructions for
657 64bit mode; add syscall and sysret; disable registers for 0xc6
658 template. Add 'q' suffixes to extendable instructions, disable
079966a8 659 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
660 (i386_regtab): Add extended registers.
661 (*Suf): Add No_qSuf.
662 (q_Suf, wlq_Suf, bwlq_Suf): New.
663
0d2bcfaf 6642000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
665
666 * i386.h (i386_optab): Replace "Imm" with "EncImm".
667 (i386_regtab): Add flags field.
d83c6548 668
bf40d919
NC
6692000-12-12 Nick Clifton <nickc@redhat.com>
670
671 * mips.h: Fix formatting.
672
4372b673
NC
6732000-12-01 Chris Demetriou <cgd@sibyte.com>
674
adadcc0c
AM
675 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
676 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
677 OP_*_SYSCALL definitions.
678 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
679 19 bit wait codes.
680 (MIPS operand specifier comments): Remove 'm', add 'U' and
681 'J', and update the meaning of 'B' so that it's more general.
682
683 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
684 INSN_ISA5): Renumber, redefine to mean the ISA at which the
685 instruction was added.
686 (INSN_ISA32): New constant.
687 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
688 Renumber to avoid new and/or renumbered INSN_* constants.
689 (INSN_MIPS32): Delete.
690 (ISA_UNKNOWN): New constant to indicate unknown ISA.
691 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
692 ISA_MIPS32): New constants, defined to be the mask of INSN_*
693 constants available at that ISA level.
694 (CPU_UNKNOWN): New constant to indicate unknown CPU.
695 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
696 define it with a unique value.
697 (OPCODE_IS_MEMBER): Update for new ISA membership-related
698 constant meanings.
699
700 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
701 definitions.
702
703 * mips.h (CPU_SB1): New constant.
c6c98b38 704
19f7b010
JJ
7052000-10-20 Jakub Jelinek <jakub@redhat.com>
706
707 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
708 Note that '3' is used for siam operand.
709
139368c9
JW
7102000-09-22 Jim Wilson <wilson@cygnus.com>
711
712 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
713
156c2f8b 7142000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 715
156c2f8b
NC
716 * mips.h: Use defines instead of hard-coded processor numbers.
717 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 718 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
719 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
720 CPU_4KC, CPU_4KM, CPU_4KP): Define..
721 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 722 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 723 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
724 Add 'P' to used characters.
725 Use 'H' for coprocessor select field.
156c2f8b 726 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
727 Document new arg characters and add to used characters.
728 (INSN_MIPS32): New define for MIPS32 extensions.
729 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 730
3c5ce02e
AM
7312000-09-05 Alan Modra <alan@linuxcare.com.au>
732
733 * hppa.h: Mention cz completer.
734
50b81f19
JW
7352000-08-16 Jim Wilson <wilson@cygnus.com>
736
737 * ia64.h (IA64_OPCODE_POSTINC): New.
738
fc29466d
L
7392000-08-15 H.J. Lu <hjl@gnu.org>
740
741 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
742 IgnoreSize change.
743
4f1d9bd8
NC
7442000-08-08 Jason Eckhardt <jle@cygnus.com>
745
746 * i860.h: Small formatting adjustments.
747
45ee1401
DC
7482000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
749
750 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
751 Move related opcodes closer to each other.
752 Minor changes in comments, list undefined opcodes.
753
9d551405
DB
7542000-07-26 Dave Brolley <brolley@redhat.com>
755
756 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
757
4f1d9bd8
NC
7582000-07-22 Jason Eckhardt <jle@cygnus.com>
759
760 * i860.h (btne, bte, bla): Changed these opcodes
761 to use sbroff ('r') instead of split16 ('s').
762 (J, K, L, M): New operand types for 16-bit aligned fields.
763 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
764 use I, J, K, L, M instead of just I.
765 (T, U): New operand types for split 16-bit aligned fields.
766 (st.x): Changed these opcodes to use S, T, U instead of just S.
767 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
768 exist on the i860.
769 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
770 (pfeq.ss, pfeq.dd): New opcodes.
771 (st.s): Fixed incorrect mask bits.
772 (fmlow): Fixed incorrect mask bits.
773 (fzchkl, pfzchkl): Fixed incorrect mask bits.
774 (faddz, pfaddz): Fixed incorrect mask bits.
775 (form, pform): Fixed incorrect mask bits.
776 (pfld.l): Fixed incorrect mask bits.
777 (fst.q): Fixed incorrect mask bits.
778 (all floating point opcodes): Fixed incorrect mask bits for
779 handling of dual bit.
780
c8488617
HPN
7812000-07-20 Hans-Peter Nilsson <hp@axis.com>
782
783 cris.h: New file.
784
65aa24b6
NC
7852000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
786
787 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
788 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
789 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
790 (AVR_ISA_M83): Define for ATmega83, ATmega85.
791 (espm): Remove, because ESPM removed in databook update.
792 (eicall, eijmp): Move to the end of opcode table.
793
60bcf0fa
NC
7942000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
795
796 * m68hc11.h: New file for support of Motorola 68hc11.
797
60a2978a
DC
798Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
799
800 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
801
68ab2dd9
DC
802Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
803
804 * avr.h: New file with AVR opcodes.
805
f0662e27
DL
806Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
807
808 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
809
b722f2be
AM
8102000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
811
812 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
813
f9e0cf0b
AM
8142000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
815
816 * i386.h: Use sl_FP, not sl_Suf for fild.
817
f660ee8b
FCE
8182000-05-16 Frank Ch. Eigler <fche@redhat.com>
819
820 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
821 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
822 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
823 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
824
558b0a60
AM
8252000-05-13 Alan Modra <alan@linuxcare.com.au>,
826
827 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
828
e413e4e9
AM
8292000-05-13 Alan Modra <alan@linuxcare.com.au>,
830 Alexander Sokolov <robocop@netlink.ru>
831
832 * i386.h (i386_optab): Add cpu_flags for all instructions.
833
8342000-05-13 Alan Modra <alan@linuxcare.com.au>
835
836 From Gavin Romig-Koch <gavin@cygnus.com>
837 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
838
5c84d377
TW
8392000-05-04 Timothy Wall <twall@cygnus.com>
840
841 * tic54x.h: New.
842
966f959b
C
8432000-05-03 J.T. Conklin <jtc@redback.com>
844
845 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
846 (PPC_OPERAND_VR): New operand flag for vector registers.
847
c5d05dbb
JL
8482000-05-01 Kazu Hirata <kazu@hxi.com>
849
850 * h8300.h (EOP): Add missing initializer.
851
a7fba0e0
JL
852Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
853
854 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
855 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
856 New operand types l,y,&,fe,fE,fx added to support above forms.
857 (pa_opcodes): Replaced usage of 'x' as source/target for
858 floating point double-word loads/stores with 'fx'.
859
800eeca4
JW
860Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
861 David Mosberger <davidm@hpl.hp.com>
862 Timothy Wall <twall@cygnus.com>
863 Jim Wilson <wilson@cygnus.com>
864
865 * ia64.h: New file.
866
ba23e138
NC
8672000-03-27 Nick Clifton <nickc@cygnus.com>
868
869 * d30v.h (SHORT_A1): Fix value.
870 (SHORT_AR): Renumber so that it is at the end of the list of short
871 instructions, not the end of the list of long instructions.
872
d0b47220
AM
8732000-03-26 Alan Modra <alan@linuxcare.com>
874
875 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
876 problem isn't really specific to Unixware.
877 (OLDGCC_COMPAT): Define.
878 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
879 destination %st(0).
880 Fix lots of comments.
881
866afedc
NC
8822000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
883
adadcc0c
AM
884 * d30v.h:
885 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
886 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
887 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
888 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
889 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
890 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
891 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
866afedc 892
cc5ca5ce
AM
8932000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
894
895 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
896 fistpd without suffix.
897
68e324a2
NC
8982000-02-24 Nick Clifton <nickc@cygnus.com>
899
900 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
adadcc0c 901 'signed_overflow_ok_p'.
68e324a2
NC
902 Delete prototypes for cgen_set_flags() and cgen_get_flags().
903
60f036a2
AH
9042000-02-24 Andrew Haley <aph@cygnus.com>
905
906 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
907 (CGEN_CPU_TABLE): flags: new field.
908 Add prototypes for new functions.
d83c6548 909
9b9b5cd4
AM
9102000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
911
912 * i386.h: Add some more UNIXWARE_COMPAT comments.
913
5b93d8bb
AM
9142000-02-23 Linas Vepstas <linas@linas.org>
915
916 * i370.h: New file.
917
4f1d9bd8
NC
9182000-02-22 Chandra Chavva <cchavva@cygnus.com>
919
920 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
921 cannot be combined in parallel with ADD/SUBppp.
922
87f398dd
AH
9232000-02-22 Andrew Haley <aph@cygnus.com>
924
925 * mips.h: (OPCODE_IS_MEMBER): Add comment.
926
367c01af
AH
9271999-12-30 Andrew Haley <aph@cygnus.com>
928
9a1e79ca
AH
929 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
930 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
931 insns.
367c01af 932
add0c677
AM
9332000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
934
935 * i386.h: Qualify intel mode far call and jmp with x_Suf.
936
3138f287
AM
9371999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
938
939 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
940 indirect jumps and calls. Add FF/3 call for intel mode.
941
ccecd07b
JL
942Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
943
944 * mn10300.h: Add new operand types. Add new instruction formats.
945
b37e19e9
JL
946Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
947
948 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
949 instruction.
950
5fce5ddf
GRK
9511999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
952
953 * mips.h (INSN_ISA5): New.
954
2bd7f1f3
GRK
9551999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
956
957 * mips.h (OPCODE_IS_MEMBER): New.
958
4df2b5c5
NC
9591999-10-29 Nick Clifton <nickc@cygnus.com>
960
961 * d30v.h (SHORT_AR): Define.
962
446a06c9
MM
9631999-10-18 Michael Meissner <meissner@cygnus.com>
964
965 * alpha.h (alpha_num_opcodes): Convert to unsigned.
966 (alpha_num_operands): Ditto.
967
eca04c6a
JL
968Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
969
adadcc0c 970 * hppa.h (pa_opcodes): Add load and store cache control to
eca04c6a
JL
971 instructions. Add ordered access load and store.
972
973 * hppa.h (pa_opcode): Add new entries for addb and addib.
974
975 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
976
adadcc0c 977 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
eca04c6a 978
c43185de
DN
979Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
980
981 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
982
ec3533da
JL
983Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
984
390f858d
JL
985 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
986 and "be" using completer prefixes.
987
8c47ebd9
JL
988 * hppa.h (pa_opcodes): Add initializers to silence compiler.
989
ec3533da
JL
990 * hppa.h: Update comments about character usage.
991
18369bea
JL
992Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
993
994 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
995 up the new fstw & bve instructions.
996
c36efdd2
JL
997Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
998
d3ffb032
JL
999 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
1000 instructions.
1001
c49ec3da
JL
1002 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
1003
5d2e7ecc
JL
1004 * hppa.h (pa_opcodes): Add long offset double word load/store
1005 instructions.
1006
6397d1a2
JL
1007 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
1008 stores.
1009
142f0fe0
JL
1010 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
1011
f5a68b45
JL
1012 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
1013
8235801e
JL
1014 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
1015
35184366
JL
1016 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
1017
f0bfde5e
JL
1018 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
1019
27bbbb58
JL
1020 * hppa.h (pa_opcodes): Add support for "b,l".
1021
c36efdd2
JL
1022 * hppa.h (pa_opcodes): Add support for "b,gate".
1023
f2727d04
JL
1024Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
1025
9392fb11 1026 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 1027 in xmpyu.
9392fb11 1028
e0c52e99
JL
1029 * hppa.h (pa_opcodes): Fix mask for probe and probei.
1030
f2727d04
JL
1031 * hppa.h (pa_opcodes): Fix mask for depwi.
1032
52d836e2
JL
1033Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
1034
1035 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
1036 an explicit output argument.
1037
90765e3a
JL
1038Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
1039
1040 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
1041 Add a few PA2.0 loads and store variants.
1042
8340b17f
ILT
10431999-09-04 Steve Chamberlain <sac@pobox.com>
1044
1045 * pj.h: New file.
1046
5f47d35b
AM
10471999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
1048
1049 * i386.h (i386_regtab): Move %st to top of table, and split off
1050 other fp reg entries.
1051 (i386_float_regtab): To here.
1052
1c143202
JL
1053Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1054
7d8fdb64
JL
1055 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
1056 by 'f'.
1057
90927b9c
JL
1058 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
1059 Add supporting args.
1060
adadcc0c
AM
1061 * hppa.h: Document new completers and args.
1062 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
1d16bf9c
JL
1063 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
1064 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
1065 pmenb and pmdis.
1066
adadcc0c 1067 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
96226a68
JL
1068 hshr, hsub, mixh, mixw, permh.
1069
5d4ba527
JL
1070 * hppa.h (pa_opcodes): Change completers in instructions to
1071 use 'c' prefix.
1072
adadcc0c 1073 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
e9fc28c6
JL
1074 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
1075
adadcc0c 1076 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
1c143202
JL
1077 fnegabs to use 'I' instead of 'F'.
1078
9e525108
AM
10791999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
1080
1081 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
1082 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
1083 Alphabetically sort PIII insns.
1084
e8da1bf1
DE
1085Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
1086
1087 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
1088
7d627258
JL
1089Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1090
5696871a
JL
1091 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
1092 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
1093
adadcc0c 1094 * hppa.h: Document 64 bit condition completers.
7d627258 1095
c5e52916
JL
1096Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1097
1098 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
1099
eecb386c
AM
11001999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
1101
1102 * i386.h (i386_optab): Add DefaultSize modifier to all insns
1103 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
1104 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
1105
88a380f3
JL
1106Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1107 Jeff Law <law@cygnus.com>
1108
1109 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
1110
1111 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 1112
adadcc0c 1113 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
1114 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
1115
145cf1f0
AM
11161999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
1117
1118 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
1119
73826640
JL
1120Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
1121
1122 * hppa.h (struct pa_opcode): Add new field "flags".
1123 (FLAGS_STRICT): Define.
1124
b65db252
JL
1125Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
1126 Jeff Law <law@cygnus.com>
1127
f7fc668b
JL
1128 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
1129
1130 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 1131
10084519
AM
11321999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
1133
1134 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
1135 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
1136 flag to fcomi and friends.
1137
cd8a80ba
JL
1138Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
1139
1140 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 1141 integer logical instructions.
cd8a80ba 1142
1fca749b
ILT
11431999-05-28 Linus Nordberg <linus.nordberg@canit.se>
1144
1145 * m68k.h: Document new formats `E', `G', `H' and new places `N',
1146 `n', `o'.
1147
1148 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
1149 and new places `m', `M', `h'.
1150
aa008907
JL
1151Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
1152
1153 * hppa.h (pa_opcodes): Add several processor specific system
1154 instructions.
1155
e26b85f0
JL
1156Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
1157
d83c6548 1158 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
1159 "addb", and "addib" to be used by the disassembler.
1160
c608c12e
AM
11611999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1162
1163 * i386.h (ReverseModrm): Remove all occurences.
1164 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1165 movmskps, pextrw, pmovmskb, maskmovq.
1166 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1167 ignore the data size prefix.
1168
1169 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1170 Mostly stolen from Doug Ledford <dledford@redhat.com>
1171
45c18104
RH
1172Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1173
1174 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1175
252b5132
RH
11761999-04-14 Doug Evans <devans@casey.cygnus.com>
1177
1178 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1179 (CGEN_ATTR_TYPE): Update.
1180 (CGEN_ATTR_MASK): Number booleans starting at 0.
1181 (CGEN_ATTR_VALUE): Update.
1182 (CGEN_INSN_ATTR): Update.
1183
1184Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1185
1186 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1187 instructions.
1188
1189Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1190
1191 * hppa.h (bb, bvb): Tweak opcode/mask.
1192
1193
11941999-03-22 Doug Evans <devans@casey.cygnus.com>
1195
1196 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1197 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1198 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1199 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1200 Delete member max_insn_size.
1201 (enum cgen_cpu_open_arg): New enum.
1202 (cpu_open): Update prototype.
1203 (cpu_open_1): Declare.
1204 (cgen_set_cpu): Delete.
1205
12061999-03-11 Doug Evans <devans@casey.cygnus.com>
1207
1208 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1209 (CGEN_OPERAND_NIL): New macro.
1210 (CGEN_OPERAND): New member `type'.
1211 (@arch@_cgen_operand_table): Delete decl.
1212 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1213 (CGEN_OPERAND_TABLE): New struct.
1214 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1215 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1216 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1217 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1218 {get,set}_{int,vma}_operand.
1219 (@arch@_cgen_cpu_open): New arg `isa'.
1220 (cgen_set_cpu): Ditto.
1221
1222Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1223
1224 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1225
12261999-02-25 Doug Evans <devans@casey.cygnus.com>
1227
1228 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1229 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1230 enum cgen_hw_type.
1231 (CGEN_HW_TABLE): New struct.
1232 (hw_table): Delete declaration.
1233 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1234 to table entry to enum.
1235 (CGEN_OPINST): Ditto.
1236 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1237
1238Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1239
1240 * alpha.h (AXP_OPCODE_EV6): New.
1241 (AXP_OPCODE_NOPAL): Include it.
1242
12431999-02-09 Doug Evans <devans@casey.cygnus.com>
1244
1245 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1246 All uses updated. New members int_insn_p, max_insn_size,
1247 parse_operand,insert_operand,extract_operand,print_operand,
1248 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1249 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1250 extract_handlers,print_handlers.
1251 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1252 (CGEN_ATTR_BOOL_OFFSET): New macro.
1253 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1254 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1255 (cgen_opcode_handler): Renamed from cgen_base.
1256 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1257 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1258 all uses updated.
1259 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1260 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1261 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1262 (CGEN_OPCODE,CGEN_IBASE): New types.
1263 (CGEN_INSN): Rewrite.
1264 (CGEN_{ASM,DIS}_HASH*): Delete.
1265 (init_opcode_table,init_ibld_table): Declare.
1266 (CGEN_INSN_ATTR): New type.
1267
1268Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1269
adadcc0c
AM
1270 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1271 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1272 Change *Suf definitions to include x and d suffixes.
1273 (movsx): Use w_Suf and b_Suf.
1274 (movzx): Likewise.
1275 (movs): Use bwld_Suf.
1276 (fld): Change ordering. Use sld_FP.
1277 (fild): Add Intel Syntax equivalent of fildq.
1278 (fst): Use sld_FP.
1279 (fist): Use sld_FP.
1280 (fstp): Use sld_FP. Add x_FP version.
1281 (fistp): LLongMem version for Intel Syntax.
1282 (fcom, fcomp): Use sld_FP.
1283 (fadd, fiadd, fsub): Use sld_FP.
1284 (fsubr): Use sld_FP.
1285 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
252b5132
RH
1286
12871999-01-27 Doug Evans <devans@casey.cygnus.com>
1288
1289 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1290 CGEN_MODE_UINT.
1291
e135f41b 12921999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1293
1294 * hppa.h (bv): Fix mask.
1295
12961999-01-05 Doug Evans <devans@casey.cygnus.com>
1297
1298 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1299 (CGEN_ATTR): Use it.
1300 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1301 (CGEN_ATTR_TABLE): New member dfault.
1302
13031998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1304
1305 * mips.h (MIPS16_INSN_BRANCH): New.
1306
1307Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1308
1309 The following is part of a change made by Edith Epstein
d83c6548
AJ
1310 <eepstein@sophia.cygnus.com> as part of a project to merge in
1311 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1312
1313 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1314 after.
252b5132
RH
1315
1316Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1317
1318 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1319 status word instructions.
252b5132
RH
1320
13211998-11-30 Doug Evans <devans@casey.cygnus.com>
1322
1323 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1324 (struct cgen_keyword_entry): Ditto.
1325 (struct cgen_operand): Ditto.
1326 (CGEN_IFLD): New typedef, with associated access macros.
1327 (CGEN_IFMT): New typedef, with associated access macros.
1328 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1329 (CGEN_IVALUE): New typedef.
1330 (struct cgen_insn): Delete const on syntax,attrs members.
1331 `format' now points to format data. Type of `value' is now
1332 CGEN_IVALUE.
1333 (struct cgen_opcode_table): New member ifld_table.
1334
13351998-11-18 Doug Evans <devans@casey.cygnus.com>
1336
1337 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1338 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1339 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1340 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1341 (cgen_opcode_table): Update type of dis_hash fn.
1342 (extract_operand): Update type of `insn_value' arg.
1343
1344Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1345
1346 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1347
1348Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1349
1350 * mips.h (INSN_MULT): Added.
1351
1352Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1353
1354 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1355
1356Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1357
1358 * cgen.h (CGEN_INSN_INT): New typedef.
1359 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1360 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1361 (CGEN_INSN_BYTES_PTR): New typedef.
1362 (CGEN_EXTRACT_INFO): New typedef.
1363 (cgen_insert_fn,cgen_extract_fn): Update.
1364 (cgen_opcode_table): New member `insn_endian'.
1365 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1366 (insert_operand,extract_operand): Update.
1367 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1368
1369Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1370
1371 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1372 (struct CGEN_HW_ENTRY): New member `attrs'.
1373 (CGEN_HW_ATTR): New macro.
1374 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1375 (CGEN_INSN_INVALID_P): New macro.
1376
1377Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1378
1379 * hppa.h: Add "fid".
d83c6548 1380
252b5132
RH
1381Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1382
1383 From Robert Andrew Dale <rob@nb.net>
1384 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1385 (AMD_3DNOW_OPCODE): Define.
1386
1387Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1388
1389 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1390
1391Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1392
1393 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1394
1395Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1396
1397 Move all global state data into opcode table struct, and treat
1398 opcode table as something that is "opened/closed".
1399 * cgen.h (CGEN_OPCODE_DESC): New type.
1400 (all fns): New first arg of opcode table descriptor.
1401 (cgen_set_parse_operand_fn): Add prototype.
1402 (cgen_current_machine,cgen_current_endian): Delete.
1403 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1404 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1405 dis_hash_table,dis_hash_table_entries.
1406 (opcode_open,opcode_close): Add prototypes.
1407
1408 * cgen.h (cgen_insn): New element `cdx'.
1409
1410Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1411
1412 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1413
1414Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1415
1416 * mn10300.h: Add "no_match_operands" field for instructions.
1417 (MN10300_MAX_OPERANDS): Define.
1418
1419Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1420
1421 * cgen.h (cgen_macro_insn_count): Declare.
1422
1423Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1424
1425 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1426 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1427 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1428 set_{int,vma}_operand.
1429
1430Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1431
1432 * mn10300.h: Add "machine" field for instructions.
1433 (MN103, AM30): Define machine types.
d83c6548 1434
252b5132
RH
1435Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1436
1437 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1438
14391998-06-18 Ulrich Drepper <drepper@cygnus.com>
1440
1441 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1442
1443Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1444
1445 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1446 and ud2b.
1447 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1448 those that happen to be implemented on pentiums.
1449
1450Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1451
1452 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1453 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1454 with Size16|IgnoreSize or Size32|IgnoreSize.
1455
1456Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1457
1458 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1459 (REPE): Rename to REPE_PREFIX_OPCODE.
1460 (i386_regtab_end): Remove.
1461 (i386_prefixtab, i386_prefixtab_end): Remove.
1462 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1463 of md_begin.
1464 (MAX_OPCODE_SIZE): Define.
1465 (i386_optab_end): Remove.
1466 (sl_Suf): Define.
1467 (sl_FP): Use sl_Suf.
1468
1469 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1470 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1471 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1472 data32, dword, and adword prefixes.
1473 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1474 regs.
1475
1476Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1477
1478 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1479
1480 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1481 register operands, because this is a common idiom. Flag them with
1482 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1483 fdivrp because gcc erroneously generates them. Also flag with a
1484 warning.
1485
1486 * i386.h: Add suffix modifiers to most insns, and tighter operand
1487 checks in some cases. Fix a number of UnixWare compatibility
1488 issues with float insns. Merge some floating point opcodes, using
1489 new FloatMF modifier.
1490 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1491 consistency.
1492
1493 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1494 IgnoreDataSize where appropriate.
1495
1496Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1497
1498 * i386.h: (one_byte_segment_defaults): Remove.
1499 (two_byte_segment_defaults): Remove.
1500 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1501
1502Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1503
1504 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1505 (cgen_hw_lookup_by_num): Declare.
1506
1507Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1508
1509 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1510 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1511
1512Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1513
1514 * cgen.h (cgen_asm_init_parse): Delete.
1515 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1516 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1517
1518Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1519
1520 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1521 (cgen_asm_finish_insn): Update prototype.
1522 (cgen_insn): New members num, data.
1523 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1524 dis_hash, dis_hash_table_size moved to ...
1525 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1526 All uses updated. New members asm_hash_p, dis_hash_p.
1527 (CGEN_MINSN_EXPANSION): New struct.
1528 (cgen_expand_macro_insn): Declare.
1529 (cgen_macro_insn_count): Declare.
1530 (get_insn_operands): Update prototype.
1531 (lookup_get_insn_operands): Declare.
1532
1533Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1534
1535 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1536 regKludge. Add operands types for string instructions.
1537
1538Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1539
1540 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1541 table.
1542
1543Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1544
1545 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1546 for `gettext'.
1547
1548Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1549
1550 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1551 Add IsString flag to string instructions.
1552 (IS_STRING): Don't define.
1553 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1554 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1555 (SS_PREFIX_OPCODE): Define.
1556
1557Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1558
1559 * i386.h: Revert March 24 patch; no more LinearAddress.
1560
1561Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1562
1563 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1564 instructions, and instead add FWait opcode modifier. Add short
1565 form of fldenv and fstenv.
1566 (FWAIT_OPCODE): Define.
1567
1568 * i386.h (i386_optab): Change second operand constraint of `mov
1569 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1570 allow legal instructions such as `movl %gs,%esi'
1571
1572Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1573
1574 * h8300.h: Various changes to fully bracket initializers.
1575
1576Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1577
1578 * i386.h: Set LinearAddress for lidt and lgdt.
1579
1580Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1581
1582 * cgen.h (CGEN_BOOL_ATTR): New macro.
1583
1584Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1585
1586 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1587
1588Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1589
1590 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1591 (cgen_insn): Record syntax and format entries here, rather than
1592 separately.
1593
1594Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1595
1596 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1597
1598Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1599
1600 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1601 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1602 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1603
1604Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1605
1606 * cgen.h (lookup_insn): New argument alias_p.
1607
1608Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1609
1610Fix rac to accept only a0:
1611 * d10v.h (OPERAND_ACC): Split into:
1612 (OPERAND_ACC0, OPERAND_ACC1) .
1613 (OPERAND_GPR): Define.
1614
1615Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1616
1617 * cgen.h (CGEN_FIELDS): Define here.
1618 (CGEN_HW_ENTRY): New member `type'.
1619 (hw_list): Delete decl.
1620 (enum cgen_mode): Declare.
1621 (CGEN_OPERAND): New member `hw'.
1622 (enum cgen_operand_instance_type): Declare.
1623 (CGEN_OPERAND_INSTANCE): New type.
1624 (CGEN_INSN): New member `operands'.
1625 (CGEN_OPCODE_DATA): Make hw_list const.
1626 (get_insn_operands,lookup_insn): Add prototypes for.
1627
1628Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1629
1630 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1631 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1632 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1633 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1634
1635Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1636
1637 * cgen.h: Correct typo in comment end marker.
1638
1639Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1640
1641 * tic30.h: New file.
1642
5a109b67 1643Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1644
1645 * cgen.h: Add prototypes for cgen_save_fixups(),
1646 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1647 of cgen_asm_finish_insn() to return a char *.
1648
1649Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1650
1651 * cgen.h: Formatting changes to improve readability.
1652
1653Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1654
1655 * cgen.h (*): Clean up pass over `struct foo' usage.
1656 (CGEN_ATTR): Make unsigned char.
1657 (CGEN_ATTR_TYPE): Update.
1658 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1659 (cgen_base): Move member `attrs' to cgen_insn.
1660 (CGEN_KEYWORD): New member `null_entry'.
1661 (CGEN_{SYNTAX,FORMAT}): New types.
1662 (cgen_insn): Format and syntax separated from each other.
1663
1664Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1665
1666 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1667 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1668 flags_{used,set} long.
1669 (d30v_operand): Make flags field long.
1670
1671Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1672
1673 * m68k.h: Fix comment describing operand types.
1674
1675Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1676
1677 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1678 everything else after down.
1679
1680Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1681
1682 * d10v.h (OPERAND_FLAG): Split into:
1683 (OPERAND_FFLAG, OPERAND_CFLAG) .
1684
1685Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1686
1687 * mips.h (struct mips_opcode): Changed comments to reflect new
1688 field usage.
1689
1690Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1691
1692 * mips.h: Added to comments a quick-ref list of all assigned
1693 operand type characters.
1694 (OP_{MASK,SH}_PERFREG): New macros.
1695
1696Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1697
1698 * sparc.h: Add '_' and '/' for v9a asr's.
1699 Patch from David Miller <davem@vger.rutgers.edu>
1700
1701Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1702
1703 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1704 area are not available in the base model (H8/300).
1705
1706Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1707
1708 * m68k.h: Remove documentation of ` operand specifier.
1709
1710Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1711
1712 * m68k.h: Document q and v operand specifiers.
1713
1714Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1715
1716 * v850.h (struct v850_opcode): Add processors field.
1717 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1718 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1719 (PROCESSOR_V850EA): New bit constants.
1720
1721Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1722
1723 Merge changes from Martin Hunt:
1724
1725 * d30v.h: Allow up to 64 control registers. Add
1726 SHORT_A5S format.
1727
1728 * d30v.h (LONG_Db): New form for delayed branches.
1729
1730 * d30v.h: (LONG_Db): New form for repeati.
1731
1732 * d30v.h (SHORT_D2B): New form.
1733
1734 * d30v.h (SHORT_A2): New form.
1735
1736 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1737 registers are used. Needed for VLIW optimization.
1738
1739Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1740
1741 * cgen.h: Move assembler interface section
1742 up so cgen_parse_operand_result is defined for cgen_parse_address.
1743 (cgen_parse_address): Update prototype.
1744
1745Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1746
1747 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1748
1749Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1750
1751 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1752 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1753 <paubert@iram.es>.
1754
1755 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1756 <paubert@iram.es>.
1757
1758 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1759 <paubert@iram.es>.
1760
1761 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1762 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1763
1764Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1765
1766 * v850.h (V850_NOT_R0): New flag.
1767
1768Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1769
1770 * v850.h (struct v850_opcode): Remove flags field.
1771
1772Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1773
1774 * v850.h (struct v850_opcode): Add flags field.
1775 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1776 fields.
1777 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1778 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1779
1780Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1781
1782 * arc.h: New file.
1783
1784Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1785
1786 * sparc.h (sparc_opcodes): Declare as const.
1787
1788Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1789
1790 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1791 uses single or double precision floating point resources.
1792 (INSN_NO_ISA, INSN_ISA1): Define.
1793 (cpu specific INSN macros): Tweak into bitmasks outside the range
1794 of INSN_ISA field.
1795
1796Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1797
1798 * i386.h: Fix pand opcode.
1799
1800Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1801
1802 * mips.h: Widen INSN_ISA and move it to a more convenient
1803 bit position. Add INSN_3900.
1804
1805Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1806
1807 * mips.h (struct mips_opcode): added new field membership.
1808
1809Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1810
1811 * i386.h (movd): only Reg32 is allowed.
1812
1813 * i386.h: add fcomp and ud2. From Wayne Scott
1814 <wscott@ichips.intel.com>.
1815
1816Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1817
1818 * i386.h: Add MMX instructions.
1819
1820Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1821
1822 * i386.h: Remove W modifier from conditional move instructions.
1823
1824Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1825
1826 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1827 with no arguments to match that generated by the UnixWare
1828 assembler.
1829
1830Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1831
1832 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1833 (cgen_parse_operand_fn): Declare.
1834 (cgen_init_parse_operand): Declare.
1835 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1836 new argument `want'.
1837 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1838 (enum cgen_parse_operand_type): New enum.
1839
1840Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1841
1842 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1843
1844Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1845
1846 * cgen.h: New file.
1847
1848Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1849
1850 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1851 fdivrp.
1852
1853Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1854
adadcc0c 1855 * v850.h (extract): Make unsigned.
252b5132
RH
1856
1857Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1858
1859 * i386.h: Add iclr.
1860
1861Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1862
1863 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1864 take a direction bit.
1865
1866Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1867
1868 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1869
1870Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1871
1872 * sparc.h: Include <ansidecl.h>. Update function declarations to
1873 use prototypes, and to use const when appropriate.
1874
1875Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1876
1877 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1878
1879Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1880
1881 * d10v.h: Change pre_defined_registers to
1882 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1883
1884Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1885
1886 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1887 Change mips_opcodes from const array to a pointer,
1888 and change bfd_mips_num_opcodes from const int to int,
1889 so that we can increase the size of the mips opcodes table
1890 dynamically.
1891
1892Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1893
1894 * d30v.h (FLAG_X): Remove unused flag.
1895
1896Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1897
1898 * d30v.h: New file.
1899
1900Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1901
1902 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1903 (PDS_VALUE): Macro to access value field of predefined symbols.
1904 (tic80_next_predefined_symbol): Add prototype.
1905
1906Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1907
1908 * tic80.h (tic80_symbol_to_value): Change prototype to match
1909 change in function, added class parameter.
1910
1911Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1912
1913 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1914 endmask fields, which are somewhat weird in that 0 and 32 are
1915 treated exactly the same.
1916
1917Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1918
1919 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1920 rather than a constant that is 2**X. Reorder them to put bits for
1921 operands that have symbolic names in the upper bits, so they can
1922 be packed into an int where the lower bits contain the value that
1923 corresponds to that symbolic name.
1924 (predefined_symbo): Add struct.
1925 (tic80_predefined_symbols): Declare array of translations.
1926 (tic80_num_predefined_symbols): Declare size of that array.
1927 (tic80_value_to_symbol): Declare function.
1928 (tic80_symbol_to_value): Declare function.
1929
1930Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1931
1932 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1933
1934Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1935
1936 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1937 be the destination register.
1938
1939Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1940
1941 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1942 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1943 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1944 that the opcode can have two vector instructions in a single
1945 32 bit word and we have to encode/decode both.
1946
1947Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1948
1949 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1950 TIC80_OPERAND_RELATIVE for PC relative.
1951 (TIC80_OPERAND_BASEREL): New flag bit for register
1952 base relative.
1953
1954Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1955
1956 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1957
1958Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1959
1960 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1961 ":s" modifier for scaling.
1962
1963Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1964
1965 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1966 (TIC80_OPERAND_M_LI): Ditto
1967
1968Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1969
1970 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1971 (TIC80_OPERAND_CC): New define for condition code operand.
1972 (TIC80_OPERAND_CR): New define for control register operand.
1973
1974Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1975
1976 * tic80.h (struct tic80_opcode): Name changed.
1977 (struct tic80_opcode): Remove format field.
1978 (struct tic80_operand): Add insertion and extraction functions.
1979 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1980 correct ones.
1981 (FMT_*): Ditto.
1982
1983Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1984
1985 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1986 type IV instruction offsets.
1987
1988Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1989
1990 * tic80.h: New file.
1991
1992Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1993
1994 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1995
1996Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1997
1998 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1999 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
2000 * v850.h: Fix comment, v850_operand not powerpc_operand.
2001
2002Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
2003
2004 * mn10200.h: Flesh out structures and definitions needed by
2005 the mn10200 assembler & disassembler.
2006
2007Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
2008
2009 * mips.h: Add mips16 definitions.
2010
2011Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
2012
2013 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
2014
2015Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
2016
2017 * mn10300.h (MN10300_OPERAND_PCREL): Define.
2018 (MN10300_OPERAND_MEMADDR): Define.
2019
2020Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
2021
2022 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
2023
2024Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
2025
2026 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
2027
2028Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
2029
2030 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
2031
2032Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
2033
2034 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
2035
2036Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
2037
2038 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
2039 negative to minimize problems with shared libraries. Organize
2040 instruction subsets by AMASK extensions and PALcode
2041 implementation.
252b5132
RH
2042 (struct alpha_operand): Move flags slot for better packing.
2043
2044Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
2045
2046 * v850.h (V850_OPERAND_RELAX): New operand flag.
2047
2048Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
2049
2050 * mn10300.h (FMT_*): Move operand format definitions
2051 here.
2052
2053Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
2054
2055 * mn10300.h (MN10300_OPERAND_PAREN): Define.
2056
2057Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
2058
2059 * mn10300.h (mn10300_opcode): Add "format" field.
2060 (MN10300_OPERAND_*): Define.
2061
2062Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
2063
2064 * mn10x00.h: Delete.
2065 * mn10200.h, mn10300.h: New files.
2066
2067Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
2068
2069 * mn10x00.h: New file.
2070
2071Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
2072
adadcc0c 2073 * v850.h: Add new flag to indicate this instruction uses a PC
252b5132
RH
2074 displacement.
2075
2076Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
2077
2078 * h8300.h (stmac): Add missing instruction.
2079
2080Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
2081
2082 * v850.h (v850_opcode): Remove "size" field. Add "memop"
2083 field.
2084
2085Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
2086
2087 * v850.h (V850_OPERAND_EP): Define.
2088
2089 * v850.h (v850_opcode): Add size field.
2090
2091Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2092
2093 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 2094 to functions used to handle unusual operand encoding.
252b5132 2095 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 2096 V850_OPERAND_SIGNED): Defined.
252b5132
RH
2097
2098Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2099
2100 * v850.h (v850_operands): Add flags field.
2101 (OPERAND_REG, OPERAND_NUM): Defined.
2102
2103Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2104
2105 * v850.h: New file.
2106
2107Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
2108
2109 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
2110 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
2111 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
2112 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
2113 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
2114 Defined.
252b5132
RH
2115
2116Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
2117
2118 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
2119 a 3 bit space id instead of a 2 bit space id.
2120
2121Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2122
2123 * d10v.h: Add some additional defines to support the
d83c6548 2124 assembler in determining which operations can be done in parallel.
252b5132
RH
2125
2126Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
2127
2128 * h8300.h (SN): Define.
2129 (eepmov.b): Renamed from "eepmov"
2130 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
2131 with them.
2132
2133Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2134
2135 * d10v.h (OPERAND_SHIFT): New operand flag.
2136
2137Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2138
2139 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 2140 signed numbers.
252b5132
RH
2141
2142Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2143
2144 * d10v.h (pd_reg): Define. Putting the definition here allows
2145 the assembler and disassembler to share the same struct.
2146
2147Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
2148
2149 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
2150 Williams <steve@icarus.com>.
2151
2152Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
2153
2154 * d10v.h: New file.
2155
2156Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
2157
2158 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2159
2160Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2161
d83c6548 2162 * m68k.h (mcf5200): New macro.
252b5132
RH
2163 Document names of coldfire control registers.
2164
2165Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2166
2167 * h8300.h (SRC_IN_DST): Define.
2168
2169 * h8300.h (UNOP3): Mark the register operand in this insn
2170 as a source operand, not a destination operand.
2171 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2172 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2173 register operand with SRC_IN_DST.
2174
2175Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2176
2177 * alpha.h: New file.
2178
2179Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2180
2181 * rs6k.h: Remove obsolete file.
2182
2183Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2184
2185 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2186 fdivp, and fdivrp. Add ffreep.
2187
2188Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2189
2190 * h8300.h: Reorder various #defines for readability.
2191 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2192 (BITOP): Accept additional (unused) argument. All callers changed.
2193 (EBITOP): Likewise.
2194 (O_LAST): Bump.
2195 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2196
2197 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2198 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2199 (BITOP, EBITOP): Handle new H8/S addressing modes for
2200 bit insns.
2201 (UNOP3): Handle new shift/rotate insns on the H8/S.
2202 (insns using exr): New instructions.
2203 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2204
2205Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2206
2207 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2208 was incorrect.
2209
2210Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2211
2212 * h8300.h (START): Remove.
2213 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2214 and mov.l insns that can be relaxed.
2215
2216Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2217
2218 * i386.h: Remove Abs32 from lcall.
2219
2220Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2221
2222 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2223 (SLCPOP): New macro.
2224 Mark X,Y opcode letters as in use.
2225
2226Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2227
2228 * sparc.h (F_FLOAT, F_FBR): Define.
2229
2230Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2231
2232 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2233 from all insns.
2234 (ABS8SRC,ABS8DST): Add ABS8MEM.
2235 (add.l): Fix reg+reg variant.
2236 (eepmov.w): Renamed from eepmovw.
2237 (ldc,stc): Fix many cases.
2238
2239Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2240
2241 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2242
2243Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2244
2245 * sparc.h (O): Mark operand letter as in use.
2246
2247Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2248
2249 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2250 Mark operand letters uU as in use.
2251
2252Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2253
2254 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2255 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2256 (SPARC_OPCODE_SUPPORTED): New macro.
2257 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2258 (F_NOTV9): Delete.
2259
2260Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2261
2262 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2263 declaration consistent with return type in definition.
2264
2265Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2266
2267 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2268
2269Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2270
2271 * i386.h (i386_regtab): Add 80486 test registers.
2272
2273Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2274
2275 * i960.h (I_HX): Define.
2276 (i960_opcodes): Add HX instruction.
2277
2278Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2279
2280 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2281 and fclex.
2282
2283Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2284
2285 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2286 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2287 (bfd_* defines): Delete.
2288 (sparc_opcode_archs): Replaces architecture_pname.
2289 (sparc_opcode_lookup_arch): Declare.
2290 (NUMOPCODES): Delete.
2291
2292Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2293
2294 * sparc.h (enum sparc_architecture): Add v9a.
2295 (ARCHITECTURES_CONFLICT_P): Update.
2296
2297Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2298
2299 * i386.h: Added Pentium Pro instructions.
2300
2301Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2302
2303 * m68k.h: Document new 'W' operand place.
2304
2305Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2306
2307 * hppa.h: Add lci and syncdma instructions.
2308
2309Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2310
2311 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2312 instructions.
252b5132
RH
2313
2314Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2315
2316 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2317 assembler's -mcom and -many switches.
2318
2319Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2320
2321 * i386.h: Fix cmpxchg8b extension opcode description.
2322
2323Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2324
2325 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2326 and register cr4.
2327
2328Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2329
2330 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2331
2332Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2333
2334 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2335
2336Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2337
2338 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2339
2340Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2341
2342 * m68kmri.h: Remove.
2343
2344 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2345 declarations. Remove F_ALIAS and flag field of struct
2346 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2347 int. Make name and args fields of struct m68k_opcode const.
2348
2349Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2350
2351 * sparc.h (F_NOTV9): Define.
2352
2353Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2354
2355 * mips.h (INSN_4010): Define.
2356
2357Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2358
2359 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2360
2361 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2362 * m68k.h: Fix argument descriptions of coprocessor
2363 instructions to allow only alterable operands where appropriate.
2364 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2365 (m68k_opcode_aliases): Add more aliases.
2366
2367Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2368
2369 * m68k.h: Added explcitly short-sized conditional branches, and a
2370 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2371 svr4-based configurations.
2372
2373Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2374
2375 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2376 * i386.h: added missing Data16/Data32 flags to a few instructions.
2377
2378Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2379
2380 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2381 (OP_MASK_BCC, OP_SH_BCC): Define.
2382 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2383 (OP_MASK_CCC, OP_SH_CCC): Define.
2384 (INSN_READ_FPR_R): Define.
2385 (INSN_RFE): Delete.
2386
2387Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2388
2389 * m68k.h (enum m68k_architecture): Deleted.
2390 (struct m68k_opcode_alias): New type.
2391 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2392 matching constraints, values and flags. As a side effect of this,
2393 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2394 as I know were never used, now may need re-examining.
2395 (numopcodes): Now const.
2396 (m68k_opcode_aliases, numaliases): New variables.
2397 (endop): Deleted.
2398 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2399 m68k_opcode_aliases; update declaration of m68k_opcodes.
2400
2401Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2402
2403 * hppa.h (delay_type): Delete unused enumeration.
2404 (pa_opcode): Replace unused delayed field with an architecture
2405 field.
2406 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2407
2408Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2409
2410 * mips.h (INSN_ISA4): Define.
2411
2412Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2413
2414 * mips.h (M_DLA_AB, M_DLI): Define.
2415
2416Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2417
2418 * hppa.h (fstwx): Fix single-bit error.
2419
2420Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2421
2422 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2423
2424Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2425
2426 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2427 debug registers. From Charles Hannum (mycroft@netbsd.org).
2428
2429Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2430
2431 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2432 i386 support:
2433 * i386.h (MOV_AX_DISP32): New macro.
2434 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2435 of several call/return instructions.
2436 (ADDR_PREFIX_OPCODE): New macro.
2437
2438Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2439
2440 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2441
adadcc0c 2442 * vax.h (struct vot_wot, field `args'): Make it pointer to const
4f1d9bd8 2443 char.
adadcc0c 2444 (struct vot, field `name'): ditto.
252b5132
RH
2445
2446Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2447
2448 * vax.h: Supply and properly group all values in end sentinel.
2449
2450Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2451
2452 * mips.h (INSN_ISA, INSN_4650): Define.
2453
2454Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2455
2456 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2457 systems with a separate instruction and data cache, such as the
2458 29040, these instructions take an optional argument.
2459
2460Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2461
2462 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2463 INSN_TRAP.
2464
2465Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2466
2467 * mips.h (INSN_STORE_MEMORY): Define.
2468
2469Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2470
2471 * sparc.h: Document new operand type 'x'.
2472
2473Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2474
2475 * i960.h (I_CX2): New instruction category. It includes
2476 instructions available on Cx and Jx processors.
2477 (I_JX): New instruction category, for JX-only instructions.
2478 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2479 Jx-only instructions, in I_JX category.
2480
2481Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2482
2483 * ns32k.h (endop): Made pointer const too.
2484
2485Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2486
2487 * ns32k.h: Drop Q operand type as there is no correct use
2488 for it. Add I and Z operand types which allow better checking.
2489
2490Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2491
2492 * h8300.h (xor.l) :fix bit pattern.
2493 (L_2): New size of operand.
2494 (trapa): Use it.
2495
2496Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2497
2498 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2499
2500Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2501
2502 * sparc.h: Include v9 definitions.
2503
2504Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2505
2506 * m68k.h (m68060): Defined.
2507 (m68040up, mfloat, mmmu): Include it.
2508 (struct m68k_opcode): Widen `arch' field.
2509 (m68k_opcodes): Updated for M68060. Removed comments that were
2510 instructions commented out by "JF" years ago.
2511
2512Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2513
2514 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2515 add a one-bit `flags' field.
2516 (F_ALIAS): New macro.
2517
2518Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2519
2520 * h8300.h (dec, inc): Get encoding right.
2521
2522Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2523
2524 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2525 a flag instead.
2526 (PPC_OPERAND_SIGNED): Define.
2527 (PPC_OPERAND_SIGNOPT): Define.
2528
2529Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2530
2531 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2532 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2533
2534Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2535
2536 * i386.h: Reverse last change. It'll be handled in gas instead.
2537
2538Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2539
2540 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2541 slower on the 486 and used the implicit shift count despite the
2542 explicit operand. The one-operand form is still available to get
2543 the shorter form with the implicit shift count.
2544
2545Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2546
2547 * hppa.h: Fix typo in fstws arg string.
2548
2549Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2550
2551 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2552
2553Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2554
2555 * ppc.h (PPC_OPCODE_601): Define.
2556
2557Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2558
2559 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2560 (so we can determine valid completers for both addb and addb[tf].)
2561
2562 * hppa.h (xmpyu): No floating point format specifier for the
2563 xmpyu instruction.
2564
2565Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2566
2567 * ppc.h (PPC_OPERAND_NEXT): Define.
2568 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2569 (struct powerpc_macro): Define.
2570 (powerpc_macros, powerpc_num_macros): Declare.
2571
2572Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2573
2574 * ppc.h: New file. Header file for PowerPC opcode table.
2575
2576Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2577
2578 * hppa.h: More minor template fixes for sfu and copr (to allow
2579 for easier disassembly).
2580
2581 * hppa.h: Fix templates for all the sfu and copr instructions.
2582
2583Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2584
2585 * i386.h (push): Permit Imm16 operand too.
2586
2587Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2588
2589 * h8300.h (andc): Exists in base arch.
2590
2591Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2592
2593 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2594 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2595
2596Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2597
2598 * hppa.h: Add FP quadword store instructions.
2599
2600Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2601
2602 * mips.h: (M_J_A): Added.
2603 (M_LA): Removed.
2604
2605Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2606
2607 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2608 <mellon@pepper.ncd.com>.
2609
2610Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2611
2612 * hppa.h: Immediate field in probei instructions is unsigned,
2613 not low-sign extended.
2614
2615Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2616
2617 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2618
2619Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2620
2621 * i386.h: Add "fxch" without operand.
2622
2623Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2624
2625 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2626
2627Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2628
2629 * hppa.h: Add gfw and gfr to the opcode table.
2630
2631Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2632
2633 * m88k.h: extended to handle m88110.
2634
2635Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2636
2637 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2638 addresses.
2639
2640Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2641
2642 * i960.h (i960_opcodes): Properly bracket initializers.
2643
2644Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2645
2646 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2647
2648Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2649
2650 * m68k.h (two): Protect second argument with parentheses.
2651
2652Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2653
2654 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2655 Deleted old in/out instructions in "#if 0" section.
2656
2657Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2658
2659 * i386.h (i386_optab): Properly bracket initializers.
2660
2661Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2662
2663 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2664 Jeff Law, law@cs.utah.edu).
2665
2666Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2667
2668 * i386.h (lcall): Accept Imm32 operand also.
2669
2670Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2671
2672 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2673 (M_DABS): Added.
2674
2675Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2676
2677 * mips.h (INSN_*): Changed values. Removed unused definitions.
2678 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2679 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2680 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2681 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2682 (M_*): Added new values for r6000 and r4000 macros.
2683 (ANY_DELAY): Removed.
2684
2685Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2686
2687 * mips.h: Added M_LI_S and M_LI_SS.
2688
2689Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2690
2691 * h8300.h: Get some rare mov.bs correct.
2692
2693Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2694
2695 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2696 been included.
2697
2698Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2699
adadcc0c 2700 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
252b5132
RH
2701 jump instructions, for use in disassemblers.
2702
2703Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2704
2705 * m88k.h: Make bitfields just unsigned, not unsigned long or
2706 unsigned short.
2707
2708Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2709
2710 * hppa.h: New argument type 'y'. Use in various float instructions.
2711
2712Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2713
2714 * hppa.h (break): First immediate field is unsigned.
2715
2716 * hppa.h: Add rfir instruction.
2717
2718Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2719
2720 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2721
2722Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2723
2724 * mips.h: Reworked the hazard information somewhat, and fixed some
2725 bugs in the instruction hazard descriptions.
2726
2727Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2728
2729 * m88k.h: Corrected a couple of opcodes.
2730
2731Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2732
2733 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2734 new version includes instruction hazard information, but is
2735 otherwise reasonably similar.
2736
2737Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2738
2739 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2740
2741Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2742
2743 Patches from Jeff Law, law@cs.utah.edu:
2744 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2745 Make the tables be the same for the following instructions:
2746 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2747 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2748 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2749 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2750 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2751 "fcmp", and "ftest".
2752
2753 * hppa.h: Make new and old tables the same for "break", "mtctl",
2754 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2755 Fix typo in last patch. Collapse several #ifdefs into a
2756 single #ifdef.
2757
2758 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2759 of the comments up-to-date.
2760
2761 * hppa.h: Update "free list" of letters and update
2762 comments describing each letter's function.
2763
4f1d9bd8
NC
2764Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2765
2766 * h8300.h: Lots of little fixes for the h8/300h.
2767
2768Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2769
2770 Support for H8/300-H
2771 * h8300.h: Lots of new opcodes.
2772
252b5132
RH
2773Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2774
2775 * h8300.h: checkpoint, includes H8/300-H opcodes.
2776
2777Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2778
2779 * Patches from Jeffrey Law <law@cs.utah.edu>.
2780 * hppa.h: Rework single precision FP
2781 instructions so that they correctly disassemble code
2782 PA1.1 code.
2783
2784Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2785
2786 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2787 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2788
2789Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2790
2791 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2792 gdb will define it for now.
2793
2794Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2795
2796 * sparc.h: Don't end enumerator list with comma.
2797
2798Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2799
2800 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2801 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2802 ("bc2t"): Correct typo.
2803 ("[ls]wc[023]"): Use T rather than t.
2804 ("c[0123]"): Define general coprocessor instructions.
2805
2806Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2807
2808 * m68k.h: Move split point for gcc compilation more towards
2809 middle.
2810
2811Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2812
2813 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2814 simply wrong, ics, rfi, & rfsvc were missing).
2815 Add "a" to opr_ext for "bb". Doc fix.
2816
2817Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2818
adadcc0c
AM
2819 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2820 * mips.h: Add casts, to suppress warnings about shifting too much.
2821 * m68k.h: Document the placement code '9'.
252b5132
RH
2822
2823Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2824
adadcc0c 2825 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
252b5132
RH
2826 allows callers to break up the large initialized struct full of
2827 opcodes into two half-sized ones. This permits GCC to compile
2828 this module, since it takes exponential space for initializers.
adadcc0c 2829 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
252b5132
RH
2830
2831Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2832
adadcc0c
AM
2833 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2834 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
252b5132
RH
2835 initialized structs in it.
2836
2837Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2838
2839 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
adadcc0c
AM
2840 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2841 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
252b5132
RH
2842
2843Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2844
2845 * mips.h: document "i" and "j" operands correctly.
2846
2847Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2848
2849 * mips.h: Removed endianness dependency.
2850
2851Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2852
2853 * h8300.h: include info on number of cycles per instruction.
2854
2855Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2856
adadcc0c 2857 * hppa.h: Move handy aliases to the front. Fix masks for extract
252b5132
RH
2858 and deposit instructions.
2859
2860Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2861
2862 * i386.h: accept shld and shrd both with and without the shift
2863 count argument, which is always %cl.
2864
2865Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2866
2867 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2868 (one_byte_segment_defaults, two_byte_segment_defaults,
2869 i386_prefixtab_end): Ditto.
2870
2871Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2872
2873 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2874 for operand 2; from John Carr, jfc@dsg.dec.com.
2875
2876Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2877
2878 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2879 always use 16-bit offsets. Makes calculated-size jump tables
2880 feasible.
2881
2882Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2883
2884 * i386.h: Fix one-operand forms of in* and out* patterns.
2885
2886Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2887
2888 * m68k.h: Added CPU32 support.
2889
2890Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2891
adadcc0c 2892 * mips.h (break): Disassemble the argument. Patch from
252b5132
RH
2893 jonathan@cs.stanford.edu (Jonathan Stone).
2894
2895Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2896
2897 * m68k.h: merged Motorola and MIT syntax.
2898
2899Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2900
2901 * m68k.h (pmove): make the tests less strict, the 68k book is
2902 wrong.
2903
2904Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2905
2906 * m68k.h (m68ec030): Defined as alias for 68030.
2907 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2908 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2909 them. Tightened description of "fmovex" to distinguish it from
2910 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2911 up descriptions that claimed versions were available for chips not
2912 supporting them. Added "pmovefd".
2913
2914Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2915
2916 * m68k.h: fix where the . goes in divull
2917
2918Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2919
2920 * m68k.h: the cas2 instruction is supposed to be written with
2921 indirection on the last two operands, which can be either data or
2922 address registers. Added a new operand type 'r' which accepts
2923 either register type. Added new cases for cas2l and cas2w which
2924 use them. Corrected masks for cas2 which failed to recognize use
2925 of address register.
2926
2927Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2928
adadcc0c 2929 * m68k.h: Merged in patches (mostly m68040-specific) from
252b5132
RH
2930 Colin Smith <colin@wrs.com>.
2931
adadcc0c 2932 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
252b5132
RH
2933 base). Also cleaned up duplicates, re-ordered instructions for
2934 the sake of dis-assembling (so aliases come after standard names).
2935 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2936
2937Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2938
2939 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2940 all missing .s
2941
2942Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2943
2944 * sparc.h: Moved tables to BFD library.
2945
2946 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2947
2948Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2949
adadcc0c 2950 * h8300.h: Finish filling in all the holes in the opcode table,
252b5132
RH
2951 so that the Lucid C compiler can digest this as well...
2952
2953Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2954
adadcc0c 2955 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
252b5132
RH
2956 Fix opcodes on various sizes of fild/fist instructions
2957 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2958 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2959
2960Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2961
adadcc0c 2962 * h8300.h: Fill in all the holes in the opcode table so that the
252b5132
RH
2963 losing HPUX C compiler can digest this...
2964
2965Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2966
adadcc0c 2967 * mips.h: Fix decoding of coprocessor instructions, somewhat.
252b5132
RH
2968 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2969
2970Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2971
2972 * sparc.h: Add new architecture variant sparclite; add its scan
2973 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2974
2975Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2976
adadcc0c 2977 * mips.h: Add some more opcode synonyms (from Frank Yellin,
252b5132
RH
2978 fy@lucid.com).
2979
2980Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2981
adadcc0c 2982 * rs6k.h: New version from IBM (Metin).
252b5132
RH
2983
2984Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2985
2986 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
adadcc0c 2987 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
252b5132
RH
2988
2989Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2990
adadcc0c 2991 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
252b5132
RH
2992
2993Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2994
adadcc0c 2995 * m68k.h (one, two): Cast macro args to unsigned to suppress
252b5132
RH
2996 complaints from compiler and lint about integer overflow during
2997 shift.
2998
2999Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
3000
adadcc0c 3001 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
252b5132
RH
3002
3003Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
3004
adadcc0c 3005 * mips.h: Make bitfield layout depend on the HOST compiler,
252b5132
RH
3006 not on the TARGET system.
3007
3008Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
3009
3010 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
3011 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
3012 <TRANLE@INTELLICORP.COM>.
3013
3014Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
3015
3016 * h8300.h: turned op_type enum into #define list
3017
3018Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
3019
adadcc0c 3020 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
252b5132
RH
3021 similar instructions -- they've been renamed to "fitoq", etc.
3022 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
3023 number of arguments.
adadcc0c 3024 * h8300.h: Remove extra ; which produces compiler warning.
252b5132
RH
3025
3026Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
3027
adadcc0c 3028 * sparc.h: fix opcode for tsubcctv.
252b5132
RH
3029
3030Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
3031
3032 * sparc.h: fba and cba are now aliases for fb and cb respectively.
3033
3034Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
3035
adadcc0c 3036 * sparc.h (nop): Made the 'lose' field be even tighter,
252b5132
RH
3037 so only a standard 'nop' is disassembled as a nop.
3038
3039Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
3040
3041 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
3042 disassembled as a nop.
3043
4f1d9bd8
NC
3044Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
3045
adadcc0c 3046 * m68k.h, sparc.h: ANSIfy enums.
4f1d9bd8 3047
252b5132
RH
3048Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
3049
3050 * sparc.h: fix a typo.
3051
3052Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
3053
3054 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
3055 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 3056 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
3057
3058\f
3059Local Variables:
3060version-control: never
3061End:
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