[ bfd/ChangeLog ]
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
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12002-12-30 Chris Demetriou <cgd@broadcom.com>
2
3 * mips.h: Document "+" as the start of two-character operand
4 type names, and add new "K", "+A", "+B", and "+C" operand types.
5 (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
6 (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
7 defines.
8
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92002-12-24 Dmitry Diky <diwil@mail.ru>
10
11 * msp430.h: New file. Defines msp430 opcodes.
12
3badd465
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132002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
14
15 * h8300.h: Added some more pseudo opcodes for system call
16 processing.
17
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182002-12-19 Chris Demetriou <cgd@broadcom.com>
19
20 * mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
21 (OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
22 (OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
23 (OP_OP_SDC2, OP_OP_SDC3): Define.
24
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252002-12-16 Alan Modra <amodra@bigpond.net.au>
26
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27 * hppa.h (completer_chars): #if 0 out.
28
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29 * ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
30 "default_args".
31 (struct not_wot): Constify "args".
32 (struct not): Constify "name".
33 (numopcodes): Delete.
34 (endop): Delete.
35
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362002-12-13 Alan Modra <amodra@bigpond.net.au>
37
38 * pj.h (pj_opc_info_t): Add union.
39
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402002-12-04 David Mosberger <davidm@hpl.hp.com>
41
42 * ia64.h: Fix copyright message.
43 (IA64_OPND_AR_CSD): New operand kind.
44
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452002-12-03 Richard Henderson <rth@redhat.com>
46
47 * ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
48
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492002-12-03 Alan Modra <amodra@bigpond.net.au>
50
51 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
52 Constify "leaf" and "multi".
53
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542002-11-19 Klee Dienes <kdienes@apple.com>
55
56 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
57 fields.
58 (h8_opcodes). Modify initializer and initializer macros to no
59 longer initialize the removed fields.
60
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612002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
62
63 * tic4x.h (c4x_insts): Fixed LDHI constraint
64
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652002-11-18 Klee Dienes <kdienes@apple.com>
66
67 * h8300.h (h8_opcode): Remove 'length' field.
68 (h8_opcodes): Mark as 'const' (both the declaration and
69 definition). Modify initializer and initializer macros to no
70 longer initialize the length field.
71
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722002-11-18 Klee Dienes <kdienes@apple.com>
73
74 * arc.h (arc_ext_opcodes): Declare as extern.
75 (arc_ext_operands): Declare as extern.
76 * i860.h (i860_opcodes): Declare as const.
77
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782002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
79
80 * tic4x.h: File reordering. Added enhanced opcodes.
81
822002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
83
84 * tic4x.h: Major rewrite of entire file. Define instruction
85 classes, and put each instruction into a class.
86
872002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
88
89 * tic4x.h: Added new opcodes and corrected some bugs. Add support
90 for new DSP types.
91
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922002-10-14 Alan Modra <amodra@bigpond.net.au>
93
94 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
95
701b80cd 962002-09-30 Gavin Romig-Koch <gavin@redhat.com>
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97 Ken Raeburn <raeburn@cygnus.com>
98 Aldy Hernandez <aldyh@redhat.com>
99 Eric Christopher <echristo@redhat.com>
100 Richard Sandiford <rsandifo@redhat.com>
101
102 * mips.h: Update comment for new opcodes.
103 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
104 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
105 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
106 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
107 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
108 Don't match CPU_R4111 with INSN_4100.
109
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1102002-08-19 Elena Zannoni <ezannoni@redhat.com>
111
112 From matthew green <mrg@redhat.com>
113
114 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
115 instructions.
116 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
117 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
118 e500x2 Integer select, branch locking, performance monitor,
119 cache locking and machine check APUs, respectively.
120 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
121 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
122
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1232002-08-13 Stephane Carrez <stcarrez@nerim.fr>
124
125 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
126 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
127 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
128 memory banks.
129 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
130
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1312002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
132
133 * mips.h (INSN_MIPS16): New define.
134
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1352002-07-08 Alan Modra <amodra@bigpond.net.au>
136
137 * i386.h: Remove IgnoreSize from movsx and movzx.
138
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1392002-06-08 Alan Modra <amodra@bigpond.net.au>
140
141 * a29k.h: Replace CONST with const.
142 (CONST): Don't define.
143 * convex.h: Replace CONST with const.
144 (CONST): Don't define.
145 * dlx.h: Replace CONST with const.
146 * or32.h (CONST): Don't define.
147
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1482002-05-30 Chris G. Demetriou <cgd@broadcom.com>
149
150 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
151 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
152 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
153 (INSN_MDMX): New constants, for MDMX support.
154 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
155
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1562002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
157
158 * dlx.h: New file.
159
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1602002-05-25 Alan Modra <amodra@bigpond.net.au>
161
162 * ia64.h: Use #include "" instead of <> for local header files.
163 * sparc.h: Likewise.
164
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1652002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
166
167 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
168
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1692002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
170
171 * h8300.h: Corrected defs of all control regs
172 and eepmov instr.
173
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1742002-04-11 Alan Modra <amodra@bigpond.net.au>
175
176 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 177 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 178
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1792002-03-15 Chris G. Demetriou <cgd@broadcom.com>
180
181 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
182 instructions.
183 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
184 may be passed along with the ISA bitmask.
185
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1862002-03-05 Paul Koning <pkoning@equallogic.com>
187
188 * pdp11.h: Add format codes for float instruction formats.
189
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1902002-02-25 Alan Modra <amodra@bigpond.net.au>
191
192 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
193
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194Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
195
196 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
197
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198Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
199
200 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
201 (xchg): Fix.
202 (in, out): Disable 64bit operands.
203 (call, jmp): Avoid REX prefixes.
204 (jcxz): Prohibit in 64bit mode
205 (jrcxz, loop): Add 64bit variants.
206 (movq): Fix patterns.
207 (movmskps, pextrw, pinstrw): Add 64bit variants.
208
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2092002-01-31 Ivan Guzvinec <ivang@opencores.org>
210
211 * or32.h: New file.
212
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2132002-01-22 Graydon Hoare <graydon@redhat.com>
214
215 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
216 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
217
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2182002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
219
220 * h8300.h: Comment typo fix.
221
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2222002-01-03 matthew green <mrg@redhat.com>
223
224 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
225 (PPC_OPCODE_BOOKE64): Likewise.
226
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227Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
228
229 * hppa.h (call, ret): Move to end of table.
230 (addb, addib): PA2.0 variants should have been PA2.0W.
231 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
232 happy.
233 (fldw, fldd, fstw, fstd, bb): Likewise.
234 (short loads/stores): Tweak format specifier slightly to keep
235 disassembler happy.
236 (indexed loads/stores): Likewise.
237 (absolute loads/stores): Likewise.
238
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2392001-12-04 Alexandre Oliva <aoliva@redhat.com>
240
241 * d10v.h (OPERAND_NOSP): New macro.
242
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2432001-11-29 Alexandre Oliva <aoliva@redhat.com>
244
245 * d10v.h (OPERAND_SP): New macro.
246
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2472001-11-15 Alan Modra <amodra@bigpond.net.au>
248
249 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
250
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TW
2512001-11-11 Timothy Wall <twall@alum.mit.edu>
252
253 * tic54x.h: Revise opcode layout; don't really need a separate
254 structure for parallel opcodes.
255
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2562001-11-13 Zack Weinberg <zack@codesourcery.com>
257 Alan Modra <amodra@bigpond.net.au>
258
259 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
260 accept WordReg.
261
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2622001-11-04 Chris Demetriou <cgd@broadcom.com>
263
264 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
265
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2662001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
267
268 * mmix.h: New file.
269
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2702001-10-18 Chris Demetriou <cgd@broadcom.com>
271
272 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
273 of the expression, to make source code merging easier.
274
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2752001-10-17 Chris Demetriou <cgd@broadcom.com>
276
277 * mips.h: Sort coprocessor instruction argument characters
278 in comment, add a few more words of description for "H".
279
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2802001-10-17 Chris Demetriou <cgd@broadcom.com>
281
282 * mips.h (INSN_SB1): New cpu-specific instruction bit.
283 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
284 if cpu is CPU_SB1.
285
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2862001-10-17 matthew green <mrg@redhat.com>
287
288 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
289
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MG
2902001-10-12 matthew green <mrg@redhat.com>
291
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292 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
293 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
294 instructions, respectively.
418c1742 295
6ff2f2ba
NC
2962001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
297
298 * v850.h: Remove spurious comment.
299
015cf428
NC
3002001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
301
302 * h8300.h: Fix compile time warning messages
303
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RH
3042001-09-04 Richard Henderson <rth@redhat.com>
305
306 * alpha.h (struct alpha_operand): Pack elements into bitfields.
307
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3082001-08-31 Eric Christopher <echristo@redhat.com>
309
310 * mips.h: Remove CPU_MIPS32_4K.
311
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3122001-08-27 Torbjorn Granlund <tege@swox.com>
313
314 * ppc.h (PPC_OPERAND_DS): Define.
315
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3162001-08-25 Andreas Jaeger <aj@suse.de>
317
318 * d30v.h: Fix declaration of reg_name_cnt.
319
320 * d10v.h: Fix declaration of d10v_reg_name_cnt.
321
322 * arc.h: Add prototypes from opcodes/arc-opc.c.
323
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3242001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
325
326 * mips.h (INSN_10000): Define.
327 (OPCODE_IS_MEMBER): Check for INSN_10000.
328
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3292001-08-10 Alan Modra <amodra@one.net.au>
330
331 * ppc.h: Revert 2001-08-08.
332
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3332001-08-10 Richard Sandiford <rsandifo@redhat.com>
334
335 * mips.h (INSN_GP32): Remove.
336 (OPCODE_IS_MEMBER): Remove gp32 parameter.
337 (M_MOVE): New macro identifier.
338
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3392001-08-08 Alan Modra <amodra@one.net.au>
340
341 1999-10-25 Torbjorn Granlund <tege@swox.com>
342 * ppc.h (struct powerpc_operand): New field `reloc'.
343
3b16e843
NC
3442001-08-01 Aldy Hernandez <aldyh@redhat.com>
345
346 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
347
3482001-07-12 Jeff Johnston <jjohnstn@redhat.com>
349
350 * cgen.h (CGEN_INSN): Add regex support.
351 (build_insn_regex): Declare.
352
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3532001-07-11 Frank Ch. Eigler <fche@redhat.com>
354
355 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
356 (cgen_cpu_desc): Ditto.
357
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3582001-07-07 Ben Elliston <bje@redhat.com>
359
360 * m88k.h: Clean up and reformat. Remove unused code.
361
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GK
3622001-06-14 Geoffrey Keating <geoffk@redhat.com>
363
364 * cgen.h (cgen_keyword): Add nonalpha_chars field.
365
d1cf510e
NC
3662001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
367
368 * mips.h (CPU_R12000): Define.
369
e281c457
JH
3702001-05-23 John Healy <jhealy@redhat.com>
371
372 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 373
aa5f19f2
NC
3742001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
375
376 * mips.h (INSN_ISA_MASK): Define.
377
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3782001-05-12 Alan Modra <amodra@one.net.au>
379
380 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
381 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
382 and use InvMem as these insns must have register operands.
383
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3842001-05-04 Alan Modra <amodra@one.net.au>
385
386 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
387 and pextrw to swap reg/rm assignments.
388
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HPN
3892001-04-05 Hans-Peter Nilsson <hp@axis.com>
390
391 * cris.h (enum cris_insn_version_usage): Correct comment for
392 cris_ver_v3p.
393
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3942001-03-24 Alan Modra <alan@linuxcare.com.au>
395
396 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
397 Add InvMem to first operand of "maskmovdqu".
398
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HPN
3992001-03-22 Hans-Peter Nilsson <hp@axis.com>
400
401 * cris.h (ADD_PC_INCR_OPCODE): New macro.
402
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KH
4032001-03-21 Kazu Hirata <kazu@hxi.com>
404
405 * h8300.h: Fix formatting.
406
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4072001-03-22 Alan Modra <alan@linuxcare.com.au>
408
409 * i386.h (i386_optab): Add paddq, psubq.
410
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4112001-03-19 Alan Modra <alan@linuxcare.com.au>
412
413 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
414
80a523c2
NC
4152001-02-28 Igor Shevlyakov <igor@windriver.com>
416
417 * m68k.h: new defines for Coldfire V4. Update mcf to know
418 about mcf5407.
419
e135f41b
NC
4202001-02-18 lars brinkhoff <lars@nocrew.org>
421
422 * pdp11.h: New file.
423
4242001-02-12 Jan Hubicka <jh@suse.cz>
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JH
425
426 * i386.h (i386_optab): SSE integer converison instructions have
427 64bit versions on x86-64.
428
8eaec934
NC
4292001-02-10 Nick Clifton <nickc@redhat.com>
430
431 * mips.h: Remove extraneous whitespace. Formating change to allow
432 for future contribution.
433
a85d7ed0
NC
4342001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
435
436 * s390.h: New file.
437
0715dc88
PM
4382001-02-02 Patrick Macdonald <patrickm@redhat.com>
439
440 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
441 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
442 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
443
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4442001-01-24 Karsten Keil <kkeil@suse.de>
445
446 * i386.h (i386_optab): Fix swapgs
447
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4482001-01-14 Alan Modra <alan@linuxcare.com.au>
449
450 * hppa.h: Describe new '<' and '>' operand types, and tidy
451 existing comments.
452 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
453 Remove duplicate "ldw j(s,b),x". Sort some entries.
454
e135f41b 4552001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
456
457 * i386.h (i386_optab): Fix pusha and ret templates.
458
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4592001-01-11 Peter Targett <peter.targett@arccores.com>
460
461 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
462 definitions for masking cpu type.
463 (arc_ext_operand_value) New structure for storing extended
464 operands.
465 (ARC_OPERAND_*) Flags for operand values.
466
4672001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
468
469 * i386.h (pinsrw): Add.
470 (pshufw): Remove.
471 (cvttpd2dq): Fix operands.
472 (cvttps2dq): Likewise.
473 (movq2q): Rename to movdq2q.
474
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4752001-01-10 Richard Schaal <richard.schaal@intel.com>
476
477 * i386.h: Correct movnti instruction.
478
8c1f9e76
JJ
4792001-01-09 Jeff Johnston <jjohnstn@redhat.com>
480
481 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
482 of operands (unsigned char or unsigned short).
483 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
484 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
485
0d2bcfaf 4862001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
487
488 * i386.h (i386_optab): Make [sml]fence template to use immext field.
489
0d2bcfaf 4902001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
491
492 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
493 introduced by Pentium4
494
0d2bcfaf 4952000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
496
497 * i386.h (i386_optab): Add "rex*" instructions;
498 add swapgs; disable jmp/call far direct instructions for
499 64bit mode; add syscall and sysret; disable registers for 0xc6
500 template. Add 'q' suffixes to extendable instructions, disable
079966a8 501 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
502 (i386_regtab): Add extended registers.
503 (*Suf): Add No_qSuf.
504 (q_Suf, wlq_Suf, bwlq_Suf): New.
505
0d2bcfaf 5062000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
507
508 * i386.h (i386_optab): Replace "Imm" with "EncImm".
509 (i386_regtab): Add flags field.
d83c6548 510
bf40d919
NC
5112000-12-12 Nick Clifton <nickc@redhat.com>
512
513 * mips.h: Fix formatting.
514
4372b673
NC
5152000-12-01 Chris Demetriou <cgd@sibyte.com>
516
517 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
518 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
519 OP_*_SYSCALL definitions.
520 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
521 19 bit wait codes.
522 (MIPS operand specifier comments): Remove 'm', add 'U' and
523 'J', and update the meaning of 'B' so that it's more general.
524
e7af610e
NC
525 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
526 INSN_ISA5): Renumber, redefine to mean the ISA at which the
527 instruction was added.
528 (INSN_ISA32): New constant.
529 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
530 Renumber to avoid new and/or renumbered INSN_* constants.
531 (INSN_MIPS32): Delete.
532 (ISA_UNKNOWN): New constant to indicate unknown ISA.
533 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
534 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 535 constants available at that ISA level.
e7af610e
NC
536 (CPU_UNKNOWN): New constant to indicate unknown CPU.
537 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
538 define it with a unique value.
539 (OPCODE_IS_MEMBER): Update for new ISA membership-related
540 constant meanings.
541
84ea6cf2 542 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 543 definitions.
84ea6cf2 544
c6c98b38
NC
545 * mips.h (CPU_SB1): New constant.
546
19f7b010
JJ
5472000-10-20 Jakub Jelinek <jakub@redhat.com>
548
549 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
550 Note that '3' is used for siam operand.
551
139368c9
JW
5522000-09-22 Jim Wilson <wilson@cygnus.com>
553
554 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
555
156c2f8b 5562000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 557
156c2f8b
NC
558 * mips.h: Use defines instead of hard-coded processor numbers.
559 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 560 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
561 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
562 CPU_4KC, CPU_4KM, CPU_4KP): Define..
563 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 564 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 565 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
566 Add 'P' to used characters.
567 Use 'H' for coprocessor select field.
156c2f8b 568 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
569 Document new arg characters and add to used characters.
570 (INSN_MIPS32): New define for MIPS32 extensions.
571 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 572
3c5ce02e
AM
5732000-09-05 Alan Modra <alan@linuxcare.com.au>
574
575 * hppa.h: Mention cz completer.
576
50b81f19
JW
5772000-08-16 Jim Wilson <wilson@cygnus.com>
578
579 * ia64.h (IA64_OPCODE_POSTINC): New.
580
fc29466d
L
5812000-08-15 H.J. Lu <hjl@gnu.org>
582
583 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
584 IgnoreSize change.
585
4f1d9bd8
NC
5862000-08-08 Jason Eckhardt <jle@cygnus.com>
587
588 * i860.h: Small formatting adjustments.
589
45ee1401
DC
5902000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
591
592 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
593 Move related opcodes closer to each other.
594 Minor changes in comments, list undefined opcodes.
595
9d551405
DB
5962000-07-26 Dave Brolley <brolley@redhat.com>
597
598 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
599
4f1d9bd8
NC
6002000-07-22 Jason Eckhardt <jle@cygnus.com>
601
602 * i860.h (btne, bte, bla): Changed these opcodes
603 to use sbroff ('r') instead of split16 ('s').
604 (J, K, L, M): New operand types for 16-bit aligned fields.
605 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
606 use I, J, K, L, M instead of just I.
607 (T, U): New operand types for split 16-bit aligned fields.
608 (st.x): Changed these opcodes to use S, T, U instead of just S.
609 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
610 exist on the i860.
611 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
612 (pfeq.ss, pfeq.dd): New opcodes.
613 (st.s): Fixed incorrect mask bits.
614 (fmlow): Fixed incorrect mask bits.
615 (fzchkl, pfzchkl): Fixed incorrect mask bits.
616 (faddz, pfaddz): Fixed incorrect mask bits.
617 (form, pform): Fixed incorrect mask bits.
618 (pfld.l): Fixed incorrect mask bits.
619 (fst.q): Fixed incorrect mask bits.
620 (all floating point opcodes): Fixed incorrect mask bits for
621 handling of dual bit.
622
c8488617
HPN
6232000-07-20 Hans-Peter Nilsson <hp@axis.com>
624
625 cris.h: New file.
626
65aa24b6
NC
6272000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
628
629 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
630 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
631 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
632 (AVR_ISA_M83): Define for ATmega83, ATmega85.
633 (espm): Remove, because ESPM removed in databook update.
634 (eicall, eijmp): Move to the end of opcode table.
635
60bcf0fa
NC
6362000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
637
638 * m68hc11.h: New file for support of Motorola 68hc11.
639
60a2978a
DC
640Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
641
642 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
643
68ab2dd9
DC
644Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
645
646 * avr.h: New file with AVR opcodes.
647
f0662e27
DL
648Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
649
650 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
651
b722f2be
AM
6522000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
653
654 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
655
f9e0cf0b
AM
6562000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
657
658 * i386.h: Use sl_FP, not sl_Suf for fild.
659
f660ee8b
FCE
6602000-05-16 Frank Ch. Eigler <fche@redhat.com>
661
662 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
663 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
664 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
665 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
666
558b0a60
AM
6672000-05-13 Alan Modra <alan@linuxcare.com.au>,
668
669 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
670
e413e4e9
AM
6712000-05-13 Alan Modra <alan@linuxcare.com.au>,
672 Alexander Sokolov <robocop@netlink.ru>
673
674 * i386.h (i386_optab): Add cpu_flags for all instructions.
675
6762000-05-13 Alan Modra <alan@linuxcare.com.au>
677
678 From Gavin Romig-Koch <gavin@cygnus.com>
679 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
680
5c84d377
TW
6812000-05-04 Timothy Wall <twall@cygnus.com>
682
683 * tic54x.h: New.
684
966f959b
C
6852000-05-03 J.T. Conklin <jtc@redback.com>
686
687 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
688 (PPC_OPERAND_VR): New operand flag for vector registers.
689
c5d05dbb
JL
6902000-05-01 Kazu Hirata <kazu@hxi.com>
691
692 * h8300.h (EOP): Add missing initializer.
693
a7fba0e0
JL
694Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
695
696 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
697 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
698 New operand types l,y,&,fe,fE,fx added to support above forms.
699 (pa_opcodes): Replaced usage of 'x' as source/target for
700 floating point double-word loads/stores with 'fx'.
701
800eeca4
JW
702Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
703 David Mosberger <davidm@hpl.hp.com>
704 Timothy Wall <twall@cygnus.com>
705 Jim Wilson <wilson@cygnus.com>
706
707 * ia64.h: New file.
708
ba23e138
NC
7092000-03-27 Nick Clifton <nickc@cygnus.com>
710
711 * d30v.h (SHORT_A1): Fix value.
712 (SHORT_AR): Renumber so that it is at the end of the list of short
713 instructions, not the end of the list of long instructions.
714
d0b47220
AM
7152000-03-26 Alan Modra <alan@linuxcare.com>
716
717 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
718 problem isn't really specific to Unixware.
719 (OLDGCC_COMPAT): Define.
720 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
721 destination %st(0).
722 Fix lots of comments.
723
866afedc
NC
7242000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
725
726 * d30v.h:
727 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
728 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
729 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
730 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
731 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
732 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
733 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
734
cc5ca5ce
AM
7352000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
736
737 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
738 fistpd without suffix.
739
68e324a2
NC
7402000-02-24 Nick Clifton <nickc@cygnus.com>
741
742 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
743 'signed_overflow_ok_p'.
744 Delete prototypes for cgen_set_flags() and cgen_get_flags().
745
60f036a2
AH
7462000-02-24 Andrew Haley <aph@cygnus.com>
747
748 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
749 (CGEN_CPU_TABLE): flags: new field.
750 Add prototypes for new functions.
d83c6548 751
9b9b5cd4
AM
7522000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
753
754 * i386.h: Add some more UNIXWARE_COMPAT comments.
755
5b93d8bb
AM
7562000-02-23 Linas Vepstas <linas@linas.org>
757
758 * i370.h: New file.
759
4f1d9bd8
NC
7602000-02-22 Chandra Chavva <cchavva@cygnus.com>
761
762 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
763 cannot be combined in parallel with ADD/SUBppp.
764
87f398dd
AH
7652000-02-22 Andrew Haley <aph@cygnus.com>
766
767 * mips.h: (OPCODE_IS_MEMBER): Add comment.
768
367c01af
AH
7691999-12-30 Andrew Haley <aph@cygnus.com>
770
9a1e79ca
AH
771 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
772 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
773 insns.
367c01af 774
add0c677
AM
7752000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
776
777 * i386.h: Qualify intel mode far call and jmp with x_Suf.
778
3138f287
AM
7791999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
780
781 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
782 indirect jumps and calls. Add FF/3 call for intel mode.
783
ccecd07b
JL
784Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
785
786 * mn10300.h: Add new operand types. Add new instruction formats.
787
b37e19e9
JL
788Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
789
790 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
791 instruction.
792
5fce5ddf
GRK
7931999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
794
795 * mips.h (INSN_ISA5): New.
796
2bd7f1f3
GRK
7971999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
798
799 * mips.h (OPCODE_IS_MEMBER): New.
800
4df2b5c5
NC
8011999-10-29 Nick Clifton <nickc@cygnus.com>
802
803 * d30v.h (SHORT_AR): Define.
804
446a06c9
MM
8051999-10-18 Michael Meissner <meissner@cygnus.com>
806
807 * alpha.h (alpha_num_opcodes): Convert to unsigned.
808 (alpha_num_operands): Ditto.
809
eca04c6a
JL
810Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
811
812 * hppa.h (pa_opcodes): Add load and store cache control to
813 instructions. Add ordered access load and store.
814
815 * hppa.h (pa_opcode): Add new entries for addb and addib.
816
817 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
818
819 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
820
c43185de
DN
821Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
822
823 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
824
ec3533da
JL
825Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
826
390f858d
JL
827 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
828 and "be" using completer prefixes.
829
8c47ebd9
JL
830 * hppa.h (pa_opcodes): Add initializers to silence compiler.
831
ec3533da
JL
832 * hppa.h: Update comments about character usage.
833
18369bea
JL
834Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
835
836 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
837 up the new fstw & bve instructions.
838
c36efdd2
JL
839Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
840
d3ffb032
JL
841 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
842 instructions.
843
c49ec3da
JL
844 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
845
5d2e7ecc
JL
846 * hppa.h (pa_opcodes): Add long offset double word load/store
847 instructions.
848
6397d1a2
JL
849 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
850 stores.
851
142f0fe0
JL
852 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
853
f5a68b45
JL
854 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
855
8235801e
JL
856 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
857
35184366
JL
858 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
859
f0bfde5e
JL
860 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
861
27bbbb58
JL
862 * hppa.h (pa_opcodes): Add support for "b,l".
863
c36efdd2
JL
864 * hppa.h (pa_opcodes): Add support for "b,gate".
865
f2727d04
JL
866Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
867
9392fb11 868 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 869 in xmpyu.
9392fb11 870
e0c52e99
JL
871 * hppa.h (pa_opcodes): Fix mask for probe and probei.
872
f2727d04
JL
873 * hppa.h (pa_opcodes): Fix mask for depwi.
874
52d836e2
JL
875Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
876
877 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
878 an explicit output argument.
879
90765e3a
JL
880Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
881
882 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
883 Add a few PA2.0 loads and store variants.
884
8340b17f
ILT
8851999-09-04 Steve Chamberlain <sac@pobox.com>
886
887 * pj.h: New file.
888
5f47d35b
AM
8891999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
890
891 * i386.h (i386_regtab): Move %st to top of table, and split off
892 other fp reg entries.
893 (i386_float_regtab): To here.
894
1c143202
JL
895Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
896
7d8fdb64
JL
897 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
898 by 'f'.
899
90927b9c
JL
900 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
901 Add supporting args.
902
1d16bf9c
JL
903 * hppa.h: Document new completers and args.
904 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
905 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
906 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
907 pmenb and pmdis.
908
96226a68
JL
909 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
910 hshr, hsub, mixh, mixw, permh.
911
5d4ba527
JL
912 * hppa.h (pa_opcodes): Change completers in instructions to
913 use 'c' prefix.
914
e9fc28c6
JL
915 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
916 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
917
1c143202
JL
918 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
919 fnegabs to use 'I' instead of 'F'.
920
9e525108
AM
9211999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
922
923 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
924 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
925 Alphabetically sort PIII insns.
926
e8da1bf1
DE
927Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
928
929 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
930
7d627258
JL
931Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
932
5696871a
JL
933 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
934 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
935
7d627258
JL
936 * hppa.h: Document 64 bit condition completers.
937
c5e52916
JL
938Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
939
940 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
941
eecb386c
AM
9421999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
943
944 * i386.h (i386_optab): Add DefaultSize modifier to all insns
945 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
946 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
947
88a380f3
JL
948Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
949 Jeff Law <law@cygnus.com>
950
951 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
952
953 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 954
d83c6548 955 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
956 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
957
145cf1f0
AM
9581999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
959
960 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
961
73826640
JL
962Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
963
964 * hppa.h (struct pa_opcode): Add new field "flags".
965 (FLAGS_STRICT): Define.
966
b65db252
JL
967Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
968 Jeff Law <law@cygnus.com>
969
f7fc668b
JL
970 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
971
972 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 973
10084519
AM
9741999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
975
976 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
977 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
978 flag to fcomi and friends.
979
cd8a80ba
JL
980Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
981
982 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 983 integer logical instructions.
cd8a80ba 984
1fca749b
ILT
9851999-05-28 Linus Nordberg <linus.nordberg@canit.se>
986
987 * m68k.h: Document new formats `E', `G', `H' and new places `N',
988 `n', `o'.
989
990 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
991 and new places `m', `M', `h'.
992
aa008907
JL
993Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
994
995 * hppa.h (pa_opcodes): Add several processor specific system
996 instructions.
997
e26b85f0
JL
998Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
999
d83c6548 1000 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
1001 "addb", and "addib" to be used by the disassembler.
1002
c608c12e
AM
10031999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
1004
1005 * i386.h (ReverseModrm): Remove all occurences.
1006 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
1007 movmskps, pextrw, pmovmskb, maskmovq.
1008 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
1009 ignore the data size prefix.
1010
1011 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
1012 Mostly stolen from Doug Ledford <dledford@redhat.com>
1013
45c18104
RH
1014Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
1015
1016 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
1017
252b5132
RH
10181999-04-14 Doug Evans <devans@casey.cygnus.com>
1019
1020 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
1021 (CGEN_ATTR_TYPE): Update.
1022 (CGEN_ATTR_MASK): Number booleans starting at 0.
1023 (CGEN_ATTR_VALUE): Update.
1024 (CGEN_INSN_ATTR): Update.
1025
1026Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
1027
1028 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
1029 instructions.
1030
1031Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
1032
1033 * hppa.h (bb, bvb): Tweak opcode/mask.
1034
1035
10361999-03-22 Doug Evans <devans@casey.cygnus.com>
1037
1038 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
1039 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
1040 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
1041 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
1042 Delete member max_insn_size.
1043 (enum cgen_cpu_open_arg): New enum.
1044 (cpu_open): Update prototype.
1045 (cpu_open_1): Declare.
1046 (cgen_set_cpu): Delete.
1047
10481999-03-11 Doug Evans <devans@casey.cygnus.com>
1049
1050 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1051 (CGEN_OPERAND_NIL): New macro.
1052 (CGEN_OPERAND): New member `type'.
1053 (@arch@_cgen_operand_table): Delete decl.
1054 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1055 (CGEN_OPERAND_TABLE): New struct.
1056 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1057 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1058 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1059 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1060 {get,set}_{int,vma}_operand.
1061 (@arch@_cgen_cpu_open): New arg `isa'.
1062 (cgen_set_cpu): Ditto.
1063
1064Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1065
1066 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1067
10681999-02-25 Doug Evans <devans@casey.cygnus.com>
1069
1070 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1071 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1072 enum cgen_hw_type.
1073 (CGEN_HW_TABLE): New struct.
1074 (hw_table): Delete declaration.
1075 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1076 to table entry to enum.
1077 (CGEN_OPINST): Ditto.
1078 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1079
1080Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1081
1082 * alpha.h (AXP_OPCODE_EV6): New.
1083 (AXP_OPCODE_NOPAL): Include it.
1084
10851999-02-09 Doug Evans <devans@casey.cygnus.com>
1086
1087 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1088 All uses updated. New members int_insn_p, max_insn_size,
1089 parse_operand,insert_operand,extract_operand,print_operand,
1090 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1091 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1092 extract_handlers,print_handlers.
1093 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1094 (CGEN_ATTR_BOOL_OFFSET): New macro.
1095 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1096 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1097 (cgen_opcode_handler): Renamed from cgen_base.
1098 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1099 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1100 all uses updated.
1101 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1102 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1103 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1104 (CGEN_OPCODE,CGEN_IBASE): New types.
1105 (CGEN_INSN): Rewrite.
1106 (CGEN_{ASM,DIS}_HASH*): Delete.
1107 (init_opcode_table,init_ibld_table): Declare.
1108 (CGEN_INSN_ATTR): New type.
1109
1110Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1111
252b5132
RH
1112 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1113 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1114 Change *Suf definitions to include x and d suffixes.
1115 (movsx): Use w_Suf and b_Suf.
1116 (movzx): Likewise.
1117 (movs): Use bwld_Suf.
1118 (fld): Change ordering. Use sld_FP.
1119 (fild): Add Intel Syntax equivalent of fildq.
1120 (fst): Use sld_FP.
1121 (fist): Use sld_FP.
1122 (fstp): Use sld_FP. Add x_FP version.
1123 (fistp): LLongMem version for Intel Syntax.
1124 (fcom, fcomp): Use sld_FP.
1125 (fadd, fiadd, fsub): Use sld_FP.
1126 (fsubr): Use sld_FP.
1127 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1128
11291999-01-27 Doug Evans <devans@casey.cygnus.com>
1130
1131 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1132 CGEN_MODE_UINT.
1133
e135f41b 11341999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1135
1136 * hppa.h (bv): Fix mask.
1137
11381999-01-05 Doug Evans <devans@casey.cygnus.com>
1139
1140 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1141 (CGEN_ATTR): Use it.
1142 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1143 (CGEN_ATTR_TABLE): New member dfault.
1144
11451998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1146
1147 * mips.h (MIPS16_INSN_BRANCH): New.
1148
1149Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1150
1151 The following is part of a change made by Edith Epstein
d83c6548
AJ
1152 <eepstein@sophia.cygnus.com> as part of a project to merge in
1153 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1154
1155 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1156 after.
252b5132
RH
1157
1158Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1159
1160 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1161 status word instructions.
252b5132
RH
1162
11631998-11-30 Doug Evans <devans@casey.cygnus.com>
1164
1165 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1166 (struct cgen_keyword_entry): Ditto.
1167 (struct cgen_operand): Ditto.
1168 (CGEN_IFLD): New typedef, with associated access macros.
1169 (CGEN_IFMT): New typedef, with associated access macros.
1170 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1171 (CGEN_IVALUE): New typedef.
1172 (struct cgen_insn): Delete const on syntax,attrs members.
1173 `format' now points to format data. Type of `value' is now
1174 CGEN_IVALUE.
1175 (struct cgen_opcode_table): New member ifld_table.
1176
11771998-11-18 Doug Evans <devans@casey.cygnus.com>
1178
1179 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1180 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1181 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1182 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1183 (cgen_opcode_table): Update type of dis_hash fn.
1184 (extract_operand): Update type of `insn_value' arg.
1185
1186Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1187
1188 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1189
1190Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1191
1192 * mips.h (INSN_MULT): Added.
1193
1194Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1195
1196 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1197
1198Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1199
1200 * cgen.h (CGEN_INSN_INT): New typedef.
1201 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1202 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1203 (CGEN_INSN_BYTES_PTR): New typedef.
1204 (CGEN_EXTRACT_INFO): New typedef.
1205 (cgen_insert_fn,cgen_extract_fn): Update.
1206 (cgen_opcode_table): New member `insn_endian'.
1207 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1208 (insert_operand,extract_operand): Update.
1209 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1210
1211Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1212
1213 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1214 (struct CGEN_HW_ENTRY): New member `attrs'.
1215 (CGEN_HW_ATTR): New macro.
1216 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1217 (CGEN_INSN_INVALID_P): New macro.
1218
1219Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1220
1221 * hppa.h: Add "fid".
d83c6548 1222
252b5132
RH
1223Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1224
1225 From Robert Andrew Dale <rob@nb.net>
1226 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1227 (AMD_3DNOW_OPCODE): Define.
1228
1229Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1230
1231 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1232
1233Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1234
1235 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1236
1237Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1238
1239 Move all global state data into opcode table struct, and treat
1240 opcode table as something that is "opened/closed".
1241 * cgen.h (CGEN_OPCODE_DESC): New type.
1242 (all fns): New first arg of opcode table descriptor.
1243 (cgen_set_parse_operand_fn): Add prototype.
1244 (cgen_current_machine,cgen_current_endian): Delete.
1245 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1246 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1247 dis_hash_table,dis_hash_table_entries.
1248 (opcode_open,opcode_close): Add prototypes.
1249
1250 * cgen.h (cgen_insn): New element `cdx'.
1251
1252Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1253
1254 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1255
1256Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1257
1258 * mn10300.h: Add "no_match_operands" field for instructions.
1259 (MN10300_MAX_OPERANDS): Define.
1260
1261Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1262
1263 * cgen.h (cgen_macro_insn_count): Declare.
1264
1265Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1266
1267 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1268 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1269 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1270 set_{int,vma}_operand.
1271
1272Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1273
1274 * mn10300.h: Add "machine" field for instructions.
1275 (MN103, AM30): Define machine types.
d83c6548 1276
252b5132
RH
1277Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1278
1279 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1280
12811998-06-18 Ulrich Drepper <drepper@cygnus.com>
1282
1283 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1284
1285Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1286
1287 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1288 and ud2b.
1289 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1290 those that happen to be implemented on pentiums.
1291
1292Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1293
1294 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1295 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1296 with Size16|IgnoreSize or Size32|IgnoreSize.
1297
1298Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1299
1300 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1301 (REPE): Rename to REPE_PREFIX_OPCODE.
1302 (i386_regtab_end): Remove.
1303 (i386_prefixtab, i386_prefixtab_end): Remove.
1304 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1305 of md_begin.
1306 (MAX_OPCODE_SIZE): Define.
1307 (i386_optab_end): Remove.
1308 (sl_Suf): Define.
1309 (sl_FP): Use sl_Suf.
1310
1311 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1312 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1313 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1314 data32, dword, and adword prefixes.
1315 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1316 regs.
1317
1318Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1319
1320 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1321
1322 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1323 register operands, because this is a common idiom. Flag them with
1324 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1325 fdivrp because gcc erroneously generates them. Also flag with a
1326 warning.
1327
1328 * i386.h: Add suffix modifiers to most insns, and tighter operand
1329 checks in some cases. Fix a number of UnixWare compatibility
1330 issues with float insns. Merge some floating point opcodes, using
1331 new FloatMF modifier.
1332 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1333 consistency.
1334
1335 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1336 IgnoreDataSize where appropriate.
1337
1338Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1339
1340 * i386.h: (one_byte_segment_defaults): Remove.
1341 (two_byte_segment_defaults): Remove.
1342 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1343
1344Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1345
1346 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1347 (cgen_hw_lookup_by_num): Declare.
1348
1349Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1350
1351 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1352 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1353
1354Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1355
1356 * cgen.h (cgen_asm_init_parse): Delete.
1357 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1358 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1359
1360Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1361
1362 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1363 (cgen_asm_finish_insn): Update prototype.
1364 (cgen_insn): New members num, data.
1365 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1366 dis_hash, dis_hash_table_size moved to ...
1367 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1368 All uses updated. New members asm_hash_p, dis_hash_p.
1369 (CGEN_MINSN_EXPANSION): New struct.
1370 (cgen_expand_macro_insn): Declare.
1371 (cgen_macro_insn_count): Declare.
1372 (get_insn_operands): Update prototype.
1373 (lookup_get_insn_operands): Declare.
1374
1375Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1376
1377 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1378 regKludge. Add operands types for string instructions.
1379
1380Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1381
1382 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1383 table.
1384
1385Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1386
1387 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1388 for `gettext'.
1389
1390Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1391
1392 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1393 Add IsString flag to string instructions.
1394 (IS_STRING): Don't define.
1395 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1396 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1397 (SS_PREFIX_OPCODE): Define.
1398
1399Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1400
1401 * i386.h: Revert March 24 patch; no more LinearAddress.
1402
1403Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1404
1405 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1406 instructions, and instead add FWait opcode modifier. Add short
1407 form of fldenv and fstenv.
1408 (FWAIT_OPCODE): Define.
1409
1410 * i386.h (i386_optab): Change second operand constraint of `mov
1411 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1412 allow legal instructions such as `movl %gs,%esi'
1413
1414Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1415
1416 * h8300.h: Various changes to fully bracket initializers.
1417
1418Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1419
1420 * i386.h: Set LinearAddress for lidt and lgdt.
1421
1422Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1423
1424 * cgen.h (CGEN_BOOL_ATTR): New macro.
1425
1426Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1427
1428 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1429
1430Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1431
1432 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1433 (cgen_insn): Record syntax and format entries here, rather than
1434 separately.
1435
1436Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1437
1438 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1439
1440Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1441
1442 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1443 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1444 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1445
1446Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1447
1448 * cgen.h (lookup_insn): New argument alias_p.
1449
1450Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1451
1452Fix rac to accept only a0:
1453 * d10v.h (OPERAND_ACC): Split into:
1454 (OPERAND_ACC0, OPERAND_ACC1) .
1455 (OPERAND_GPR): Define.
1456
1457Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1458
1459 * cgen.h (CGEN_FIELDS): Define here.
1460 (CGEN_HW_ENTRY): New member `type'.
1461 (hw_list): Delete decl.
1462 (enum cgen_mode): Declare.
1463 (CGEN_OPERAND): New member `hw'.
1464 (enum cgen_operand_instance_type): Declare.
1465 (CGEN_OPERAND_INSTANCE): New type.
1466 (CGEN_INSN): New member `operands'.
1467 (CGEN_OPCODE_DATA): Make hw_list const.
1468 (get_insn_operands,lookup_insn): Add prototypes for.
1469
1470Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1471
1472 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1473 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1474 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1475 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1476
1477Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1478
1479 * cgen.h: Correct typo in comment end marker.
1480
1481Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1482
1483 * tic30.h: New file.
1484
5a109b67 1485Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1486
1487 * cgen.h: Add prototypes for cgen_save_fixups(),
1488 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1489 of cgen_asm_finish_insn() to return a char *.
1490
1491Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1492
1493 * cgen.h: Formatting changes to improve readability.
1494
1495Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1496
1497 * cgen.h (*): Clean up pass over `struct foo' usage.
1498 (CGEN_ATTR): Make unsigned char.
1499 (CGEN_ATTR_TYPE): Update.
1500 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1501 (cgen_base): Move member `attrs' to cgen_insn.
1502 (CGEN_KEYWORD): New member `null_entry'.
1503 (CGEN_{SYNTAX,FORMAT}): New types.
1504 (cgen_insn): Format and syntax separated from each other.
1505
1506Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1507
1508 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1509 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1510 flags_{used,set} long.
1511 (d30v_operand): Make flags field long.
1512
1513Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1514
1515 * m68k.h: Fix comment describing operand types.
1516
1517Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1518
1519 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1520 everything else after down.
1521
1522Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1523
1524 * d10v.h (OPERAND_FLAG): Split into:
1525 (OPERAND_FFLAG, OPERAND_CFLAG) .
1526
1527Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1528
1529 * mips.h (struct mips_opcode): Changed comments to reflect new
1530 field usage.
1531
1532Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1533
1534 * mips.h: Added to comments a quick-ref list of all assigned
1535 operand type characters.
1536 (OP_{MASK,SH}_PERFREG): New macros.
1537
1538Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1539
1540 * sparc.h: Add '_' and '/' for v9a asr's.
1541 Patch from David Miller <davem@vger.rutgers.edu>
1542
1543Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1544
1545 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1546 area are not available in the base model (H8/300).
1547
1548Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1549
1550 * m68k.h: Remove documentation of ` operand specifier.
1551
1552Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1553
1554 * m68k.h: Document q and v operand specifiers.
1555
1556Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1557
1558 * v850.h (struct v850_opcode): Add processors field.
1559 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1560 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1561 (PROCESSOR_V850EA): New bit constants.
1562
1563Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1564
1565 Merge changes from Martin Hunt:
1566
1567 * d30v.h: Allow up to 64 control registers. Add
1568 SHORT_A5S format.
1569
1570 * d30v.h (LONG_Db): New form for delayed branches.
1571
1572 * d30v.h: (LONG_Db): New form for repeati.
1573
1574 * d30v.h (SHORT_D2B): New form.
1575
1576 * d30v.h (SHORT_A2): New form.
1577
1578 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1579 registers are used. Needed for VLIW optimization.
1580
1581Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1582
1583 * cgen.h: Move assembler interface section
1584 up so cgen_parse_operand_result is defined for cgen_parse_address.
1585 (cgen_parse_address): Update prototype.
1586
1587Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1588
1589 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1590
1591Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1592
1593 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1594 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1595 <paubert@iram.es>.
1596
1597 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1598 <paubert@iram.es>.
1599
1600 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1601 <paubert@iram.es>.
1602
1603 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1604 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1605
1606Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1607
1608 * v850.h (V850_NOT_R0): New flag.
1609
1610Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1611
1612 * v850.h (struct v850_opcode): Remove flags field.
1613
1614Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1615
1616 * v850.h (struct v850_opcode): Add flags field.
1617 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1618 fields.
1619 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1620 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1621
1622Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1623
1624 * arc.h: New file.
1625
1626Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1627
1628 * sparc.h (sparc_opcodes): Declare as const.
1629
1630Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1631
1632 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1633 uses single or double precision floating point resources.
1634 (INSN_NO_ISA, INSN_ISA1): Define.
1635 (cpu specific INSN macros): Tweak into bitmasks outside the range
1636 of INSN_ISA field.
1637
1638Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1639
1640 * i386.h: Fix pand opcode.
1641
1642Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1643
1644 * mips.h: Widen INSN_ISA and move it to a more convenient
1645 bit position. Add INSN_3900.
1646
1647Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1648
1649 * mips.h (struct mips_opcode): added new field membership.
1650
1651Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1652
1653 * i386.h (movd): only Reg32 is allowed.
1654
1655 * i386.h: add fcomp and ud2. From Wayne Scott
1656 <wscott@ichips.intel.com>.
1657
1658Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1659
1660 * i386.h: Add MMX instructions.
1661
1662Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1663
1664 * i386.h: Remove W modifier from conditional move instructions.
1665
1666Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1667
1668 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1669 with no arguments to match that generated by the UnixWare
1670 assembler.
1671
1672Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1673
1674 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1675 (cgen_parse_operand_fn): Declare.
1676 (cgen_init_parse_operand): Declare.
1677 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1678 new argument `want'.
1679 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1680 (enum cgen_parse_operand_type): New enum.
1681
1682Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1683
1684 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1685
1686Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1687
1688 * cgen.h: New file.
1689
1690Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1691
1692 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1693 fdivrp.
1694
1695Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1696
1697 * v850.h (extract): Make unsigned.
1698
1699Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1700
1701 * i386.h: Add iclr.
1702
1703Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1704
1705 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1706 take a direction bit.
1707
1708Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1709
1710 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1711
1712Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1713
1714 * sparc.h: Include <ansidecl.h>. Update function declarations to
1715 use prototypes, and to use const when appropriate.
1716
1717Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1718
1719 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1720
1721Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1722
1723 * d10v.h: Change pre_defined_registers to
1724 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1725
1726Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1727
1728 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1729 Change mips_opcodes from const array to a pointer,
1730 and change bfd_mips_num_opcodes from const int to int,
1731 so that we can increase the size of the mips opcodes table
1732 dynamically.
1733
1734Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1735
1736 * d30v.h (FLAG_X): Remove unused flag.
1737
1738Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1739
1740 * d30v.h: New file.
1741
1742Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1743
1744 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1745 (PDS_VALUE): Macro to access value field of predefined symbols.
1746 (tic80_next_predefined_symbol): Add prototype.
1747
1748Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1749
1750 * tic80.h (tic80_symbol_to_value): Change prototype to match
1751 change in function, added class parameter.
1752
1753Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1754
1755 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1756 endmask fields, which are somewhat weird in that 0 and 32 are
1757 treated exactly the same.
1758
1759Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1760
1761 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1762 rather than a constant that is 2**X. Reorder them to put bits for
1763 operands that have symbolic names in the upper bits, so they can
1764 be packed into an int where the lower bits contain the value that
1765 corresponds to that symbolic name.
1766 (predefined_symbo): Add struct.
1767 (tic80_predefined_symbols): Declare array of translations.
1768 (tic80_num_predefined_symbols): Declare size of that array.
1769 (tic80_value_to_symbol): Declare function.
1770 (tic80_symbol_to_value): Declare function.
1771
1772Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1773
1774 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1775
1776Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1777
1778 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1779 be the destination register.
1780
1781Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1782
1783 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1784 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1785 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1786 that the opcode can have two vector instructions in a single
1787 32 bit word and we have to encode/decode both.
1788
1789Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1790
1791 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1792 TIC80_OPERAND_RELATIVE for PC relative.
1793 (TIC80_OPERAND_BASEREL): New flag bit for register
1794 base relative.
1795
1796Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1797
1798 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1799
1800Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1801
1802 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1803 ":s" modifier for scaling.
1804
1805Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1806
1807 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1808 (TIC80_OPERAND_M_LI): Ditto
1809
1810Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1811
1812 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1813 (TIC80_OPERAND_CC): New define for condition code operand.
1814 (TIC80_OPERAND_CR): New define for control register operand.
1815
1816Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1817
1818 * tic80.h (struct tic80_opcode): Name changed.
1819 (struct tic80_opcode): Remove format field.
1820 (struct tic80_operand): Add insertion and extraction functions.
1821 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1822 correct ones.
1823 (FMT_*): Ditto.
1824
1825Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1826
1827 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1828 type IV instruction offsets.
1829
1830Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1831
1832 * tic80.h: New file.
1833
1834Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1835
1836 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1837
1838Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1839
1840 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1841 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1842 * v850.h: Fix comment, v850_operand not powerpc_operand.
1843
1844Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1845
1846 * mn10200.h: Flesh out structures and definitions needed by
1847 the mn10200 assembler & disassembler.
1848
1849Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1850
1851 * mips.h: Add mips16 definitions.
1852
1853Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1854
1855 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1856
1857Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1858
1859 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1860 (MN10300_OPERAND_MEMADDR): Define.
1861
1862Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1863
1864 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1865
1866Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1867
1868 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1869
1870Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1871
1872 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1873
1874Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1875
1876 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1877
1878Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1879
1880 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1881 negative to minimize problems with shared libraries. Organize
1882 instruction subsets by AMASK extensions and PALcode
1883 implementation.
252b5132
RH
1884 (struct alpha_operand): Move flags slot for better packing.
1885
1886Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1887
1888 * v850.h (V850_OPERAND_RELAX): New operand flag.
1889
1890Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1891
1892 * mn10300.h (FMT_*): Move operand format definitions
1893 here.
1894
1895Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1896
1897 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1898
1899Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1900
1901 * mn10300.h (mn10300_opcode): Add "format" field.
1902 (MN10300_OPERAND_*): Define.
1903
1904Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1905
1906 * mn10x00.h: Delete.
1907 * mn10200.h, mn10300.h: New files.
1908
1909Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1910
1911 * mn10x00.h: New file.
1912
1913Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1914
1915 * v850.h: Add new flag to indicate this instruction uses a PC
1916 displacement.
1917
1918Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1919
1920 * h8300.h (stmac): Add missing instruction.
1921
1922Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1923
1924 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1925 field.
1926
1927Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1928
1929 * v850.h (V850_OPERAND_EP): Define.
1930
1931 * v850.h (v850_opcode): Add size field.
1932
1933Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1934
1935 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1936 to functions used to handle unusual operand encoding.
252b5132 1937 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1938 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1939
1940Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1941
1942 * v850.h (v850_operands): Add flags field.
1943 (OPERAND_REG, OPERAND_NUM): Defined.
1944
1945Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1946
1947 * v850.h: New file.
1948
1949Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1950
1951 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1952 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1953 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1954 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1955 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1956 Defined.
252b5132
RH
1957
1958Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1959
1960 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1961 a 3 bit space id instead of a 2 bit space id.
1962
1963Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1964
1965 * d10v.h: Add some additional defines to support the
d83c6548 1966 assembler in determining which operations can be done in parallel.
252b5132
RH
1967
1968Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1969
1970 * h8300.h (SN): Define.
1971 (eepmov.b): Renamed from "eepmov"
1972 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1973 with them.
1974
1975Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1976
1977 * d10v.h (OPERAND_SHIFT): New operand flag.
1978
1979Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1980
1981 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1982 signed numbers.
252b5132
RH
1983
1984Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1985
1986 * d10v.h (pd_reg): Define. Putting the definition here allows
1987 the assembler and disassembler to share the same struct.
1988
1989Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1990
1991 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1992 Williams <steve@icarus.com>.
1993
1994Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1995
1996 * d10v.h: New file.
1997
1998Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1999
2000 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
2001
2002Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
2003
d83c6548 2004 * m68k.h (mcf5200): New macro.
252b5132
RH
2005 Document names of coldfire control registers.
2006
2007Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
2008
2009 * h8300.h (SRC_IN_DST): Define.
2010
2011 * h8300.h (UNOP3): Mark the register operand in this insn
2012 as a source operand, not a destination operand.
2013 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
2014 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
2015 register operand with SRC_IN_DST.
2016
2017Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
2018
2019 * alpha.h: New file.
2020
2021Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
2022
2023 * rs6k.h: Remove obsolete file.
2024
2025Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
2026
2027 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
2028 fdivp, and fdivrp. Add ffreep.
2029
2030Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
2031
2032 * h8300.h: Reorder various #defines for readability.
2033 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
2034 (BITOP): Accept additional (unused) argument. All callers changed.
2035 (EBITOP): Likewise.
2036 (O_LAST): Bump.
2037 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
2038
2039 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
2040 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
2041 (BITOP, EBITOP): Handle new H8/S addressing modes for
2042 bit insns.
2043 (UNOP3): Handle new shift/rotate insns on the H8/S.
2044 (insns using exr): New instructions.
2045 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
2046
2047Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2048
2049 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2050 was incorrect.
2051
2052Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2053
2054 * h8300.h (START): Remove.
2055 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2056 and mov.l insns that can be relaxed.
2057
2058Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2059
2060 * i386.h: Remove Abs32 from lcall.
2061
2062Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2063
2064 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2065 (SLCPOP): New macro.
2066 Mark X,Y opcode letters as in use.
2067
2068Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2069
2070 * sparc.h (F_FLOAT, F_FBR): Define.
2071
2072Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2073
2074 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2075 from all insns.
2076 (ABS8SRC,ABS8DST): Add ABS8MEM.
2077 (add.l): Fix reg+reg variant.
2078 (eepmov.w): Renamed from eepmovw.
2079 (ldc,stc): Fix many cases.
2080
2081Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2082
2083 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2084
2085Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2086
2087 * sparc.h (O): Mark operand letter as in use.
2088
2089Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2090
2091 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2092 Mark operand letters uU as in use.
2093
2094Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2095
2096 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2097 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2098 (SPARC_OPCODE_SUPPORTED): New macro.
2099 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2100 (F_NOTV9): Delete.
2101
2102Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2103
2104 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2105 declaration consistent with return type in definition.
2106
2107Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2108
2109 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2110
2111Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2112
2113 * i386.h (i386_regtab): Add 80486 test registers.
2114
2115Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2116
2117 * i960.h (I_HX): Define.
2118 (i960_opcodes): Add HX instruction.
2119
2120Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2121
2122 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2123 and fclex.
2124
2125Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2126
2127 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2128 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2129 (bfd_* defines): Delete.
2130 (sparc_opcode_archs): Replaces architecture_pname.
2131 (sparc_opcode_lookup_arch): Declare.
2132 (NUMOPCODES): Delete.
2133
2134Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2135
2136 * sparc.h (enum sparc_architecture): Add v9a.
2137 (ARCHITECTURES_CONFLICT_P): Update.
2138
2139Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2140
2141 * i386.h: Added Pentium Pro instructions.
2142
2143Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2144
2145 * m68k.h: Document new 'W' operand place.
2146
2147Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2148
2149 * hppa.h: Add lci and syncdma instructions.
2150
2151Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2152
2153 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2154 instructions.
252b5132
RH
2155
2156Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2157
2158 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2159 assembler's -mcom and -many switches.
2160
2161Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2162
2163 * i386.h: Fix cmpxchg8b extension opcode description.
2164
2165Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2166
2167 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2168 and register cr4.
2169
2170Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2171
2172 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2173
2174Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2175
2176 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2177
2178Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2179
2180 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2181
2182Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2183
2184 * m68kmri.h: Remove.
2185
2186 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2187 declarations. Remove F_ALIAS and flag field of struct
2188 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2189 int. Make name and args fields of struct m68k_opcode const.
2190
2191Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2192
2193 * sparc.h (F_NOTV9): Define.
2194
2195Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2196
2197 * mips.h (INSN_4010): Define.
2198
2199Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2200
2201 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2202
2203 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2204 * m68k.h: Fix argument descriptions of coprocessor
2205 instructions to allow only alterable operands where appropriate.
2206 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2207 (m68k_opcode_aliases): Add more aliases.
2208
2209Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2210
2211 * m68k.h: Added explcitly short-sized conditional branches, and a
2212 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2213 svr4-based configurations.
2214
2215Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2216
2217 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2218 * i386.h: added missing Data16/Data32 flags to a few instructions.
2219
2220Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2221
2222 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2223 (OP_MASK_BCC, OP_SH_BCC): Define.
2224 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2225 (OP_MASK_CCC, OP_SH_CCC): Define.
2226 (INSN_READ_FPR_R): Define.
2227 (INSN_RFE): Delete.
2228
2229Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2230
2231 * m68k.h (enum m68k_architecture): Deleted.
2232 (struct m68k_opcode_alias): New type.
2233 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2234 matching constraints, values and flags. As a side effect of this,
2235 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2236 as I know were never used, now may need re-examining.
2237 (numopcodes): Now const.
2238 (m68k_opcode_aliases, numaliases): New variables.
2239 (endop): Deleted.
2240 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2241 m68k_opcode_aliases; update declaration of m68k_opcodes.
2242
2243Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2244
2245 * hppa.h (delay_type): Delete unused enumeration.
2246 (pa_opcode): Replace unused delayed field with an architecture
2247 field.
2248 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2249
2250Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2251
2252 * mips.h (INSN_ISA4): Define.
2253
2254Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2255
2256 * mips.h (M_DLA_AB, M_DLI): Define.
2257
2258Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2259
2260 * hppa.h (fstwx): Fix single-bit error.
2261
2262Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2263
2264 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2265
2266Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2267
2268 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2269 debug registers. From Charles Hannum (mycroft@netbsd.org).
2270
2271Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2272
2273 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2274 i386 support:
2275 * i386.h (MOV_AX_DISP32): New macro.
2276 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2277 of several call/return instructions.
2278 (ADDR_PREFIX_OPCODE): New macro.
2279
2280Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2281
2282 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2283
4f1d9bd8
NC
2284 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2285 char.
252b5132
RH
2286 (struct vot, field `name'): ditto.
2287
2288Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2289
2290 * vax.h: Supply and properly group all values in end sentinel.
2291
2292Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2293
2294 * mips.h (INSN_ISA, INSN_4650): Define.
2295
2296Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2297
2298 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2299 systems with a separate instruction and data cache, such as the
2300 29040, these instructions take an optional argument.
2301
2302Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2303
2304 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2305 INSN_TRAP.
2306
2307Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2308
2309 * mips.h (INSN_STORE_MEMORY): Define.
2310
2311Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2312
2313 * sparc.h: Document new operand type 'x'.
2314
2315Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2316
2317 * i960.h (I_CX2): New instruction category. It includes
2318 instructions available on Cx and Jx processors.
2319 (I_JX): New instruction category, for JX-only instructions.
2320 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2321 Jx-only instructions, in I_JX category.
2322
2323Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2324
2325 * ns32k.h (endop): Made pointer const too.
2326
2327Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2328
2329 * ns32k.h: Drop Q operand type as there is no correct use
2330 for it. Add I and Z operand types which allow better checking.
2331
2332Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2333
2334 * h8300.h (xor.l) :fix bit pattern.
2335 (L_2): New size of operand.
2336 (trapa): Use it.
2337
2338Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2339
2340 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2341
2342Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2343
2344 * sparc.h: Include v9 definitions.
2345
2346Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2347
2348 * m68k.h (m68060): Defined.
2349 (m68040up, mfloat, mmmu): Include it.
2350 (struct m68k_opcode): Widen `arch' field.
2351 (m68k_opcodes): Updated for M68060. Removed comments that were
2352 instructions commented out by "JF" years ago.
2353
2354Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2355
2356 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2357 add a one-bit `flags' field.
2358 (F_ALIAS): New macro.
2359
2360Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2361
2362 * h8300.h (dec, inc): Get encoding right.
2363
2364Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2365
2366 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2367 a flag instead.
2368 (PPC_OPERAND_SIGNED): Define.
2369 (PPC_OPERAND_SIGNOPT): Define.
2370
2371Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2372
2373 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2374 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2375
2376Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2377
2378 * i386.h: Reverse last change. It'll be handled in gas instead.
2379
2380Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2381
2382 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2383 slower on the 486 and used the implicit shift count despite the
2384 explicit operand. The one-operand form is still available to get
2385 the shorter form with the implicit shift count.
2386
2387Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2388
2389 * hppa.h: Fix typo in fstws arg string.
2390
2391Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2392
2393 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2394
2395Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2396
2397 * ppc.h (PPC_OPCODE_601): Define.
2398
2399Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2400
2401 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2402 (so we can determine valid completers for both addb and addb[tf].)
2403
2404 * hppa.h (xmpyu): No floating point format specifier for the
2405 xmpyu instruction.
2406
2407Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2408
2409 * ppc.h (PPC_OPERAND_NEXT): Define.
2410 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2411 (struct powerpc_macro): Define.
2412 (powerpc_macros, powerpc_num_macros): Declare.
2413
2414Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2415
2416 * ppc.h: New file. Header file for PowerPC opcode table.
2417
2418Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2419
2420 * hppa.h: More minor template fixes for sfu and copr (to allow
2421 for easier disassembly).
2422
2423 * hppa.h: Fix templates for all the sfu and copr instructions.
2424
2425Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2426
2427 * i386.h (push): Permit Imm16 operand too.
2428
2429Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2430
2431 * h8300.h (andc): Exists in base arch.
2432
2433Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2434
2435 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2436 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2437
2438Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2439
2440 * hppa.h: Add FP quadword store instructions.
2441
2442Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2443
2444 * mips.h: (M_J_A): Added.
2445 (M_LA): Removed.
2446
2447Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2448
2449 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2450 <mellon@pepper.ncd.com>.
2451
2452Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2453
2454 * hppa.h: Immediate field in probei instructions is unsigned,
2455 not low-sign extended.
2456
2457Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2458
2459 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2460
2461Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2462
2463 * i386.h: Add "fxch" without operand.
2464
2465Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2466
2467 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2468
2469Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2470
2471 * hppa.h: Add gfw and gfr to the opcode table.
2472
2473Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2474
2475 * m88k.h: extended to handle m88110.
2476
2477Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2478
2479 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2480 addresses.
2481
2482Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2483
2484 * i960.h (i960_opcodes): Properly bracket initializers.
2485
2486Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2487
2488 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2489
2490Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2491
2492 * m68k.h (two): Protect second argument with parentheses.
2493
2494Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2495
2496 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2497 Deleted old in/out instructions in "#if 0" section.
2498
2499Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2500
2501 * i386.h (i386_optab): Properly bracket initializers.
2502
2503Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2504
2505 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2506 Jeff Law, law@cs.utah.edu).
2507
2508Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2509
2510 * i386.h (lcall): Accept Imm32 operand also.
2511
2512Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2513
2514 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2515 (M_DABS): Added.
2516
2517Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2518
2519 * mips.h (INSN_*): Changed values. Removed unused definitions.
2520 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2521 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2522 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2523 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2524 (M_*): Added new values for r6000 and r4000 macros.
2525 (ANY_DELAY): Removed.
2526
2527Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2528
2529 * mips.h: Added M_LI_S and M_LI_SS.
2530
2531Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2532
2533 * h8300.h: Get some rare mov.bs correct.
2534
2535Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2536
2537 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2538 been included.
2539
2540Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2541
2542 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2543 jump instructions, for use in disassemblers.
2544
2545Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2546
2547 * m88k.h: Make bitfields just unsigned, not unsigned long or
2548 unsigned short.
2549
2550Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2551
2552 * hppa.h: New argument type 'y'. Use in various float instructions.
2553
2554Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2555
2556 * hppa.h (break): First immediate field is unsigned.
2557
2558 * hppa.h: Add rfir instruction.
2559
2560Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2561
2562 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2563
2564Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2565
2566 * mips.h: Reworked the hazard information somewhat, and fixed some
2567 bugs in the instruction hazard descriptions.
2568
2569Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2570
2571 * m88k.h: Corrected a couple of opcodes.
2572
2573Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2574
2575 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2576 new version includes instruction hazard information, but is
2577 otherwise reasonably similar.
2578
2579Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2580
2581 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2582
2583Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2584
2585 Patches from Jeff Law, law@cs.utah.edu:
2586 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2587 Make the tables be the same for the following instructions:
2588 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2589 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2590 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2591 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2592 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2593 "fcmp", and "ftest".
2594
2595 * hppa.h: Make new and old tables the same for "break", "mtctl",
2596 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2597 Fix typo in last patch. Collapse several #ifdefs into a
2598 single #ifdef.
2599
2600 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2601 of the comments up-to-date.
2602
2603 * hppa.h: Update "free list" of letters and update
2604 comments describing each letter's function.
2605
4f1d9bd8
NC
2606Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2607
2608 * h8300.h: Lots of little fixes for the h8/300h.
2609
2610Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2611
2612 Support for H8/300-H
2613 * h8300.h: Lots of new opcodes.
2614
252b5132
RH
2615Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2616
2617 * h8300.h: checkpoint, includes H8/300-H opcodes.
2618
2619Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2620
2621 * Patches from Jeffrey Law <law@cs.utah.edu>.
2622 * hppa.h: Rework single precision FP
2623 instructions so that they correctly disassemble code
2624 PA1.1 code.
2625
2626Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2627
2628 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2629 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2630
2631Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2632
2633 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2634 gdb will define it for now.
2635
2636Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2637
2638 * sparc.h: Don't end enumerator list with comma.
2639
2640Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2641
2642 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2643 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2644 ("bc2t"): Correct typo.
2645 ("[ls]wc[023]"): Use T rather than t.
2646 ("c[0123]"): Define general coprocessor instructions.
2647
2648Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2649
2650 * m68k.h: Move split point for gcc compilation more towards
2651 middle.
2652
2653Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2654
2655 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2656 simply wrong, ics, rfi, & rfsvc were missing).
2657 Add "a" to opr_ext for "bb". Doc fix.
2658
2659Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2660
2661 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2662 * mips.h: Add casts, to suppress warnings about shifting too much.
2663 * m68k.h: Document the placement code '9'.
2664
2665Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2666
2667 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2668 allows callers to break up the large initialized struct full of
2669 opcodes into two half-sized ones. This permits GCC to compile
2670 this module, since it takes exponential space for initializers.
2671 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2672
2673Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2674
2675 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2676 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2677 initialized structs in it.
2678
2679Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2680
2681 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2682 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2683 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2684
2685Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2686
2687 * mips.h: document "i" and "j" operands correctly.
2688
2689Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2690
2691 * mips.h: Removed endianness dependency.
2692
2693Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2694
2695 * h8300.h: include info on number of cycles per instruction.
2696
2697Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2698
2699 * hppa.h: Move handy aliases to the front. Fix masks for extract
2700 and deposit instructions.
2701
2702Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2703
2704 * i386.h: accept shld and shrd both with and without the shift
2705 count argument, which is always %cl.
2706
2707Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2708
2709 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2710 (one_byte_segment_defaults, two_byte_segment_defaults,
2711 i386_prefixtab_end): Ditto.
2712
2713Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2714
2715 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2716 for operand 2; from John Carr, jfc@dsg.dec.com.
2717
2718Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2719
2720 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2721 always use 16-bit offsets. Makes calculated-size jump tables
2722 feasible.
2723
2724Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2725
2726 * i386.h: Fix one-operand forms of in* and out* patterns.
2727
2728Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2729
2730 * m68k.h: Added CPU32 support.
2731
2732Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2733
2734 * mips.h (break): Disassemble the argument. Patch from
2735 jonathan@cs.stanford.edu (Jonathan Stone).
2736
2737Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2738
2739 * m68k.h: merged Motorola and MIT syntax.
2740
2741Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2742
2743 * m68k.h (pmove): make the tests less strict, the 68k book is
2744 wrong.
2745
2746Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2747
2748 * m68k.h (m68ec030): Defined as alias for 68030.
2749 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2750 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2751 them. Tightened description of "fmovex" to distinguish it from
2752 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2753 up descriptions that claimed versions were available for chips not
2754 supporting them. Added "pmovefd".
2755
2756Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2757
2758 * m68k.h: fix where the . goes in divull
2759
2760Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2761
2762 * m68k.h: the cas2 instruction is supposed to be written with
2763 indirection on the last two operands, which can be either data or
2764 address registers. Added a new operand type 'r' which accepts
2765 either register type. Added new cases for cas2l and cas2w which
2766 use them. Corrected masks for cas2 which failed to recognize use
2767 of address register.
2768
2769Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2770
2771 * m68k.h: Merged in patches (mostly m68040-specific) from
2772 Colin Smith <colin@wrs.com>.
2773
2774 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2775 base). Also cleaned up duplicates, re-ordered instructions for
2776 the sake of dis-assembling (so aliases come after standard names).
2777 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2778
2779Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2780
2781 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2782 all missing .s
2783
2784Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2785
2786 * sparc.h: Moved tables to BFD library.
2787
2788 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2789
2790Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2791
2792 * h8300.h: Finish filling in all the holes in the opcode table,
2793 so that the Lucid C compiler can digest this as well...
2794
2795Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2796
2797 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2798 Fix opcodes on various sizes of fild/fist instructions
2799 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2800 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2801
2802Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2803
2804 * h8300.h: Fill in all the holes in the opcode table so that the
2805 losing HPUX C compiler can digest this...
2806
2807Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2808
2809 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2810 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2811
2812Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2813
2814 * sparc.h: Add new architecture variant sparclite; add its scan
2815 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2816
2817Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2818
2819 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2820 fy@lucid.com).
2821
2822Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2823
2824 * rs6k.h: New version from IBM (Metin).
2825
2826Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2827
2828 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2829 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2830
2831Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2832
2833 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2834
2835Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2836
2837 * m68k.h (one, two): Cast macro args to unsigned to suppress
2838 complaints from compiler and lint about integer overflow during
2839 shift.
2840
2841Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2842
2843 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2844
2845Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2846
2847 * mips.h: Make bitfield layout depend on the HOST compiler,
2848 not on the TARGET system.
2849
2850Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2851
2852 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2853 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2854 <TRANLE@INTELLICORP.COM>.
2855
2856Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2857
2858 * h8300.h: turned op_type enum into #define list
2859
2860Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2861
2862 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2863 similar instructions -- they've been renamed to "fitoq", etc.
2864 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2865 number of arguments.
2866 * h8300.h: Remove extra ; which produces compiler warning.
2867
2868Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2869
2870 * sparc.h: fix opcode for tsubcctv.
2871
2872Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2873
2874 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2875
2876Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2877
2878 * sparc.h (nop): Made the 'lose' field be even tighter,
2879 so only a standard 'nop' is disassembled as a nop.
2880
2881Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2882
2883 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2884 disassembled as a nop.
2885
4f1d9bd8
NC
2886Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2887
2888 * m68k.h, sparc.h: ANSIfy enums.
2889
252b5132
RH
2890Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2891
2892 * sparc.h: fix a typo.
2893
2894Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2895
2896 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2897 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2898 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2899
2900\f
2901Local Variables:
2902version-control: never
2903End:
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