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Remove semicolon from ARM comment chars list
[deliverable/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
8ff529d8
CD		 12001-10-17 Chris Demetriou <cgd@broadcom.com>
2
3 * mips.h: Sort coprocessor instruction argument characters
4 in comment, add a few more words of description for "H".
5
2228315b
CD		 62001-10-17 Chris Demetriou <cgd@broadcom.com>
7
8 * mips.h (INSN_SB1): New cpu-specific instruction bit.
9 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
10 if cpu is CPU_SB1.
11
f5c120c5
MG		 122001-10-17 matthew green <mrg@redhat.com>
13
14 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
15
418c1742
MG		 162001-10-12 matthew green <mrg@redhat.com>
17
0716ce0d
MG		 18 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
19 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
20 instructions, respectively.
418c1742 21
6ff2f2ba
NC		 222001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
23
24 * v850.h: Remove spurious comment.
25
015cf428
NC		 262001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
27
28 * h8300.h: Fix compile time warning messages
29
847b8b31
RH		 302001-09-04 Richard Henderson <rth@redhat.com>
31
32 * alpha.h (struct alpha_operand): Pack elements into bitfields.
33
a98b9439
EC		 342001-08-31 Eric Christopher <echristo@redhat.com>
35
36 * mips.h: Remove CPU_MIPS32_4K.
37
a6959011
AM		 382001-08-27 Torbjorn Granlund <tege@swox.com>
39
40 * ppc.h (PPC_OPERAND_DS): Define.
41
d83c6548
AJ		 422001-08-25 Andreas Jaeger <aj@suse.de>
43
44 * d30v.h: Fix declaration of reg_name_cnt.
45
46 * d10v.h: Fix declaration of d10v_reg_name_cnt.
47
48 * arc.h: Add prototypes from opcodes/arc-opc.c.
49
99c14723
TS		 502001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
51
52 * mips.h (INSN_10000): Define.
53 (OPCODE_IS_MEMBER): Check for INSN_10000.
54
11b37b7b
AM		 552001-08-10 Alan Modra <amodra@one.net.au>
56
57 * ppc.h: Revert 2001-08-08.
58
0f1bac05
AM		 592001-08-08 Alan Modra <amodra@one.net.au>
60
61 1999-10-25 Torbjorn Granlund <tege@swox.com>
62 * ppc.h (struct powerpc_operand): New field `reloc'.
63
81f6038f
FCE		 642001-07-11 Frank Ch. Eigler <fche@redhat.com>
65
66 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
67 (cgen_cpu_desc): Ditto.
68
32cfffe3
BE		 692001-07-07 Ben Elliston <bje@redhat.com>
70
71 * m88k.h: Clean up and reformat. Remove unused code.
72
3e890047
GK		 732001-06-14 Geoffrey Keating <geoffk@redhat.com>
74
75 * cgen.h (cgen_keyword): Add nonalpha_chars field.
76
d1cf510e
NC		 772001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
78
79 * mips.h (CPU_R12000): Define.
80
e281c457
JH		 812001-05-23 John Healy <jhealy@redhat.com>
82
83 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 84
aa5f19f2
NC		 852001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
86
87 * mips.h (INSN_ISA_MASK): Define.
88
67d6227d
AM		 892001-05-12 Alan Modra <amodra@one.net.au>
90
91 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
92 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
93 and use InvMem as these insns must have register operands.
94
992aaec9
AM		 952001-05-04 Alan Modra <amodra@one.net.au>
96
97 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
98 and pextrw to swap reg/rm assignments.
99
4ef7f0bf
HPN		 1002001-04-05 Hans-Peter Nilsson <hp@axis.com>
101
102 * cris.h (enum cris_insn_version_usage): Correct comment for
103 cris_ver_v3p.
104
0f17484f
AM		 1052001-03-24 Alan Modra <alan@linuxcare.com.au>
106
107 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
108 Add InvMem to first operand of "maskmovdqu".
109
7ccb5238
HPN		 1102001-03-22 Hans-Peter Nilsson <hp@axis.com>
111
112 * cris.h (ADD_PC_INCR_OPCODE): New macro.
113
361bfa20
KH		 1142001-03-21 Kazu Hirata <kazu@hxi.com>
115
116 * h8300.h: Fix formatting.
117
87890af0
AM		 1182001-03-22 Alan Modra <alan@linuxcare.com.au>
119
120 * i386.h (i386_optab): Add paddq, psubq.
121
2e98d2de
AM		 1222001-03-19 Alan Modra <alan@linuxcare.com.au>
123
124 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
125
80a523c2
NC		 1262001-02-28 Igor Shevlyakov <igor@windriver.com>
127
128 * m68k.h: new defines for Coldfire V4. Update mcf to know
129 about mcf5407.
130
e135f41b
NC		 1312001-02-18 lars brinkhoff <lars@nocrew.org>
132
133 * pdp11.h: New file.
134
1352001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH		 136
137 * i386.h (i386_optab): SSE integer converison instructions have
138 64bit versions on x86-64.
139
8eaec934
NC		 1402001-02-10 Nick Clifton <nickc@redhat.com>
141
142 * mips.h: Remove extraneous whitespace. Formating change to allow
143 for future contribution.
144
a85d7ed0
NC		 1452001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
146
147 * s390.h: New file.
148
0715dc88
PM		 1492001-02-02 Patrick Macdonald <patrickm@redhat.com>
150
151 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
152 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
153 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
154
296bc568
AM		 1552001-01-24 Karsten Keil <kkeil@suse.de>
156
157 * i386.h (i386_optab): Fix swapgs
158
1328dc98
AM		 1592001-01-14 Alan Modra <alan@linuxcare.com.au>
160
161 * hppa.h: Describe new '<' and '>' operand types, and tidy
162 existing comments.
163 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
164 Remove duplicate "ldw j(s,b),x". Sort some entries.
165
e135f41b 1662001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH		 167
168 * i386.h (i386_optab): Fix pusha and ret templates.
169
0d2bcfaf
NC		 1702001-01-11 Peter Targett <peter.targett@arccores.com>
171
172 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
173 definitions for masking cpu type.
174 (arc_ext_operand_value) New structure for storing extended
175 operands.
176 (ARC_OPERAND_*) Flags for operand values.
177
1782001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH		 179
180 * i386.h (pinsrw): Add.
181 (pshufw): Remove.
182 (cvttpd2dq): Fix operands.
183 (cvttps2dq): Likewise.
184 (movq2q): Rename to movdq2q.
185
079966a8
AM		 1862001-01-10 Richard Schaal <richard.schaal@intel.com>
187
188 * i386.h: Correct movnti instruction.
189
8c1f9e76
JJ		 1902001-01-09 Jeff Johnston <jjohnstn@redhat.com>
191
192 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
193 of operands (unsigned char or unsigned short).
194 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
195 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
196
0d2bcfaf 1972001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH		 198
199 * i386.h (i386_optab): Make [sml]fence template to use immext field.
200
0d2bcfaf 2012001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH		 202
203 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
204 introduced by Pentium4
205
0d2bcfaf 2062000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH		 207
208 * i386.h (i386_optab): Add "rex*" instructions;
209 add swapgs; disable jmp/call far direct instructions for
210 64bit mode; add syscall and sysret; disable registers for 0xc6
211 template. Add 'q' suffixes to extendable instructions, disable
079966a8 212 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH		 213 (i386_regtab): Add extended registers.
214 (*Suf): Add No_qSuf.
215 (q_Suf, wlq_Suf, bwlq_Suf): New.
216
0d2bcfaf 2172000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH		 218
219 * i386.h (i386_optab): Replace "Imm" with "EncImm".
220 (i386_regtab): Add flags field.
d83c6548 221
bf40d919
NC		 2222000-12-12 Nick Clifton <nickc@redhat.com>
223
224 * mips.h: Fix formatting.
225
4372b673
NC		 2262000-12-01 Chris Demetriou <cgd@sibyte.com>
227
228 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
229 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
230 OP_*_SYSCALL definitions.
231 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
232 19 bit wait codes.
233 (MIPS operand specifier comments): Remove 'm', add 'U' and
234 'J', and update the meaning of 'B' so that it's more general.
235
e7af610e
NC		 236 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
237 INSN_ISA5): Renumber, redefine to mean the ISA at which the
238 instruction was added.
239 (INSN_ISA32): New constant.
240 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
241 Renumber to avoid new and/or renumbered INSN_* constants.
242 (INSN_MIPS32): Delete.
243 (ISA_UNKNOWN): New constant to indicate unknown ISA.
244 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
245 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 246 constants available at that ISA level.
e7af610e
NC		 247 (CPU_UNKNOWN): New constant to indicate unknown CPU.
248 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
249 define it with a unique value.
250 (OPCODE_IS_MEMBER): Update for new ISA membership-related
251 constant meanings.
252
84ea6cf2 253 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 254 definitions.
84ea6cf2 255
c6c98b38
NC		 256 * mips.h (CPU_SB1): New constant.
257
19f7b010
JJ		 2582000-10-20 Jakub Jelinek <jakub@redhat.com>
259
260 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
261 Note that '3' is used for siam operand.
262
139368c9
JW		 2632000-09-22 Jim Wilson <wilson@cygnus.com>
264
265 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
266
156c2f8b 2672000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 268
156c2f8b
NC		 269 * mips.h: Use defines instead of hard-coded processor numbers.
270 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 271 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC		 272 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
273 CPU_4KC, CPU_4KM, CPU_4KP): Define..
274 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 275 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 276 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ		 277 Add 'P' to used characters.
278 Use 'H' for coprocessor select field.
156c2f8b 279 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ		 280 Document new arg characters and add to used characters.
281 (INSN_MIPS32): New define for MIPS32 extensions.
282 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 283
3c5ce02e
AM		 2842000-09-05 Alan Modra <alan@linuxcare.com.au>
285
286 * hppa.h: Mention cz completer.
287
50b81f19
JW		 2882000-08-16 Jim Wilson <wilson@cygnus.com>
289
290 * ia64.h (IA64_OPCODE_POSTINC): New.
291
fc29466d
L		 2922000-08-15 H.J. Lu <hjl@gnu.org>
293
294 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
295 IgnoreSize change.
296
4f1d9bd8
NC		 2972000-08-08 Jason Eckhardt <jle@cygnus.com>
298
299 * i860.h: Small formatting adjustments.
300
45ee1401
DC		 3012000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
302
303 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
304 Move related opcodes closer to each other.
305 Minor changes in comments, list undefined opcodes.
306
9d551405
DB		 3072000-07-26 Dave Brolley <brolley@redhat.com>
308
309 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
310
4f1d9bd8
NC		 3112000-07-22 Jason Eckhardt <jle@cygnus.com>
312
313 * i860.h (btne, bte, bla): Changed these opcodes
314 to use sbroff ('r') instead of split16 ('s').
315 (J, K, L, M): New operand types for 16-bit aligned fields.
316 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
317 use I, J, K, L, M instead of just I.
318 (T, U): New operand types for split 16-bit aligned fields.
319 (st.x): Changed these opcodes to use S, T, U instead of just S.
320 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
321 exist on the i860.
322 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
323 (pfeq.ss, pfeq.dd): New opcodes.
324 (st.s): Fixed incorrect mask bits.
325 (fmlow): Fixed incorrect mask bits.
326 (fzchkl, pfzchkl): Fixed incorrect mask bits.
327 (faddz, pfaddz): Fixed incorrect mask bits.
328 (form, pform): Fixed incorrect mask bits.
329 (pfld.l): Fixed incorrect mask bits.
330 (fst.q): Fixed incorrect mask bits.
331 (all floating point opcodes): Fixed incorrect mask bits for
332 handling of dual bit.
333
c8488617
HPN		 3342000-07-20 Hans-Peter Nilsson <hp@axis.com>
335
336 cris.h: New file.
337
65aa24b6
NC		 3382000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
339
340 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
341 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
342 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
343 (AVR_ISA_M83): Define for ATmega83, ATmega85.
344 (espm): Remove, because ESPM removed in databook update.
345 (eicall, eijmp): Move to the end of opcode table.
346
60bcf0fa
NC		 3472000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
348
349 * m68hc11.h: New file for support of Motorola 68hc11.
350
60a2978a
DC		 351Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
352
353 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
354
68ab2dd9
DC		 355Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
356
357 * avr.h: New file with AVR opcodes.
358
f0662e27
DL		 359Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
360
361 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
362
b722f2be
AM		 3632000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
364
365 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
366
f9e0cf0b
AM		 3672000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
368
369 * i386.h: Use sl_FP, not sl_Suf for fild.
370
f660ee8b
FCE		 3712000-05-16 Frank Ch. Eigler <fche@redhat.com>
372
373 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
374 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
375 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
376 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
377
558b0a60
AM		 3782000-05-13 Alan Modra <alan@linuxcare.com.au>,
379
380 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
381
e413e4e9
AM		 3822000-05-13 Alan Modra <alan@linuxcare.com.au>,
383 Alexander Sokolov <robocop@netlink.ru>
384
385 * i386.h (i386_optab): Add cpu_flags for all instructions.
386
3872000-05-13 Alan Modra <alan@linuxcare.com.au>
388
389 From Gavin Romig-Koch <gavin@cygnus.com>
390 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
391
5c84d377
TW		 3922000-05-04 Timothy Wall <twall@cygnus.com>
393
394 * tic54x.h: New.
395
966f959b
C		 3962000-05-03 J.T. Conklin <jtc@redback.com>
397
398 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
399 (PPC_OPERAND_VR): New operand flag for vector registers.
400
c5d05dbb
JL		 4012000-05-01 Kazu Hirata <kazu@hxi.com>
402
403 * h8300.h (EOP): Add missing initializer.
404
a7fba0e0
JL		 405Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
406
407 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
408 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
409 New operand types l,y,&,fe,fE,fx added to support above forms.
410 (pa_opcodes): Replaced usage of 'x' as source/target for
411 floating point double-word loads/stores with 'fx'.
412
800eeca4
JW		 413Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
414 David Mosberger <davidm@hpl.hp.com>
415 Timothy Wall <twall@cygnus.com>
416 Jim Wilson <wilson@cygnus.com>
417
418 * ia64.h: New file.
419
ba23e138
NC		 4202000-03-27 Nick Clifton <nickc@cygnus.com>
421
422 * d30v.h (SHORT_A1): Fix value.
423 (SHORT_AR): Renumber so that it is at the end of the list of short
424 instructions, not the end of the list of long instructions.
425
d0b47220
AM		 4262000-03-26 Alan Modra <alan@linuxcare.com>
427
428 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
429 problem isn't really specific to Unixware.
430 (OLDGCC_COMPAT): Define.
431 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
432 destination %st(0).
433 Fix lots of comments.
434
866afedc
NC		 4352000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
436
437 * d30v.h:
438 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
439 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
440 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
441 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
442 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
443 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
444 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
445
cc5ca5ce
AM		 4462000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
447
448 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
449 fistpd without suffix.
450
68e324a2
NC		 4512000-02-24 Nick Clifton <nickc@cygnus.com>
452
453 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
454 'signed_overflow_ok_p'.
455 Delete prototypes for cgen_set_flags() and cgen_get_flags().
456
60f036a2
AH		 4572000-02-24 Andrew Haley <aph@cygnus.com>
458
459 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
460 (CGEN_CPU_TABLE): flags: new field.
461 Add prototypes for new functions.
d83c6548 462
9b9b5cd4
AM		 4632000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
464
465 * i386.h: Add some more UNIXWARE_COMPAT comments.
466
5b93d8bb
AM		 4672000-02-23 Linas Vepstas <linas@linas.org>
468
469 * i370.h: New file.
470
4f1d9bd8
NC		 4712000-02-22 Chandra Chavva <cchavva@cygnus.com>
472
473 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
474 cannot be combined in parallel with ADD/SUBppp.
475
87f398dd
AH		 4762000-02-22 Andrew Haley <aph@cygnus.com>
477
478 * mips.h: (OPCODE_IS_MEMBER): Add comment.
479
367c01af
AH		 4801999-12-30 Andrew Haley <aph@cygnus.com>
481
9a1e79ca
AH		 482 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
483 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
484 insns.
367c01af 485
add0c677
AM		 4862000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
487
488 * i386.h: Qualify intel mode far call and jmp with x_Suf.
489
3138f287
AM		 4901999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
491
492 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
493 indirect jumps and calls. Add FF/3 call for intel mode.
494
ccecd07b
JL		 495Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
496
497 * mn10300.h: Add new operand types. Add new instruction formats.
498
b37e19e9
JL		 499Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
500
501 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
502 instruction.
503
5fce5ddf
GRK		 5041999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
505
506 * mips.h (INSN_ISA5): New.
507
2bd7f1f3
GRK		 5081999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
509
510 * mips.h (OPCODE_IS_MEMBER): New.
511
4df2b5c5
NC		 5121999-10-29 Nick Clifton <nickc@cygnus.com>
513
514 * d30v.h (SHORT_AR): Define.
515
446a06c9
MM		 5161999-10-18 Michael Meissner <meissner@cygnus.com>
517
518 * alpha.h (alpha_num_opcodes): Convert to unsigned.
519 (alpha_num_operands): Ditto.
520
eca04c6a
JL		 521Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
522
523 * hppa.h (pa_opcodes): Add load and store cache control to
524 instructions. Add ordered access load and store.
525
526 * hppa.h (pa_opcode): Add new entries for addb and addib.
527
528 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
529
530 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
531
c43185de
DN		 532Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
533
534 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
535
ec3533da
JL		 536Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
537
390f858d
JL		 538 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
539 and "be" using completer prefixes.
540
8c47ebd9
JL		 541 * hppa.h (pa_opcodes): Add initializers to silence compiler.
542
ec3533da
JL		 543 * hppa.h: Update comments about character usage.
544
18369bea
JL		 545Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
546
547 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
548 up the new fstw & bve instructions.
549
c36efdd2
JL		 550Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
551
d3ffb032
JL		 552 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
553 instructions.
554
c49ec3da
JL		 555 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
556
5d2e7ecc
JL		 557 * hppa.h (pa_opcodes): Add long offset double word load/store
558 instructions.
559
6397d1a2
JL		 560 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
561 stores.
562
142f0fe0
JL		 563 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
564
f5a68b45
JL		 565 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
566
8235801e
JL		 567 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
568
35184366
JL		 569 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
570
f0bfde5e
JL		 571 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
572
27bbbb58
JL		 573 * hppa.h (pa_opcodes): Add support for "b,l".
574
c36efdd2
JL		 575 * hppa.h (pa_opcodes): Add support for "b,gate".
576
f2727d04
JL		 577Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
578
9392fb11 579 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 580 in xmpyu.
9392fb11 581
e0c52e99
JL		 582 * hppa.h (pa_opcodes): Fix mask for probe and probei.
583
f2727d04
JL		 584 * hppa.h (pa_opcodes): Fix mask for depwi.
585
52d836e2
JL		 586Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
587
588 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
589 an explicit output argument.
590
90765e3a
JL		 591Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
592
593 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
594 Add a few PA2.0 loads and store variants.
595
8340b17f
ILT		 5961999-09-04 Steve Chamberlain <sac@pobox.com>
597
598 * pj.h: New file.
599
5f47d35b
AM		 6001999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
601
602 * i386.h (i386_regtab): Move %st to top of table, and split off
603 other fp reg entries.
604 (i386_float_regtab): To here.
605
1c143202
JL		 606Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
607
7d8fdb64
JL		 608 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
609 by 'f'.
610
90927b9c
JL		 611 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
612 Add supporting args.
613
1d16bf9c
JL		 614 * hppa.h: Document new completers and args.
615 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
616 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
617 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
618 pmenb and pmdis.
619
96226a68
JL		 620 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
621 hshr, hsub, mixh, mixw, permh.
622
5d4ba527
JL		 623 * hppa.h (pa_opcodes): Change completers in instructions to
624 use 'c' prefix.
625
e9fc28c6
JL		 626 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
627 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
628
1c143202
JL		 629 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
630 fnegabs to use 'I' instead of 'F'.
631
9e525108
AM		 6321999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
633
634 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
635 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
636 Alphabetically sort PIII insns.
637
e8da1bf1
DE		 638Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
639
640 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
641
7d627258
JL		 642Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
643
5696871a
JL		 644 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
645 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
646
7d627258
JL		 647 * hppa.h: Document 64 bit condition completers.
648
c5e52916
JL		 649Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
650
651 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
652
eecb386c
AM		 6531999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
654
655 * i386.h (i386_optab): Add DefaultSize modifier to all insns
656 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
657 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
658
88a380f3
JL		 659Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
660 Jeff Law <law@cygnus.com>
661
662 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
663
664 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 665
d83c6548 666 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL		 667 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
668
145cf1f0
AM		 6691999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
670
671 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
672
73826640
JL		 673Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
674
675 * hppa.h (struct pa_opcode): Add new field "flags".
676 (FLAGS_STRICT): Define.
677
b65db252
JL		 678Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
679 Jeff Law <law@cygnus.com>
680
f7fc668b
JL		 681 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
682
683 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 684
10084519
AM		 6851999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
686
687 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
688 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
689 flag to fcomi and friends.
690
cd8a80ba
JL		 691Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
692
693 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 694 integer logical instructions.
cd8a80ba 695
1fca749b
ILT		 6961999-05-28 Linus Nordberg <linus.nordberg@canit.se>
697
698 * m68k.h: Document new formats `E', `G', `H' and new places `N',
699 `n', `o'.
700
701 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
702 and new places `m', `M', `h'.
703
aa008907
JL		 704Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
705
706 * hppa.h (pa_opcodes): Add several processor specific system
707 instructions.
708
e26b85f0
JL		 709Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
710
d83c6548 711 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL		 712 "addb", and "addib" to be used by the disassembler.
713
c608c12e
AM		 7141999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
715
716 * i386.h (ReverseModrm): Remove all occurences.
717 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
718 movmskps, pextrw, pmovmskb, maskmovq.
719 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
720 ignore the data size prefix.
721
722 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
723 Mostly stolen from Doug Ledford <dledford@redhat.com>
724
45c18104
RH		 725Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
726
727 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
728
252b5132
RH		 7291999-04-14 Doug Evans <devans@casey.cygnus.com>
730
731 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
732 (CGEN_ATTR_TYPE): Update.
733 (CGEN_ATTR_MASK): Number booleans starting at 0.
734 (CGEN_ATTR_VALUE): Update.
735 (CGEN_INSN_ATTR): Update.
736
737Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
738
739 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
740 instructions.
741
742Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
743
744 * hppa.h (bb, bvb): Tweak opcode/mask.
745
746
7471999-03-22 Doug Evans <devans@casey.cygnus.com>
748
749 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
750 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
751 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
752 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
753 Delete member max_insn_size.
754 (enum cgen_cpu_open_arg): New enum.
755 (cpu_open): Update prototype.
756 (cpu_open_1): Declare.
757 (cgen_set_cpu): Delete.
758
7591999-03-11 Doug Evans <devans@casey.cygnus.com>
760
761 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
762 (CGEN_OPERAND_NIL): New macro.
763 (CGEN_OPERAND): New member `type'.
764 (@arch@_cgen_operand_table): Delete decl.
765 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
766 (CGEN_OPERAND_TABLE): New struct.
767 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
768 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
769 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
770 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
771 {get,set}_{int,vma}_operand.
772 (@arch@_cgen_cpu_open): New arg `isa'.
773 (cgen_set_cpu): Ditto.
774
775Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
776
777 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
778
7791999-02-25 Doug Evans <devans@casey.cygnus.com>
780
781 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
782 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
783 enum cgen_hw_type.
784 (CGEN_HW_TABLE): New struct.
785 (hw_table): Delete declaration.
786 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
787 to table entry to enum.
788 (CGEN_OPINST): Ditto.
789 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
790
791Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
792
793 * alpha.h (AXP_OPCODE_EV6): New.
794 (AXP_OPCODE_NOPAL): Include it.
795
7961999-02-09 Doug Evans <devans@casey.cygnus.com>
797
798 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
799 All uses updated. New members int_insn_p, max_insn_size,
800 parse_operand,insert_operand,extract_operand,print_operand,
801 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
802 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
803 extract_handlers,print_handlers.
804 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
805 (CGEN_ATTR_BOOL_OFFSET): New macro.
806 (CGEN_ATTR_MASK): Subtract it to compute bit number.
807 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
808 (cgen_opcode_handler): Renamed from cgen_base.
809 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
810 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
811 all uses updated.
812 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
813 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
814 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
815 (CGEN_OPCODE,CGEN_IBASE): New types.
816 (CGEN_INSN): Rewrite.
817 (CGEN_{ASM,DIS}_HASH*): Delete.
818 (init_opcode_table,init_ibld_table): Declare.
819 (CGEN_INSN_ATTR): New type.
820
821Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 822
252b5132
RH		 823 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
824 (x_FP, d_FP, dls_FP, sldx_FP): Define.
825 Change *Suf definitions to include x and d suffixes.
826 (movsx): Use w_Suf and b_Suf.
827 (movzx): Likewise.
828 (movs): Use bwld_Suf.
829 (fld): Change ordering. Use sld_FP.
830 (fild): Add Intel Syntax equivalent of fildq.
831 (fst): Use sld_FP.
832 (fist): Use sld_FP.
833 (fstp): Use sld_FP. Add x_FP version.
834 (fistp): LLongMem version for Intel Syntax.
835 (fcom, fcomp): Use sld_FP.
836 (fadd, fiadd, fsub): Use sld_FP.
837 (fsubr): Use sld_FP.
838 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
839
8401999-01-27 Doug Evans <devans@casey.cygnus.com>
841
842 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
843 CGEN_MODE_UINT.
844
e135f41b 8451999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH		 846
847 * hppa.h (bv): Fix mask.
848
8491999-01-05 Doug Evans <devans@casey.cygnus.com>
850
851 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
852 (CGEN_ATTR): Use it.
853 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
854 (CGEN_ATTR_TABLE): New member dfault.
855
8561998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
857
858 * mips.h (MIPS16_INSN_BRANCH): New.
859
860Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
861
862 The following is part of a change made by Edith Epstein
d83c6548
AJ		 863 <eepstein@sophia.cygnus.com> as part of a project to merge in
864 changes by HP; HP did not create ChangeLog entries.
252b5132
RH		 865
866 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 867 after.
252b5132
RH		 868
869Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
870
871 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 872 status word instructions.
252b5132
RH		 873
8741998-11-30 Doug Evans <devans@casey.cygnus.com>
875
876 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
877 (struct cgen_keyword_entry): Ditto.
878 (struct cgen_operand): Ditto.
879 (CGEN_IFLD): New typedef, with associated access macros.
880 (CGEN_IFMT): New typedef, with associated access macros.
881 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
882 (CGEN_IVALUE): New typedef.
883 (struct cgen_insn): Delete const on syntax,attrs members.
884 `format' now points to format data. Type of `value' is now
885 CGEN_IVALUE.
886 (struct cgen_opcode_table): New member ifld_table.
887
8881998-11-18 Doug Evans <devans@casey.cygnus.com>
889
890 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
891 (CGEN_OPERAND_INSTANCE): New member `attrs'.
892 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
893 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
894 (cgen_opcode_table): Update type of dis_hash fn.
895 (extract_operand): Update type of `insn_value' arg.
896
897Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
898
899 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
900
901Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
902
903 * mips.h (INSN_MULT): Added.
904
905Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
906
907 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
908
909Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
910
911 * cgen.h (CGEN_INSN_INT): New typedef.
912 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
913 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
914 (CGEN_INSN_BYTES_PTR): New typedef.
915 (CGEN_EXTRACT_INFO): New typedef.
916 (cgen_insert_fn,cgen_extract_fn): Update.
917 (cgen_opcode_table): New member `insn_endian'.
918 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
919 (insert_operand,extract_operand): Update.
920 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
921
922Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
923
924 * cgen.h (CGEN_ATTR_BOOLS): New macro.
925 (struct CGEN_HW_ENTRY): New member `attrs'.
926 (CGEN_HW_ATTR): New macro.
927 (struct CGEN_OPERAND_INSTANCE): New member `name'.
928 (CGEN_INSN_INVALID_P): New macro.
929
930Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
931
932 * hppa.h: Add "fid".
d83c6548 933
252b5132
RH		 934Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
935
936 From Robert Andrew Dale <rob@nb.net>
937 * i386.h (i386_optab): Add AMD 3DNow! instructions.
938 (AMD_3DNOW_OPCODE): Define.
939
940Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
941
942 * d30v.h (EITHER_BUT_PREFER_MU): Define.
943
944Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
945
946 * cgen.h (cgen_insn): #if 0 out element `cdx'.
947
948Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
949
950 Move all global state data into opcode table struct, and treat
951 opcode table as something that is "opened/closed".
952 * cgen.h (CGEN_OPCODE_DESC): New type.
953 (all fns): New first arg of opcode table descriptor.
954 (cgen_set_parse_operand_fn): Add prototype.
955 (cgen_current_machine,cgen_current_endian): Delete.
956 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
957 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
958 dis_hash_table,dis_hash_table_entries.
959 (opcode_open,opcode_close): Add prototypes.
960
961 * cgen.h (cgen_insn): New element `cdx'.
962
963Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
964
965 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
966
967Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
968
969 * mn10300.h: Add "no_match_operands" field for instructions.
970 (MN10300_MAX_OPERANDS): Define.
971
972Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
973
974 * cgen.h (cgen_macro_insn_count): Declare.
975
976Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
977
978 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
979 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
980 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
981 set_{int,vma}_operand.
982
983Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
984
985 * mn10300.h: Add "machine" field for instructions.
986 (MN103, AM30): Define machine types.
d83c6548 987
252b5132
RH		 988Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
989
990 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
991
9921998-06-18 Ulrich Drepper <drepper@cygnus.com>
993
994 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
995
996Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
997
998 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
999 and ud2b.
1000 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1001 those that happen to be implemented on pentiums.
1002
1003Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1004
1005 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1006 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1007 with Size16|IgnoreSize or Size32|IgnoreSize.
1008
1009Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1010
1011 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1012 (REPE): Rename to REPE_PREFIX_OPCODE.
1013 (i386_regtab_end): Remove.
1014 (i386_prefixtab, i386_prefixtab_end): Remove.
1015 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1016 of md_begin.
1017 (MAX_OPCODE_SIZE): Define.
1018 (i386_optab_end): Remove.
1019 (sl_Suf): Define.
1020 (sl_FP): Use sl_Suf.
1021
1022 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1023 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1024 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1025 data32, dword, and adword prefixes.
1026 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1027 regs.
1028
1029Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1030
1031 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1032
1033 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1034 register operands, because this is a common idiom. Flag them with
1035 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1036 fdivrp because gcc erroneously generates them. Also flag with a
1037 warning.
1038
1039 * i386.h: Add suffix modifiers to most insns, and tighter operand
1040 checks in some cases. Fix a number of UnixWare compatibility
1041 issues with float insns. Merge some floating point opcodes, using
1042 new FloatMF modifier.
1043 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1044 consistency.
1045
1046 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1047 IgnoreDataSize where appropriate.
1048
1049Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1050
1051 * i386.h: (one_byte_segment_defaults): Remove.
1052 (two_byte_segment_defaults): Remove.
1053 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1054
1055Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1056
1057 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1058 (cgen_hw_lookup_by_num): Declare.
1059
1060Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1061
1062 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1063 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1064
1065Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1066
1067 * cgen.h (cgen_asm_init_parse): Delete.
1068 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1069 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1070
1071Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1072
1073 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1074 (cgen_asm_finish_insn): Update prototype.
1075 (cgen_insn): New members num, data.
1076 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1077 dis_hash, dis_hash_table_size moved to ...
1078 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1079 All uses updated. New members asm_hash_p, dis_hash_p.
1080 (CGEN_MINSN_EXPANSION): New struct.
1081 (cgen_expand_macro_insn): Declare.
1082 (cgen_macro_insn_count): Declare.
1083 (get_insn_operands): Update prototype.
1084 (lookup_get_insn_operands): Declare.
1085
1086Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1087
1088 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1089 regKludge. Add operands types for string instructions.
1090
1091Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1092
1093 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1094 table.
1095
1096Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1097
1098 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1099 for `gettext'.
1100
1101Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1102
1103 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1104 Add IsString flag to string instructions.
1105 (IS_STRING): Don't define.
1106 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1107 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1108 (SS_PREFIX_OPCODE): Define.
1109
1110Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1111
1112 * i386.h: Revert March 24 patch; no more LinearAddress.
1113
1114Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1115
1116 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1117 instructions, and instead add FWait opcode modifier. Add short
1118 form of fldenv and fstenv.
1119 (FWAIT_OPCODE): Define.
1120
1121 * i386.h (i386_optab): Change second operand constraint of `mov
1122 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1123 allow legal instructions such as `movl %gs,%esi'
1124
1125Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1126
1127 * h8300.h: Various changes to fully bracket initializers.
1128
1129Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1130
1131 * i386.h: Set LinearAddress for lidt and lgdt.
1132
1133Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1134
1135 * cgen.h (CGEN_BOOL_ATTR): New macro.
1136
1137Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1138
1139 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1140
1141Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1142
1143 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1144 (cgen_insn): Record syntax and format entries here, rather than
1145 separately.
1146
1147Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1148
1149 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1150
1151Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1152
1153 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1154 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1155 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1156
1157Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1158
1159 * cgen.h (lookup_insn): New argument alias_p.
1160
1161Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1162
1163Fix rac to accept only a0:
1164 * d10v.h (OPERAND_ACC): Split into:
1165 (OPERAND_ACC0, OPERAND_ACC1) .
1166 (OPERAND_GPR): Define.
1167
1168Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1169
1170 * cgen.h (CGEN_FIELDS): Define here.
1171 (CGEN_HW_ENTRY): New member `type'.
1172 (hw_list): Delete decl.
1173 (enum cgen_mode): Declare.
1174 (CGEN_OPERAND): New member `hw'.
1175 (enum cgen_operand_instance_type): Declare.
1176 (CGEN_OPERAND_INSTANCE): New type.
1177 (CGEN_INSN): New member `operands'.
1178 (CGEN_OPCODE_DATA): Make hw_list const.
1179 (get_insn_operands,lookup_insn): Add prototypes for.
1180
1181Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1182
1183 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1184 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1185 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1186 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1187
1188Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1189
1190 * cgen.h: Correct typo in comment end marker.
1191
1192Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1193
1194 * tic30.h: New file.
1195
5a109b67 1196Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH		 1197
1198 * cgen.h: Add prototypes for cgen_save_fixups(),
1199 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1200 of cgen_asm_finish_insn() to return a char *.
1201
1202Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1203
1204 * cgen.h: Formatting changes to improve readability.
1205
1206Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1207
1208 * cgen.h (*): Clean up pass over `struct foo' usage.
1209 (CGEN_ATTR): Make unsigned char.
1210 (CGEN_ATTR_TYPE): Update.
1211 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1212 (cgen_base): Move member `attrs' to cgen_insn.
1213 (CGEN_KEYWORD): New member `null_entry'.
1214 (CGEN_{SYNTAX,FORMAT}): New types.
1215 (cgen_insn): Format and syntax separated from each other.
1216
1217Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1218
1219 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1220 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1221 flags_{used,set} long.
1222 (d30v_operand): Make flags field long.
1223
1224Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1225
1226 * m68k.h: Fix comment describing operand types.
1227
1228Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1229
1230 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1231 everything else after down.
1232
1233Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1234
1235 * d10v.h (OPERAND_FLAG): Split into:
1236 (OPERAND_FFLAG, OPERAND_CFLAG) .
1237
1238Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1239
1240 * mips.h (struct mips_opcode): Changed comments to reflect new
1241 field usage.
1242
1243Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1244
1245 * mips.h: Added to comments a quick-ref list of all assigned
1246 operand type characters.
1247 (OP_{MASK,SH}_PERFREG): New macros.
1248
1249Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1250
1251 * sparc.h: Add '_' and '/' for v9a asr's.
1252 Patch from David Miller <davem@vger.rutgers.edu>
1253
1254Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1255
1256 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1257 area are not available in the base model (H8/300).
1258
1259Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1260
1261 * m68k.h: Remove documentation of ` operand specifier.
1262
1263Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1264
1265 * m68k.h: Document q and v operand specifiers.
1266
1267Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1268
1269 * v850.h (struct v850_opcode): Add processors field.
1270 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1271 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1272 (PROCESSOR_V850EA): New bit constants.
1273
1274Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1275
1276 Merge changes from Martin Hunt:
1277
1278 * d30v.h: Allow up to 64 control registers. Add
1279 SHORT_A5S format.
1280
1281 * d30v.h (LONG_Db): New form for delayed branches.
1282
1283 * d30v.h: (LONG_Db): New form for repeati.
1284
1285 * d30v.h (SHORT_D2B): New form.
1286
1287 * d30v.h (SHORT_A2): New form.
1288
1289 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1290 registers are used. Needed for VLIW optimization.
1291
1292Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1293
1294 * cgen.h: Move assembler interface section
1295 up so cgen_parse_operand_result is defined for cgen_parse_address.
1296 (cgen_parse_address): Update prototype.
1297
1298Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1299
1300 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1301
1302Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1303
1304 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1305 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1306 <paubert@iram.es>.
1307
1308 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1309 <paubert@iram.es>.
1310
1311 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1312 <paubert@iram.es>.
1313
1314 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1315 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1316
1317Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1318
1319 * v850.h (V850_NOT_R0): New flag.
1320
1321Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1322
1323 * v850.h (struct v850_opcode): Remove flags field.
1324
1325Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1326
1327 * v850.h (struct v850_opcode): Add flags field.
1328 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1329 fields.
1330 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1331 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1332
1333Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1334
1335 * arc.h: New file.
1336
1337Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1338
1339 * sparc.h (sparc_opcodes): Declare as const.
1340
1341Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1342
1343 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1344 uses single or double precision floating point resources.
1345 (INSN_NO_ISA, INSN_ISA1): Define.
1346 (cpu specific INSN macros): Tweak into bitmasks outside the range
1347 of INSN_ISA field.
1348
1349Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1350
1351 * i386.h: Fix pand opcode.
1352
1353Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1354
1355 * mips.h: Widen INSN_ISA and move it to a more convenient
1356 bit position. Add INSN_3900.
1357
1358Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1359
1360 * mips.h (struct mips_opcode): added new field membership.
1361
1362Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1363
1364 * i386.h (movd): only Reg32 is allowed.
1365
1366 * i386.h: add fcomp and ud2. From Wayne Scott
1367 <wscott@ichips.intel.com>.
1368
1369Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1370
1371 * i386.h: Add MMX instructions.
1372
1373Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1374
1375 * i386.h: Remove W modifier from conditional move instructions.
1376
1377Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1378
1379 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1380 with no arguments to match that generated by the UnixWare
1381 assembler.
1382
1383Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1384
1385 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1386 (cgen_parse_operand_fn): Declare.
1387 (cgen_init_parse_operand): Declare.
1388 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1389 new argument `want'.
1390 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1391 (enum cgen_parse_operand_type): New enum.
1392
1393Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1394
1395 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1396
1397Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1398
1399 * cgen.h: New file.
1400
1401Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1402
1403 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1404 fdivrp.
1405
1406Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1407
1408 * v850.h (extract): Make unsigned.
1409
1410Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1411
1412 * i386.h: Add iclr.
1413
1414Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1415
1416 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1417 take a direction bit.
1418
1419Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1420
1421 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1422
1423Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1424
1425 * sparc.h: Include <ansidecl.h>. Update function declarations to
1426 use prototypes, and to use const when appropriate.
1427
1428Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1429
1430 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1431
1432Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1433
1434 * d10v.h: Change pre_defined_registers to
1435 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1436
1437Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1438
1439 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1440 Change mips_opcodes from const array to a pointer,
1441 and change bfd_mips_num_opcodes from const int to int,
1442 so that we can increase the size of the mips opcodes table
1443 dynamically.
1444
1445Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1446
1447 * d30v.h (FLAG_X): Remove unused flag.
1448
1449Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1450
1451 * d30v.h: New file.
1452
1453Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1454
1455 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1456 (PDS_VALUE): Macro to access value field of predefined symbols.
1457 (tic80_next_predefined_symbol): Add prototype.
1458
1459Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1460
1461 * tic80.h (tic80_symbol_to_value): Change prototype to match
1462 change in function, added class parameter.
1463
1464Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1465
1466 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1467 endmask fields, which are somewhat weird in that 0 and 32 are
1468 treated exactly the same.
1469
1470Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1471
1472 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1473 rather than a constant that is 2**X. Reorder them to put bits for
1474 operands that have symbolic names in the upper bits, so they can
1475 be packed into an int where the lower bits contain the value that
1476 corresponds to that symbolic name.
1477 (predefined_symbo): Add struct.
1478 (tic80_predefined_symbols): Declare array of translations.
1479 (tic80_num_predefined_symbols): Declare size of that array.
1480 (tic80_value_to_symbol): Declare function.
1481 (tic80_symbol_to_value): Declare function.
1482
1483Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1484
1485 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1486
1487Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1488
1489 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1490 be the destination register.
1491
1492Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1493
1494 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1495 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1496 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1497 that the opcode can have two vector instructions in a single
1498 32 bit word and we have to encode/decode both.
1499
1500Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1501
1502 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1503 TIC80_OPERAND_RELATIVE for PC relative.
1504 (TIC80_OPERAND_BASEREL): New flag bit for register
1505 base relative.
1506
1507Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1508
1509 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1510
1511Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1512
1513 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1514 ":s" modifier for scaling.
1515
1516Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1517
1518 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1519 (TIC80_OPERAND_M_LI): Ditto
1520
1521Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1522
1523 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1524 (TIC80_OPERAND_CC): New define for condition code operand.
1525 (TIC80_OPERAND_CR): New define for control register operand.
1526
1527Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1528
1529 * tic80.h (struct tic80_opcode): Name changed.
1530 (struct tic80_opcode): Remove format field.
1531 (struct tic80_operand): Add insertion and extraction functions.
1532 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1533 correct ones.
1534 (FMT_*): Ditto.
1535
1536Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1537
1538 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1539 type IV instruction offsets.
1540
1541Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1542
1543 * tic80.h: New file.
1544
1545Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1546
1547 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1548
1549Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1550
1551 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1552 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1553 * v850.h: Fix comment, v850_operand not powerpc_operand.
1554
1555Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1556
1557 * mn10200.h: Flesh out structures and definitions needed by
1558 the mn10200 assembler & disassembler.
1559
1560Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1561
1562 * mips.h: Add mips16 definitions.
1563
1564Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1565
1566 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1567
1568Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1569
1570 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1571 (MN10300_OPERAND_MEMADDR): Define.
1572
1573Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1574
1575 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1576
1577Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1578
1579 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1580
1581Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1582
1583 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1584
1585Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1586
1587 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1588
1589Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1590
1591 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ		 1592 negative to minimize problems with shared libraries. Organize
1593 instruction subsets by AMASK extensions and PALcode
1594 implementation.
252b5132
RH		 1595 (struct alpha_operand): Move flags slot for better packing.
1596
1597Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1598
1599 * v850.h (V850_OPERAND_RELAX): New operand flag.
1600
1601Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1602
1603 * mn10300.h (FMT_*): Move operand format definitions
1604 here.
1605
1606Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1607
1608 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1609
1610Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1611
1612 * mn10300.h (mn10300_opcode): Add "format" field.
1613 (MN10300_OPERAND_*): Define.
1614
1615Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1616
1617 * mn10x00.h: Delete.
1618 * mn10200.h, mn10300.h: New files.
1619
1620Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1621
1622 * mn10x00.h: New file.
1623
1624Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1625
1626 * v850.h: Add new flag to indicate this instruction uses a PC
1627 displacement.
1628
1629Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1630
1631 * h8300.h (stmac): Add missing instruction.
1632
1633Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1634
1635 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1636 field.
1637
1638Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1639
1640 * v850.h (V850_OPERAND_EP): Define.
1641
1642 * v850.h (v850_opcode): Add size field.
1643
1644Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1645
1646 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1647 to functions used to handle unusual operand encoding.
252b5132 1648 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1649 V850_OPERAND_SIGNED): Defined.
252b5132
RH		 1650
1651Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1652
1653 * v850.h (v850_operands): Add flags field.
1654 (OPERAND_REG, OPERAND_NUM): Defined.
1655
1656Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1657
1658 * v850.h: New file.
1659
1660Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1661
1662 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ		 1663 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1664 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1665 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1666 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1667 Defined.
252b5132
RH		 1668
1669Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1670
1671 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1672 a 3 bit space id instead of a 2 bit space id.
1673
1674Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1675
1676 * d10v.h: Add some additional defines to support the
d83c6548 1677 assembler in determining which operations can be done in parallel.
252b5132
RH		 1678
1679Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1680
1681 * h8300.h (SN): Define.
1682 (eepmov.b): Renamed from "eepmov"
1683 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1684 with them.
1685
1686Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1687
1688 * d10v.h (OPERAND_SHIFT): New operand flag.
1689
1690Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1691
1692 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1693 signed numbers.
252b5132
RH		 1694
1695Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1696
1697 * d10v.h (pd_reg): Define. Putting the definition here allows
1698 the assembler and disassembler to share the same struct.
1699
1700Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1701
1702 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1703 Williams <steve@icarus.com>.
1704
1705Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1706
1707 * d10v.h: New file.
1708
1709Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1710
1711 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1712
1713Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1714
d83c6548 1715 * m68k.h (mcf5200): New macro.
252b5132
RH		 1716 Document names of coldfire control registers.
1717
1718Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1719
1720 * h8300.h (SRC_IN_DST): Define.
1721
1722 * h8300.h (UNOP3): Mark the register operand in this insn
1723 as a source operand, not a destination operand.
1724 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1725 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1726 register operand with SRC_IN_DST.
1727
1728Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1729
1730 * alpha.h: New file.
1731
1732Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1733
1734 * rs6k.h: Remove obsolete file.
1735
1736Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1737
1738 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1739 fdivp, and fdivrp. Add ffreep.
1740
1741Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1742
1743 * h8300.h: Reorder various #defines for readability.
1744 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1745 (BITOP): Accept additional (unused) argument. All callers changed.
1746 (EBITOP): Likewise.
1747 (O_LAST): Bump.
1748 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1749
1750 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1751 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1752 (BITOP, EBITOP): Handle new H8/S addressing modes for
1753 bit insns.
1754 (UNOP3): Handle new shift/rotate insns on the H8/S.
1755 (insns using exr): New instructions.
1756 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1757
1758Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1759
1760 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1761 was incorrect.
1762
1763Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1764
1765 * h8300.h (START): Remove.
1766 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1767 and mov.l insns that can be relaxed.
1768
1769Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1770
1771 * i386.h: Remove Abs32 from lcall.
1772
1773Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1774
1775 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1776 (SLCPOP): New macro.
1777 Mark X,Y opcode letters as in use.
1778
1779Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1780
1781 * sparc.h (F_FLOAT, F_FBR): Define.
1782
1783Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1784
1785 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1786 from all insns.
1787 (ABS8SRC,ABS8DST): Add ABS8MEM.
1788 (add.l): Fix reg+reg variant.
1789 (eepmov.w): Renamed from eepmovw.
1790 (ldc,stc): Fix many cases.
1791
1792Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1793
1794 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1795
1796Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1797
1798 * sparc.h (O): Mark operand letter as in use.
1799
1800Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1801
1802 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1803 Mark operand letters uU as in use.
1804
1805Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1806
1807 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1808 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1809 (SPARC_OPCODE_SUPPORTED): New macro.
1810 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1811 (F_NOTV9): Delete.
1812
1813Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1814
1815 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1816 declaration consistent with return type in definition.
1817
1818Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1819
1820 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1821
1822Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1823
1824 * i386.h (i386_regtab): Add 80486 test registers.
1825
1826Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1827
1828 * i960.h (I_HX): Define.
1829 (i960_opcodes): Add HX instruction.
1830
1831Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1832
1833 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1834 and fclex.
1835
1836Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1837
1838 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1839 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1840 (bfd_* defines): Delete.
1841 (sparc_opcode_archs): Replaces architecture_pname.
1842 (sparc_opcode_lookup_arch): Declare.
1843 (NUMOPCODES): Delete.
1844
1845Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1846
1847 * sparc.h (enum sparc_architecture): Add v9a.
1848 (ARCHITECTURES_CONFLICT_P): Update.
1849
1850Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1851
1852 * i386.h: Added Pentium Pro instructions.
1853
1854Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1855
1856 * m68k.h: Document new 'W' operand place.
1857
1858Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1859
1860 * hppa.h: Add lci and syncdma instructions.
1861
1862Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1863
1864 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1865 instructions.
252b5132
RH		 1866
1867Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1868
1869 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1870 assembler's -mcom and -many switches.
1871
1872Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1873
1874 * i386.h: Fix cmpxchg8b extension opcode description.
1875
1876Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1877
1878 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1879 and register cr4.
1880
1881Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1882
1883 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1884
1885Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1886
1887 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1888
1889Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1890
1891 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1892
1893Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1894
1895 * m68kmri.h: Remove.
1896
1897 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1898 declarations. Remove F_ALIAS and flag field of struct
1899 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1900 int. Make name and args fields of struct m68k_opcode const.
1901
1902Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1903
1904 * sparc.h (F_NOTV9): Define.
1905
1906Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1907
1908 * mips.h (INSN_4010): Define.
1909
1910Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1911
1912 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1913
1914 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1915 * m68k.h: Fix argument descriptions of coprocessor
1916 instructions to allow only alterable operands where appropriate.
1917 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1918 (m68k_opcode_aliases): Add more aliases.
1919
1920Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1921
1922 * m68k.h: Added explcitly short-sized conditional branches, and a
1923 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1924 svr4-based configurations.
1925
1926Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1927
1928 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1929 * i386.h: added missing Data16/Data32 flags to a few instructions.
1930
1931Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1932
1933 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1934 (OP_MASK_BCC, OP_SH_BCC): Define.
1935 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1936 (OP_MASK_CCC, OP_SH_CCC): Define.
1937 (INSN_READ_FPR_R): Define.
1938 (INSN_RFE): Delete.
1939
1940Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1941
1942 * m68k.h (enum m68k_architecture): Deleted.
1943 (struct m68k_opcode_alias): New type.
1944 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1945 matching constraints, values and flags. As a side effect of this,
1946 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1947 as I know were never used, now may need re-examining.
1948 (numopcodes): Now const.
1949 (m68k_opcode_aliases, numaliases): New variables.
1950 (endop): Deleted.
1951 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1952 m68k_opcode_aliases; update declaration of m68k_opcodes.
1953
1954Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1955
1956 * hppa.h (delay_type): Delete unused enumeration.
1957 (pa_opcode): Replace unused delayed field with an architecture
1958 field.
1959 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1960
1961Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1962
1963 * mips.h (INSN_ISA4): Define.
1964
1965Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1966
1967 * mips.h (M_DLA_AB, M_DLI): Define.
1968
1969Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1970
1971 * hppa.h (fstwx): Fix single-bit error.
1972
1973Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1974
1975 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1976
1977Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1978
1979 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1980 debug registers. From Charles Hannum (mycroft@netbsd.org).
1981
1982Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1983
1984 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1985 i386 support:
1986 * i386.h (MOV_AX_DISP32): New macro.
1987 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1988 of several call/return instructions.
1989 (ADDR_PREFIX_OPCODE): New macro.
1990
1991Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1992
1993 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1994
4f1d9bd8
NC		 1995 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1996 char.
252b5132
RH		 1997 (struct vot, field `name'): ditto.
1998
1999Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2000
2001 * vax.h: Supply and properly group all values in end sentinel.
2002
2003Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2004
2005 * mips.h (INSN_ISA, INSN_4650): Define.
2006
2007Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2008
2009 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2010 systems with a separate instruction and data cache, such as the
2011 29040, these instructions take an optional argument.
2012
2013Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2014
2015 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2016 INSN_TRAP.
2017
2018Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2019
2020 * mips.h (INSN_STORE_MEMORY): Define.
2021
2022Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2023
2024 * sparc.h: Document new operand type 'x'.
2025
2026Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2027
2028 * i960.h (I_CX2): New instruction category. It includes
2029 instructions available on Cx and Jx processors.
2030 (I_JX): New instruction category, for JX-only instructions.
2031 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2032 Jx-only instructions, in I_JX category.
2033
2034Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2035
2036 * ns32k.h (endop): Made pointer const too.
2037
2038Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2039
2040 * ns32k.h: Drop Q operand type as there is no correct use
2041 for it. Add I and Z operand types which allow better checking.
2042
2043Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2044
2045 * h8300.h (xor.l) :fix bit pattern.
2046 (L_2): New size of operand.
2047 (trapa): Use it.
2048
2049Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2050
2051 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2052
2053Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2054
2055 * sparc.h: Include v9 definitions.
2056
2057Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2058
2059 * m68k.h (m68060): Defined.
2060 (m68040up, mfloat, mmmu): Include it.
2061 (struct m68k_opcode): Widen `arch' field.
2062 (m68k_opcodes): Updated for M68060. Removed comments that were
2063 instructions commented out by "JF" years ago.
2064
2065Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2066
2067 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2068 add a one-bit `flags' field.
2069 (F_ALIAS): New macro.
2070
2071Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2072
2073 * h8300.h (dec, inc): Get encoding right.
2074
2075Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2076
2077 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2078 a flag instead.
2079 (PPC_OPERAND_SIGNED): Define.
2080 (PPC_OPERAND_SIGNOPT): Define.
2081
2082Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2083
2084 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2085 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2086
2087Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2088
2089 * i386.h: Reverse last change. It'll be handled in gas instead.
2090
2091Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2092
2093 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2094 slower on the 486 and used the implicit shift count despite the
2095 explicit operand. The one-operand form is still available to get
2096 the shorter form with the implicit shift count.
2097
2098Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2099
2100 * hppa.h: Fix typo in fstws arg string.
2101
2102Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2103
2104 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2105
2106Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2107
2108 * ppc.h (PPC_OPCODE_601): Define.
2109
2110Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2111
2112 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2113 (so we can determine valid completers for both addb and addb[tf].)
2114
2115 * hppa.h (xmpyu): No floating point format specifier for the
2116 xmpyu instruction.
2117
2118Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2119
2120 * ppc.h (PPC_OPERAND_NEXT): Define.
2121 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2122 (struct powerpc_macro): Define.
2123 (powerpc_macros, powerpc_num_macros): Declare.
2124
2125Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2126
2127 * ppc.h: New file. Header file for PowerPC opcode table.
2128
2129Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2130
2131 * hppa.h: More minor template fixes for sfu and copr (to allow
2132 for easier disassembly).
2133
2134 * hppa.h: Fix templates for all the sfu and copr instructions.
2135
2136Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2137
2138 * i386.h (push): Permit Imm16 operand too.
2139
2140Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2141
2142 * h8300.h (andc): Exists in base arch.
2143
2144Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2145
2146 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2147 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2148
2149Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2150
2151 * hppa.h: Add FP quadword store instructions.
2152
2153Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2154
2155 * mips.h: (M_J_A): Added.
2156 (M_LA): Removed.
2157
2158Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2159
2160 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2161 <mellon@pepper.ncd.com>.
2162
2163Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2164
2165 * hppa.h: Immediate field in probei instructions is unsigned,
2166 not low-sign extended.
2167
2168Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2169
2170 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2171
2172Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2173
2174 * i386.h: Add "fxch" without operand.
2175
2176Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2177
2178 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2179
2180Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2181
2182 * hppa.h: Add gfw and gfr to the opcode table.
2183
2184Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2185
2186 * m88k.h: extended to handle m88110.
2187
2188Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2189
2190 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2191 addresses.
2192
2193Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2194
2195 * i960.h (i960_opcodes): Properly bracket initializers.
2196
2197Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2198
2199 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2200
2201Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2202
2203 * m68k.h (two): Protect second argument with parentheses.
2204
2205Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2206
2207 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2208 Deleted old in/out instructions in "#if 0" section.
2209
2210Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2211
2212 * i386.h (i386_optab): Properly bracket initializers.
2213
2214Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2215
2216 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2217 Jeff Law, law@cs.utah.edu).
2218
2219Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2220
2221 * i386.h (lcall): Accept Imm32 operand also.
2222
2223Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2224
2225 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2226 (M_DABS): Added.
2227
2228Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2229
2230 * mips.h (INSN_*): Changed values. Removed unused definitions.
2231 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2232 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2233 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2234 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2235 (M_*): Added new values for r6000 and r4000 macros.
2236 (ANY_DELAY): Removed.
2237
2238Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2239
2240 * mips.h: Added M_LI_S and M_LI_SS.
2241
2242Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2243
2244 * h8300.h: Get some rare mov.bs correct.
2245
2246Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2247
2248 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2249 been included.
2250
2251Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2252
2253 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2254 jump instructions, for use in disassemblers.
2255
2256Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2257
2258 * m88k.h: Make bitfields just unsigned, not unsigned long or
2259 unsigned short.
2260
2261Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2262
2263 * hppa.h: New argument type 'y'. Use in various float instructions.
2264
2265Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2266
2267 * hppa.h (break): First immediate field is unsigned.
2268
2269 * hppa.h: Add rfir instruction.
2270
2271Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2272
2273 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2274
2275Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2276
2277 * mips.h: Reworked the hazard information somewhat, and fixed some
2278 bugs in the instruction hazard descriptions.
2279
2280Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2281
2282 * m88k.h: Corrected a couple of opcodes.
2283
2284Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2285
2286 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2287 new version includes instruction hazard information, but is
2288 otherwise reasonably similar.
2289
2290Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2291
2292 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2293
2294Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2295
2296 Patches from Jeff Law, law@cs.utah.edu:
2297 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2298 Make the tables be the same for the following instructions:
2299 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2300 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2301 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2302 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2303 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2304 "fcmp", and "ftest".
2305
2306 * hppa.h: Make new and old tables the same for "break", "mtctl",
2307 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2308 Fix typo in last patch. Collapse several #ifdefs into a
2309 single #ifdef.
2310
2311 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2312 of the comments up-to-date.
2313
2314 * hppa.h: Update "free list" of letters and update
2315 comments describing each letter's function.
2316
4f1d9bd8
NC		 2317Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2318
2319 * h8300.h: Lots of little fixes for the h8/300h.
2320
2321Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2322
2323 Support for H8/300-H
2324 * h8300.h: Lots of new opcodes.
2325
252b5132
RH		 2326Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2327
2328 * h8300.h: checkpoint, includes H8/300-H opcodes.
2329
2330Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2331
2332 * Patches from Jeffrey Law <law@cs.utah.edu>.
2333 * hppa.h: Rework single precision FP
2334 instructions so that they correctly disassemble code
2335 PA1.1 code.
2336
2337Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2338
2339 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2340 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2341
2342Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2343
2344 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2345 gdb will define it for now.
2346
2347Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2348
2349 * sparc.h: Don't end enumerator list with comma.
2350
2351Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2352
2353 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2354 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2355 ("bc2t"): Correct typo.
2356 ("[ls]wc[023]"): Use T rather than t.
2357 ("c[0123]"): Define general coprocessor instructions.
2358
2359Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2360
2361 * m68k.h: Move split point for gcc compilation more towards
2362 middle.
2363
2364Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2365
2366 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2367 simply wrong, ics, rfi, & rfsvc were missing).
2368 Add "a" to opr_ext for "bb". Doc fix.
2369
2370Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2371
2372 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2373 * mips.h: Add casts, to suppress warnings about shifting too much.
2374 * m68k.h: Document the placement code '9'.
2375
2376Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2377
2378 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2379 allows callers to break up the large initialized struct full of
2380 opcodes into two half-sized ones. This permits GCC to compile
2381 this module, since it takes exponential space for initializers.
2382 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2383
2384Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2385
2386 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2387 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2388 initialized structs in it.
2389
2390Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2391
2392 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2393 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2394 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2395
2396Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2397
2398 * mips.h: document "i" and "j" operands correctly.
2399
2400Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2401
2402 * mips.h: Removed endianness dependency.
2403
2404Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2405
2406 * h8300.h: include info on number of cycles per instruction.
2407
2408Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2409
2410 * hppa.h: Move handy aliases to the front. Fix masks for extract
2411 and deposit instructions.
2412
2413Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2414
2415 * i386.h: accept shld and shrd both with and without the shift
2416 count argument, which is always %cl.
2417
2418Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2419
2420 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2421 (one_byte_segment_defaults, two_byte_segment_defaults,
2422 i386_prefixtab_end): Ditto.
2423
2424Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2425
2426 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2427 for operand 2; from John Carr, jfc@dsg.dec.com.
2428
2429Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2430
2431 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2432 always use 16-bit offsets. Makes calculated-size jump tables
2433 feasible.
2434
2435Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2436
2437 * i386.h: Fix one-operand forms of in* and out* patterns.
2438
2439Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2440
2441 * m68k.h: Added CPU32 support.
2442
2443Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2444
2445 * mips.h (break): Disassemble the argument. Patch from
2446 jonathan@cs.stanford.edu (Jonathan Stone).
2447
2448Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2449
2450 * m68k.h: merged Motorola and MIT syntax.
2451
2452Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2453
2454 * m68k.h (pmove): make the tests less strict, the 68k book is
2455 wrong.
2456
2457Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2458
2459 * m68k.h (m68ec030): Defined as alias for 68030.
2460 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2461 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2462 them. Tightened description of "fmovex" to distinguish it from
2463 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2464 up descriptions that claimed versions were available for chips not
2465 supporting them. Added "pmovefd".
2466
2467Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2468
2469 * m68k.h: fix where the . goes in divull
2470
2471Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2472
2473 * m68k.h: the cas2 instruction is supposed to be written with
2474 indirection on the last two operands, which can be either data or
2475 address registers. Added a new operand type 'r' which accepts
2476 either register type. Added new cases for cas2l and cas2w which
2477 use them. Corrected masks for cas2 which failed to recognize use
2478 of address register.
2479
2480Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2481
2482 * m68k.h: Merged in patches (mostly m68040-specific) from
2483 Colin Smith <colin@wrs.com>.
2484
2485 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2486 base). Also cleaned up duplicates, re-ordered instructions for
2487 the sake of dis-assembling (so aliases come after standard names).
2488 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2489
2490Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2491
2492 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2493 all missing .s
2494
2495Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2496
2497 * sparc.h: Moved tables to BFD library.
2498
2499 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2500
2501Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2502
2503 * h8300.h: Finish filling in all the holes in the opcode table,
2504 so that the Lucid C compiler can digest this as well...
2505
2506Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2507
2508 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2509 Fix opcodes on various sizes of fild/fist instructions
2510 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2511 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2512
2513Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2514
2515 * h8300.h: Fill in all the holes in the opcode table so that the
2516 losing HPUX C compiler can digest this...
2517
2518Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2519
2520 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2521 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2522
2523Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2524
2525 * sparc.h: Add new architecture variant sparclite; add its scan
2526 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2527
2528Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2529
2530 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2531 fy@lucid.com).
2532
2533Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2534
2535 * rs6k.h: New version from IBM (Metin).
2536
2537Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2538
2539 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2540 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2541
2542Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2543
2544 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2545
2546Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2547
2548 * m68k.h (one, two): Cast macro args to unsigned to suppress
2549 complaints from compiler and lint about integer overflow during
2550 shift.
2551
2552Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2553
2554 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2555
2556Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2557
2558 * mips.h: Make bitfield layout depend on the HOST compiler,
2559 not on the TARGET system.
2560
2561Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2562
2563 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2564 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2565 <TRANLE@INTELLICORP.COM>.
2566
2567Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2568
2569 * h8300.h: turned op_type enum into #define list
2570
2571Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2572
2573 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2574 similar instructions -- they've been renamed to "fitoq", etc.
2575 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2576 number of arguments.
2577 * h8300.h: Remove extra ; which produces compiler warning.
2578
2579Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2580
2581 * sparc.h: fix opcode for tsubcctv.
2582
2583Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2584
2585 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2586
2587Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2588
2589 * sparc.h (nop): Made the 'lose' field be even tighter,
2590 so only a standard 'nop' is disassembled as a nop.
2591
2592Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2593
2594 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2595 disassembled as a nop.
2596
4f1d9bd8
NC		 2597Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2598
2599 * m68k.h, sparc.h: ANSIfy enums.
2600
252b5132
RH		 2601Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2602
2603 * sparc.h: fix a typo.
2604
2605Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2606
2607 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2608 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2609 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH		 2610
2611\f
2612Local Variables:
2613version-control: never
2614End:
GDB Binutils - Deliverables
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