Update year range in copyright notice of binutils files
[deliverable/binutils-gdb.git] / include / opcode / s390.h
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a85d7ed0 1/* s390.h -- Header file for S390 opcode table
82704155 2 Copyright (C) 2000-2019 Free Software Foundation, Inc.
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3 Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
e4e42b45 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
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19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
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21
22#ifndef S390_H
23#define S390_H
24
25/* List of instruction sets variations. */
26
1bd490c4 27enum s390_opcode_mode_val
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28 {
29 S390_OPCODE_ESA = 0,
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30 S390_OPCODE_ZARCH
31 };
32
33enum s390_opcode_cpu_val
34 {
35 S390_OPCODE_G5 = 0,
36 S390_OPCODE_G6,
c72a8f69 37 S390_OPCODE_Z900,
8c929562 38 S390_OPCODE_Z990,
b5639b37 39 S390_OPCODE_Z9_109,
5746fb46 40 S390_OPCODE_Z9_EC,
d9aee5d7 41 S390_OPCODE_Z10,
1e8766d7 42 S390_OPCODE_Z196,
cfc72779 43 S390_OPCODE_ZEC12,
1e2e8c52 44 S390_OPCODE_Z13,
64025b4e 45 S390_OPCODE_ARCH12,
1e8766d7 46 S390_OPCODE_MAXCPU
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47 };
48
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49/* Instruction specific flags. */
50#define S390_INSTR_FLAG_OPTPARM 0x1
a09f2586 51#define S390_INSTR_FLAG_OPTPARM2 0x2
64025b4e 52
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53#define S390_INSTR_FLAG_HTM 0x4
54#define S390_INSTR_FLAG_VX 0x8
55#define S390_INSTR_FLAG_FACILITY_MASK 0xc
1e2e8c52 56
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57/* The opcode table is an array of struct s390_opcode. */
58
59struct s390_opcode
60 {
61 /* The opcode name. */
62 const char * name;
63
64 /* The opcode itself. Those bits which will be filled in with
65 operands are zeroes. */
66 unsigned char opcode[6];
67
68 /* The opcode mask. This is used by the disassembler. This is a
69 mask containing ones indicating those bits which must match the
70 opcode field, and zeroes indicating those bits which need not
71 match (and are presumably filled in by operands). */
72 unsigned char mask[6];
73
74 /* The opcode length in bytes. */
75 int oplen;
76
77 /* An array of operand codes. Each code is an index into the
78 operand table. They appear in the order which the operands must
79 appear in assembly code, and are terminated by a zero. */
80 unsigned char operands[6];
81
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82 /* Bitmask of execution modes this opcode is available for. */
83 unsigned int modes;
84
85 /* First cpu this opcode is available for. */
86 enum s390_opcode_cpu_val min_cpu;
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87
88 /* Instruction specific flags. */
89 unsigned int flags;
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90 };
91
92/* The table itself is sorted by major opcode number, and is otherwise
93 in the order in which the disassembler should consider
94 instructions. */
95extern const struct s390_opcode s390_opcodes[];
96extern const int s390_num_opcodes;
97
98/* A opcode format table for the .insn pseudo mnemonic. */
99extern const struct s390_opcode s390_opformats[];
100extern const int s390_num_opformats;
101
1e2e8c52 102/* Values defined for the flags field of a struct s390_opcode. */
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103
104/* The operands table is an array of struct s390_operand. */
105
106struct s390_operand
107 {
108 /* The number of bits in the operand. */
109 int bits;
110
111 /* How far the operand is left shifted in the instruction. */
112 int shift;
113
114 /* One bit syntax flags. */
115 unsigned long flags;
116 };
117
118/* Elements in the table are retrieved by indexing with values from
1e2e8c52 119 the operands field of the s390_opcodes table. */
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120
121extern const struct s390_operand s390_operands[];
122
123/* Values defined for the flags field of a struct s390_operand. */
124
125/* This operand names a register. The disassembler uses this to print
126 register names with a leading 'r'. */
127#define S390_OPERAND_GPR 0x1
128
129/* This operand names a floating point register. The disassembler
130 prints these with a leading 'f'. */
131#define S390_OPERAND_FPR 0x2
132
133/* This operand names an access register. The disassembler
134 prints these with a leading 'a'. */
135#define S390_OPERAND_AR 0x4
136
137/* This operand names a control register. The disassembler
138 prints these with a leading 'c'. */
139#define S390_OPERAND_CR 0x8
140
141/* This operand is a displacement. */
142#define S390_OPERAND_DISP 0x10
143
144/* This operand names a base register. */
145#define S390_OPERAND_BASE 0x20
146
147/* This operand names an index register, it can be skipped. */
148#define S390_OPERAND_INDEX 0x40
149
150/* This operand is a relative branch displacement. The disassembler
151 prints these symbolically if possible. */
152#define S390_OPERAND_PCREL 0x80
153
154/* This operand takes signed values. */
155#define S390_OPERAND_SIGNED 0x100
156
157/* This operand is a length. */
158#define S390_OPERAND_LENGTH 0x200
159
c8fa16ed 160/* The operand needs to be a valid GP or FP register pair. */
bfcfbe61 161#define S390_OPERAND_REG_PAIR 0x400
5e4b319c 162
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163/* This operand names a vector register. The disassembler uses this
164 to print register names with a leading 'v'. */
bfcfbe61 165#define S390_OPERAND_VR 0x800
1e2e8c52 166
bfcfbe61 167#define S390_OPERAND_CP16 0x1000
1e2e8c52 168
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169#define S390_OPERAND_OR1 0x2000
170#define S390_OPERAND_OR2 0x4000
171#define S390_OPERAND_OR8 0x8000
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172
173#endif /* S390_H */
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