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aa137e4d NC |
1 | /* TILE-Gx opcode information. |
2 | * | |
3 | * Copyright 2011 Free Software Foundation, Inc. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 3 of the License, or | |
8 | * (at your option) any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
18 | * MA 02110-1301, USA. | |
19 | */ | |
20 | ||
21 | #ifndef opcode_tile_h | |
22 | #define opcode_tile_h | |
23 | ||
24 | typedef unsigned long long tilegx_bundle_bits; | |
25 | ||
26 | ||
27 | enum | |
28 | { | |
29 | TILEGX_MAX_OPERANDS = 4 /* bfexts */ | |
30 | }; | |
31 | ||
32 | typedef enum | |
33 | { | |
34 | TILEGX_OPC_BPT, | |
35 | TILEGX_OPC_INFO, | |
36 | TILEGX_OPC_INFOL, | |
37 | TILEGX_OPC_MOVE, | |
38 | TILEGX_OPC_MOVEI, | |
39 | TILEGX_OPC_MOVELI, | |
40 | TILEGX_OPC_PREFETCH, | |
41 | TILEGX_OPC_PREFETCH_ADD_L1, | |
42 | TILEGX_OPC_PREFETCH_ADD_L1_FAULT, | |
43 | TILEGX_OPC_PREFETCH_ADD_L2, | |
44 | TILEGX_OPC_PREFETCH_ADD_L2_FAULT, | |
45 | TILEGX_OPC_PREFETCH_ADD_L3, | |
46 | TILEGX_OPC_PREFETCH_ADD_L3_FAULT, | |
47 | TILEGX_OPC_PREFETCH_L1, | |
48 | TILEGX_OPC_PREFETCH_L1_FAULT, | |
49 | TILEGX_OPC_PREFETCH_L2, | |
50 | TILEGX_OPC_PREFETCH_L2_FAULT, | |
51 | TILEGX_OPC_PREFETCH_L3, | |
52 | TILEGX_OPC_PREFETCH_L3_FAULT, | |
53 | TILEGX_OPC_RAISE, | |
54 | TILEGX_OPC_ADD, | |
55 | TILEGX_OPC_ADDI, | |
56 | TILEGX_OPC_ADDLI, | |
57 | TILEGX_OPC_ADDX, | |
58 | TILEGX_OPC_ADDXI, | |
59 | TILEGX_OPC_ADDXLI, | |
60 | TILEGX_OPC_ADDXSC, | |
61 | TILEGX_OPC_AND, | |
62 | TILEGX_OPC_ANDI, | |
63 | TILEGX_OPC_BEQZ, | |
64 | TILEGX_OPC_BEQZT, | |
65 | TILEGX_OPC_BFEXTS, | |
66 | TILEGX_OPC_BFEXTU, | |
67 | TILEGX_OPC_BFINS, | |
68 | TILEGX_OPC_BGEZ, | |
69 | TILEGX_OPC_BGEZT, | |
70 | TILEGX_OPC_BGTZ, | |
71 | TILEGX_OPC_BGTZT, | |
72 | TILEGX_OPC_BLBC, | |
73 | TILEGX_OPC_BLBCT, | |
74 | TILEGX_OPC_BLBS, | |
75 | TILEGX_OPC_BLBST, | |
76 | TILEGX_OPC_BLEZ, | |
77 | TILEGX_OPC_BLEZT, | |
78 | TILEGX_OPC_BLTZ, | |
79 | TILEGX_OPC_BLTZT, | |
80 | TILEGX_OPC_BNEZ, | |
81 | TILEGX_OPC_BNEZT, | |
82 | TILEGX_OPC_CLZ, | |
83 | TILEGX_OPC_CMOVEQZ, | |
84 | TILEGX_OPC_CMOVNEZ, | |
85 | TILEGX_OPC_CMPEQ, | |
86 | TILEGX_OPC_CMPEQI, | |
87 | TILEGX_OPC_CMPEXCH, | |
88 | TILEGX_OPC_CMPEXCH4, | |
89 | TILEGX_OPC_CMPLES, | |
90 | TILEGX_OPC_CMPLEU, | |
91 | TILEGX_OPC_CMPLTS, | |
92 | TILEGX_OPC_CMPLTSI, | |
93 | TILEGX_OPC_CMPLTU, | |
94 | TILEGX_OPC_CMPLTUI, | |
95 | TILEGX_OPC_CMPNE, | |
96 | TILEGX_OPC_CMUL, | |
97 | TILEGX_OPC_CMULA, | |
98 | TILEGX_OPC_CMULAF, | |
99 | TILEGX_OPC_CMULF, | |
100 | TILEGX_OPC_CMULFR, | |
101 | TILEGX_OPC_CMULH, | |
102 | TILEGX_OPC_CMULHR, | |
103 | TILEGX_OPC_CRC32_32, | |
104 | TILEGX_OPC_CRC32_8, | |
105 | TILEGX_OPC_CTZ, | |
106 | TILEGX_OPC_DBLALIGN, | |
107 | TILEGX_OPC_DBLALIGN2, | |
108 | TILEGX_OPC_DBLALIGN4, | |
109 | TILEGX_OPC_DBLALIGN6, | |
110 | TILEGX_OPC_DRAIN, | |
111 | TILEGX_OPC_DTLBPR, | |
112 | TILEGX_OPC_EXCH, | |
113 | TILEGX_OPC_EXCH4, | |
114 | TILEGX_OPC_FDOUBLE_ADD_FLAGS, | |
115 | TILEGX_OPC_FDOUBLE_ADDSUB, | |
116 | TILEGX_OPC_FDOUBLE_MUL_FLAGS, | |
117 | TILEGX_OPC_FDOUBLE_PACK1, | |
118 | TILEGX_OPC_FDOUBLE_PACK2, | |
119 | TILEGX_OPC_FDOUBLE_SUB_FLAGS, | |
120 | TILEGX_OPC_FDOUBLE_UNPACK_MAX, | |
121 | TILEGX_OPC_FDOUBLE_UNPACK_MIN, | |
122 | TILEGX_OPC_FETCHADD, | |
123 | TILEGX_OPC_FETCHADD4, | |
124 | TILEGX_OPC_FETCHADDGEZ, | |
125 | TILEGX_OPC_FETCHADDGEZ4, | |
126 | TILEGX_OPC_FETCHAND, | |
127 | TILEGX_OPC_FETCHAND4, | |
128 | TILEGX_OPC_FETCHOR, | |
129 | TILEGX_OPC_FETCHOR4, | |
130 | TILEGX_OPC_FINV, | |
131 | TILEGX_OPC_FLUSH, | |
132 | TILEGX_OPC_FLUSHWB, | |
133 | TILEGX_OPC_FNOP, | |
134 | TILEGX_OPC_FSINGLE_ADD1, | |
135 | TILEGX_OPC_FSINGLE_ADDSUB2, | |
136 | TILEGX_OPC_FSINGLE_MUL1, | |
137 | TILEGX_OPC_FSINGLE_MUL2, | |
138 | TILEGX_OPC_FSINGLE_PACK1, | |
139 | TILEGX_OPC_FSINGLE_PACK2, | |
140 | TILEGX_OPC_FSINGLE_SUB1, | |
141 | TILEGX_OPC_ICOH, | |
142 | TILEGX_OPC_ILL, | |
143 | TILEGX_OPC_INV, | |
144 | TILEGX_OPC_IRET, | |
145 | TILEGX_OPC_J, | |
146 | TILEGX_OPC_JAL, | |
147 | TILEGX_OPC_JALR, | |
148 | TILEGX_OPC_JALRP, | |
149 | TILEGX_OPC_JR, | |
150 | TILEGX_OPC_JRP, | |
151 | TILEGX_OPC_LD, | |
152 | TILEGX_OPC_LD1S, | |
153 | TILEGX_OPC_LD1S_ADD, | |
154 | TILEGX_OPC_LD1U, | |
155 | TILEGX_OPC_LD1U_ADD, | |
156 | TILEGX_OPC_LD2S, | |
157 | TILEGX_OPC_LD2S_ADD, | |
158 | TILEGX_OPC_LD2U, | |
159 | TILEGX_OPC_LD2U_ADD, | |
160 | TILEGX_OPC_LD4S, | |
161 | TILEGX_OPC_LD4S_ADD, | |
162 | TILEGX_OPC_LD4U, | |
163 | TILEGX_OPC_LD4U_ADD, | |
164 | TILEGX_OPC_LD_ADD, | |
165 | TILEGX_OPC_LDNA, | |
166 | TILEGX_OPC_LDNA_ADD, | |
167 | TILEGX_OPC_LDNT, | |
168 | TILEGX_OPC_LDNT1S, | |
169 | TILEGX_OPC_LDNT1S_ADD, | |
170 | TILEGX_OPC_LDNT1U, | |
171 | TILEGX_OPC_LDNT1U_ADD, | |
172 | TILEGX_OPC_LDNT2S, | |
173 | TILEGX_OPC_LDNT2S_ADD, | |
174 | TILEGX_OPC_LDNT2U, | |
175 | TILEGX_OPC_LDNT2U_ADD, | |
176 | TILEGX_OPC_LDNT4S, | |
177 | TILEGX_OPC_LDNT4S_ADD, | |
178 | TILEGX_OPC_LDNT4U, | |
179 | TILEGX_OPC_LDNT4U_ADD, | |
180 | TILEGX_OPC_LDNT_ADD, | |
181 | TILEGX_OPC_LNK, | |
182 | TILEGX_OPC_MF, | |
183 | TILEGX_OPC_MFSPR, | |
184 | TILEGX_OPC_MM, | |
185 | TILEGX_OPC_MNZ, | |
186 | TILEGX_OPC_MTSPR, | |
187 | TILEGX_OPC_MUL_HS_HS, | |
188 | TILEGX_OPC_MUL_HS_HU, | |
189 | TILEGX_OPC_MUL_HS_LS, | |
190 | TILEGX_OPC_MUL_HS_LU, | |
191 | TILEGX_OPC_MUL_HU_HU, | |
192 | TILEGX_OPC_MUL_HU_LS, | |
193 | TILEGX_OPC_MUL_HU_LU, | |
194 | TILEGX_OPC_MUL_LS_LS, | |
195 | TILEGX_OPC_MUL_LS_LU, | |
196 | TILEGX_OPC_MUL_LU_LU, | |
197 | TILEGX_OPC_MULA_HS_HS, | |
198 | TILEGX_OPC_MULA_HS_HU, | |
199 | TILEGX_OPC_MULA_HS_LS, | |
200 | TILEGX_OPC_MULA_HS_LU, | |
201 | TILEGX_OPC_MULA_HU_HU, | |
202 | TILEGX_OPC_MULA_HU_LS, | |
203 | TILEGX_OPC_MULA_HU_LU, | |
204 | TILEGX_OPC_MULA_LS_LS, | |
205 | TILEGX_OPC_MULA_LS_LU, | |
206 | TILEGX_OPC_MULA_LU_LU, | |
207 | TILEGX_OPC_MULAX, | |
208 | TILEGX_OPC_MULX, | |
209 | TILEGX_OPC_MZ, | |
210 | TILEGX_OPC_NAP, | |
211 | TILEGX_OPC_NOP, | |
212 | TILEGX_OPC_NOR, | |
213 | TILEGX_OPC_OR, | |
214 | TILEGX_OPC_ORI, | |
215 | TILEGX_OPC_PCNT, | |
216 | TILEGX_OPC_REVBITS, | |
217 | TILEGX_OPC_REVBYTES, | |
218 | TILEGX_OPC_ROTL, | |
219 | TILEGX_OPC_ROTLI, | |
220 | TILEGX_OPC_SHL, | |
221 | TILEGX_OPC_SHL16INSLI, | |
222 | TILEGX_OPC_SHL1ADD, | |
223 | TILEGX_OPC_SHL1ADDX, | |
224 | TILEGX_OPC_SHL2ADD, | |
225 | TILEGX_OPC_SHL2ADDX, | |
226 | TILEGX_OPC_SHL3ADD, | |
227 | TILEGX_OPC_SHL3ADDX, | |
228 | TILEGX_OPC_SHLI, | |
229 | TILEGX_OPC_SHLX, | |
230 | TILEGX_OPC_SHLXI, | |
231 | TILEGX_OPC_SHRS, | |
232 | TILEGX_OPC_SHRSI, | |
233 | TILEGX_OPC_SHRU, | |
234 | TILEGX_OPC_SHRUI, | |
235 | TILEGX_OPC_SHRUX, | |
236 | TILEGX_OPC_SHRUXI, | |
237 | TILEGX_OPC_SHUFFLEBYTES, | |
238 | TILEGX_OPC_ST, | |
239 | TILEGX_OPC_ST1, | |
240 | TILEGX_OPC_ST1_ADD, | |
241 | TILEGX_OPC_ST2, | |
242 | TILEGX_OPC_ST2_ADD, | |
243 | TILEGX_OPC_ST4, | |
244 | TILEGX_OPC_ST4_ADD, | |
245 | TILEGX_OPC_ST_ADD, | |
246 | TILEGX_OPC_STNT, | |
247 | TILEGX_OPC_STNT1, | |
248 | TILEGX_OPC_STNT1_ADD, | |
249 | TILEGX_OPC_STNT2, | |
250 | TILEGX_OPC_STNT2_ADD, | |
251 | TILEGX_OPC_STNT4, | |
252 | TILEGX_OPC_STNT4_ADD, | |
253 | TILEGX_OPC_STNT_ADD, | |
254 | TILEGX_OPC_SUB, | |
255 | TILEGX_OPC_SUBX, | |
256 | TILEGX_OPC_SUBXSC, | |
257 | TILEGX_OPC_SWINT0, | |
258 | TILEGX_OPC_SWINT1, | |
259 | TILEGX_OPC_SWINT2, | |
260 | TILEGX_OPC_SWINT3, | |
261 | TILEGX_OPC_TBLIDXB0, | |
262 | TILEGX_OPC_TBLIDXB1, | |
263 | TILEGX_OPC_TBLIDXB2, | |
264 | TILEGX_OPC_TBLIDXB3, | |
265 | TILEGX_OPC_V1ADD, | |
266 | TILEGX_OPC_V1ADDI, | |
267 | TILEGX_OPC_V1ADDUC, | |
268 | TILEGX_OPC_V1ADIFFU, | |
269 | TILEGX_OPC_V1AVGU, | |
270 | TILEGX_OPC_V1CMPEQ, | |
271 | TILEGX_OPC_V1CMPEQI, | |
272 | TILEGX_OPC_V1CMPLES, | |
273 | TILEGX_OPC_V1CMPLEU, | |
274 | TILEGX_OPC_V1CMPLTS, | |
275 | TILEGX_OPC_V1CMPLTSI, | |
276 | TILEGX_OPC_V1CMPLTU, | |
277 | TILEGX_OPC_V1CMPLTUI, | |
278 | TILEGX_OPC_V1CMPNE, | |
279 | TILEGX_OPC_V1DDOTPU, | |
280 | TILEGX_OPC_V1DDOTPUA, | |
281 | TILEGX_OPC_V1DDOTPUS, | |
282 | TILEGX_OPC_V1DDOTPUSA, | |
283 | TILEGX_OPC_V1DOTP, | |
284 | TILEGX_OPC_V1DOTPA, | |
285 | TILEGX_OPC_V1DOTPU, | |
286 | TILEGX_OPC_V1DOTPUA, | |
287 | TILEGX_OPC_V1DOTPUS, | |
288 | TILEGX_OPC_V1DOTPUSA, | |
289 | TILEGX_OPC_V1INT_H, | |
290 | TILEGX_OPC_V1INT_L, | |
291 | TILEGX_OPC_V1MAXU, | |
292 | TILEGX_OPC_V1MAXUI, | |
293 | TILEGX_OPC_V1MINU, | |
294 | TILEGX_OPC_V1MINUI, | |
295 | TILEGX_OPC_V1MNZ, | |
296 | TILEGX_OPC_V1MULTU, | |
297 | TILEGX_OPC_V1MULU, | |
298 | TILEGX_OPC_V1MULUS, | |
299 | TILEGX_OPC_V1MZ, | |
300 | TILEGX_OPC_V1SADAU, | |
301 | TILEGX_OPC_V1SADU, | |
302 | TILEGX_OPC_V1SHL, | |
303 | TILEGX_OPC_V1SHLI, | |
304 | TILEGX_OPC_V1SHRS, | |
305 | TILEGX_OPC_V1SHRSI, | |
306 | TILEGX_OPC_V1SHRU, | |
307 | TILEGX_OPC_V1SHRUI, | |
308 | TILEGX_OPC_V1SUB, | |
309 | TILEGX_OPC_V1SUBUC, | |
310 | TILEGX_OPC_V2ADD, | |
311 | TILEGX_OPC_V2ADDI, | |
312 | TILEGX_OPC_V2ADDSC, | |
313 | TILEGX_OPC_V2ADIFFS, | |
314 | TILEGX_OPC_V2AVGS, | |
315 | TILEGX_OPC_V2CMPEQ, | |
316 | TILEGX_OPC_V2CMPEQI, | |
317 | TILEGX_OPC_V2CMPLES, | |
318 | TILEGX_OPC_V2CMPLEU, | |
319 | TILEGX_OPC_V2CMPLTS, | |
320 | TILEGX_OPC_V2CMPLTSI, | |
321 | TILEGX_OPC_V2CMPLTU, | |
322 | TILEGX_OPC_V2CMPLTUI, | |
323 | TILEGX_OPC_V2CMPNE, | |
324 | TILEGX_OPC_V2DOTP, | |
325 | TILEGX_OPC_V2DOTPA, | |
326 | TILEGX_OPC_V2INT_H, | |
327 | TILEGX_OPC_V2INT_L, | |
328 | TILEGX_OPC_V2MAXS, | |
329 | TILEGX_OPC_V2MAXSI, | |
330 | TILEGX_OPC_V2MINS, | |
331 | TILEGX_OPC_V2MINSI, | |
332 | TILEGX_OPC_V2MNZ, | |
333 | TILEGX_OPC_V2MULFSC, | |
334 | TILEGX_OPC_V2MULS, | |
335 | TILEGX_OPC_V2MULTS, | |
336 | TILEGX_OPC_V2MZ, | |
337 | TILEGX_OPC_V2PACKH, | |
338 | TILEGX_OPC_V2PACKL, | |
339 | TILEGX_OPC_V2PACKUC, | |
340 | TILEGX_OPC_V2SADAS, | |
341 | TILEGX_OPC_V2SADAU, | |
342 | TILEGX_OPC_V2SADS, | |
343 | TILEGX_OPC_V2SADU, | |
344 | TILEGX_OPC_V2SHL, | |
345 | TILEGX_OPC_V2SHLI, | |
346 | TILEGX_OPC_V2SHLSC, | |
347 | TILEGX_OPC_V2SHRS, | |
348 | TILEGX_OPC_V2SHRSI, | |
349 | TILEGX_OPC_V2SHRU, | |
350 | TILEGX_OPC_V2SHRUI, | |
351 | TILEGX_OPC_V2SUB, | |
352 | TILEGX_OPC_V2SUBSC, | |
353 | TILEGX_OPC_V4ADD, | |
354 | TILEGX_OPC_V4ADDSC, | |
355 | TILEGX_OPC_V4INT_H, | |
356 | TILEGX_OPC_V4INT_L, | |
357 | TILEGX_OPC_V4PACKSC, | |
358 | TILEGX_OPC_V4SHL, | |
359 | TILEGX_OPC_V4SHLSC, | |
360 | TILEGX_OPC_V4SHRS, | |
361 | TILEGX_OPC_V4SHRU, | |
362 | TILEGX_OPC_V4SUB, | |
363 | TILEGX_OPC_V4SUBSC, | |
364 | TILEGX_OPC_WH64, | |
365 | TILEGX_OPC_XOR, | |
366 | TILEGX_OPC_XORI, | |
367 | TILEGX_OPC_NONE | |
368 | } tilegx_mnemonic; | |
369 | ||
370 | /* 64-bit pattern for a { bpt ; nop } bundle. */ | |
371 | #define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL | |
372 | ||
373 | ||
374 | ||
375 | static __inline unsigned int | |
376 | get_BFEnd_X0(tilegx_bundle_bits num) | |
377 | { | |
378 | const unsigned int n = (unsigned int)num; | |
379 | return (((n >> 12)) & 0x3f); | |
380 | } | |
381 | ||
382 | static __inline unsigned int | |
383 | get_BFOpcodeExtension_X0(tilegx_bundle_bits num) | |
384 | { | |
385 | const unsigned int n = (unsigned int)num; | |
386 | return (((n >> 24)) & 0xf); | |
387 | } | |
388 | ||
389 | static __inline unsigned int | |
390 | get_BFStart_X0(tilegx_bundle_bits num) | |
391 | { | |
392 | const unsigned int n = (unsigned int)num; | |
393 | return (((n >> 18)) & 0x3f); | |
394 | } | |
395 | ||
396 | static __inline unsigned int | |
397 | get_BrOff_X1(tilegx_bundle_bits n) | |
398 | { | |
399 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | |
400 | (((unsigned int)(n >> 37)) & 0x0001ffc0); | |
401 | } | |
402 | ||
403 | static __inline unsigned int | |
404 | get_BrType_X1(tilegx_bundle_bits n) | |
405 | { | |
406 | return (((unsigned int)(n >> 54)) & 0x1f); | |
407 | } | |
408 | ||
409 | static __inline unsigned int | |
410 | get_Dest_Imm8_X1(tilegx_bundle_bits n) | |
411 | { | |
412 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | |
413 | (((unsigned int)(n >> 43)) & 0x000000c0); | |
414 | } | |
415 | ||
416 | static __inline unsigned int | |
417 | get_Dest_X0(tilegx_bundle_bits num) | |
418 | { | |
419 | const unsigned int n = (unsigned int)num; | |
420 | return (((n >> 0)) & 0x3f); | |
421 | } | |
422 | ||
423 | static __inline unsigned int | |
424 | get_Dest_X1(tilegx_bundle_bits n) | |
425 | { | |
426 | return (((unsigned int)(n >> 31)) & 0x3f); | |
427 | } | |
428 | ||
429 | static __inline unsigned int | |
430 | get_Dest_Y0(tilegx_bundle_bits num) | |
431 | { | |
432 | const unsigned int n = (unsigned int)num; | |
433 | return (((n >> 0)) & 0x3f); | |
434 | } | |
435 | ||
436 | static __inline unsigned int | |
437 | get_Dest_Y1(tilegx_bundle_bits n) | |
438 | { | |
439 | return (((unsigned int)(n >> 31)) & 0x3f); | |
440 | } | |
441 | ||
442 | static __inline unsigned int | |
443 | get_Imm16_X0(tilegx_bundle_bits num) | |
444 | { | |
445 | const unsigned int n = (unsigned int)num; | |
446 | return (((n >> 12)) & 0xffff); | |
447 | } | |
448 | ||
449 | static __inline unsigned int | |
450 | get_Imm16_X1(tilegx_bundle_bits n) | |
451 | { | |
452 | return (((unsigned int)(n >> 43)) & 0xffff); | |
453 | } | |
454 | ||
455 | static __inline unsigned int | |
456 | get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num) | |
457 | { | |
458 | const unsigned int n = (unsigned int)num; | |
459 | return (((n >> 20)) & 0xff); | |
460 | } | |
461 | ||
462 | static __inline unsigned int | |
463 | get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n) | |
464 | { | |
465 | return (((unsigned int)(n >> 51)) & 0xff); | |
466 | } | |
467 | ||
468 | static __inline unsigned int | |
469 | get_Imm8_X0(tilegx_bundle_bits num) | |
470 | { | |
471 | const unsigned int n = (unsigned int)num; | |
472 | return (((n >> 12)) & 0xff); | |
473 | } | |
474 | ||
475 | static __inline unsigned int | |
476 | get_Imm8_X1(tilegx_bundle_bits n) | |
477 | { | |
478 | return (((unsigned int)(n >> 43)) & 0xff); | |
479 | } | |
480 | ||
481 | static __inline unsigned int | |
482 | get_Imm8_Y0(tilegx_bundle_bits num) | |
483 | { | |
484 | const unsigned int n = (unsigned int)num; | |
485 | return (((n >> 12)) & 0xff); | |
486 | } | |
487 | ||
488 | static __inline unsigned int | |
489 | get_Imm8_Y1(tilegx_bundle_bits n) | |
490 | { | |
491 | return (((unsigned int)(n >> 43)) & 0xff); | |
492 | } | |
493 | ||
494 | static __inline unsigned int | |
495 | get_JumpOff_X1(tilegx_bundle_bits n) | |
496 | { | |
497 | return (((unsigned int)(n >> 31)) & 0x7ffffff); | |
498 | } | |
499 | ||
500 | static __inline unsigned int | |
501 | get_JumpOpcodeExtension_X1(tilegx_bundle_bits n) | |
502 | { | |
503 | return (((unsigned int)(n >> 58)) & 0x1); | |
504 | } | |
505 | ||
506 | static __inline unsigned int | |
507 | get_MF_Imm14_X1(tilegx_bundle_bits n) | |
508 | { | |
509 | return (((unsigned int)(n >> 37)) & 0x3fff); | |
510 | } | |
511 | ||
512 | static __inline unsigned int | |
513 | get_MT_Imm14_X1(tilegx_bundle_bits n) | |
514 | { | |
515 | return (((unsigned int)(n >> 31)) & 0x0000003f) | | |
516 | (((unsigned int)(n >> 37)) & 0x00003fc0); | |
517 | } | |
518 | ||
519 | static __inline unsigned int | |
520 | get_Mode(tilegx_bundle_bits n) | |
521 | { | |
522 | return (((unsigned int)(n >> 62)) & 0x3); | |
523 | } | |
524 | ||
525 | static __inline unsigned int | |
526 | get_Opcode_X0(tilegx_bundle_bits num) | |
527 | { | |
528 | const unsigned int n = (unsigned int)num; | |
529 | return (((n >> 28)) & 0x7); | |
530 | } | |
531 | ||
532 | static __inline unsigned int | |
533 | get_Opcode_X1(tilegx_bundle_bits n) | |
534 | { | |
535 | return (((unsigned int)(n >> 59)) & 0x7); | |
536 | } | |
537 | ||
538 | static __inline unsigned int | |
539 | get_Opcode_Y0(tilegx_bundle_bits num) | |
540 | { | |
541 | const unsigned int n = (unsigned int)num; | |
542 | return (((n >> 27)) & 0xf); | |
543 | } | |
544 | ||
545 | static __inline unsigned int | |
546 | get_Opcode_Y1(tilegx_bundle_bits n) | |
547 | { | |
548 | return (((unsigned int)(n >> 58)) & 0xf); | |
549 | } | |
550 | ||
551 | static __inline unsigned int | |
552 | get_Opcode_Y2(tilegx_bundle_bits n) | |
553 | { | |
554 | return (((n >> 26)) & 0x00000001) | | |
555 | (((unsigned int)(n >> 56)) & 0x00000002); | |
556 | } | |
557 | ||
558 | static __inline unsigned int | |
559 | get_RRROpcodeExtension_X0(tilegx_bundle_bits num) | |
560 | { | |
561 | const unsigned int n = (unsigned int)num; | |
562 | return (((n >> 18)) & 0x3ff); | |
563 | } | |
564 | ||
565 | static __inline unsigned int | |
566 | get_RRROpcodeExtension_X1(tilegx_bundle_bits n) | |
567 | { | |
568 | return (((unsigned int)(n >> 49)) & 0x3ff); | |
569 | } | |
570 | ||
571 | static __inline unsigned int | |
572 | get_RRROpcodeExtension_Y0(tilegx_bundle_bits num) | |
573 | { | |
574 | const unsigned int n = (unsigned int)num; | |
575 | return (((n >> 18)) & 0x3); | |
576 | } | |
577 | ||
578 | static __inline unsigned int | |
579 | get_RRROpcodeExtension_Y1(tilegx_bundle_bits n) | |
580 | { | |
581 | return (((unsigned int)(n >> 49)) & 0x3); | |
582 | } | |
583 | ||
584 | static __inline unsigned int | |
585 | get_ShAmt_X0(tilegx_bundle_bits num) | |
586 | { | |
587 | const unsigned int n = (unsigned int)num; | |
588 | return (((n >> 12)) & 0x3f); | |
589 | } | |
590 | ||
591 | static __inline unsigned int | |
592 | get_ShAmt_X1(tilegx_bundle_bits n) | |
593 | { | |
594 | return (((unsigned int)(n >> 43)) & 0x3f); | |
595 | } | |
596 | ||
597 | static __inline unsigned int | |
598 | get_ShAmt_Y0(tilegx_bundle_bits num) | |
599 | { | |
600 | const unsigned int n = (unsigned int)num; | |
601 | return (((n >> 12)) & 0x3f); | |
602 | } | |
603 | ||
604 | static __inline unsigned int | |
605 | get_ShAmt_Y1(tilegx_bundle_bits n) | |
606 | { | |
607 | return (((unsigned int)(n >> 43)) & 0x3f); | |
608 | } | |
609 | ||
610 | static __inline unsigned int | |
611 | get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num) | |
612 | { | |
613 | const unsigned int n = (unsigned int)num; | |
614 | return (((n >> 18)) & 0x3ff); | |
615 | } | |
616 | ||
617 | static __inline unsigned int | |
618 | get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n) | |
619 | { | |
620 | return (((unsigned int)(n >> 49)) & 0x3ff); | |
621 | } | |
622 | ||
623 | static __inline unsigned int | |
624 | get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num) | |
625 | { | |
626 | const unsigned int n = (unsigned int)num; | |
627 | return (((n >> 18)) & 0x3); | |
628 | } | |
629 | ||
630 | static __inline unsigned int | |
631 | get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n) | |
632 | { | |
633 | return (((unsigned int)(n >> 49)) & 0x3); | |
634 | } | |
635 | ||
636 | static __inline unsigned int | |
637 | get_SrcA_X0(tilegx_bundle_bits num) | |
638 | { | |
639 | const unsigned int n = (unsigned int)num; | |
640 | return (((n >> 6)) & 0x3f); | |
641 | } | |
642 | ||
643 | static __inline unsigned int | |
644 | get_SrcA_X1(tilegx_bundle_bits n) | |
645 | { | |
646 | return (((unsigned int)(n >> 37)) & 0x3f); | |
647 | } | |
648 | ||
649 | static __inline unsigned int | |
650 | get_SrcA_Y0(tilegx_bundle_bits num) | |
651 | { | |
652 | const unsigned int n = (unsigned int)num; | |
653 | return (((n >> 6)) & 0x3f); | |
654 | } | |
655 | ||
656 | static __inline unsigned int | |
657 | get_SrcA_Y1(tilegx_bundle_bits n) | |
658 | { | |
659 | return (((unsigned int)(n >> 37)) & 0x3f); | |
660 | } | |
661 | ||
662 | static __inline unsigned int | |
663 | get_SrcA_Y2(tilegx_bundle_bits num) | |
664 | { | |
665 | const unsigned int n = (unsigned int)num; | |
666 | return (((n >> 20)) & 0x3f); | |
667 | } | |
668 | ||
669 | static __inline unsigned int | |
670 | get_SrcBDest_Y2(tilegx_bundle_bits n) | |
671 | { | |
672 | return (((unsigned int)(n >> 51)) & 0x3f); | |
673 | } | |
674 | ||
675 | static __inline unsigned int | |
676 | get_SrcB_X0(tilegx_bundle_bits num) | |
677 | { | |
678 | const unsigned int n = (unsigned int)num; | |
679 | return (((n >> 12)) & 0x3f); | |
680 | } | |
681 | ||
682 | static __inline unsigned int | |
683 | get_SrcB_X1(tilegx_bundle_bits n) | |
684 | { | |
685 | return (((unsigned int)(n >> 43)) & 0x3f); | |
686 | } | |
687 | ||
688 | static __inline unsigned int | |
689 | get_SrcB_Y0(tilegx_bundle_bits num) | |
690 | { | |
691 | const unsigned int n = (unsigned int)num; | |
692 | return (((n >> 12)) & 0x3f); | |
693 | } | |
694 | ||
695 | static __inline unsigned int | |
696 | get_SrcB_Y1(tilegx_bundle_bits n) | |
697 | { | |
698 | return (((unsigned int)(n >> 43)) & 0x3f); | |
699 | } | |
700 | ||
701 | static __inline unsigned int | |
702 | get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num) | |
703 | { | |
704 | const unsigned int n = (unsigned int)num; | |
705 | return (((n >> 12)) & 0x3f); | |
706 | } | |
707 | ||
708 | static __inline unsigned int | |
709 | get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n) | |
710 | { | |
711 | return (((unsigned int)(n >> 43)) & 0x3f); | |
712 | } | |
713 | ||
714 | static __inline unsigned int | |
715 | get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num) | |
716 | { | |
717 | const unsigned int n = (unsigned int)num; | |
718 | return (((n >> 12)) & 0x3f); | |
719 | } | |
720 | ||
721 | static __inline unsigned int | |
722 | get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n) | |
723 | { | |
724 | return (((unsigned int)(n >> 43)) & 0x3f); | |
725 | } | |
726 | ||
727 | ||
728 | static __inline int | |
729 | sign_extend(int n, int num_bits) | |
730 | { | |
731 | int shift = (int)(sizeof(int) * 8 - num_bits); | |
732 | return (n << shift) >> shift; | |
733 | } | |
734 | ||
735 | ||
736 | ||
737 | static __inline tilegx_bundle_bits | |
738 | create_BFEnd_X0(int num) | |
739 | { | |
740 | const unsigned int n = (unsigned int)num; | |
741 | return ((n & 0x3f) << 12); | |
742 | } | |
743 | ||
744 | static __inline tilegx_bundle_bits | |
745 | create_BFOpcodeExtension_X0(int num) | |
746 | { | |
747 | const unsigned int n = (unsigned int)num; | |
748 | return ((n & 0xf) << 24); | |
749 | } | |
750 | ||
751 | static __inline tilegx_bundle_bits | |
752 | create_BFStart_X0(int num) | |
753 | { | |
754 | const unsigned int n = (unsigned int)num; | |
755 | return ((n & 0x3f) << 18); | |
756 | } | |
757 | ||
758 | static __inline tilegx_bundle_bits | |
759 | create_BrOff_X1(int num) | |
760 | { | |
761 | const unsigned int n = (unsigned int)num; | |
762 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | |
763 | (((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37); | |
764 | } | |
765 | ||
766 | static __inline tilegx_bundle_bits | |
767 | create_BrType_X1(int num) | |
768 | { | |
769 | const unsigned int n = (unsigned int)num; | |
770 | return (((tilegx_bundle_bits)(n & 0x1f)) << 54); | |
771 | } | |
772 | ||
773 | static __inline tilegx_bundle_bits | |
774 | create_Dest_Imm8_X1(int num) | |
775 | { | |
776 | const unsigned int n = (unsigned int)num; | |
777 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | |
778 | (((tilegx_bundle_bits)(n & 0x000000c0)) << 43); | |
779 | } | |
780 | ||
781 | static __inline tilegx_bundle_bits | |
782 | create_Dest_X0(int num) | |
783 | { | |
784 | const unsigned int n = (unsigned int)num; | |
785 | return ((n & 0x3f) << 0); | |
786 | } | |
787 | ||
788 | static __inline tilegx_bundle_bits | |
789 | create_Dest_X1(int num) | |
790 | { | |
791 | const unsigned int n = (unsigned int)num; | |
792 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); | |
793 | } | |
794 | ||
795 | static __inline tilegx_bundle_bits | |
796 | create_Dest_Y0(int num) | |
797 | { | |
798 | const unsigned int n = (unsigned int)num; | |
799 | return ((n & 0x3f) << 0); | |
800 | } | |
801 | ||
802 | static __inline tilegx_bundle_bits | |
803 | create_Dest_Y1(int num) | |
804 | { | |
805 | const unsigned int n = (unsigned int)num; | |
806 | return (((tilegx_bundle_bits)(n & 0x3f)) << 31); | |
807 | } | |
808 | ||
809 | static __inline tilegx_bundle_bits | |
810 | create_Imm16_X0(int num) | |
811 | { | |
812 | const unsigned int n = (unsigned int)num; | |
813 | return ((n & 0xffff) << 12); | |
814 | } | |
815 | ||
816 | static __inline tilegx_bundle_bits | |
817 | create_Imm16_X1(int num) | |
818 | { | |
819 | const unsigned int n = (unsigned int)num; | |
820 | return (((tilegx_bundle_bits)(n & 0xffff)) << 43); | |
821 | } | |
822 | ||
823 | static __inline tilegx_bundle_bits | |
824 | create_Imm8OpcodeExtension_X0(int num) | |
825 | { | |
826 | const unsigned int n = (unsigned int)num; | |
827 | return ((n & 0xff) << 20); | |
828 | } | |
829 | ||
830 | static __inline tilegx_bundle_bits | |
831 | create_Imm8OpcodeExtension_X1(int num) | |
832 | { | |
833 | const unsigned int n = (unsigned int)num; | |
834 | return (((tilegx_bundle_bits)(n & 0xff)) << 51); | |
835 | } | |
836 | ||
837 | static __inline tilegx_bundle_bits | |
838 | create_Imm8_X0(int num) | |
839 | { | |
840 | const unsigned int n = (unsigned int)num; | |
841 | return ((n & 0xff) << 12); | |
842 | } | |
843 | ||
844 | static __inline tilegx_bundle_bits | |
845 | create_Imm8_X1(int num) | |
846 | { | |
847 | const unsigned int n = (unsigned int)num; | |
848 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); | |
849 | } | |
850 | ||
851 | static __inline tilegx_bundle_bits | |
852 | create_Imm8_Y0(int num) | |
853 | { | |
854 | const unsigned int n = (unsigned int)num; | |
855 | return ((n & 0xff) << 12); | |
856 | } | |
857 | ||
858 | static __inline tilegx_bundle_bits | |
859 | create_Imm8_Y1(int num) | |
860 | { | |
861 | const unsigned int n = (unsigned int)num; | |
862 | return (((tilegx_bundle_bits)(n & 0xff)) << 43); | |
863 | } | |
864 | ||
865 | static __inline tilegx_bundle_bits | |
866 | create_JumpOff_X1(int num) | |
867 | { | |
868 | const unsigned int n = (unsigned int)num; | |
869 | return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31); | |
870 | } | |
871 | ||
872 | static __inline tilegx_bundle_bits | |
873 | create_JumpOpcodeExtension_X1(int num) | |
874 | { | |
875 | const unsigned int n = (unsigned int)num; | |
876 | return (((tilegx_bundle_bits)(n & 0x1)) << 58); | |
877 | } | |
878 | ||
879 | static __inline tilegx_bundle_bits | |
880 | create_MF_Imm14_X1(int num) | |
881 | { | |
882 | const unsigned int n = (unsigned int)num; | |
883 | return (((tilegx_bundle_bits)(n & 0x3fff)) << 37); | |
884 | } | |
885 | ||
886 | static __inline tilegx_bundle_bits | |
887 | create_MT_Imm14_X1(int num) | |
888 | { | |
889 | const unsigned int n = (unsigned int)num; | |
890 | return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) | | |
891 | (((tilegx_bundle_bits)(n & 0x00003fc0)) << 37); | |
892 | } | |
893 | ||
894 | static __inline tilegx_bundle_bits | |
895 | create_Mode(int num) | |
896 | { | |
897 | const unsigned int n = (unsigned int)num; | |
898 | return (((tilegx_bundle_bits)(n & 0x3)) << 62); | |
899 | } | |
900 | ||
901 | static __inline tilegx_bundle_bits | |
902 | create_Opcode_X0(int num) | |
903 | { | |
904 | const unsigned int n = (unsigned int)num; | |
905 | return ((n & 0x7) << 28); | |
906 | } | |
907 | ||
908 | static __inline tilegx_bundle_bits | |
909 | create_Opcode_X1(int num) | |
910 | { | |
911 | const unsigned int n = (unsigned int)num; | |
912 | return (((tilegx_bundle_bits)(n & 0x7)) << 59); | |
913 | } | |
914 | ||
915 | static __inline tilegx_bundle_bits | |
916 | create_Opcode_Y0(int num) | |
917 | { | |
918 | const unsigned int n = (unsigned int)num; | |
919 | return ((n & 0xf) << 27); | |
920 | } | |
921 | ||
922 | static __inline tilegx_bundle_bits | |
923 | create_Opcode_Y1(int num) | |
924 | { | |
925 | const unsigned int n = (unsigned int)num; | |
926 | return (((tilegx_bundle_bits)(n & 0xf)) << 58); | |
927 | } | |
928 | ||
929 | static __inline tilegx_bundle_bits | |
930 | create_Opcode_Y2(int num) | |
931 | { | |
932 | const unsigned int n = (unsigned int)num; | |
933 | return ((n & 0x00000001) << 26) | | |
934 | (((tilegx_bundle_bits)(n & 0x00000002)) << 56); | |
935 | } | |
936 | ||
937 | static __inline tilegx_bundle_bits | |
938 | create_RRROpcodeExtension_X0(int num) | |
939 | { | |
940 | const unsigned int n = (unsigned int)num; | |
941 | return ((n & 0x3ff) << 18); | |
942 | } | |
943 | ||
944 | static __inline tilegx_bundle_bits | |
945 | create_RRROpcodeExtension_X1(int num) | |
946 | { | |
947 | const unsigned int n = (unsigned int)num; | |
948 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); | |
949 | } | |
950 | ||
951 | static __inline tilegx_bundle_bits | |
952 | create_RRROpcodeExtension_Y0(int num) | |
953 | { | |
954 | const unsigned int n = (unsigned int)num; | |
955 | return ((n & 0x3) << 18); | |
956 | } | |
957 | ||
958 | static __inline tilegx_bundle_bits | |
959 | create_RRROpcodeExtension_Y1(int num) | |
960 | { | |
961 | const unsigned int n = (unsigned int)num; | |
962 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); | |
963 | } | |
964 | ||
965 | static __inline tilegx_bundle_bits | |
966 | create_ShAmt_X0(int num) | |
967 | { | |
968 | const unsigned int n = (unsigned int)num; | |
969 | return ((n & 0x3f) << 12); | |
970 | } | |
971 | ||
972 | static __inline tilegx_bundle_bits | |
973 | create_ShAmt_X1(int num) | |
974 | { | |
975 | const unsigned int n = (unsigned int)num; | |
976 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
977 | } | |
978 | ||
979 | static __inline tilegx_bundle_bits | |
980 | create_ShAmt_Y0(int num) | |
981 | { | |
982 | const unsigned int n = (unsigned int)num; | |
983 | return ((n & 0x3f) << 12); | |
984 | } | |
985 | ||
986 | static __inline tilegx_bundle_bits | |
987 | create_ShAmt_Y1(int num) | |
988 | { | |
989 | const unsigned int n = (unsigned int)num; | |
990 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
991 | } | |
992 | ||
993 | static __inline tilegx_bundle_bits | |
994 | create_ShiftOpcodeExtension_X0(int num) | |
995 | { | |
996 | const unsigned int n = (unsigned int)num; | |
997 | return ((n & 0x3ff) << 18); | |
998 | } | |
999 | ||
1000 | static __inline tilegx_bundle_bits | |
1001 | create_ShiftOpcodeExtension_X1(int num) | |
1002 | { | |
1003 | const unsigned int n = (unsigned int)num; | |
1004 | return (((tilegx_bundle_bits)(n & 0x3ff)) << 49); | |
1005 | } | |
1006 | ||
1007 | static __inline tilegx_bundle_bits | |
1008 | create_ShiftOpcodeExtension_Y0(int num) | |
1009 | { | |
1010 | const unsigned int n = (unsigned int)num; | |
1011 | return ((n & 0x3) << 18); | |
1012 | } | |
1013 | ||
1014 | static __inline tilegx_bundle_bits | |
1015 | create_ShiftOpcodeExtension_Y1(int num) | |
1016 | { | |
1017 | const unsigned int n = (unsigned int)num; | |
1018 | return (((tilegx_bundle_bits)(n & 0x3)) << 49); | |
1019 | } | |
1020 | ||
1021 | static __inline tilegx_bundle_bits | |
1022 | create_SrcA_X0(int num) | |
1023 | { | |
1024 | const unsigned int n = (unsigned int)num; | |
1025 | return ((n & 0x3f) << 6); | |
1026 | } | |
1027 | ||
1028 | static __inline tilegx_bundle_bits | |
1029 | create_SrcA_X1(int num) | |
1030 | { | |
1031 | const unsigned int n = (unsigned int)num; | |
1032 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); | |
1033 | } | |
1034 | ||
1035 | static __inline tilegx_bundle_bits | |
1036 | create_SrcA_Y0(int num) | |
1037 | { | |
1038 | const unsigned int n = (unsigned int)num; | |
1039 | return ((n & 0x3f) << 6); | |
1040 | } | |
1041 | ||
1042 | static __inline tilegx_bundle_bits | |
1043 | create_SrcA_Y1(int num) | |
1044 | { | |
1045 | const unsigned int n = (unsigned int)num; | |
1046 | return (((tilegx_bundle_bits)(n & 0x3f)) << 37); | |
1047 | } | |
1048 | ||
1049 | static __inline tilegx_bundle_bits | |
1050 | create_SrcA_Y2(int num) | |
1051 | { | |
1052 | const unsigned int n = (unsigned int)num; | |
1053 | return ((n & 0x3f) << 20); | |
1054 | } | |
1055 | ||
1056 | static __inline tilegx_bundle_bits | |
1057 | create_SrcBDest_Y2(int num) | |
1058 | { | |
1059 | const unsigned int n = (unsigned int)num; | |
1060 | return (((tilegx_bundle_bits)(n & 0x3f)) << 51); | |
1061 | } | |
1062 | ||
1063 | static __inline tilegx_bundle_bits | |
1064 | create_SrcB_X0(int num) | |
1065 | { | |
1066 | const unsigned int n = (unsigned int)num; | |
1067 | return ((n & 0x3f) << 12); | |
1068 | } | |
1069 | ||
1070 | static __inline tilegx_bundle_bits | |
1071 | create_SrcB_X1(int num) | |
1072 | { | |
1073 | const unsigned int n = (unsigned int)num; | |
1074 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
1075 | } | |
1076 | ||
1077 | static __inline tilegx_bundle_bits | |
1078 | create_SrcB_Y0(int num) | |
1079 | { | |
1080 | const unsigned int n = (unsigned int)num; | |
1081 | return ((n & 0x3f) << 12); | |
1082 | } | |
1083 | ||
1084 | static __inline tilegx_bundle_bits | |
1085 | create_SrcB_Y1(int num) | |
1086 | { | |
1087 | const unsigned int n = (unsigned int)num; | |
1088 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
1089 | } | |
1090 | ||
1091 | static __inline tilegx_bundle_bits | |
1092 | create_UnaryOpcodeExtension_X0(int num) | |
1093 | { | |
1094 | const unsigned int n = (unsigned int)num; | |
1095 | return ((n & 0x3f) << 12); | |
1096 | } | |
1097 | ||
1098 | static __inline tilegx_bundle_bits | |
1099 | create_UnaryOpcodeExtension_X1(int num) | |
1100 | { | |
1101 | const unsigned int n = (unsigned int)num; | |
1102 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
1103 | } | |
1104 | ||
1105 | static __inline tilegx_bundle_bits | |
1106 | create_UnaryOpcodeExtension_Y0(int num) | |
1107 | { | |
1108 | const unsigned int n = (unsigned int)num; | |
1109 | return ((n & 0x3f) << 12); | |
1110 | } | |
1111 | ||
1112 | static __inline tilegx_bundle_bits | |
1113 | create_UnaryOpcodeExtension_Y1(int num) | |
1114 | { | |
1115 | const unsigned int n = (unsigned int)num; | |
1116 | return (((tilegx_bundle_bits)(n & 0x3f)) << 43); | |
1117 | } | |
1118 | ||
1119 | ||
1120 | typedef enum | |
1121 | { | |
1122 | TILEGX_PIPELINE_X0, | |
1123 | TILEGX_PIPELINE_X1, | |
1124 | TILEGX_PIPELINE_Y0, | |
1125 | TILEGX_PIPELINE_Y1, | |
1126 | TILEGX_PIPELINE_Y2, | |
1127 | } tilegx_pipeline; | |
1128 | ||
1129 | #define tilegx_is_x_pipeline(p) ((int)(p) <= (int)TILEGX_PIPELINE_X1) | |
1130 | ||
1131 | typedef enum | |
1132 | { | |
1133 | TILEGX_OP_TYPE_REGISTER, | |
1134 | TILEGX_OP_TYPE_IMMEDIATE, | |
1135 | TILEGX_OP_TYPE_ADDRESS, | |
1136 | TILEGX_OP_TYPE_SPR | |
1137 | } tilegx_operand_type; | |
1138 | ||
1139 | /* These are the bits that determine if a bundle is in the X encoding. */ | |
1140 | #define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62) | |
1141 | ||
1142 | enum | |
1143 | { | |
1144 | /* Maximum number of instructions in a bundle (2 for X, 3 for Y). */ | |
1145 | TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3, | |
1146 | ||
1147 | /* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */ | |
1148 | TILEGX_NUM_PIPELINE_ENCODINGS = 5, | |
1149 | ||
1150 | /* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */ | |
1151 | TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3, | |
1152 | ||
1153 | /* Instructions take this many bytes. */ | |
1154 | TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES, | |
1155 | ||
1156 | /* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */ | |
1157 | TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3, | |
1158 | ||
1159 | /* Bundles should be aligned modulo this number of bytes. */ | |
1160 | TILEGX_BUNDLE_ALIGNMENT_IN_BYTES = | |
1161 | (1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES), | |
1162 | ||
1163 | /* Number of registers (some are magic, such as network I/O). */ | |
1164 | TILEGX_NUM_REGISTERS = 64, | |
1165 | }; | |
1166 | ||
1167 | ||
1168 | struct tilegx_operand | |
1169 | { | |
1170 | /* Is this operand a register, immediate or address? */ | |
1171 | tilegx_operand_type type; | |
1172 | ||
1173 | /* The default relocation type for this operand. */ | |
1174 | signed int default_reloc : 16; | |
1175 | ||
1176 | /* How many bits is this value? (used for range checking) */ | |
1177 | unsigned int num_bits : 5; | |
1178 | ||
1179 | /* Is the value signed? (used for range checking) */ | |
1180 | unsigned int is_signed : 1; | |
1181 | ||
1182 | /* Is this operand a source register? */ | |
1183 | unsigned int is_src_reg : 1; | |
1184 | ||
1185 | /* Is this operand written? (i.e. is it a destination register) */ | |
1186 | unsigned int is_dest_reg : 1; | |
1187 | ||
1188 | /* Is this operand PC-relative? */ | |
1189 | unsigned int is_pc_relative : 1; | |
1190 | ||
1191 | /* By how many bits do we right shift the value before inserting? */ | |
1192 | unsigned int rightshift : 2; | |
1193 | ||
1194 | /* Return the bits for this operand to be ORed into an existing bundle. */ | |
1195 | tilegx_bundle_bits (*insert) (int op); | |
1196 | ||
1197 | /* Extract this operand and return it. */ | |
1198 | unsigned int (*extract) (tilegx_bundle_bits bundle); | |
1199 | }; | |
1200 | ||
1201 | ||
1202 | extern const struct tilegx_operand tilegx_operands[]; | |
1203 | ||
1204 | /* One finite-state machine per pipe for rapid instruction decoding. */ | |
1205 | extern const unsigned short * const | |
1206 | tilegx_bundle_decoder_fsms[TILEGX_NUM_PIPELINE_ENCODINGS]; | |
1207 | ||
1208 | ||
1209 | struct tilegx_opcode | |
1210 | { | |
1211 | /* The opcode mnemonic, e.g. "add" */ | |
1212 | const char *name; | |
1213 | ||
1214 | /* The enum value for this mnemonic. */ | |
1215 | tilegx_mnemonic mnemonic; | |
1216 | ||
1217 | /* A bit mask of which of the five pipes this instruction | |
1218 | is compatible with: | |
1219 | X0 0x01 | |
1220 | X1 0x02 | |
1221 | Y0 0x04 | |
1222 | Y1 0x08 | |
1223 | Y2 0x10 */ | |
1224 | unsigned char pipes; | |
1225 | ||
1226 | /* How many operands are there? */ | |
1227 | unsigned char num_operands; | |
1228 | ||
1229 | /* Which register does this write implicitly, or TREG_ZERO if none? */ | |
1230 | unsigned char implicitly_written_register; | |
1231 | ||
1232 | /* Can this be bundled with other instructions (almost always true). */ | |
1233 | unsigned char can_bundle; | |
1234 | ||
1235 | /* The description of the operands. Each of these is an | |
1236 | * index into the tilegx_operands[] table. */ | |
1237 | unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; | |
1238 | ||
1239 | #if !defined(__KERNEL__) && !defined(_LIBC) | |
1240 | /* A mask of which bits have predefined values for each pipeline. | |
1241 | * This is useful for disassembly. */ | |
1242 | tilegx_bundle_bits fixed_bit_masks[TILEGX_NUM_PIPELINE_ENCODINGS]; | |
1243 | ||
1244 | /* For each bit set in fixed_bit_masks, what the value is for this | |
1245 | * instruction. */ | |
1246 | tilegx_bundle_bits fixed_bit_values[TILEGX_NUM_PIPELINE_ENCODINGS]; | |
1247 | #endif | |
1248 | }; | |
1249 | ||
1250 | extern const struct tilegx_opcode tilegx_opcodes[]; | |
1251 | ||
1252 | /* Used for non-textual disassembly into structs. */ | |
1253 | struct tilegx_decoded_instruction | |
1254 | { | |
1255 | const struct tilegx_opcode *opcode; | |
1256 | const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; | |
1257 | long long operand_values[TILEGX_MAX_OPERANDS]; | |
1258 | }; | |
1259 | ||
1260 | ||
1261 | /* Disassemble a bundle into a struct for machine processing. */ | |
1262 | extern int parse_insn_tilegx(tilegx_bundle_bits bits, | |
1263 | unsigned long long pc, | |
1264 | struct tilegx_decoded_instruction | |
1265 | decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]); | |
1266 | ||
1267 | ||
1268 | #if !defined(__KERNEL__) && !defined(_LIBC) | |
1269 | /* Canonical names of all the registers. */ | |
1270 | /* ISSUE: This table lives in "tile-dis.c" */ | |
1271 | extern const char * const tilegx_register_names[]; | |
1272 | ||
1273 | /* Descriptor for a special-purpose register. */ | |
1274 | struct tilegx_spr | |
1275 | { | |
1276 | /* The number */ | |
1277 | int number; | |
1278 | ||
1279 | /* The name */ | |
1280 | const char *name; | |
1281 | }; | |
1282 | ||
1283 | /* List of all the SPRs; ordered by increasing number. */ | |
1284 | extern const struct tilegx_spr tilegx_sprs[]; | |
1285 | ||
1286 | /* Number of special-purpose registers. */ | |
1287 | extern const int tilegx_num_sprs; | |
1288 | ||
1289 | extern const char * | |
1290 | get_tilegx_spr_name (int num); | |
1291 | #endif /* !__KERNEL__ && !_LIBC */ | |
1292 | ||
1293 | /* Make a few "tile_" variables to simply common code between | |
1294 | architectures. */ | |
1295 | ||
1296 | typedef tilegx_bundle_bits tile_bundle_bits; | |
1297 | #define TILE_BUNDLE_SIZE_IN_BYTES TILEGX_BUNDLE_SIZE_IN_BYTES | |
1298 | #define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES | |
1299 | #define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \ | |
1300 | TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES | |
1301 | ||
1302 | #endif /* opcode_tilegx_h */ |