projects / deliverable / linux.git / blame
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|---|---|---|
| a4d7d550 KM |
1 | #ifndef __SOUND_FSI_H |
| 2 | #define __SOUND_FSI_H | |
| 3 | ||
| 4 | /* | |
| 5 | * Fifo-attached Serial Interface (FSI) support for SH7724 | |
| 6 | * | |
| 7 | * Copyright (C) 2009 Renesas Solutions Corp. | |
| 8 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License version 2 as | |
| 12 | * published by the Free Software Foundation. | |
| 13 | */ | |
| 14 | ||
| 3c2ef841 KM |
15 | #define FSI_PORT_A 0 |
| 16 | #define FSI_PORT_B 1 | |
| 17 | ||
| a4d7d550 KM |
18 | #include <linux/clk.h> |
| 19 | #include <sound/soc.h> | |
| 20 | ||
| f17c13ca KM |
21 | /* |
| 22 | * flags format | |
| 23 | * | |
| 766812e6 | 24 | * 0x00000CBA |
| f17c13ca KM |
25 | * |
| 26 | * A: inversion | |
| 27 | * B: format mode | |
| 766812e6 | 28 | * C: chip specific |
| ab6f6d85 | 29 | * D: clock selecter if master mode |
| f17c13ca | 30 | */ |
| a4d7d550 | 31 | |
| f17c13ca KM |
32 | /* A: clock inversion */ |
| 33 | #define SH_FSI_INVERSION_MASK 0x0000000F | |
| 34 | #define SH_FSI_LRM_INV (1 << 0) | |
| 35 | #define SH_FSI_BRM_INV (1 << 1) | |
| 36 | #define SH_FSI_LRS_INV (1 << 2) | |
| 37 | #define SH_FSI_BRS_INV (1 << 3) | |
| 38 | ||
| 39 | /* B: format mode */ | |
| 40 | #define SH_FSI_FMT_MASK 0x000000F0 | |
| 41 | #define SH_FSI_FMT_DAI (0 << 4) | |
| 42 | #define SH_FSI_FMT_SPDIF (1 << 4) | |
| a4d7d550 | 43 | |
| 766812e6 KM |
44 | /* C: chip specific */ |
| 45 | #define SH_FSI_OPTION_MASK 0x00000F00 | |
| 46 | #define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */ | |
| ccad7b44 | 47 | |
| ab6f6d85 KM |
48 | /* D: clock selecter if master mode */ |
| 49 | #define SH_FSI_CLK_MASK 0x0000F000 | |
| ab6340c4 KM |
50 | #define SH_FSI_CLK_EXTERNAL (0 << 12) |
| 51 | #define SH_FSI_CLK_CPG (1 << 12) /* FSIxCK + FSI-DIV */ | |
| ab6f6d85 | 52 | |
| ccad7b44 KM |
53 | /* |
| 54 | * set_rate return value | |
| 55 | * | |
| 56 | * see ACKMD/BPFMD on | |
| 57 | * ACK_MD (FSI2) | |
| 58 | * CKG1 (FSI) | |
| 59 | * | |
| d4bc99b9 KM |
60 | * err : return value < 0 |
| 61 | * no change : return value == 0 | |
| 62 | * change xMD : return value > 0 | |
| ccad7b44 KM |
63 | * |
| 64 | * 0x-00000AB | |
| 65 | * | |
| 66 | * A: ACKMD value | |
| 67 | * B: BPFMD value | |
| 68 | */ | |
| 69 | ||
| 70 | #define SH_FSI_ACKMD_MASK (0xF << 0) | |
| 71 | #define SH_FSI_ACKMD_512 (1 << 0) | |
| 72 | #define SH_FSI_ACKMD_256 (2 << 0) | |
| 73 | #define SH_FSI_ACKMD_128 (3 << 0) | |
| 74 | #define SH_FSI_ACKMD_64 (4 << 0) | |
| 75 | #define SH_FSI_ACKMD_32 (5 << 0) | |
| 76 | ||
| 77 | #define SH_FSI_BPFMD_MASK (0xF << 4) | |
| 78 | #define SH_FSI_BPFMD_512 (1 << 4) | |
| 79 | #define SH_FSI_BPFMD_256 (2 << 4) | |
| 80 | #define SH_FSI_BPFMD_128 (3 << 4) | |
| 81 | #define SH_FSI_BPFMD_64 (4 << 4) | |
| 82 | #define SH_FSI_BPFMD_32 (5 << 4) | |
| 83 | #define SH_FSI_BPFMD_16 (6 << 4) | |
| 84 | ||
| fec691e7 KM |
85 | struct sh_fsi_port_info { |
| 86 | unsigned long flags; | |
| 7da9ced6 KM |
87 | int tx_id; |
| 88 | int rx_id; | |
| fec691e7 KM |
89 | int (*set_rate)(struct device *dev, int rate, int enable); |
| 90 | }; | |
| 91 | ||
| a4d7d550 | 92 | struct sh_fsi_platform_info { |
| fec691e7 KM |
93 | struct sh_fsi_port_info port_a; |
| 94 | struct sh_fsi_port_info port_b; | |
| a4d7d550 KM |
95 | }; |
| 96 | ||
| a4d7d550 | 97 | #endif /* __SOUND_FSI_H */ |