Commit | Line | Data |
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808db4a4 RP |
1 | /* |
2 | * linux/sound/soc.h -- ALSA SoC Layer | |
3 | * | |
4 | * Author: Liam Girdwood | |
5 | * Created: Aug 11th 2005 | |
6 | * Copyright: Wolfson Microelectronics. PLC. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __LINUX_SND_SOC_H | |
14 | #define __LINUX_SND_SOC_H | |
15 | ||
16 | #include <linux/platform_device.h> | |
17 | #include <linux/types.h> | |
d5021ec9 | 18 | #include <linux/notifier.h> |
4484bb2e | 19 | #include <linux/workqueue.h> |
ec67624d LCM |
20 | #include <linux/interrupt.h> |
21 | #include <linux/kernel.h> | |
be3ea3b9 | 22 | #include <linux/regmap.h> |
808db4a4 RP |
23 | #include <sound/core.h> |
24 | #include <sound/pcm.h> | |
25 | #include <sound/control.h> | |
26 | #include <sound/ac97_codec.h> | |
27 | ||
808db4a4 RP |
28 | /* |
29 | * Convenience kcontrol builders | |
30 | */ | |
460acbec | 31 | #define SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, xmax, xinvert) \ |
4eaa9819 | 32 | ((unsigned long)&(struct soc_mixer_control) \ |
30d86ba4 PU |
33 | {.reg = xreg, .rreg = xreg, .shift = shift_left, \ |
34 | .rshift = shift_right, .max = xmax, .platform_max = xmax, \ | |
35 | .invert = xinvert}) | |
460acbec PU |
36 | #define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) \ |
37 | SOC_DOUBLE_VALUE(xreg, xshift, xshift, xmax, xinvert) | |
4eaa9819 JS |
38 | #define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \ |
39 | ((unsigned long)&(struct soc_mixer_control) \ | |
d11bb4a9 | 40 | {.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert}) |
cdffa775 PU |
41 | #define SOC_DOUBLE_R_VALUE(xlreg, xrreg, xshift, xmax, xinvert) \ |
42 | ((unsigned long)&(struct soc_mixer_control) \ | |
43 | {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \ | |
44 | .max = xmax, .platform_max = xmax, .invert = xinvert}) | |
a7a4ac86 | 45 | #define SOC_SINGLE(xname, reg, shift, max, invert) \ |
808db4a4 RP |
46 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
47 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
48 | .put = snd_soc_put_volsw, \ | |
a7a4ac86 PZ |
49 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } |
50 | #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ | |
51 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
52 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
53 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
54 | .tlv.p = (tlv_array), \ | |
55 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
56 | .put = snd_soc_put_volsw, \ | |
57 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } | |
1d99f243 BA |
58 | #define SOC_SINGLE_SX_TLV(xname, xreg, xshift, xmin, xmax, tlv_array) \ |
59 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
60 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
61 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
62 | .tlv.p = (tlv_array),\ | |
63 | .info = snd_soc_info_volsw, \ | |
64 | .get = snd_soc_get_volsw_sx,\ | |
65 | .put = snd_soc_put_volsw_sx, \ | |
66 | .private_value = (unsigned long)&(struct soc_mixer_control) \ | |
67 | {.reg = xreg, .rreg = xreg, \ | |
68 | .shift = xshift, .rshift = xshift, \ | |
69 | .max = xmax, .min = xmin} } | |
460acbec | 70 | #define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \ |
808db4a4 RP |
71 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
72 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ | |
73 | .put = snd_soc_put_volsw, \ | |
460acbec PU |
74 | .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \ |
75 | max, invert) } | |
4eaa9819 | 76 | #define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \ |
808db4a4 | 77 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
e8f5a103 | 78 | .info = snd_soc_info_volsw, \ |
974815ba | 79 | .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \ |
cdffa775 PU |
80 | .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \ |
81 | xmax, xinvert) } | |
460acbec | 82 | #define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \ |
a7a4ac86 PZ |
83 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
84 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
85 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
86 | .tlv.p = (tlv_array), \ | |
87 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ | |
88 | .put = snd_soc_put_volsw, \ | |
460acbec PU |
89 | .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \ |
90 | max, invert) } | |
4eaa9819 | 91 | #define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \ |
a7a4ac86 PZ |
92 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
93 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
94 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
95 | .tlv.p = (tlv_array), \ | |
e8f5a103 | 96 | .info = snd_soc_info_volsw, \ |
974815ba | 97 | .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \ |
cdffa775 PU |
98 | .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \ |
99 | xmax, xinvert) } | |
1d99f243 BA |
100 | #define SOC_DOUBLE_R_SX_TLV(xname, xreg, xrreg, xshift, xmin, xmax, tlv_array) \ |
101 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
102 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
103 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
104 | .tlv.p = (tlv_array), \ | |
105 | .info = snd_soc_info_volsw, \ | |
106 | .get = snd_soc_get_volsw_sx, \ | |
107 | .put = snd_soc_put_volsw_sx, \ | |
108 | .private_value = (unsigned long)&(struct soc_mixer_control) \ | |
109 | {.reg = xreg, .rreg = xrreg, \ | |
110 | .shift = xshift, .rshift = xshift, \ | |
111 | .max = xmax, .min = xmin} } | |
4eaa9819 | 112 | #define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \ |
e13ac2e9 MB |
113 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
114 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
115 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
116 | .tlv.p = (tlv_array), \ | |
117 | .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \ | |
118 | .put = snd_soc_put_volsw_s8, \ | |
4eaa9819 | 119 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
d11bb4a9 PU |
120 | {.reg = xreg, .min = xmin, .max = xmax, \ |
121 | .platform_max = xmax} } | |
f8ba0b7b | 122 | #define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmax, xtexts) \ |
808db4a4 | 123 | { .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \ |
f8ba0b7b JS |
124 | .max = xmax, .texts = xtexts } |
125 | #define SOC_ENUM_SINGLE(xreg, xshift, xmax, xtexts) \ | |
126 | SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmax, xtexts) | |
127 | #define SOC_ENUM_SINGLE_EXT(xmax, xtexts) \ | |
128 | { .max = xmax, .texts = xtexts } | |
2e72f8e3 PU |
129 | #define SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xmax, xtexts, xvalues) \ |
130 | { .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \ | |
131 | .mask = xmask, .max = xmax, .texts = xtexts, .values = xvalues} | |
132 | #define SOC_VALUE_ENUM_SINGLE(xreg, xshift, xmask, xmax, xtexts, xvalues) \ | |
133 | SOC_VALUE_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xmax, xtexts, xvalues) | |
808db4a4 RP |
134 | #define SOC_ENUM(xname, xenum) \ |
135 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ | |
136 | .info = snd_soc_info_enum_double, \ | |
137 | .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ | |
138 | .private_value = (unsigned long)&xenum } | |
2e72f8e3 PU |
139 | #define SOC_VALUE_ENUM(xname, xenum) \ |
140 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ | |
74155556 | 141 | .info = snd_soc_info_enum_double, \ |
2e72f8e3 PU |
142 | .get = snd_soc_get_value_enum_double, \ |
143 | .put = snd_soc_put_value_enum_double, \ | |
144 | .private_value = (unsigned long)&xenum } | |
f8ba0b7b | 145 | #define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\ |
808db4a4 RP |
146 | xhandler_get, xhandler_put) \ |
147 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
1c433fbd | 148 | .info = snd_soc_info_volsw, \ |
808db4a4 | 149 | .get = xhandler_get, .put = xhandler_put, \ |
f8ba0b7b | 150 | .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) } |
460acbec | 151 | #define SOC_DOUBLE_EXT(xname, reg, shift_left, shift_right, max, invert,\ |
7629ad24 DM |
152 | xhandler_get, xhandler_put) \ |
153 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ | |
154 | .info = snd_soc_info_volsw, \ | |
155 | .get = xhandler_get, .put = xhandler_put, \ | |
460acbec PU |
156 | .private_value = \ |
157 | SOC_DOUBLE_VALUE(reg, shift_left, shift_right, max, invert) } | |
f8ba0b7b | 158 | #define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\ |
10144c09 MM |
159 | xhandler_get, xhandler_put, tlv_array) \ |
160 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
161 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
162 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
163 | .tlv.p = (tlv_array), \ | |
164 | .info = snd_soc_info_volsw, \ | |
165 | .get = xhandler_get, .put = xhandler_put, \ | |
f8ba0b7b | 166 | .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) } |
d0af93db JS |
167 | #define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\ |
168 | xhandler_get, xhandler_put, tlv_array) \ | |
169 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
170 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
171 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
172 | .tlv.p = (tlv_array), \ | |
173 | .info = snd_soc_info_volsw, \ | |
174 | .get = xhandler_get, .put = xhandler_put, \ | |
460acbec PU |
175 | .private_value = SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, \ |
176 | xmax, xinvert) } | |
3ce91d5a JS |
177 | #define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\ |
178 | xhandler_get, xhandler_put, tlv_array) \ | |
179 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
180 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
181 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
182 | .tlv.p = (tlv_array), \ | |
e8f5a103 | 183 | .info = snd_soc_info_volsw, \ |
3ce91d5a | 184 | .get = xhandler_get, .put = xhandler_put, \ |
cdffa775 PU |
185 | .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \ |
186 | xmax, xinvert) } | |
808db4a4 RP |
187 | #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \ |
188 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
189 | .info = snd_soc_info_bool_ext, \ | |
190 | .get = xhandler_get, .put = xhandler_put, \ | |
191 | .private_value = xdata } | |
192 | #define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \ | |
193 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
194 | .info = snd_soc_info_enum_ext, \ | |
195 | .get = xhandler_get, .put = xhandler_put, \ | |
196 | .private_value = (unsigned long)&xenum } | |
197 | ||
71d08516 MB |
198 | #define SND_SOC_BYTES(xname, xbase, xregs) \ |
199 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
200 | .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ | |
201 | .put = snd_soc_bytes_put, .private_value = \ | |
202 | ((unsigned long)&(struct soc_bytes) \ | |
203 | {.base = xbase, .num_regs = xregs }) } | |
b6f4bb38 | 204 | |
f831b055 MB |
205 | #define SND_SOC_BYTES_MASK(xname, xbase, xregs, xmask) \ |
206 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
207 | .info = snd_soc_bytes_info, .get = snd_soc_bytes_get, \ | |
208 | .put = snd_soc_bytes_put, .private_value = \ | |
209 | ((unsigned long)&(struct soc_bytes) \ | |
210 | {.base = xbase, .num_regs = xregs, \ | |
211 | .mask = xmask }) } | |
212 | ||
4183eed2 KK |
213 | #define SOC_SINGLE_XR_SX(xname, xregbase, xregcount, xnbits, \ |
214 | xmin, xmax, xinvert) \ | |
215 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
216 | .info = snd_soc_info_xr_sx, .get = snd_soc_get_xr_sx, \ | |
217 | .put = snd_soc_put_xr_sx, \ | |
218 | .private_value = (unsigned long)&(struct soc_mreg_control) \ | |
219 | {.regbase = xregbase, .regcount = xregcount, .nbits = xnbits, \ | |
220 | .invert = xinvert, .min = xmin, .max = xmax} } | |
221 | ||
dd7b10b3 KK |
222 | #define SOC_SINGLE_STROBE(xname, xreg, xshift, xinvert) \ |
223 | SOC_SINGLE_EXT(xname, xreg, xshift, 1, xinvert, \ | |
224 | snd_soc_get_strobe, snd_soc_put_strobe) | |
225 | ||
6c2fb6a8 GL |
226 | /* |
227 | * Simplified versions of above macros, declaring a struct and calculating | |
228 | * ARRAY_SIZE internally | |
229 | */ | |
230 | #define SOC_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xtexts) \ | |
231 | struct soc_enum name = SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, \ | |
232 | ARRAY_SIZE(xtexts), xtexts) | |
233 | #define SOC_ENUM_SINGLE_DECL(name, xreg, xshift, xtexts) \ | |
234 | SOC_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xtexts) | |
235 | #define SOC_ENUM_SINGLE_EXT_DECL(name, xtexts) \ | |
236 | struct soc_enum name = SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtexts), xtexts) | |
237 | #define SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xmask, xtexts, xvalues) \ | |
238 | struct soc_enum name = SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, \ | |
239 | ARRAY_SIZE(xtexts), xtexts, xvalues) | |
240 | #define SOC_VALUE_ENUM_SINGLE_DECL(name, xreg, xshift, xmask, xtexts, xvalues) \ | |
241 | SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xmask, xtexts, xvalues) | |
242 | ||
0168bf0d LG |
243 | /* |
244 | * Component probe and remove ordering levels for components with runtime | |
245 | * dependencies. | |
246 | */ | |
247 | #define SND_SOC_COMP_ORDER_FIRST -2 | |
248 | #define SND_SOC_COMP_ORDER_EARLY -1 | |
249 | #define SND_SOC_COMP_ORDER_NORMAL 0 | |
250 | #define SND_SOC_COMP_ORDER_LATE 1 | |
251 | #define SND_SOC_COMP_ORDER_LAST 2 | |
252 | ||
0be9898a MB |
253 | /* |
254 | * Bias levels | |
255 | * | |
256 | * @ON: Bias is fully on for audio playback and capture operations. | |
257 | * @PREPARE: Prepare for audio operations. Called before DAPM switching for | |
258 | * stream start and stop operations. | |
259 | * @STANDBY: Low power standby state when no playback/capture operations are | |
260 | * in progress. NOTE: The transition time between STANDBY and ON | |
261 | * should be as fast as possible and no longer than 10ms. | |
262 | * @OFF: Power Off. No restrictions on transition times. | |
263 | */ | |
264 | enum snd_soc_bias_level { | |
56fba41f MB |
265 | SND_SOC_BIAS_OFF = 0, |
266 | SND_SOC_BIAS_STANDBY = 1, | |
267 | SND_SOC_BIAS_PREPARE = 2, | |
268 | SND_SOC_BIAS_ON = 3, | |
0be9898a MB |
269 | }; |
270 | ||
5a504963 | 271 | struct device_node; |
8a2cd618 MB |
272 | struct snd_jack; |
273 | struct snd_soc_card; | |
808db4a4 RP |
274 | struct snd_soc_pcm_stream; |
275 | struct snd_soc_ops; | |
808db4a4 | 276 | struct snd_soc_pcm_runtime; |
3c4b266f | 277 | struct snd_soc_dai; |
f0fba2ad | 278 | struct snd_soc_dai_driver; |
12a48a8c | 279 | struct snd_soc_platform; |
d273ebe7 | 280 | struct snd_soc_dai_link; |
f0fba2ad | 281 | struct snd_soc_platform_driver; |
808db4a4 | 282 | struct snd_soc_codec; |
f0fba2ad | 283 | struct snd_soc_codec_driver; |
808db4a4 | 284 | struct soc_enum; |
8a2cd618 | 285 | struct snd_soc_jack; |
fa9879ed | 286 | struct snd_soc_jack_zone; |
8a2cd618 | 287 | struct snd_soc_jack_pin; |
7a30a3db | 288 | struct snd_soc_cache_ops; |
ce6120cc | 289 | #include <sound/soc-dapm.h> |
01d7584c | 290 | #include <sound/soc-dpcm.h> |
f0fba2ad | 291 | |
ec67624d LCM |
292 | #ifdef CONFIG_GPIOLIB |
293 | struct snd_soc_jack_gpio; | |
294 | #endif | |
808db4a4 RP |
295 | |
296 | typedef int (*hw_write_t)(void *,const char* ,int); | |
808db4a4 RP |
297 | |
298 | extern struct snd_ac97_bus_ops soc_ac97_ops; | |
299 | ||
7084a42b | 300 | enum snd_soc_control_type { |
e9c03905 | 301 | SND_SOC_I2C = 1, |
7084a42b | 302 | SND_SOC_SPI, |
0671da18 | 303 | SND_SOC_REGMAP, |
7084a42b MB |
304 | }; |
305 | ||
7a30a3db | 306 | enum snd_soc_compress_type { |
119bd789 | 307 | SND_SOC_FLAT_COMPRESSION = 1, |
7a30a3db DP |
308 | }; |
309 | ||
b8c0dab9 LG |
310 | enum snd_soc_pcm_subclass { |
311 | SND_SOC_PCM_CLASS_PCM = 0, | |
312 | SND_SOC_PCM_CLASS_BE = 1, | |
313 | }; | |
314 | ||
01b9d99a | 315 | enum snd_soc_card_subclass { |
6874a918 LG |
316 | SND_SOC_CARD_CLASS_INIT = 0, |
317 | SND_SOC_CARD_CLASS_RUNTIME = 1, | |
01b9d99a LG |
318 | }; |
319 | ||
ec4ee52a | 320 | int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id, |
da1c6ea6 | 321 | int source, unsigned int freq, int dir); |
ec4ee52a MB |
322 | int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source, |
323 | unsigned int freq_in, unsigned int freq_out); | |
324 | ||
70a7ca34 VK |
325 | int snd_soc_register_card(struct snd_soc_card *card); |
326 | int snd_soc_unregister_card(struct snd_soc_card *card); | |
6f8ab4ac MB |
327 | int snd_soc_suspend(struct device *dev); |
328 | int snd_soc_resume(struct device *dev); | |
329 | int snd_soc_poweroff(struct device *dev); | |
f0fba2ad LG |
330 | int snd_soc_register_platform(struct device *dev, |
331 | struct snd_soc_platform_driver *platform_drv); | |
332 | void snd_soc_unregister_platform(struct device *dev); | |
333 | int snd_soc_register_codec(struct device *dev, | |
001ae4c0 | 334 | const struct snd_soc_codec_driver *codec_drv, |
f0fba2ad LG |
335 | struct snd_soc_dai_driver *dai_drv, int num_dai); |
336 | void snd_soc_unregister_codec(struct device *dev); | |
181e055e MB |
337 | int snd_soc_codec_volatile_register(struct snd_soc_codec *codec, |
338 | unsigned int reg); | |
239c9706 DP |
339 | int snd_soc_codec_readable_register(struct snd_soc_codec *codec, |
340 | unsigned int reg); | |
341 | int snd_soc_codec_writable_register(struct snd_soc_codec *codec, | |
342 | unsigned int reg); | |
17a52fd6 | 343 | int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, |
7084a42b MB |
344 | int addr_bits, int data_bits, |
345 | enum snd_soc_control_type control); | |
7a30a3db DP |
346 | int snd_soc_cache_sync(struct snd_soc_codec *codec); |
347 | int snd_soc_cache_init(struct snd_soc_codec *codec); | |
348 | int snd_soc_cache_exit(struct snd_soc_codec *codec); | |
349 | int snd_soc_cache_write(struct snd_soc_codec *codec, | |
350 | unsigned int reg, unsigned int value); | |
351 | int snd_soc_cache_read(struct snd_soc_codec *codec, | |
352 | unsigned int reg, unsigned int *value); | |
066d16c3 DP |
353 | int snd_soc_default_volatile_register(struct snd_soc_codec *codec, |
354 | unsigned int reg); | |
355 | int snd_soc_default_readable_register(struct snd_soc_codec *codec, | |
356 | unsigned int reg); | |
8020454c DP |
357 | int snd_soc_default_writable_register(struct snd_soc_codec *codec, |
358 | unsigned int reg); | |
f1442bc1 LG |
359 | int snd_soc_platform_read(struct snd_soc_platform *platform, |
360 | unsigned int reg); | |
361 | int snd_soc_platform_write(struct snd_soc_platform *platform, | |
362 | unsigned int reg, unsigned int val); | |
354a2142 | 363 | int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num); |
12a48a8c | 364 | |
47c88fff LG |
365 | struct snd_pcm_substream *snd_soc_get_dai_substream(struct snd_soc_card *card, |
366 | const char *dai_link, int stream); | |
367 | struct snd_soc_pcm_runtime *snd_soc_get_pcm_runtime(struct snd_soc_card *card, | |
368 | const char *dai_link); | |
369 | ||
7aae816d MB |
370 | /* Utility functions to get clock rates from various things */ |
371 | int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots); | |
372 | int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params); | |
c0fa59df | 373 | int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots); |
7aae816d MB |
374 | int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms); |
375 | ||
808db4a4 RP |
376 | /* set runtime hw params */ |
377 | int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, | |
378 | const struct snd_pcm_hardware *hw); | |
808db4a4 | 379 | |
07bf84aa LG |
380 | int snd_soc_platform_trigger(struct snd_pcm_substream *substream, |
381 | int cmd, struct snd_soc_platform *platform); | |
382 | ||
8a2cd618 | 383 | /* Jack reporting */ |
f0fba2ad | 384 | int snd_soc_jack_new(struct snd_soc_codec *codec, const char *id, int type, |
8a2cd618 MB |
385 | struct snd_soc_jack *jack); |
386 | void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask); | |
387 | int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count, | |
388 | struct snd_soc_jack_pin *pins); | |
d5021ec9 MB |
389 | void snd_soc_jack_notifier_register(struct snd_soc_jack *jack, |
390 | struct notifier_block *nb); | |
391 | void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack, | |
392 | struct notifier_block *nb); | |
fa9879ed VK |
393 | int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count, |
394 | struct snd_soc_jack_zone *zones); | |
395 | int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage); | |
ec67624d LCM |
396 | #ifdef CONFIG_GPIOLIB |
397 | int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, | |
398 | struct snd_soc_jack_gpio *gpios); | |
399 | void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, | |
400 | struct snd_soc_jack_gpio *gpios); | |
401 | #endif | |
8a2cd618 | 402 | |
808db4a4 RP |
403 | /* codec register bit access */ |
404 | int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, | |
46f5822f | 405 | unsigned int mask, unsigned int value); |
dd1b3d53 MB |
406 | int snd_soc_update_bits_locked(struct snd_soc_codec *codec, |
407 | unsigned short reg, unsigned int mask, | |
408 | unsigned int value); | |
808db4a4 | 409 | int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, |
46f5822f | 410 | unsigned int mask, unsigned int value); |
808db4a4 RP |
411 | |
412 | int snd_soc_new_ac97_codec(struct snd_soc_codec *codec, | |
413 | struct snd_ac97_bus_ops *ops, int num); | |
414 | void snd_soc_free_ac97_codec(struct snd_soc_codec *codec); | |
415 | ||
416 | /* | |
417 | *Controls | |
418 | */ | |
419 | struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template, | |
3056557f | 420 | void *data, const char *long_name, |
efb7ac3f | 421 | const char *prefix); |
022658be | 422 | int snd_soc_add_codec_controls(struct snd_soc_codec *codec, |
3e8e1952 | 423 | const struct snd_kcontrol_new *controls, int num_controls); |
a491a5c8 LG |
424 | int snd_soc_add_platform_controls(struct snd_soc_platform *platform, |
425 | const struct snd_kcontrol_new *controls, int num_controls); | |
022658be LG |
426 | int snd_soc_add_card_controls(struct snd_soc_card *soc_card, |
427 | const struct snd_kcontrol_new *controls, int num_controls); | |
428 | int snd_soc_add_dai_controls(struct snd_soc_dai *dai, | |
429 | const struct snd_kcontrol_new *controls, int num_controls); | |
808db4a4 RP |
430 | int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol, |
431 | struct snd_ctl_elem_info *uinfo); | |
432 | int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol, | |
433 | struct snd_ctl_elem_info *uinfo); | |
434 | int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol, | |
435 | struct snd_ctl_elem_value *ucontrol); | |
436 | int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol, | |
437 | struct snd_ctl_elem_value *ucontrol); | |
2e72f8e3 PU |
438 | int snd_soc_get_value_enum_double(struct snd_kcontrol *kcontrol, |
439 | struct snd_ctl_elem_value *ucontrol); | |
440 | int snd_soc_put_value_enum_double(struct snd_kcontrol *kcontrol, | |
441 | struct snd_ctl_elem_value *ucontrol); | |
808db4a4 RP |
442 | int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, |
443 | struct snd_ctl_elem_info *uinfo); | |
444 | int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol, | |
445 | struct snd_ctl_elem_info *uinfo); | |
392abe9c | 446 | #define snd_soc_info_bool_ext snd_ctl_boolean_mono_info |
808db4a4 RP |
447 | int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, |
448 | struct snd_ctl_elem_value *ucontrol); | |
449 | int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, | |
450 | struct snd_ctl_elem_value *ucontrol); | |
a92f1394 PU |
451 | #define snd_soc_get_volsw_2r snd_soc_get_volsw |
452 | #define snd_soc_put_volsw_2r snd_soc_put_volsw | |
1d99f243 BA |
453 | int snd_soc_get_volsw_sx(struct snd_kcontrol *kcontrol, |
454 | struct snd_ctl_elem_value *ucontrol); | |
455 | int snd_soc_put_volsw_sx(struct snd_kcontrol *kcontrol, | |
456 | struct snd_ctl_elem_value *ucontrol); | |
e13ac2e9 MB |
457 | int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol, |
458 | struct snd_ctl_elem_info *uinfo); | |
459 | int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol, | |
460 | struct snd_ctl_elem_value *ucontrol); | |
461 | int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol, | |
462 | struct snd_ctl_elem_value *ucontrol); | |
637d3847 PU |
463 | int snd_soc_limit_volume(struct snd_soc_codec *codec, |
464 | const char *name, int max); | |
71d08516 MB |
465 | int snd_soc_bytes_info(struct snd_kcontrol *kcontrol, |
466 | struct snd_ctl_elem_info *uinfo); | |
467 | int snd_soc_bytes_get(struct snd_kcontrol *kcontrol, | |
468 | struct snd_ctl_elem_value *ucontrol); | |
469 | int snd_soc_bytes_put(struct snd_kcontrol *kcontrol, | |
470 | struct snd_ctl_elem_value *ucontrol); | |
4183eed2 KK |
471 | int snd_soc_info_xr_sx(struct snd_kcontrol *kcontrol, |
472 | struct snd_ctl_elem_info *uinfo); | |
473 | int snd_soc_get_xr_sx(struct snd_kcontrol *kcontrol, | |
474 | struct snd_ctl_elem_value *ucontrol); | |
475 | int snd_soc_put_xr_sx(struct snd_kcontrol *kcontrol, | |
476 | struct snd_ctl_elem_value *ucontrol); | |
dd7b10b3 KK |
477 | int snd_soc_get_strobe(struct snd_kcontrol *kcontrol, |
478 | struct snd_ctl_elem_value *ucontrol); | |
479 | int snd_soc_put_strobe(struct snd_kcontrol *kcontrol, | |
480 | struct snd_ctl_elem_value *ucontrol); | |
808db4a4 | 481 | |
066d16c3 DP |
482 | /** |
483 | * struct snd_soc_reg_access - Describes whether a given register is | |
484 | * readable, writable or volatile. | |
485 | * | |
486 | * @reg: the register number | |
487 | * @read: whether this register is readable | |
488 | * @write: whether this register is writable | |
489 | * @vol: whether this register is volatile | |
490 | */ | |
491 | struct snd_soc_reg_access { | |
492 | u16 reg; | |
493 | u16 read; | |
494 | u16 write; | |
495 | u16 vol; | |
496 | }; | |
497 | ||
8a2cd618 MB |
498 | /** |
499 | * struct snd_soc_jack_pin - Describes a pin to update based on jack detection | |
500 | * | |
501 | * @pin: name of the pin to update | |
502 | * @mask: bits to check for in reported jack status | |
503 | * @invert: if non-zero then pin is enabled when status is not reported | |
504 | */ | |
505 | struct snd_soc_jack_pin { | |
506 | struct list_head list; | |
507 | const char *pin; | |
508 | int mask; | |
509 | bool invert; | |
510 | }; | |
511 | ||
fa9879ed VK |
512 | /** |
513 | * struct snd_soc_jack_zone - Describes voltage zones of jack detection | |
514 | * | |
515 | * @min_mv: start voltage in mv | |
516 | * @max_mv: end voltage in mv | |
517 | * @jack_type: type of jack that is expected for this voltage | |
518 | * @debounce_time: debounce_time for jack, codec driver should wait for this | |
519 | * duration before reading the adc for voltages | |
520 | * @:list: list container | |
521 | */ | |
522 | struct snd_soc_jack_zone { | |
523 | unsigned int min_mv; | |
524 | unsigned int max_mv; | |
525 | unsigned int jack_type; | |
526 | unsigned int debounce_time; | |
527 | struct list_head list; | |
528 | }; | |
529 | ||
ec67624d LCM |
530 | /** |
531 | * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection | |
532 | * | |
533 | * @gpio: gpio number | |
534 | * @name: gpio name | |
535 | * @report: value to report when jack detected | |
536 | * @invert: report presence in low state | |
537 | * @debouce_time: debouce time in ms | |
7887ab3a | 538 | * @wake: enable as wake source |
fadddc87 MB |
539 | * @jack_status_check: callback function which overrides the detection |
540 | * to provide more complex checks (eg, reading an | |
541 | * ADC). | |
ec67624d LCM |
542 | */ |
543 | #ifdef CONFIG_GPIOLIB | |
544 | struct snd_soc_jack_gpio { | |
545 | unsigned int gpio; | |
546 | const char *name; | |
547 | int report; | |
548 | int invert; | |
549 | int debounce_time; | |
7887ab3a MB |
550 | bool wake; |
551 | ||
ec67624d | 552 | struct snd_soc_jack *jack; |
4c14d78e | 553 | struct delayed_work work; |
c871a053 JS |
554 | |
555 | int (*jack_status_check)(void); | |
ec67624d LCM |
556 | }; |
557 | #endif | |
558 | ||
8a2cd618 | 559 | struct snd_soc_jack { |
2667b4b8 | 560 | struct mutex mutex; |
8a2cd618 | 561 | struct snd_jack *jack; |
f0fba2ad | 562 | struct snd_soc_codec *codec; |
8a2cd618 MB |
563 | struct list_head pins; |
564 | int status; | |
d5021ec9 | 565 | struct blocking_notifier_head notifier; |
fa9879ed | 566 | struct list_head jack_zones; |
8a2cd618 MB |
567 | }; |
568 | ||
808db4a4 RP |
569 | /* SoC PCM stream information */ |
570 | struct snd_soc_pcm_stream { | |
f0fba2ad | 571 | const char *stream_name; |
1c433fbd GG |
572 | u64 formats; /* SNDRV_PCM_FMTBIT_* */ |
573 | unsigned int rates; /* SNDRV_PCM_RATE_* */ | |
808db4a4 RP |
574 | unsigned int rate_min; /* min rate */ |
575 | unsigned int rate_max; /* max rate */ | |
576 | unsigned int channels_min; /* min channels */ | |
577 | unsigned int channels_max; /* max channels */ | |
58ba9b25 | 578 | unsigned int sig_bits; /* number of bits of content */ |
808db4a4 RP |
579 | }; |
580 | ||
581 | /* SoC audio ops */ | |
582 | struct snd_soc_ops { | |
583 | int (*startup)(struct snd_pcm_substream *); | |
584 | void (*shutdown)(struct snd_pcm_substream *); | |
585 | int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *); | |
586 | int (*hw_free)(struct snd_pcm_substream *); | |
587 | int (*prepare)(struct snd_pcm_substream *); | |
588 | int (*trigger)(struct snd_pcm_substream *, int); | |
589 | }; | |
590 | ||
7a30a3db DP |
591 | /* SoC cache ops */ |
592 | struct snd_soc_cache_ops { | |
0d735eaa | 593 | const char *name; |
7a30a3db DP |
594 | enum snd_soc_compress_type id; |
595 | int (*init)(struct snd_soc_codec *codec); | |
596 | int (*exit)(struct snd_soc_codec *codec); | |
597 | int (*read)(struct snd_soc_codec *codec, unsigned int reg, | |
598 | unsigned int *value); | |
599 | int (*write)(struct snd_soc_codec *codec, unsigned int reg, | |
600 | unsigned int value); | |
601 | int (*sync)(struct snd_soc_codec *codec); | |
602 | }; | |
603 | ||
f0fba2ad | 604 | /* SoC Audio Codec device */ |
808db4a4 | 605 | struct snd_soc_codec { |
f0fba2ad | 606 | const char *name; |
ead9b919 | 607 | const char *name_prefix; |
f0fba2ad | 608 | int id; |
0d0cf00a | 609 | struct device *dev; |
001ae4c0 | 610 | const struct snd_soc_codec_driver *driver; |
0d0cf00a | 611 | |
f0fba2ad LG |
612 | struct mutex mutex; |
613 | struct snd_soc_card *card; | |
0d0cf00a | 614 | struct list_head list; |
f0fba2ad LG |
615 | struct list_head card_list; |
616 | int num_dai; | |
23bbce34 | 617 | enum snd_soc_compress_type compress_type; |
aea170a0 | 618 | size_t reg_size; /* reg_cache_size * reg_word_size */ |
1500b7b5 DP |
619 | int (*volatile_register)(struct snd_soc_codec *, unsigned int); |
620 | int (*readable_register)(struct snd_soc_codec *, unsigned int); | |
8020454c | 621 | int (*writable_register)(struct snd_soc_codec *, unsigned int); |
808db4a4 RP |
622 | |
623 | /* runtime */ | |
808db4a4 RP |
624 | struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */ |
625 | unsigned int active; | |
dad8e7ae | 626 | unsigned int cache_bypass:1; /* Suppress access to the cache */ |
f0fba2ad LG |
627 | unsigned int suspended:1; /* Codec is in suspend PM state */ |
628 | unsigned int probed:1; /* Codec has been probed */ | |
629 | unsigned int ac97_registered:1; /* Codec has been AC97 registered */ | |
0562f788 | 630 | unsigned int ac97_created:1; /* Codec has been created by SoC */ |
f0fba2ad | 631 | unsigned int sysfs_registered:1; /* codec has been sysfs registered */ |
fdf0f54d | 632 | unsigned int cache_init:1; /* codec cache has been initialized */ |
8a713da8 | 633 | unsigned int using_regmap:1; /* using regmap access */ |
aaee8ef1 MB |
634 | u32 cache_only; /* Suppress writes to hardware */ |
635 | u32 cache_sync; /* Cache needs to be synced to hardware */ | |
808db4a4 RP |
636 | |
637 | /* codec IO */ | |
638 | void *control_data; /* codec control (i2c/3wire) data */ | |
67850a89 | 639 | enum snd_soc_control_type control_type; |
808db4a4 | 640 | hw_write_t hw_write; |
afa2f106 | 641 | unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int); |
c3acec26 MB |
642 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); |
643 | int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); | |
5fb609d4 | 644 | int (*bulk_write_raw)(struct snd_soc_codec *, unsigned int, const void *, size_t); |
808db4a4 | 645 | void *reg_cache; |
3335ddca | 646 | const void *reg_def_copy; |
7a30a3db DP |
647 | const struct snd_soc_cache_ops *cache_ops; |
648 | struct mutex cache_rw_mutex; | |
be3ea3b9 | 649 | int val_bytes; |
a96ca338 | 650 | |
808db4a4 | 651 | /* dapm */ |
ce6120cc | 652 | struct snd_soc_dapm_context dapm; |
1d69c5c5 | 653 | unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */ |
808db4a4 | 654 | |
384c89e2 | 655 | #ifdef CONFIG_DEBUG_FS |
88439ac7 | 656 | struct dentry *debugfs_codec_root; |
384c89e2 | 657 | struct dentry *debugfs_reg; |
79fb9387 | 658 | struct dentry *debugfs_dapm; |
384c89e2 | 659 | #endif |
808db4a4 RP |
660 | }; |
661 | ||
f0fba2ad LG |
662 | /* codec driver */ |
663 | struct snd_soc_codec_driver { | |
664 | ||
665 | /* driver ops */ | |
666 | int (*probe)(struct snd_soc_codec *); | |
667 | int (*remove)(struct snd_soc_codec *); | |
84b315ee | 668 | int (*suspend)(struct snd_soc_codec *); |
f0fba2ad LG |
669 | int (*resume)(struct snd_soc_codec *); |
670 | ||
b7af1daf MB |
671 | /* Default control and setup, added after probe() is run */ |
672 | const struct snd_kcontrol_new *controls; | |
673 | int num_controls; | |
89b95ac0 MB |
674 | const struct snd_soc_dapm_widget *dapm_widgets; |
675 | int num_dapm_widgets; | |
676 | const struct snd_soc_dapm_route *dapm_routes; | |
677 | int num_dapm_routes; | |
678 | ||
ec4ee52a MB |
679 | /* codec wide operations */ |
680 | int (*set_sysclk)(struct snd_soc_codec *codec, | |
da1c6ea6 | 681 | int clk_id, int source, unsigned int freq, int dir); |
ec4ee52a MB |
682 | int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source, |
683 | unsigned int freq_in, unsigned int freq_out); | |
684 | ||
f0fba2ad LG |
685 | /* codec IO */ |
686 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); | |
687 | int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); | |
688 | int (*display_register)(struct snd_soc_codec *, char *, | |
689 | size_t, unsigned int); | |
d4754ec9 DP |
690 | int (*volatile_register)(struct snd_soc_codec *, unsigned int); |
691 | int (*readable_register)(struct snd_soc_codec *, unsigned int); | |
8020454c | 692 | int (*writable_register)(struct snd_soc_codec *, unsigned int); |
4a8923ba | 693 | unsigned int reg_cache_size; |
f0fba2ad LG |
694 | short reg_cache_step; |
695 | short reg_word_size; | |
696 | const void *reg_cache_default; | |
066d16c3 DP |
697 | short reg_access_size; |
698 | const struct snd_soc_reg_access *reg_access_default; | |
7a30a3db | 699 | enum snd_soc_compress_type compress_type; |
f0fba2ad LG |
700 | |
701 | /* codec bias level */ | |
702 | int (*set_bias_level)(struct snd_soc_codec *, | |
703 | enum snd_soc_bias_level level); | |
33c5f969 | 704 | bool idle_bias_off; |
474b62d6 MB |
705 | |
706 | void (*seq_notifier)(struct snd_soc_dapm_context *, | |
f85a9e0d | 707 | enum snd_soc_dapm_type, int); |
0168bf0d | 708 | |
64a648c2 LG |
709 | /* codec stream completion event */ |
710 | int (*stream_event)(struct snd_soc_dapm_context *dapm, int event); | |
711 | ||
5124e69e MB |
712 | bool ignore_pmdown_time; /* Doesn't benefit from pmdown delay */ |
713 | ||
0168bf0d LG |
714 | /* probe ordering - for components with runtime dependencies */ |
715 | int probe_order; | |
716 | int remove_order; | |
808db4a4 RP |
717 | }; |
718 | ||
719 | /* SoC platform interface */ | |
f0fba2ad | 720 | struct snd_soc_platform_driver { |
808db4a4 | 721 | |
f0fba2ad LG |
722 | int (*probe)(struct snd_soc_platform *); |
723 | int (*remove)(struct snd_soc_platform *); | |
724 | int (*suspend)(struct snd_soc_dai *dai); | |
725 | int (*resume)(struct snd_soc_dai *dai); | |
808db4a4 RP |
726 | |
727 | /* pcm creation and destruction */ | |
552d1ef6 | 728 | int (*pcm_new)(struct snd_soc_pcm_runtime *); |
808db4a4 RP |
729 | void (*pcm_free)(struct snd_pcm *); |
730 | ||
cb2cf612 LG |
731 | /* Default control and setup, added after probe() is run */ |
732 | const struct snd_kcontrol_new *controls; | |
733 | int num_controls; | |
734 | const struct snd_soc_dapm_widget *dapm_widgets; | |
735 | int num_dapm_widgets; | |
736 | const struct snd_soc_dapm_route *dapm_routes; | |
737 | int num_dapm_routes; | |
738 | ||
258020d0 PU |
739 | /* |
740 | * For platform caused delay reporting. | |
741 | * Optional. | |
742 | */ | |
743 | snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *, | |
744 | struct snd_soc_dai *); | |
745 | ||
808db4a4 | 746 | /* platform stream ops */ |
f0fba2ad | 747 | struct snd_pcm_ops *ops; |
0168bf0d | 748 | |
64a648c2 LG |
749 | /* platform stream completion event */ |
750 | int (*stream_event)(struct snd_soc_dapm_context *dapm, int event); | |
751 | ||
0168bf0d LG |
752 | /* probe ordering - for components with runtime dependencies */ |
753 | int probe_order; | |
754 | int remove_order; | |
f1442bc1 LG |
755 | |
756 | /* platform IO - used for platform DAPM */ | |
757 | unsigned int (*read)(struct snd_soc_platform *, unsigned int); | |
758 | int (*write)(struct snd_soc_platform *, unsigned int, unsigned int); | |
07bf84aa | 759 | int (*bespoke_trigger)(struct snd_pcm_substream *, int); |
808db4a4 RP |
760 | }; |
761 | ||
f0fba2ad LG |
762 | struct snd_soc_platform { |
763 | const char *name; | |
764 | int id; | |
765 | struct device *dev; | |
766 | struct snd_soc_platform_driver *driver; | |
cc22d37e | 767 | struct mutex mutex; |
808db4a4 | 768 | |
f0fba2ad LG |
769 | unsigned int suspended:1; /* platform is suspended */ |
770 | unsigned int probed:1; | |
1c433fbd | 771 | |
f0fba2ad LG |
772 | struct snd_soc_card *card; |
773 | struct list_head list; | |
774 | struct list_head card_list; | |
b7950641 LG |
775 | |
776 | struct snd_soc_dapm_context dapm; | |
731f1ab2 SG |
777 | |
778 | #ifdef CONFIG_DEBUG_FS | |
779 | struct dentry *debugfs_platform_root; | |
780 | struct dentry *debugfs_dapm; | |
781 | #endif | |
f0fba2ad | 782 | }; |
808db4a4 | 783 | |
f0fba2ad LG |
784 | struct snd_soc_dai_link { |
785 | /* config - must be set by machine driver */ | |
786 | const char *name; /* Codec name */ | |
787 | const char *stream_name; /* Stream name */ | |
788 | const char *codec_name; /* for multi-codec */ | |
5a504963 | 789 | const struct device_node *codec_of_node; |
f0fba2ad | 790 | const char *platform_name; /* for multi-platform */ |
5a504963 | 791 | const struct device_node *platform_of_node; |
f0fba2ad | 792 | const char *cpu_dai_name; |
5a504963 | 793 | const struct device_node *cpu_dai_of_node; |
f0fba2ad | 794 | const char *codec_dai_name; |
01d7584c | 795 | int be_id; /* optional ID for machine driver BE identification */ |
4ccab3e7 | 796 | |
c74184ed MB |
797 | const struct snd_soc_pcm_stream *params; |
798 | ||
75d9ac46 MB |
799 | unsigned int dai_fmt; /* format to set on init */ |
800 | ||
01d7584c LG |
801 | enum snd_soc_dpcm_trigger trigger[2]; /* trigger type for DPCM */ |
802 | ||
3efab7dc MB |
803 | /* Keep DAI active over suspend */ |
804 | unsigned int ignore_suspend:1; | |
805 | ||
06f409d7 MB |
806 | /* Symmetry requirements */ |
807 | unsigned int symmetric_rates:1; | |
808 | ||
01d7584c LG |
809 | /* Do not create a PCM for this DAI link (Backend link) */ |
810 | unsigned int no_pcm:1; | |
811 | ||
812 | /* This DAI link can route to other DAI links at runtime (Frontend)*/ | |
813 | unsigned int dynamic:1; | |
814 | ||
e50fad4f | 815 | /* pmdown_time is ignored at stop */ |
816 | unsigned int ignore_pmdown_time:1; | |
817 | ||
f0fba2ad LG |
818 | /* codec/machine specific init - e.g. add machine controls */ |
819 | int (*init)(struct snd_soc_pcm_runtime *rtd); | |
06f409d7 | 820 | |
01d7584c LG |
821 | /* optional hw_params re-writing for BE and FE sync */ |
822 | int (*be_hw_params_fixup)(struct snd_soc_pcm_runtime *rtd, | |
823 | struct snd_pcm_hw_params *params); | |
824 | ||
f0fba2ad LG |
825 | /* machine stream operations */ |
826 | struct snd_soc_ops *ops; | |
808db4a4 RP |
827 | }; |
828 | ||
ff819b83 | 829 | struct snd_soc_codec_conf { |
ead9b919 | 830 | const char *dev_name; |
ff819b83 DP |
831 | |
832 | /* | |
833 | * optional map of kcontrol, widget and path name prefixes that are | |
834 | * associated per device | |
835 | */ | |
ead9b919 | 836 | const char *name_prefix; |
ff819b83 DP |
837 | |
838 | /* | |
839 | * set this to the desired compression type if you want to | |
840 | * override the one supplied in codec->driver->compress_type | |
841 | */ | |
842 | enum snd_soc_compress_type compress_type; | |
ead9b919 JN |
843 | }; |
844 | ||
2eea392d JN |
845 | struct snd_soc_aux_dev { |
846 | const char *name; /* Codec name */ | |
847 | const char *codec_name; /* for multi-codec */ | |
848 | ||
849 | /* codec/machine specific init - e.g. add machine controls */ | |
850 | int (*init)(struct snd_soc_dapm_context *dapm); | |
851 | }; | |
852 | ||
87506549 MB |
853 | /* SoC card */ |
854 | struct snd_soc_card { | |
f0fba2ad | 855 | const char *name; |
22de71ba LG |
856 | const char *long_name; |
857 | const char *driver_name; | |
c5af3a2e | 858 | struct device *dev; |
f0fba2ad LG |
859 | struct snd_card *snd_card; |
860 | struct module *owner; | |
c5af3a2e MB |
861 | |
862 | struct list_head list; | |
f0fba2ad | 863 | struct mutex mutex; |
a73fb2df | 864 | struct mutex dapm_mutex; |
c5af3a2e | 865 | |
f0fba2ad | 866 | bool instantiated; |
808db4a4 | 867 | |
e7361ec4 | 868 | int (*probe)(struct snd_soc_card *card); |
28e9ad92 | 869 | int (*late_probe)(struct snd_soc_card *card); |
e7361ec4 | 870 | int (*remove)(struct snd_soc_card *card); |
808db4a4 RP |
871 | |
872 | /* the pre and post PM functions are used to do any PM work before and | |
873 | * after the codec and DAI's do any PM work. */ | |
70b2ac12 MB |
874 | int (*suspend_pre)(struct snd_soc_card *card); |
875 | int (*suspend_post)(struct snd_soc_card *card); | |
876 | int (*resume_pre)(struct snd_soc_card *card); | |
877 | int (*resume_post)(struct snd_soc_card *card); | |
808db4a4 | 878 | |
0b4d221b | 879 | /* callbacks */ |
87506549 | 880 | int (*set_bias_level)(struct snd_soc_card *, |
d4c6005f | 881 | struct snd_soc_dapm_context *dapm, |
0be9898a | 882 | enum snd_soc_bias_level level); |
1badabd9 | 883 | int (*set_bias_level_post)(struct snd_soc_card *, |
d4c6005f | 884 | struct snd_soc_dapm_context *dapm, |
1badabd9 | 885 | enum snd_soc_bias_level level); |
0b4d221b | 886 | |
6c5f1fed | 887 | long pmdown_time; |
96dd3622 | 888 | |
808db4a4 RP |
889 | /* CPU <--> Codec DAI links */ |
890 | struct snd_soc_dai_link *dai_link; | |
891 | int num_links; | |
f0fba2ad LG |
892 | struct snd_soc_pcm_runtime *rtd; |
893 | int num_rtd; | |
6308419a | 894 | |
ff819b83 DP |
895 | /* optional codec specific configuration */ |
896 | struct snd_soc_codec_conf *codec_conf; | |
897 | int num_configs; | |
ead9b919 | 898 | |
2eea392d JN |
899 | /* |
900 | * optional auxiliary devices such as amplifiers or codecs with DAI | |
901 | * link unused | |
902 | */ | |
903 | struct snd_soc_aux_dev *aux_dev; | |
904 | int num_aux_devs; | |
905 | struct snd_soc_pcm_runtime *rtd_aux; | |
906 | int num_aux_rtd; | |
907 | ||
b7af1daf MB |
908 | const struct snd_kcontrol_new *controls; |
909 | int num_controls; | |
910 | ||
b8ad29de MB |
911 | /* |
912 | * Card-specific routes and widgets. | |
913 | */ | |
d06e48db | 914 | const struct snd_soc_dapm_widget *dapm_widgets; |
b8ad29de | 915 | int num_dapm_widgets; |
d06e48db | 916 | const struct snd_soc_dapm_route *dapm_routes; |
b8ad29de | 917 | int num_dapm_routes; |
1633281b | 918 | bool fully_routed; |
b8ad29de | 919 | |
6308419a | 920 | struct work_struct deferred_resume_work; |
f0fba2ad LG |
921 | |
922 | /* lists of probed devices belonging to this card */ | |
923 | struct list_head codec_dev_list; | |
924 | struct list_head platform_dev_list; | |
925 | struct list_head dai_dev_list; | |
a6052154 | 926 | |
97c866de | 927 | struct list_head widgets; |
8ddab3f5 | 928 | struct list_head paths; |
7be31be8 | 929 | struct list_head dapm_list; |
db432b41 | 930 | struct list_head dapm_dirty; |
8ddab3f5 | 931 | |
e37a4970 MB |
932 | /* Generic DAPM context for the card */ |
933 | struct snd_soc_dapm_context dapm; | |
de02d078 | 934 | struct snd_soc_dapm_stats dapm_stats; |
e37a4970 | 935 | |
a6052154 JN |
936 | #ifdef CONFIG_DEBUG_FS |
937 | struct dentry *debugfs_card_root; | |
3a45b867 | 938 | struct dentry *debugfs_pop_time; |
a6052154 | 939 | #endif |
3a45b867 | 940 | u32 pop_time; |
dddf3e4c MB |
941 | |
942 | void *drvdata; | |
808db4a4 RP |
943 | }; |
944 | ||
f0fba2ad | 945 | /* SoC machine DAI configuration, glues a codec and cpu DAI together */ |
d66a327d | 946 | struct snd_soc_pcm_runtime { |
36ae1a96 | 947 | struct device *dev; |
87506549 | 948 | struct snd_soc_card *card; |
f0fba2ad | 949 | struct snd_soc_dai_link *dai_link; |
b8c0dab9 LG |
950 | struct mutex pcm_mutex; |
951 | enum snd_soc_pcm_subclass pcm_subclass; | |
952 | struct snd_pcm_ops ops; | |
f0fba2ad | 953 | |
f0fba2ad | 954 | unsigned int dev_registered:1; |
808db4a4 | 955 | |
01d7584c LG |
956 | /* Dynamic PCM BE runtime data */ |
957 | struct snd_soc_dpcm_runtime dpcm[2]; | |
958 | ||
f0fba2ad LG |
959 | long pmdown_time; |
960 | ||
961 | /* runtime devices */ | |
962 | struct snd_pcm *pcm; | |
963 | struct snd_soc_codec *codec; | |
964 | struct snd_soc_platform *platform; | |
965 | struct snd_soc_dai *codec_dai; | |
966 | struct snd_soc_dai *cpu_dai; | |
967 | ||
968 | struct delayed_work delayed_work; | |
f86dcef8 LG |
969 | #ifdef CONFIG_DEBUG_FS |
970 | struct dentry *debugfs_dpcm_root; | |
971 | struct dentry *debugfs_dpcm_state; | |
972 | #endif | |
808db4a4 RP |
973 | }; |
974 | ||
4eaa9819 JS |
975 | /* mixer control */ |
976 | struct soc_mixer_control { | |
d11bb4a9 | 977 | int min, max, platform_max; |
815ecf8d | 978 | unsigned int reg, rreg, shift, rshift, invert; |
4eaa9819 JS |
979 | }; |
980 | ||
71d08516 MB |
981 | struct soc_bytes { |
982 | int base; | |
983 | int num_regs; | |
f831b055 | 984 | u32 mask; |
71d08516 MB |
985 | }; |
986 | ||
4183eed2 KK |
987 | /* multi register control */ |
988 | struct soc_mreg_control { | |
989 | long min, max; | |
990 | unsigned int regbase, regcount, nbits, invert; | |
991 | }; | |
992 | ||
808db4a4 RP |
993 | /* enumerated kcontrol */ |
994 | struct soc_enum { | |
2e72f8e3 PU |
995 | unsigned short reg; |
996 | unsigned short reg2; | |
997 | unsigned char shift_l; | |
998 | unsigned char shift_r; | |
999 | unsigned int max; | |
1000 | unsigned int mask; | |
87023ff7 | 1001 | const char * const *texts; |
2e72f8e3 PU |
1002 | const unsigned int *values; |
1003 | void *dapm; | |
1004 | }; | |
1005 | ||
5c82f567 | 1006 | /* codec IO */ |
c3753707 MB |
1007 | unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg); |
1008 | unsigned int snd_soc_write(struct snd_soc_codec *codec, | |
1009 | unsigned int reg, unsigned int val); | |
5fb609d4 DP |
1010 | unsigned int snd_soc_bulk_write_raw(struct snd_soc_codec *codec, |
1011 | unsigned int reg, const void *data, size_t len); | |
5c82f567 | 1012 | |
f0fba2ad LG |
1013 | /* device driver data */ |
1014 | ||
dddf3e4c MB |
1015 | static inline void snd_soc_card_set_drvdata(struct snd_soc_card *card, |
1016 | void *data) | |
1017 | { | |
1018 | card->drvdata = data; | |
1019 | } | |
1020 | ||
1021 | static inline void *snd_soc_card_get_drvdata(struct snd_soc_card *card) | |
1022 | { | |
1023 | return card->drvdata; | |
1024 | } | |
1025 | ||
b2c812e2 | 1026 | static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec, |
f0fba2ad | 1027 | void *data) |
b2c812e2 | 1028 | { |
f0fba2ad | 1029 | dev_set_drvdata(codec->dev, data); |
b2c812e2 MB |
1030 | } |
1031 | ||
1032 | static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec) | |
1033 | { | |
f0fba2ad LG |
1034 | return dev_get_drvdata(codec->dev); |
1035 | } | |
1036 | ||
1037 | static inline void snd_soc_platform_set_drvdata(struct snd_soc_platform *platform, | |
1038 | void *data) | |
1039 | { | |
1040 | dev_set_drvdata(platform->dev, data); | |
1041 | } | |
1042 | ||
1043 | static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platform) | |
1044 | { | |
1045 | return dev_get_drvdata(platform->dev); | |
1046 | } | |
1047 | ||
1048 | static inline void snd_soc_pcm_set_drvdata(struct snd_soc_pcm_runtime *rtd, | |
1049 | void *data) | |
1050 | { | |
36ae1a96 | 1051 | dev_set_drvdata(rtd->dev, data); |
f0fba2ad LG |
1052 | } |
1053 | ||
1054 | static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd) | |
1055 | { | |
36ae1a96 | 1056 | return dev_get_drvdata(rtd->dev); |
b2c812e2 MB |
1057 | } |
1058 | ||
4e10bda0 VK |
1059 | static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card) |
1060 | { | |
1061 | INIT_LIST_HEAD(&card->dai_dev_list); | |
1062 | INIT_LIST_HEAD(&card->codec_dev_list); | |
1063 | INIT_LIST_HEAD(&card->platform_dev_list); | |
1064 | INIT_LIST_HEAD(&card->widgets); | |
1065 | INIT_LIST_HEAD(&card->paths); | |
1066 | INIT_LIST_HEAD(&card->dapm_list); | |
1067 | } | |
1068 | ||
30d86ba4 PU |
1069 | static inline bool snd_soc_volsw_is_stereo(struct soc_mixer_control *mc) |
1070 | { | |
1071 | if (mc->reg == mc->rreg && mc->shift == mc->rshift) | |
1072 | return 0; | |
1073 | /* | |
1074 | * mc->reg == mc->rreg && mc->shift != mc->rshift, or | |
1075 | * mc->reg != mc->rreg means that the control is | |
1076 | * stereo (bits in one register or in two registers) | |
1077 | */ | |
1078 | return 1; | |
1079 | } | |
1080 | ||
fb257897 MB |
1081 | int snd_soc_util_init(void); |
1082 | void snd_soc_util_exit(void); | |
1083 | ||
bec4fa05 SW |
1084 | int snd_soc_of_parse_card_name(struct snd_soc_card *card, |
1085 | const char *propname); | |
a4a54dd5 SW |
1086 | int snd_soc_of_parse_audio_routing(struct snd_soc_card *card, |
1087 | const char *propname); | |
bec4fa05 | 1088 | |
a47cbe72 MB |
1089 | #include <sound/soc-dai.h> |
1090 | ||
faff4bb0 | 1091 | #ifdef CONFIG_DEBUG_FS |
8a9dab1a | 1092 | extern struct dentry *snd_soc_debugfs_root; |
faff4bb0 SW |
1093 | #endif |
1094 | ||
6f8ab4ac MB |
1095 | extern const struct dev_pm_ops snd_soc_pm_ops; |
1096 | ||
808db4a4 | 1097 | #endif |