projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| ea95450e GL |
1 | /* |
| 2 | * Defines for Mobile Industry Processor Interface (MIPI(R)) | |
| 3 | * Display Working Group standards: DSI, DCS, DBI, DPI | |
| 4 | * | |
| 5 | * Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> | |
| 6 | * Copyright (C) 2006 Nokia Corporation | |
| 7 | * Author: Imre Deak <imre.deak@nokia.com> | |
| 8 | * | |
| 9 | * This program is free software; you can redistribute it and/or modify | |
| 10 | * it under the terms of the GNU General Public License version 2 as | |
| 11 | * published by the Free Software Foundation. | |
| 12 | */ | |
| 13 | #ifndef MIPI_DISPLAY_H | |
| 14 | #define MIPI_DISPLAY_H | |
| 15 | ||
| 16 | /* MIPI DSI Processor-to-Peripheral transaction types */ | |
| 17 | enum { | |
| 18 | MIPI_DSI_V_SYNC_START = 0x01, | |
| 19 | MIPI_DSI_V_SYNC_END = 0x11, | |
| 20 | MIPI_DSI_H_SYNC_START = 0x21, | |
| 21 | MIPI_DSI_H_SYNC_END = 0x31, | |
| 22 | ||
| 23 | MIPI_DSI_COLOR_MODE_OFF = 0x02, | |
| 24 | MIPI_DSI_COLOR_MODE_ON = 0x12, | |
| 25 | MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22, | |
| 26 | MIPI_DSI_TURN_ON_PERIPHERAL = 0x32, | |
| 27 | ||
| 28 | MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03, | |
| 29 | MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13, | |
| 30 | MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23, | |
| 31 | ||
| 32 | MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04, | |
| 33 | MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14, | |
| 34 | MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24, | |
| 35 | ||
| 36 | MIPI_DSI_DCS_SHORT_WRITE = 0x05, | |
| 37 | MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, | |
| 38 | ||
| 39 | MIPI_DSI_DCS_READ = 0x06, | |
| 40 | ||
| 41 | MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37, | |
| 42 | ||
| 43 | MIPI_DSI_END_OF_TRANSMISSION = 0x08, | |
| 44 | ||
| 45 | MIPI_DSI_NULL_PACKET = 0x09, | |
| 46 | MIPI_DSI_BLANKING_PACKET = 0x19, | |
| 47 | MIPI_DSI_GENERIC_LONG_WRITE = 0x29, | |
| 48 | MIPI_DSI_DCS_LONG_WRITE = 0x39, | |
| 49 | ||
| 50 | MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c, | |
| 51 | MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c, | |
| 52 | MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c, | |
| 53 | ||
| 54 | MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d, | |
| 55 | MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d, | |
| 56 | MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d, | |
| 57 | ||
| 58 | MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e, | |
| 59 | MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e, | |
| 60 | MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e, | |
| 61 | MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e, | |
| 62 | }; | |
| 63 | ||
| 64 | /* MIPI DSI Peripheral-to-Processor transaction types */ | |
| 65 | enum { | |
| 66 | MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT = 0x02, | |
| 67 | MIPI_DSI_RX_END_OF_TRANSMISSION = 0x08, | |
| 68 | MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE = 0x11, | |
| 69 | MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE = 0x12, | |
| 70 | MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE = 0x1a, | |
| 71 | MIPI_DSI_RX_DCS_LONG_READ_RESPONSE = 0x1c, | |
| 72 | MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE = 0x21, | |
| 73 | MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE = 0x22, | |
| 74 | }; | |
| 75 | ||
| 76 | /* MIPI DCS commands */ | |
| 77 | enum { | |
| 78 | MIPI_DCS_NOP = 0x00, | |
| 79 | MIPI_DCS_SOFT_RESET = 0x01, | |
| 80 | MIPI_DCS_GET_DISPLAY_ID = 0x04, | |
| 81 | MIPI_DCS_GET_RED_CHANNEL = 0x06, | |
| 82 | MIPI_DCS_GET_GREEN_CHANNEL = 0x07, | |
| 83 | MIPI_DCS_GET_BLUE_CHANNEL = 0x08, | |
| 84 | MIPI_DCS_GET_DISPLAY_STATUS = 0x09, | |
| 85 | MIPI_DCS_GET_POWER_MODE = 0x0A, | |
| 86 | MIPI_DCS_GET_ADDRESS_MODE = 0x0B, | |
| 87 | MIPI_DCS_GET_PIXEL_FORMAT = 0x0C, | |
| 88 | MIPI_DCS_GET_DISPLAY_MODE = 0x0D, | |
| 89 | MIPI_DCS_GET_SIGNAL_MODE = 0x0E, | |
| 90 | MIPI_DCS_GET_DIAGNOSTIC_RESULT = 0x0F, | |
| 91 | MIPI_DCS_ENTER_SLEEP_MODE = 0x10, | |
| 92 | MIPI_DCS_EXIT_SLEEP_MODE = 0x11, | |
| 93 | MIPI_DCS_ENTER_PARTIAL_MODE = 0x12, | |
| 94 | MIPI_DCS_ENTER_NORMAL_MODE = 0x13, | |
| 95 | MIPI_DCS_EXIT_INVERT_MODE = 0x20, | |
| 96 | MIPI_DCS_ENTER_INVERT_MODE = 0x21, | |
| 97 | MIPI_DCS_SET_GAMMA_CURVE = 0x26, | |
| 98 | MIPI_DCS_SET_DISPLAY_OFF = 0x28, | |
| 99 | MIPI_DCS_SET_DISPLAY_ON = 0x29, | |
| 100 | MIPI_DCS_SET_COLUMN_ADDRESS = 0x2A, | |
| 101 | MIPI_DCS_SET_PAGE_ADDRESS = 0x2B, | |
| 102 | MIPI_DCS_WRITE_MEMORY_START = 0x2C, | |
| 103 | MIPI_DCS_WRITE_LUT = 0x2D, | |
| 104 | MIPI_DCS_READ_MEMORY_START = 0x2E, | |
| 105 | MIPI_DCS_SET_PARTIAL_AREA = 0x30, | |
| 106 | MIPI_DCS_SET_SCROLL_AREA = 0x33, | |
| 107 | MIPI_DCS_SET_TEAR_OFF = 0x34, | |
| 108 | MIPI_DCS_SET_TEAR_ON = 0x35, | |
| 109 | MIPI_DCS_SET_ADDRESS_MODE = 0x36, | |
| 110 | MIPI_DCS_SET_SCROLL_START = 0x37, | |
| 111 | MIPI_DCS_EXIT_IDLE_MODE = 0x38, | |
| 112 | MIPI_DCS_ENTER_IDLE_MODE = 0x39, | |
| 113 | MIPI_DCS_SET_PIXEL_FORMAT = 0x3A, | |
| 114 | MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C, | |
| 115 | MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E, | |
| 116 | MIPI_DCS_SET_TEAR_SCANLINE = 0x44, | |
| 117 | MIPI_DCS_GET_SCANLINE = 0x45, | |
| 249c4f53 D |
118 | MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */ |
| 119 | MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */ | |
| 120 | MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */ | |
| 121 | MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */ | |
| 122 | MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */ | |
| 123 | MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */ | |
| 124 | MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /* MIPI DCS 1.3 */ | |
| 125 | MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, /* MIPI DCS 1.3 */ | |
| ea95450e GL |
126 | MIPI_DCS_READ_DDB_START = 0xA1, |
| 127 | MIPI_DCS_READ_DDB_CONTINUE = 0xA8, | |
| 128 | }; | |
| 129 | ||
| 130 | /* MIPI DCS pixel formats */ | |
| 131 | #define MIPI_DCS_PIXEL_FMT_24BIT 7 | |
| 132 | #define MIPI_DCS_PIXEL_FMT_18BIT 6 | |
| 133 | #define MIPI_DCS_PIXEL_FMT_16BIT 5 | |
| 134 | #define MIPI_DCS_PIXEL_FMT_12BIT 3 | |
| 135 | #define MIPI_DCS_PIXEL_FMT_8BIT 2 | |
| 136 | #define MIPI_DCS_PIXEL_FMT_3BIT 1 | |
| 137 | ||
| 138 | #endif |