Commit | Line | Data |
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e0001a05 | 1 | /* Xtensa configuration settings. |
59e11e17 | 2 | Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 |
2caa7ca0 | 3 | Free Software Foundation, Inc. |
0a5b531f | 4 | Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica. |
e0001a05 | 5 | |
c6d600f0 BW |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
e0001a05 | 10 | |
c6d600f0 BW |
11 | This program is distributed in the hope that it will be useful, but |
12 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | General Public License for more details. | |
e0001a05 | 15 | |
c6d600f0 BW |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
e172dbf8 | 18 | Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
e0001a05 NC |
19 | |
20 | #ifndef XTENSA_CONFIG_H | |
21 | #define XTENSA_CONFIG_H | |
22 | ||
23 | /* The macros defined here match those with the same names in the Xtensa | |
24 | compile-time HAL (Hardware Abstraction Layer). Please refer to the | |
25 | Xtensa System Software Reference Manual for documentation of these | |
26 | macros. */ | |
27 | ||
05235f71 | 28 | #undef XCHAL_HAVE_BE |
e0001a05 | 29 | #define XCHAL_HAVE_BE 1 |
05235f71 BW |
30 | |
31 | #undef XCHAL_HAVE_DENSITY | |
e0001a05 | 32 | #define XCHAL_HAVE_DENSITY 1 |
05235f71 BW |
33 | |
34 | #undef XCHAL_HAVE_CONST16 | |
902695bc | 35 | #define XCHAL_HAVE_CONST16 0 |
05235f71 BW |
36 | |
37 | #undef XCHAL_HAVE_ABS | |
902695bc | 38 | #define XCHAL_HAVE_ABS 1 |
05235f71 BW |
39 | |
40 | #undef XCHAL_HAVE_ADDX | |
902695bc | 41 | #define XCHAL_HAVE_ADDX 1 |
05235f71 BW |
42 | |
43 | #undef XCHAL_HAVE_L32R | |
902695bc | 44 | #define XCHAL_HAVE_L32R 1 |
05235f71 | 45 | |
43cd72b9 BW |
46 | #undef XSHAL_USE_ABSOLUTE_LITERALS |
47 | #define XSHAL_USE_ABSOLUTE_LITERALS 0 | |
48 | ||
0a5b531f DD |
49 | #undef XSHAL_HAVE_TEXT_SECTION_LITERALS |
50 | #define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals. */ | |
51 | ||
05235f71 | 52 | #undef XCHAL_HAVE_MAC16 |
e0001a05 | 53 | #define XCHAL_HAVE_MAC16 0 |
05235f71 BW |
54 | |
55 | #undef XCHAL_HAVE_MUL16 | |
33430bd0 | 56 | #define XCHAL_HAVE_MUL16 1 |
05235f71 BW |
57 | |
58 | #undef XCHAL_HAVE_MUL32 | |
33430bd0 | 59 | #define XCHAL_HAVE_MUL32 1 |
05235f71 | 60 | |
51d04b5c BW |
61 | #undef XCHAL_HAVE_MUL32_HIGH |
62 | #define XCHAL_HAVE_MUL32_HIGH 0 | |
63 | ||
05235f71 | 64 | #undef XCHAL_HAVE_DIV32 |
33430bd0 | 65 | #define XCHAL_HAVE_DIV32 1 |
05235f71 BW |
66 | |
67 | #undef XCHAL_HAVE_NSA | |
e0001a05 | 68 | #define XCHAL_HAVE_NSA 1 |
05235f71 BW |
69 | |
70 | #undef XCHAL_HAVE_MINMAX | |
33430bd0 | 71 | #define XCHAL_HAVE_MINMAX 1 |
05235f71 BW |
72 | |
73 | #undef XCHAL_HAVE_SEXT | |
33430bd0 | 74 | #define XCHAL_HAVE_SEXT 1 |
05235f71 BW |
75 | |
76 | #undef XCHAL_HAVE_LOOPS | |
e0001a05 | 77 | #define XCHAL_HAVE_LOOPS 1 |
05235f71 | 78 | |
0a05a876 | 79 | #undef XCHAL_HAVE_THREADPTR |
33430bd0 | 80 | #define XCHAL_HAVE_THREADPTR 1 |
0a05a876 BW |
81 | |
82 | #undef XCHAL_HAVE_RELEASE_SYNC | |
33430bd0 | 83 | #define XCHAL_HAVE_RELEASE_SYNC 1 |
0a05a876 BW |
84 | |
85 | #undef XCHAL_HAVE_S32C1I | |
33430bd0 | 86 | #define XCHAL_HAVE_S32C1I 1 |
0a05a876 | 87 | |
05235f71 | 88 | #undef XCHAL_HAVE_BOOLEANS |
e0001a05 | 89 | #define XCHAL_HAVE_BOOLEANS 0 |
05235f71 BW |
90 | |
91 | #undef XCHAL_HAVE_FP | |
e0001a05 | 92 | #define XCHAL_HAVE_FP 0 |
05235f71 BW |
93 | |
94 | #undef XCHAL_HAVE_FP_DIV | |
e0001a05 | 95 | #define XCHAL_HAVE_FP_DIV 0 |
05235f71 BW |
96 | |
97 | #undef XCHAL_HAVE_FP_RECIP | |
e0001a05 | 98 | #define XCHAL_HAVE_FP_RECIP 0 |
05235f71 BW |
99 | |
100 | #undef XCHAL_HAVE_FP_SQRT | |
e0001a05 | 101 | #define XCHAL_HAVE_FP_SQRT 0 |
05235f71 BW |
102 | |
103 | #undef XCHAL_HAVE_FP_RSQRT | |
e0001a05 | 104 | #define XCHAL_HAVE_FP_RSQRT 0 |
05235f71 | 105 | |
0a5b531f DD |
106 | #undef XCHAL_HAVE_DFP_accel |
107 | #define XCHAL_HAVE_DFP_accel 0 | |
05235f71 | 108 | #undef XCHAL_HAVE_WINDOWED |
e0001a05 NC |
109 | #define XCHAL_HAVE_WINDOWED 1 |
110 | ||
6c7d412c | 111 | #undef XCHAL_NUM_AREGS |
33430bd0 | 112 | #define XCHAL_NUM_AREGS 32 |
6c7d412c | 113 | |
b2d179be BW |
114 | #undef XCHAL_HAVE_WIDE_BRANCHES |
115 | #define XCHAL_HAVE_WIDE_BRANCHES 0 | |
116 | ||
43cd72b9 BW |
117 | #undef XCHAL_HAVE_PREDICTED_BRANCHES |
118 | #define XCHAL_HAVE_PREDICTED_BRANCHES 0 | |
119 | ||
05235f71 BW |
120 | |
121 | #undef XCHAL_ICACHE_SIZE | |
33430bd0 | 122 | #define XCHAL_ICACHE_SIZE 16384 |
05235f71 BW |
123 | |
124 | #undef XCHAL_DCACHE_SIZE | |
33430bd0 | 125 | #define XCHAL_DCACHE_SIZE 16384 |
05235f71 BW |
126 | |
127 | #undef XCHAL_ICACHE_LINESIZE | |
33430bd0 | 128 | #define XCHAL_ICACHE_LINESIZE 32 |
05235f71 BW |
129 | |
130 | #undef XCHAL_DCACHE_LINESIZE | |
33430bd0 | 131 | #define XCHAL_DCACHE_LINESIZE 32 |
05235f71 BW |
132 | |
133 | #undef XCHAL_ICACHE_LINEWIDTH | |
33430bd0 | 134 | #define XCHAL_ICACHE_LINEWIDTH 5 |
05235f71 BW |
135 | |
136 | #undef XCHAL_DCACHE_LINEWIDTH | |
33430bd0 | 137 | #define XCHAL_DCACHE_LINEWIDTH 5 |
05235f71 BW |
138 | |
139 | #undef XCHAL_DCACHE_IS_WRITEBACK | |
33430bd0 | 140 | #define XCHAL_DCACHE_IS_WRITEBACK 1 |
e0001a05 | 141 | |
05235f71 BW |
142 | |
143 | #undef XCHAL_HAVE_MMU | |
e0001a05 | 144 | #define XCHAL_HAVE_MMU 1 |
05235f71 BW |
145 | |
146 | #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE | |
e0001a05 NC |
147 | #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12 |
148 | ||
05235f71 BW |
149 | |
150 | #undef XCHAL_HAVE_DEBUG | |
e0001a05 | 151 | #define XCHAL_HAVE_DEBUG 1 |
05235f71 BW |
152 | |
153 | #undef XCHAL_NUM_IBREAK | |
e0001a05 | 154 | #define XCHAL_NUM_IBREAK 2 |
05235f71 BW |
155 | |
156 | #undef XCHAL_NUM_DBREAK | |
e0001a05 | 157 | #define XCHAL_NUM_DBREAK 2 |
05235f71 BW |
158 | |
159 | #undef XCHAL_DEBUGLEVEL | |
33430bd0 | 160 | #define XCHAL_DEBUGLEVEL 6 |
e0001a05 | 161 | |
05235f71 | 162 | |
6c7d412c BW |
163 | #undef XCHAL_MAX_INSTRUCTION_SIZE |
164 | #define XCHAL_MAX_INSTRUCTION_SIZE 3 | |
165 | ||
43cd72b9 BW |
166 | #undef XCHAL_INST_FETCH_WIDTH |
167 | #define XCHAL_INST_FETCH_WIDTH 4 | |
e0001a05 | 168 | |
2caa7ca0 BW |
169 | |
170 | #undef XSHAL_ABI | |
171 | #undef XTHAL_ABI_WINDOWED | |
172 | #undef XTHAL_ABI_CALL0 | |
173 | #define XSHAL_ABI XTHAL_ABI_WINDOWED | |
174 | #define XTHAL_ABI_WINDOWED 0 | |
175 | #define XTHAL_ABI_CALL0 1 | |
176 | ||
e0001a05 | 177 | #endif /* !XTENSA_CONFIG_H */ |