genirq: fix set_irq_type() when recording trigger type
[deliverable/linux.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
3a16d713
EB
21/**
22 * dynamic_irq_init - initialize a dynamically allocated irq
23 * @irq: irq number to initialize
24 */
25void dynamic_irq_init(unsigned int irq)
26{
d3c60047 27 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
28 unsigned long flags;
29
7d94f7ca 30 if (!desc) {
261c40c1 31 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
32 return;
33 }
34
35 /* Ensure we don't have left over values from a previous use of this irq */
3a16d713
EB
36 spin_lock_irqsave(&desc->lock, flags);
37 desc->status = IRQ_DISABLED;
38 desc->chip = &no_irq_chip;
39 desc->handle_irq = handle_bad_irq;
40 desc->depth = 1;
5b912c10 41 desc->msi_desc = NULL;
3a16d713
EB
42 desc->handler_data = NULL;
43 desc->chip_data = NULL;
44 desc->action = NULL;
45 desc->irq_count = 0;
46 desc->irqs_unhandled = 0;
47#ifdef CONFIG_SMP
d366f8cb 48 cpus_setall(desc->affinity);
3a16d713
EB
49#endif
50 spin_unlock_irqrestore(&desc->lock, flags);
51}
52
53/**
54 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
55 * @irq: irq number to initialize
56 */
57void dynamic_irq_cleanup(unsigned int irq)
58{
d3c60047 59 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
60 unsigned long flags;
61
7d94f7ca 62 if (!desc) {
261c40c1 63 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
64 return;
65 }
66
3a16d713 67 spin_lock_irqsave(&desc->lock, flags);
1f80025e
EB
68 if (desc->action) {
69 spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 70 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 71 irq);
1f80025e
EB
72 return;
73 }
5b912c10
EB
74 desc->msi_desc = NULL;
75 desc->handler_data = NULL;
76 desc->chip_data = NULL;
3a16d713
EB
77 desc->handle_irq = handle_bad_irq;
78 desc->chip = &no_irq_chip;
79 spin_unlock_irqrestore(&desc->lock, flags);
80}
81
82
dd87eb3a
TG
83/**
84 * set_irq_chip - set the irq chip for an irq
85 * @irq: irq number
86 * @chip: pointer to irq chip description structure
87 */
88int set_irq_chip(unsigned int irq, struct irq_chip *chip)
89{
d3c60047 90 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
91 unsigned long flags;
92
7d94f7ca 93 if (!desc) {
261c40c1 94 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
95 return -EINVAL;
96 }
97
98 if (!chip)
99 chip = &no_irq_chip;
100
dd87eb3a
TG
101 spin_lock_irqsave(&desc->lock, flags);
102 irq_chip_set_defaults(chip);
103 desc->chip = chip;
dd87eb3a
TG
104 spin_unlock_irqrestore(&desc->lock, flags);
105
106 return 0;
107}
108EXPORT_SYMBOL(set_irq_chip);
109
110/**
0c5d1eb7 111 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 112 * @irq: irq number
0c5d1eb7 113 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
114 */
115int set_irq_type(unsigned int irq, unsigned int type)
116{
d3c60047 117 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
118 unsigned long flags;
119 int ret = -ENXIO;
120
7d94f7ca 121 if (!desc) {
dd87eb3a
TG
122 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
123 return -ENODEV;
124 }
125
0c5d1eb7
DB
126 if (type == IRQ_TYPE_NONE)
127 return 0;
128
129 spin_lock_irqsave(&desc->lock, flags);
0b3682ba 130 ret = __irq_set_trigger(desc, irq, type);
0c5d1eb7 131 spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
132 return ret;
133}
134EXPORT_SYMBOL(set_irq_type);
135
136/**
137 * set_irq_data - set irq type data for an irq
138 * @irq: Interrupt number
139 * @data: Pointer to interrupt specific data
140 *
141 * Set the hardware irq controller data for an irq
142 */
143int set_irq_data(unsigned int irq, void *data)
144{
d3c60047 145 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
146 unsigned long flags;
147
7d94f7ca 148 if (!desc) {
dd87eb3a
TG
149 printk(KERN_ERR
150 "Trying to install controller data for IRQ%d\n", irq);
151 return -EINVAL;
152 }
153
dd87eb3a
TG
154 spin_lock_irqsave(&desc->lock, flags);
155 desc->handler_data = data;
156 spin_unlock_irqrestore(&desc->lock, flags);
157 return 0;
158}
159EXPORT_SYMBOL(set_irq_data);
160
5b912c10
EB
161/**
162 * set_irq_data - set irq type data for an irq
163 * @irq: Interrupt number
472900b8 164 * @entry: Pointer to MSI descriptor data
5b912c10
EB
165 *
166 * Set the hardware irq controller data for an irq
167 */
168int set_irq_msi(unsigned int irq, struct msi_desc *entry)
169{
d3c60047 170 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
171 unsigned long flags;
172
7d94f7ca 173 if (!desc) {
5b912c10
EB
174 printk(KERN_ERR
175 "Trying to install msi data for IRQ%d\n", irq);
176 return -EINVAL;
177 }
7d94f7ca 178
5b912c10
EB
179 spin_lock_irqsave(&desc->lock, flags);
180 desc->msi_desc = entry;
7fe3730d
ME
181 if (entry)
182 entry->irq = irq;
5b912c10
EB
183 spin_unlock_irqrestore(&desc->lock, flags);
184 return 0;
185}
186
dd87eb3a
TG
187/**
188 * set_irq_chip_data - set irq chip data for an irq
189 * @irq: Interrupt number
190 * @data: Pointer to chip specific data
191 *
192 * Set the hardware irq chip data for an irq
193 */
194int set_irq_chip_data(unsigned int irq, void *data)
195{
d3c60047 196 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
197 unsigned long flags;
198
7d94f7ca
YL
199 if (!desc) {
200 printk(KERN_ERR
201 "Trying to install chip data for IRQ%d\n", irq);
202 return -EINVAL;
203 }
204
205 if (!desc->chip) {
dd87eb3a
TG
206 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
207 return -EINVAL;
208 }
209
210 spin_lock_irqsave(&desc->lock, flags);
211 desc->chip_data = data;
212 spin_unlock_irqrestore(&desc->lock, flags);
213
214 return 0;
215}
216EXPORT_SYMBOL(set_irq_chip_data);
217
218/*
219 * default enable function
220 */
221static void default_enable(unsigned int irq)
222{
d3c60047 223 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
224
225 desc->chip->unmask(irq);
226 desc->status &= ~IRQ_MASKED;
227}
228
229/*
230 * default disable function
231 */
232static void default_disable(unsigned int irq)
233{
dd87eb3a
TG
234}
235
236/*
237 * default startup function
238 */
239static unsigned int default_startup(unsigned int irq)
240{
d3c60047 241 struct irq_desc *desc = irq_to_desc(irq);
08678b08 242
08678b08 243 desc->chip->enable(irq);
dd87eb3a
TG
244 return 0;
245}
246
89d694b9
TG
247/*
248 * default shutdown function
249 */
250static void default_shutdown(unsigned int irq)
251{
d3c60047 252 struct irq_desc *desc = irq_to_desc(irq);
89d694b9
TG
253
254 desc->chip->mask(irq);
255 desc->status |= IRQ_MASKED;
256}
257
dd87eb3a
TG
258/*
259 * Fixup enable/disable function pointers
260 */
261void irq_chip_set_defaults(struct irq_chip *chip)
262{
263 if (!chip->enable)
264 chip->enable = default_enable;
265 if (!chip->disable)
266 chip->disable = default_disable;
267 if (!chip->startup)
268 chip->startup = default_startup;
89d694b9
TG
269 /*
270 * We use chip->disable, when the user provided its own. When
271 * we have default_disable set for chip->disable, then we need
272 * to use default_shutdown, otherwise the irq line is not
273 * disabled on free_irq():
274 */
dd87eb3a 275 if (!chip->shutdown)
89d694b9
TG
276 chip->shutdown = chip->disable != default_disable ?
277 chip->disable : default_shutdown;
dd87eb3a
TG
278 if (!chip->name)
279 chip->name = chip->typename;
b86432b4
ZY
280 if (!chip->end)
281 chip->end = dummy_irq_chip.end;
dd87eb3a
TG
282}
283
284static inline void mask_ack_irq(struct irq_desc *desc, int irq)
285{
286 if (desc->chip->mask_ack)
287 desc->chip->mask_ack(irq);
288 else {
289 desc->chip->mask(irq);
290 desc->chip->ack(irq);
291 }
292}
293
294/**
295 * handle_simple_irq - Simple and software-decoded IRQs.
296 * @irq: the interrupt number
297 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
298 *
299 * Simple interrupts are either sent from a demultiplexing interrupt
300 * handler or come from hardware, where no interrupt hardware control
301 * is necessary.
302 *
303 * Note: The caller is expected to handle the ack, clear, mask and
304 * unmask issues if necessary.
305 */
7ad5b3a5 306void
7d12e780 307handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
308{
309 struct irqaction *action;
310 irqreturn_t action_ret;
dd87eb3a
TG
311
312 spin_lock(&desc->lock);
313
314 if (unlikely(desc->status & IRQ_INPROGRESS))
315 goto out_unlock;
971e5b35 316 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 317 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
318
319 action = desc->action;
971e5b35 320 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
321 goto out_unlock;
322
323 desc->status |= IRQ_INPROGRESS;
324 spin_unlock(&desc->lock);
325
7d12e780 326 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 327 if (!noirqdebug)
7d12e780 328 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
329
330 spin_lock(&desc->lock);
331 desc->status &= ~IRQ_INPROGRESS;
332out_unlock:
333 spin_unlock(&desc->lock);
334}
335
336/**
337 * handle_level_irq - Level type irq handler
338 * @irq: the interrupt number
339 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
340 *
341 * Level type interrupts are active as long as the hardware line has
342 * the active level. This may require to mask the interrupt and unmask
343 * it after the associated handler has acknowledged the device, so the
344 * interrupt line is back to inactive.
345 */
7ad5b3a5 346void
7d12e780 347handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 348{
dd87eb3a
TG
349 struct irqaction *action;
350 irqreturn_t action_ret;
351
352 spin_lock(&desc->lock);
353 mask_ack_irq(desc, irq);
354
355 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 356 goto out_unlock;
dd87eb3a 357 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 358 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
359
360 /*
361 * If its disabled or no action available
362 * keep it masked and get out of here
363 */
364 action = desc->action;
49663421 365 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 366 goto out_unlock;
dd87eb3a
TG
367
368 desc->status |= IRQ_INPROGRESS;
369 spin_unlock(&desc->lock);
370
7d12e780 371 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 372 if (!noirqdebug)
7d12e780 373 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
374
375 spin_lock(&desc->lock);
376 desc->status &= ~IRQ_INPROGRESS;
dd87eb3a
TG
377 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
378 desc->chip->unmask(irq);
86998aa6 379out_unlock:
dd87eb3a
TG
380 spin_unlock(&desc->lock);
381}
382
383/**
47c2a3aa 384 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
385 * @irq: the interrupt number
386 * @desc: the interrupt description structure for this irq
dd87eb3a 387 *
47c2a3aa 388 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
389 * call when the interrupt has been serviced. This enables support
390 * for modern forms of interrupt handlers, which handle the flow
391 * details in hardware, transparently.
392 */
7ad5b3a5 393void
7d12e780 394handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 395{
dd87eb3a
TG
396 struct irqaction *action;
397 irqreturn_t action_ret;
398
399 spin_lock(&desc->lock);
400
401 if (unlikely(desc->status & IRQ_INPROGRESS))
402 goto out;
403
404 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 405 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
406
407 /*
408 * If its disabled or no action available
76d21601 409 * then mask it and get out of here:
dd87eb3a
TG
410 */
411 action = desc->action;
98bb244b
BH
412 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
413 desc->status |= IRQ_PENDING;
76d21601
IM
414 if (desc->chip->mask)
415 desc->chip->mask(irq);
dd87eb3a 416 goto out;
98bb244b 417 }
dd87eb3a
TG
418
419 desc->status |= IRQ_INPROGRESS;
98bb244b 420 desc->status &= ~IRQ_PENDING;
dd87eb3a
TG
421 spin_unlock(&desc->lock);
422
7d12e780 423 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 424 if (!noirqdebug)
7d12e780 425 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
426
427 spin_lock(&desc->lock);
428 desc->status &= ~IRQ_INPROGRESS;
429out:
47c2a3aa 430 desc->chip->eoi(irq);
dd87eb3a
TG
431
432 spin_unlock(&desc->lock);
433}
434
435/**
436 * handle_edge_irq - edge type IRQ handler
437 * @irq: the interrupt number
438 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
439 *
440 * Interrupt occures on the falling and/or rising edge of a hardware
441 * signal. The occurence is latched into the irq controller hardware
442 * and must be acked in order to be reenabled. After the ack another
443 * interrupt can happen on the same source even before the first one
444 * is handled by the assosiacted event handler. If this happens it
445 * might be necessary to disable (mask) the interrupt depending on the
446 * controller hardware. This requires to reenable the interrupt inside
447 * of the loop which handles the interrupts which have arrived while
448 * the handler was running. If all pending interrupts are handled, the
449 * loop is left.
450 */
7ad5b3a5 451void
7d12e780 452handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 453{
dd87eb3a
TG
454 spin_lock(&desc->lock);
455
456 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
457
458 /*
459 * If we're currently running this IRQ, or its disabled,
460 * we shouldn't process the IRQ. Mark it pending, handle
461 * the necessary masking and go out
462 */
463 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
464 !desc->action)) {
465 desc->status |= (IRQ_PENDING | IRQ_MASKED);
466 mask_ack_irq(desc, irq);
467 goto out_unlock;
468 }
d6c88a50 469 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
470
471 /* Start handling the irq */
472 desc->chip->ack(irq);
473
474 /* Mark the IRQ currently in progress.*/
475 desc->status |= IRQ_INPROGRESS;
476
477 do {
478 struct irqaction *action = desc->action;
479 irqreturn_t action_ret;
480
481 if (unlikely(!action)) {
482 desc->chip->mask(irq);
483 goto out_unlock;
484 }
485
486 /*
487 * When another irq arrived while we were handling
488 * one, we could have masked the irq.
489 * Renable it, if it was not disabled in meantime.
490 */
491 if (unlikely((desc->status &
492 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
493 (IRQ_PENDING | IRQ_MASKED))) {
494 desc->chip->unmask(irq);
495 desc->status &= ~IRQ_MASKED;
496 }
497
498 desc->status &= ~IRQ_PENDING;
499 spin_unlock(&desc->lock);
7d12e780 500 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 501 if (!noirqdebug)
7d12e780 502 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
503 spin_lock(&desc->lock);
504
505 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
506
507 desc->status &= ~IRQ_INPROGRESS;
508out_unlock:
509 spin_unlock(&desc->lock);
510}
511
dd87eb3a
TG
512/**
513 * handle_percpu_IRQ - Per CPU local irq handler
514 * @irq: the interrupt number
515 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
516 *
517 * Per CPU interrupts on SMP machines without locking requirements
518 */
7ad5b3a5 519void
7d12e780 520handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
521{
522 irqreturn_t action_ret;
523
d6c88a50 524 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
525
526 if (desc->chip->ack)
527 desc->chip->ack(irq);
528
7d12e780 529 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 530 if (!noirqdebug)
7d12e780 531 note_interrupt(irq, desc, action_ret);
dd87eb3a
TG
532
533 if (desc->chip->eoi)
534 desc->chip->eoi(irq);
535}
536
dd87eb3a 537void
a460e745
IM
538__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
539 const char *name)
dd87eb3a 540{
d3c60047 541 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
542 unsigned long flags;
543
7d94f7ca 544 if (!desc) {
dd87eb3a
TG
545 printk(KERN_ERR
546 "Trying to install type control for IRQ%d\n", irq);
547 return;
548 }
549
dd87eb3a
TG
550 if (!handle)
551 handle = handle_bad_irq;
9d7ac8be 552 else if (desc->chip == &no_irq_chip) {
f8b5473f 553 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 554 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
555 /*
556 * Some ARM implementations install a handler for really dumb
557 * interrupt hardware without setting an irq_chip. This worked
558 * with the ARM no_irq_chip but the check in setup_irq would
559 * prevent us to setup the interrupt at all. Switch it to
560 * dummy_irq_chip for easy transition.
561 */
562 desc->chip = &dummy_irq_chip;
563 }
dd87eb3a
TG
564
565 spin_lock_irqsave(&desc->lock, flags);
566
567 /* Uninstall? */
568 if (handle == handle_bad_irq) {
5575ddf7
JB
569 if (desc->chip != &no_irq_chip)
570 mask_ack_irq(desc, irq);
dd87eb3a
TG
571 desc->status |= IRQ_DISABLED;
572 desc->depth = 1;
573 }
574 desc->handle_irq = handle;
a460e745 575 desc->name = name;
dd87eb3a
TG
576
577 if (handle != handle_bad_irq && is_chained) {
578 desc->status &= ~IRQ_DISABLED;
579 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
580 desc->depth = 0;
7e6e178a 581 desc->chip->startup(irq);
dd87eb3a
TG
582 }
583 spin_unlock_irqrestore(&desc->lock, flags);
584}
585
586void
587set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 588 irq_flow_handler_t handle)
dd87eb3a
TG
589{
590 set_irq_chip(irq, chip);
a460e745 591 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
592}
593
a460e745
IM
594void
595set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
596 irq_flow_handler_t handle, const char *name)
dd87eb3a 597{
a460e745
IM
598 set_irq_chip(irq, chip);
599 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 600}
46f4f8f6
RB
601
602void __init set_irq_noprobe(unsigned int irq)
603{
d3c60047 604 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
605 unsigned long flags;
606
7d94f7ca 607 if (!desc) {
46f4f8f6 608 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
46f4f8f6
RB
609 return;
610 }
611
46f4f8f6
RB
612 spin_lock_irqsave(&desc->lock, flags);
613 desc->status |= IRQ_NOPROBE;
614 spin_unlock_irqrestore(&desc->lock, flags);
615}
616
617void __init set_irq_probe(unsigned int irq)
618{
d3c60047 619 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
620 unsigned long flags;
621
7d94f7ca 622 if (!desc) {
46f4f8f6 623 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
46f4f8f6
RB
624 return;
625 }
626
46f4f8f6
RB
627 spin_lock_irqsave(&desc->lock, flags);
628 desc->status &= ~IRQ_NOPROBE;
629 spin_unlock_irqrestore(&desc->lock, flags);
630}
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