[deliverable/linux.git] / kernel / irq / chip.c

/*
 * linux/kernel/irq/chip.c
 *
 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
 *
 * This file contains the core interrupt handling code, for irq-chip
 * based architectures.
 *
 * Detailed information is available in Documentation/DocBook/genericirq
 */

#include <linux/irq.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>

#include "internals.h"

/**
 *	set_irq_chip - set the irq chip for an irq
 *	@irq:	irq number
 *	@chip:	pointer to irq chip description structure
 */
int set_irq_chip(unsigned int irq, struct irq_chip *chip)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq);
		WARN_ON(1);
		return -EINVAL;
	}

	if (!chip)
		chip = &no_irq_chip;

	desc = irq_desc + irq;
	spin_lock_irqsave(&desc->lock, flags);
	irq_chip_set_defaults(chip);
	desc->chip = chip;
	/*
	 * For compatibility only:
	 */
	desc->chip = chip;
	spin_unlock_irqrestore(&desc->lock, flags);

	return 0;
}
EXPORT_SYMBOL(set_irq_chip);

/**
 *	set_irq_type - set the irq type for an irq
 *	@irq:	irq number
 *	@type:	interrupt type - see include/linux/interrupt.h
 */
int set_irq_type(unsigned int irq, unsigned int type)
{
	struct irq_desc *desc;
	unsigned long flags;
	int ret = -ENXIO;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
		return -ENODEV;
	}

	desc = irq_desc + irq;
	if (desc->chip->set_type) {
		spin_lock_irqsave(&desc->lock, flags);
		ret = desc->chip->set_type(irq, type);
		spin_unlock_irqrestore(&desc->lock, flags);
	}
	return ret;
}
EXPORT_SYMBOL(set_irq_type);

/**
 *	set_irq_data - set irq type data for an irq
 *	@irq:	Interrupt number
 *	@data:	Pointer to interrupt specific data
 *
 *	Set the hardware irq controller data for an irq
 */
int set_irq_data(unsigned int irq, void *data)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR
		       "Trying to install controller data for IRQ%d\n", irq);
		return -EINVAL;
	}

	desc = irq_desc + irq;
	spin_lock_irqsave(&desc->lock, flags);
	desc->handler_data = data;
	spin_unlock_irqrestore(&desc->lock, flags);
	return 0;
}
EXPORT_SYMBOL(set_irq_data);

/**
 *	set_irq_chip_data - set irq chip data for an irq
 *	@irq:	Interrupt number
 *	@data:	Pointer to chip specific data
 *
 *	Set the hardware irq chip data for an irq
 */
int set_irq_chip_data(unsigned int irq, void *data)
{
	struct irq_desc *desc = irq_desc + irq;
	unsigned long flags;

	if (irq >= NR_IRQS || !desc->chip) {
		printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
		return -EINVAL;
	}

	spin_lock_irqsave(&desc->lock, flags);
	desc->chip_data = data;
	spin_unlock_irqrestore(&desc->lock, flags);

	return 0;
}
EXPORT_SYMBOL(set_irq_chip_data);

/*
 * default enable function
 */
static void default_enable(unsigned int irq)
{
	struct irq_desc *desc = irq_desc + irq;

	desc->chip->unmask(irq);
	desc->status &= ~IRQ_MASKED;
}

/*
 * default disable function
 */
static void default_disable(unsigned int irq)
{
	struct irq_desc *desc = irq_desc + irq;

	if (!(desc->status & IRQ_DELAYED_DISABLE))
		irq_desc[irq].chip->mask(irq);
}

/*
 * default startup function
 */
static unsigned int default_startup(unsigned int irq)
{
	irq_desc[irq].chip->enable(irq);

	return 0;
}

/*
 * Fixup enable/disable function pointers
 */
void irq_chip_set_defaults(struct irq_chip *chip)
{
	if (!chip->enable)
		chip->enable = default_enable;
	if (!chip->disable)
		chip->disable = default_disable;
	if (!chip->startup)
		chip->startup = default_startup;
	if (!chip->shutdown)
		chip->shutdown = chip->disable;
	if (!chip->name)
		chip->name = chip->typename;
}

static inline void mask_ack_irq(struct irq_desc *desc, int irq)
{
	if (desc->chip->mask_ack)
		desc->chip->mask_ack(irq);
	else {
		desc->chip->mask(irq);
		desc->chip->ack(irq);
	}
}

/**
 *	handle_simple_irq - Simple and software-decoded IRQs.
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *	@regs:	pointer to a register structure
 *
 *	Simple interrupts are either sent from a demultiplexing interrupt
 *	handler or come from hardware, where no interrupt hardware control
 *	is necessary.
 *
 *	Note: The caller is expected to handle the ack, clear, mask and
 *	unmask issues if necessary.
 */
void fastcall
handle_simple_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
{
	struct irqaction *action;
	irqreturn_t action_ret;
	const unsigned int cpu = smp_processor_id();

	spin_lock(&desc->lock);

	if (unlikely(desc->status & IRQ_INPROGRESS))
		goto out_unlock;
	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
	kstat_cpu(cpu).irqs[irq]++;

	action = desc->action;
	if (unlikely(!action || (desc->status & IRQ_DISABLED)))
		goto out_unlock;

	desc->status |= IRQ_INPROGRESS;
	spin_unlock(&desc->lock);

	action_ret = handle_IRQ_event(irq, regs, action);
	if (!noirqdebug)
		note_interrupt(irq, desc, action_ret, regs);

	spin_lock(&desc->lock);
	desc->status &= ~IRQ_INPROGRESS;
out_unlock:
	spin_unlock(&desc->lock);
}

/**
 *	handle_level_irq - Level type irq handler
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *	@regs:	pointer to a register structure
 *
 *	Level type interrupts are active as long as the hardware line has
 *	the active level. This may require to mask the interrupt and unmask
 *	it after the associated handler has acknowledged the device, so the
 *	interrupt line is back to inactive.
 */
void fastcall
handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
{
	unsigned int cpu = smp_processor_id();
	struct irqaction *action;
	irqreturn_t action_ret;

	spin_lock(&desc->lock);
	mask_ack_irq(desc, irq);

	if (unlikely(desc->status & IRQ_INPROGRESS))
		goto out;
	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
	kstat_cpu(cpu).irqs[irq]++;

	/*
	 * If its disabled or no action available
	 * keep it masked and get out of here
	 */
	action = desc->action;
	if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
		desc->status |= IRQ_PENDING;
		goto out;
	}

	desc->status |= IRQ_INPROGRESS;
	desc->status &= ~IRQ_PENDING;
	spin_unlock(&desc->lock);

	action_ret = handle_IRQ_event(irq, regs, action);
	if (!noirqdebug)
		note_interrupt(irq, desc, action_ret, regs);

	spin_lock(&desc->lock);
	desc->status &= ~IRQ_INPROGRESS;
out:
	if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
		desc->chip->unmask(irq);
	spin_unlock(&desc->lock);
}

/**
 *	handle_fasteoi_irq - irq handler for transparent controllers
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *	@regs:	pointer to a register structure
 *
 *	Only a single callback will be issued to the chip: an ->eoi()
 *	call when the interrupt has been serviced. This enables support
 *	for modern forms of interrupt handlers, which handle the flow
 *	details in hardware, transparently.
 */
void fastcall
handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc,
		   struct pt_regs *regs)
{
	unsigned int cpu = smp_processor_id();
	struct irqaction *action;
	irqreturn_t action_ret;

	spin_lock(&desc->lock);

	if (unlikely(desc->status & IRQ_INPROGRESS))
		goto out;

	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
	kstat_cpu(cpu).irqs[irq]++;

	/*
	 * If its disabled or no action available
	 * keep it masked and get out of here
	 */
	action = desc->action;
	if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
		desc->status |= IRQ_PENDING;
		goto out;
	}

	desc->status |= IRQ_INPROGRESS;
	desc->status &= ~IRQ_PENDING;
	spin_unlock(&desc->lock);

	action_ret = handle_IRQ_event(irq, regs, action);
	if (!noirqdebug)
		note_interrupt(irq, desc, action_ret, regs);

	spin_lock(&desc->lock);
	desc->status &= ~IRQ_INPROGRESS;
out:
	desc->chip->eoi(irq);

	spin_unlock(&desc->lock);
}

/**
 *	handle_edge_irq - edge type IRQ handler
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *	@regs:	pointer to a register structure
 *
 *	Interrupt occures on the falling and/or rising edge of a hardware
 *	signal. The occurence is latched into the irq controller hardware
 *	and must be acked in order to be reenabled. After the ack another
 *	interrupt can happen on the same source even before the first one
 *	is handled by the assosiacted event handler. If this happens it
 *	might be necessary to disable (mask) the interrupt depending on the
 *	controller hardware. This requires to reenable the interrupt inside
 *	of the loop which handles the interrupts which have arrived while
 *	the handler was running. If all pending interrupts are handled, the
 *	loop is left.
 */
void fastcall
handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
{
	const unsigned int cpu = smp_processor_id();

	spin_lock(&desc->lock);

	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);

	/*
	 * If we're currently running this IRQ, or its disabled,
	 * we shouldn't process the IRQ. Mark it pending, handle
	 * the necessary masking and go out
	 */
	if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
		    !desc->action)) {
		desc->status |= (IRQ_PENDING | IRQ_MASKED);
		mask_ack_irq(desc, irq);
		goto out_unlock;
	}

	kstat_cpu(cpu).irqs[irq]++;

	/* Start handling the irq */
	desc->chip->ack(irq);

	/* Mark the IRQ currently in progress.*/
	desc->status |= IRQ_INPROGRESS;

	do {
		struct irqaction *action = desc->action;
		irqreturn_t action_ret;

		if (unlikely(!action)) {
			desc->chip->mask(irq);
			goto out_unlock;
		}

		/*
		 * When another irq arrived while we were handling
		 * one, we could have masked the irq.
		 * Renable it, if it was not disabled in meantime.
		 */
		if (unlikely((desc->status &
			       (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
			      (IRQ_PENDING | IRQ_MASKED))) {
			desc->chip->unmask(irq);
			desc->status &= ~IRQ_MASKED;
		}

		desc->status &= ~IRQ_PENDING;
		spin_unlock(&desc->lock);
		action_ret = handle_IRQ_event(irq, regs, action);
		if (!noirqdebug)
			note_interrupt(irq, desc, action_ret, regs);
		spin_lock(&desc->lock);

	} while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);

	desc->status &= ~IRQ_INPROGRESS;
out_unlock:
	spin_unlock(&desc->lock);
}

#ifdef CONFIG_SMP
/**
 *	handle_percpu_IRQ - Per CPU local irq handler
 *	@irq:	the interrupt number
 *	@desc:	the interrupt description structure for this irq
 *	@regs:	pointer to a register structure
 *
 *	Per CPU interrupts on SMP machines without locking requirements
 */
void fastcall
handle_percpu_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs)
{
	irqreturn_t action_ret;

	kstat_this_cpu.irqs[irq]++;

	if (desc->chip->ack)
		desc->chip->ack(irq);

	action_ret = handle_IRQ_event(irq, regs, desc->action);
	if (!noirqdebug)
		note_interrupt(irq, desc, action_ret, regs);

	if (desc->chip->eoi)
		desc->chip->eoi(irq);
}

#endif /* CONFIG_SMP */

void
__set_irq_handler(unsigned int irq,
		  void fastcall (*handle)(unsigned int, irq_desc_t *,
					  struct pt_regs *),
		  int is_chained)
{
	struct irq_desc *desc;
	unsigned long flags;

	if (irq >= NR_IRQS) {
		printk(KERN_ERR
		       "Trying to install type control for IRQ%d\n", irq);
		return;
	}

	desc = irq_desc + irq;

	if (!handle)
		handle = handle_bad_irq;

	if (desc->chip == &no_irq_chip) {
		printk(KERN_WARNING "Trying to install %sinterrupt handler "
		       "for IRQ%d\n", is_chained ? "chained " : " ", irq);
		/*
		 * Some ARM implementations install a handler for really dumb
		 * interrupt hardware without setting an irq_chip. This worked
		 * with the ARM no_irq_chip but the check in setup_irq would
		 * prevent us to setup the interrupt at all. Switch it to
		 * dummy_irq_chip for easy transition.
		 */
		desc->chip = &dummy_irq_chip;
	}

	spin_lock_irqsave(&desc->lock, flags);

	/* Uninstall? */
	if (handle == handle_bad_irq) {
		if (desc->chip != &no_irq_chip) {
			desc->chip->mask(irq);
			desc->chip->ack(irq);
		}
		desc->status |= IRQ_DISABLED;
		desc->depth = 1;
	}
	desc->handle_irq = handle;

	if (handle != handle_bad_irq && is_chained) {
		desc->status &= ~IRQ_DISABLED;
		desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
		desc->depth = 0;
		desc->chip->unmask(irq);
	}
	spin_unlock_irqrestore(&desc->lock, flags);
}

void
set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
			 void fastcall (*handle)(unsigned int,
						 struct irq_desc *,
						 struct pt_regs *))
{
	set_irq_chip(irq, chip);
	__set_irq_handler(irq, handle, 0);
}

/*
 * Get a descriptive string for the highlevel handler, for
 * /proc/interrupts output:
 */
const char *
handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *,
					struct pt_regs *))
{
	if (handle == handle_level_irq)
		return "level  ";
	if (handle == handle_fasteoi_irq)
		return "fasteoi";
	if (handle == handle_edge_irq)
		return "edge   ";
	if (handle == handle_simple_irq)
		return "simple ";
#ifdef CONFIG_SMP
	if (handle == handle_percpu_irq)
		return "percpu ";
#endif
	if (handle == handle_bad_irq)
		return "bad    ";

	return NULL;
}
Commit	Line	Data
dd87eb3a TG	1	/*
	2	* linux/kernel/irq/chip.c
	3	*
	4	* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
	5	* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
	6	*
	7	* This file contains the core interrupt handling code, for irq-chip
	8	* based architectures.
	9	*
	10	* Detailed information is available in Documentation/DocBook/genericirq
	11	*/
	12
	13	#include <linux/irq.h>
	14	#include <linux/module.h>
	15	#include <linux/interrupt.h>
	16	#include <linux/kernel_stat.h>
	17
	18	#include "internals.h"
	19
	20	/**
	21	* set_irq_chip - set the irq chip for an irq
	22	* @irq: irq number
	23	* @chip: pointer to irq chip description structure
	24	*/
	25	int set_irq_chip(unsigned int irq, struct irq_chip *chip)
	26	{
	27	struct irq_desc *desc;
	28	unsigned long flags;
	29
	30	if (irq >= NR_IRQS) {
	31	printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq);
	32	WARN_ON(1);
	33	return -EINVAL;
	34	}
	35
	36	if (!chip)
	37	chip = &no_irq_chip;
	38
	39	desc = irq_desc + irq;
	40	spin_lock_irqsave(&desc->lock, flags);
	41	irq_chip_set_defaults(chip);
	42	desc->chip = chip;
	43	/*
	44	* For compatibility only:
	45	*/
	46	desc->chip = chip;
	47	spin_unlock_irqrestore(&desc->lock, flags);
	48
	49	return 0;
	50	}
	51	EXPORT_SYMBOL(set_irq_chip);
	52
	53	/**
	54	* set_irq_type - set the irq type for an irq
	55	* @irq: irq number
	56	* @type: interrupt type - see include/linux/interrupt.h
	57	*/
	58	int set_irq_type(unsigned int irq, unsigned int type)
	59	{
	60	struct irq_desc *desc;
	61	unsigned long flags;
	62	int ret = -ENXIO;
	63
	64	if (irq >= NR_IRQS) {
65	printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
66	return -ENODEV;
67	}
68
69	desc = irq_desc + irq;
70	if (desc->chip->set_type) {
71	spin_lock_irqsave(&desc->lock, flags);
72	ret = desc->chip->set_type(irq, type);
73	spin_unlock_irqrestore(&desc->lock, flags);
74	}
75	return ret;
76	}
77	EXPORT_SYMBOL(set_irq_type);
78
79	/**
80	* set_irq_data - set irq type data for an irq
81	* @irq: Interrupt number
82	* @data: Pointer to interrupt specific data
83	*
84	* Set the hardware irq controller data for an irq
85	*/
86	int set_irq_data(unsigned int irq, void *data)
87	{
88	struct irq_desc *desc;
89	unsigned long flags;
90
91	if (irq >= NR_IRQS) {
92	printk(KERN_ERR
93	"Trying to install controller data for IRQ%d\n", irq);
94	return -EINVAL;
95	}
96
97	desc = irq_desc + irq;
98	spin_lock_irqsave(&desc->lock, flags);
99	desc->handler_data = data;
100	spin_unlock_irqrestore(&desc->lock, flags);
101	return 0;
102	}
103	EXPORT_SYMBOL(set_irq_data);
104
105	/**
106	* set_irq_chip_data - set irq chip data for an irq
107	* @irq: Interrupt number
108	* @data: Pointer to chip specific data
109	*
110	* Set the hardware irq chip data for an irq
111	*/
112	int set_irq_chip_data(unsigned int irq, void *data)
113	{
114	struct irq_desc *desc = irq_desc + irq;
115	unsigned long flags;
116
117	if (irq >= NR_IRQS \|\| !desc->chip) {
118	printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
119	return -EINVAL;
120	}
121
122	spin_lock_irqsave(&desc->lock, flags);
123	desc->chip_data = data;
124	spin_unlock_irqrestore(&desc->lock, flags);
125
126	return 0;
127	}
128	EXPORT_SYMBOL(set_irq_chip_data);
129
130	/*
131	* default enable function
132	*/
133	static void default_enable(unsigned int irq)
134	{
135	struct irq_desc *desc = irq_desc + irq;
136
137	desc->chip->unmask(irq);
138	desc->status &= ~IRQ_MASKED;
139	}
140
141	/*
142	* default disable function
143	*/
144	static void default_disable(unsigned int irq)
145	{
146	struct irq_desc *desc = irq_desc + irq;
147
148	if (!(desc->status & IRQ_DELAYED_DISABLE))
149	irq_desc[irq].chip->mask(irq);
150	}
151
152	/*
153	* default startup function
154	*/
155	static unsigned int default_startup(unsigned int irq)
156	{
157	irq_desc[irq].chip->enable(irq);
158
159	return 0;
160	}
161
162	/*
163	* Fixup enable/disable function pointers
164	*/
165	void irq_chip_set_defaults(struct irq_chip *chip)
166	{
167	if (!chip->enable)
168	chip->enable = default_enable;
169	if (!chip->disable)
170	chip->disable = default_disable;
171	if (!chip->startup)
172	chip->startup = default_startup;
173	if (!chip->shutdown)
174	chip->shutdown = chip->disable;
175	if (!chip->name)
176	chip->name = chip->typename;
177	}
178
179	static inline void mask_ack_irq(struct irq_desc *desc, int irq)
180	{
181	if (desc->chip->mask_ack)
182	desc->chip->mask_ack(irq);
183	else {
184	desc->chip->mask(irq);
185	desc->chip->ack(irq);
186	}
187	}
188
189	/**
190	* handle_simple_irq - Simple and software-decoded IRQs.
191	* @irq: the interrupt number
192	* @desc: the interrupt description structure for this irq
193	* @regs: pointer to a register structure
194	*
195	* Simple interrupts are either sent from a demultiplexing interrupt
196	* handler or come from hardware, where no interrupt hardware control
197	* is necessary.
198	*
199	* Note: The caller is expected to handle the ack, clear, mask and
200	* unmask issues if necessary.
201	*/
202	void fastcall
203	handle_simple_irq(unsigned int irq, struct irq_desc desc, struct pt_regs regs)
204	{
205	struct irqaction *action;
206	irqreturn_t action_ret;
207	const unsigned int cpu = smp_processor_id();
208
209	spin_lock(&desc->lock);
210
211	if (unlikely(desc->status & IRQ_INPROGRESS))
212	goto out_unlock;
213	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING);
214	kstat_cpu(cpu).irqs[irq]++;
215
216	action = desc->action;
217	if (unlikely(!action \|\| (desc->status & IRQ_DISABLED)))
218	goto out_unlock;
219
220	desc->status \|= IRQ_INPROGRESS;
221	spin_unlock(&desc->lock);
222
223	action_ret = handle_IRQ_event(irq, regs, action);
224	if (!noirqdebug)
225	note_interrupt(irq, desc, action_ret, regs);
226
227	spin_lock(&desc->lock);
228	desc->status &= ~IRQ_INPROGRESS;
229	out_unlock:
230	spin_unlock(&desc->lock);
231	}
232
233	/**
234	* handle_level_irq - Level type irq handler
235	* @irq: the interrupt number
236	* @desc: the interrupt description structure for this irq
237	* @regs: pointer to a register structure
238	*
239	* Level type interrupts are active as long as the hardware line has
240	* the active level. This may require to mask the interrupt and unmask
241	* it after the associated handler has acknowledged the device, so the
242	* interrupt line is back to inactive.
243	*/
244	void fastcall
245	handle_level_irq(unsigned int irq, struct irq_desc desc, struct pt_regs regs)
246	{
247	unsigned int cpu = smp_processor_id();
248	struct irqaction *action;
249	irqreturn_t action_ret;
250
251	spin_lock(&desc->lock);
252	mask_ack_irq(desc, irq);
253
254	if (unlikely(desc->status & IRQ_INPROGRESS))
255	goto out;
256	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING);
257	kstat_cpu(cpu).irqs[irq]++;
258
259	/*
260	* If its disabled or no action available
261	* keep it masked and get out of here
262	*/
263	action = desc->action;
5a43a066 BH	264	if (unlikely(!action \|\| (desc->status & IRQ_DISABLED))) {
5a43a066 BH	265	desc->status \|= IRQ_PENDING;
dd87eb3a	266	goto out;
5a43a066	267	}
dd87eb3a TG	268
dd87eb3a TG	269	desc->status \|= IRQ_INPROGRESS;
5a43a066	270	desc->status &= ~IRQ_PENDING;
dd87eb3a TG	271	spin_unlock(&desc->lock);
	272
	273	action_ret = handle_IRQ_event(irq, regs, action);
	274	if (!noirqdebug)
	275	note_interrupt(irq, desc, action_ret, regs);
	276
	277	spin_lock(&desc->lock);
	278	desc->status &= ~IRQ_INPROGRESS;
	279	out:
	280	if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
	281	desc->chip->unmask(irq);
	282	spin_unlock(&desc->lock);
	283	}
	284
	285	/**
47c2a3aa	286	* handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a TG	287	* @irq: the interrupt number
	288	* @desc: the interrupt description structure for this irq
	289	* @regs: pointer to a register structure
	290	*
47c2a3aa	291	* Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a TG	292	* call when the interrupt has been serviced. This enables support
	293	* for modern forms of interrupt handlers, which handle the flow
	294	* details in hardware, transparently.
	295	*/
	296	void fastcall
47c2a3aa	297	handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc,
dd87eb3a TG	298	struct pt_regs *regs)
	299	{
	300	unsigned int cpu = smp_processor_id();
	301	struct irqaction *action;
	302	irqreturn_t action_ret;
	303
	304	spin_lock(&desc->lock);
	305
	306	if (unlikely(desc->status & IRQ_INPROGRESS))
	307	goto out;
	308
	309	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING);
	310	kstat_cpu(cpu).irqs[irq]++;
	311
	312	/*
	313	* If its disabled or no action available
	314	* keep it masked and get out of here
	315	*/
	316	action = desc->action;
98bb244b BH	317	if (unlikely(!action \|\| (desc->status & IRQ_DISABLED))) {
98bb244b BH	318	desc->status \|= IRQ_PENDING;
dd87eb3a	319	goto out;
98bb244b	320	}
dd87eb3a TG	321
dd87eb3a TG	322	desc->status \|= IRQ_INPROGRESS;
98bb244b	323	desc->status &= ~IRQ_PENDING;
dd87eb3a TG	324	spin_unlock(&desc->lock);
	325
	326	action_ret = handle_IRQ_event(irq, regs, action);
	327	if (!noirqdebug)
	328	note_interrupt(irq, desc, action_ret, regs);
	329
	330	spin_lock(&desc->lock);
	331	desc->status &= ~IRQ_INPROGRESS;
	332	out:
47c2a3aa	333	desc->chip->eoi(irq);
dd87eb3a TG	334
	335	spin_unlock(&desc->lock);
	336	}
	337
	338	/**
	339	* handle_edge_irq - edge type IRQ handler
	340	* @irq: the interrupt number
	341	* @desc: the interrupt description structure for this irq
	342	* @regs: pointer to a register structure
	343	*
	344	* Interrupt occures on the falling and/or rising edge of a hardware
	345	* signal. The occurence is latched into the irq controller hardware
	346	* and must be acked in order to be reenabled. After the ack another
	347	* interrupt can happen on the same source even before the first one
	348	* is handled by the assosiacted event handler. If this happens it
	349	* might be necessary to disable (mask) the interrupt depending on the
	350	* controller hardware. This requires to reenable the interrupt inside
	351	* of the loop which handles the interrupts which have arrived while
	352	* the handler was running. If all pending interrupts are handled, the
	353	* loop is left.
	354	*/
	355	void fastcall
	356	handle_edge_irq(unsigned int irq, struct irq_desc desc, struct pt_regs regs)
	357	{
	358	const unsigned int cpu = smp_processor_id();
	359
	360	spin_lock(&desc->lock);
	361
	362	desc->status &= ~(IRQ_REPLAY \| IRQ_WAITING);
	363
	364	/*
	365	* If we're currently running this IRQ, or its disabled,
	366	* we shouldn't process the IRQ. Mark it pending, handle
	367	* the necessary masking and go out
	368	*/
	369	if (unlikely((desc->status & (IRQ_INPROGRESS \| IRQ_DISABLED)) \|\|
	370	!desc->action)) {
	371	desc->status \|= (IRQ_PENDING \| IRQ_MASKED);
	372	mask_ack_irq(desc, irq);
	373	goto out_unlock;
	374	}
	375
	376	kstat_cpu(cpu).irqs[irq]++;
	377
	378	/* Start handling the irq */
	379	desc->chip->ack(irq);
	380
	381	/* Mark the IRQ currently in progress.*/
	382	desc->status \|= IRQ_INPROGRESS;
	383
	384	do {
	385	struct irqaction *action = desc->action;
	386	irqreturn_t action_ret;
	387
	388	if (unlikely(!action)) {
	389	desc->chip->mask(irq);
	390	goto out_unlock;
	391	}
	392
	393	/*
	394	* When another irq arrived while we were handling
	395	* one, we could have masked the irq.
	396	* Renable it, if it was not disabled in meantime.
	397	*/
398	if (unlikely((desc->status &
399	(IRQ_PENDING \| IRQ_MASKED \| IRQ_DISABLED)) ==
400	(IRQ_PENDING \| IRQ_MASKED))) {
401	desc->chip->unmask(irq);
402	desc->status &= ~IRQ_MASKED;
403	}
404
405	desc->status &= ~IRQ_PENDING;
406	spin_unlock(&desc->lock);
407	action_ret = handle_IRQ_event(irq, regs, action);
408	if (!noirqdebug)
409	note_interrupt(irq, desc, action_ret, regs);
410	spin_lock(&desc->lock);
411
412	} while ((desc->status & (IRQ_PENDING \| IRQ_DISABLED)) == IRQ_PENDING);
413
414	desc->status &= ~IRQ_INPROGRESS;
415	out_unlock:
416	spin_unlock(&desc->lock);
417	}
418
419	#ifdef CONFIG_SMP
420	/**
421	* handle_percpu_IRQ - Per CPU local irq handler
422	* @irq: the interrupt number
423	* @desc: the interrupt description structure for this irq
424	* @regs: pointer to a register structure
425	*
426	* Per CPU interrupts on SMP machines without locking requirements
427	*/
428	void fastcall
429	handle_percpu_irq(unsigned int irq, struct irq_desc desc, struct pt_regs regs)
430	{
431	irqreturn_t action_ret;
432
433	kstat_this_cpu.irqs[irq]++;
434
435	if (desc->chip->ack)
436	desc->chip->ack(irq);
437
438	action_ret = handle_IRQ_event(irq, regs, desc->action);
439	if (!noirqdebug)
440	note_interrupt(irq, desc, action_ret, regs);
441
442	if (desc->chip->eoi)
443	desc->chip->eoi(irq);
444	}
445
446	#endif /* CONFIG_SMP */
447
448	void
449	__set_irq_handler(unsigned int irq,
450	void fastcall (handle)(unsigned int, irq_desc_t ,
451	struct pt_regs *),
452	int is_chained)
453	{
454	struct irq_desc *desc;
455	unsigned long flags;
456
457	if (irq >= NR_IRQS) {
458	printk(KERN_ERR
459	"Trying to install type control for IRQ%d\n", irq);
460	return;
461	}
462
463	desc = irq_desc + irq;
464
465	if (!handle)
466	handle = handle_bad_irq;
467
f8b5473f TG	468	if (desc->chip == &no_irq_chip) {
	469	printk(KERN_WARNING "Trying to install %sinterrupt handler "
	470	"for IRQ%d\n", is_chained ? "chained " : " ", irq);
	471	/*
	472	* Some ARM implementations install a handler for really dumb
	473	* interrupt hardware without setting an irq_chip. This worked
	474	* with the ARM no_irq_chip but the check in setup_irq would
	475	* prevent us to setup the interrupt at all. Switch it to
	476	* dummy_irq_chip for easy transition.
	477	*/
	478	desc->chip = &dummy_irq_chip;
	479	}
dd87eb3a TG	480
	481	spin_lock_irqsave(&desc->lock, flags);
	482
	483	/* Uninstall? */
	484	if (handle == handle_bad_irq) {
	485	if (desc->chip != &no_irq_chip) {
	486	desc->chip->mask(irq);
	487	desc->chip->ack(irq);
	488	}
	489	desc->status \|= IRQ_DISABLED;
	490	desc->depth = 1;
	491	}
	492	desc->handle_irq = handle;
	493
	494	if (handle != handle_bad_irq && is_chained) {
	495	desc->status &= ~IRQ_DISABLED;
	496	desc->status \|= IRQ_NOREQUEST \| IRQ_NOPROBE;
	497	desc->depth = 0;
	498	desc->chip->unmask(irq);
	499	}
	500	spin_unlock_irqrestore(&desc->lock, flags);
	501	}
	502
	503	void
	504	set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
	505	void fastcall (*handle)(unsigned int,
	506	struct irq_desc *,
	507	struct pt_regs *))
	508	{
	509	set_irq_chip(irq, chip);
	510	__set_irq_handler(irq, handle, 0);
	511	}
	512
	513	/*
	514	* Get a descriptive string for the highlevel handler, for
	515	* /proc/interrupts output:
	516	*/
	517	const char *
	518	handle_irq_name(void fastcall (handle)(unsigned int, struct irq_desc ,
	519	struct pt_regs *))
	520	{
	521	if (handle == handle_level_irq)
47c2a3aa IM	522	return "level ";
	523	if (handle == handle_fasteoi_irq)
	524	return "fasteoi";
dd87eb3a	525	if (handle == handle_edge_irq)
47c2a3aa	526	return "edge ";
dd87eb3a	527	if (handle == handle_simple_irq)
47c2a3aa	528	return "simple ";
dd87eb3a TG	529	#ifdef CONFIG_SMP
dd87eb3a TG	530	if (handle == handle_percpu_irq)
47c2a3aa	531	return "percpu ";
dd87eb3a TG	532	#endif
dd87eb3a TG	533	if (handle == handle_bad_irq)
47c2a3aa	534	return "bad ";
dd87eb3a TG	535
	536	return NULL;
	537	}