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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/handle.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
1da177e4 LT |
6 | * |
7 | * This file contains the core interrupt handling code. | |
a34db9b2 IM |
8 | * |
9 | * Detailed information is available in Documentation/DocBook/genericirq | |
10 | * | |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/irq.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/random.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
6a6de9ef TG |
21 | /** |
22 | * handle_bad_irq - handle spurious and unhandled irqs | |
23 | */ | |
24 | void fastcall | |
25 | handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs) | |
26 | { | |
43f77759 | 27 | print_irq_desc(irq, desc); |
6a6de9ef TG |
28 | kstat_this_cpu.irqs[irq]++; |
29 | ack_bad_irq(irq); | |
30 | } | |
31 | ||
1da177e4 LT |
32 | /* |
33 | * Linux has a controller-independent interrupt architecture. | |
34 | * Every controller has a 'controller-template', that is used | |
35 | * by the main code to do the right thing. Each driver-visible | |
06fcb0c6 | 36 | * interrupt source is transparently wired to the appropriate |
1da177e4 LT |
37 | * controller. Thus drivers need not be aware of the |
38 | * interrupt-controller. | |
39 | * | |
40 | * The code is designed to be easily extended with new/different | |
41 | * interrupt controllers, without having to do assembly magic or | |
42 | * having to touch the generic code. | |
43 | * | |
44 | * Controller mappings for all interrupt sources: | |
45 | */ | |
34ffdb72 | 46 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned = { |
1da177e4 | 47 | [0 ... NR_IRQS-1] = { |
4f167fb4 | 48 | .status = IRQ_DISABLED, |
f1c2662c | 49 | .chip = &no_irq_chip, |
7a55713a | 50 | .handle_irq = handle_bad_irq, |
94d39e1f | 51 | .depth = 1, |
a53da52f IM |
52 | .lock = SPIN_LOCK_UNLOCKED, |
53 | #ifdef CONFIG_SMP | |
54 | .affinity = CPU_MASK_ALL | |
55 | #endif | |
1da177e4 LT |
56 | } |
57 | }; | |
58 | ||
59 | /* | |
77a5afec IM |
60 | * What should we do if we get a hw irq event on an illegal vector? |
61 | * Each architecture has to answer this themself. | |
1da177e4 | 62 | */ |
77a5afec | 63 | static void ack_bad(unsigned int irq) |
1da177e4 | 64 | { |
43f77759 | 65 | print_irq_desc(irq, irq_desc + irq); |
1da177e4 LT |
66 | ack_bad_irq(irq); |
67 | } | |
68 | ||
77a5afec IM |
69 | /* |
70 | * NOP functions | |
71 | */ | |
72 | static void noop(unsigned int irq) | |
73 | { | |
74 | } | |
75 | ||
76 | static unsigned int noop_ret(unsigned int irq) | |
77 | { | |
78 | return 0; | |
79 | } | |
80 | ||
81 | /* | |
82 | * Generic no controller implementation | |
83 | */ | |
f1c2662c IM |
84 | struct irq_chip no_irq_chip = { |
85 | .name = "none", | |
77a5afec IM |
86 | .startup = noop_ret, |
87 | .shutdown = noop, | |
88 | .enable = noop, | |
89 | .disable = noop, | |
90 | .ack = ack_bad, | |
91 | .end = noop, | |
1da177e4 LT |
92 | }; |
93 | ||
f8b5473f TG |
94 | /* |
95 | * Generic dummy implementation which can be used for | |
96 | * real dumb interrupt sources | |
97 | */ | |
98 | struct irq_chip dummy_irq_chip = { | |
99 | .name = "dummy", | |
100 | .startup = noop_ret, | |
101 | .shutdown = noop, | |
102 | .enable = noop, | |
103 | .disable = noop, | |
104 | .ack = noop, | |
105 | .mask = noop, | |
106 | .unmask = noop, | |
107 | .end = noop, | |
108 | }; | |
109 | ||
1da177e4 LT |
110 | /* |
111 | * Special, empty irq handler: | |
112 | */ | |
113 | irqreturn_t no_action(int cpl, void *dev_id, struct pt_regs *regs) | |
114 | { | |
115 | return IRQ_NONE; | |
116 | } | |
117 | ||
8d28bc75 IM |
118 | /** |
119 | * handle_IRQ_event - irq action chain handler | |
120 | * @irq: the interrupt number | |
121 | * @regs: pointer to a register structure | |
122 | * @action: the interrupt action chain for this irq | |
123 | * | |
124 | * Handles the action chain of an irq event | |
1da177e4 | 125 | */ |
2e60bbb6 IM |
126 | irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs, |
127 | struct irqaction *action) | |
1da177e4 | 128 | { |
908dcecd JB |
129 | irqreturn_t ret, retval = IRQ_NONE; |
130 | unsigned int status = 0; | |
1da177e4 | 131 | |
d061daa0 | 132 | handle_dynamic_tick(action); |
a2166abd | 133 | |
3cca53b0 | 134 | if (!(action->flags & IRQF_DISABLED)) |
366c7f55 | 135 | local_irq_enable_in_hardirq(); |
1da177e4 LT |
136 | |
137 | do { | |
138 | ret = action->handler(irq, action->dev_id, regs); | |
139 | if (ret == IRQ_HANDLED) | |
140 | status |= action->flags; | |
141 | retval |= ret; | |
142 | action = action->next; | |
143 | } while (action); | |
144 | ||
3cca53b0 | 145 | if (status & IRQF_SAMPLE_RANDOM) |
1da177e4 LT |
146 | add_interrupt_randomness(irq); |
147 | local_irq_disable(); | |
148 | ||
149 | return retval; | |
150 | } | |
151 | ||
8d28bc75 IM |
152 | /** |
153 | * __do_IRQ - original all in one highlevel IRQ handler | |
154 | * @irq: the interrupt number | |
155 | * @regs: pointer to a register structure | |
156 | * | |
157 | * __do_IRQ handles all normal device IRQ's (the special | |
1da177e4 LT |
158 | * SMP cross-CPU interrupts have their own specific |
159 | * handlers). | |
8d28bc75 IM |
160 | * |
161 | * This is the original x86 implementation which is used for every | |
162 | * interrupt type. | |
1da177e4 LT |
163 | */ |
164 | fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs) | |
165 | { | |
34ffdb72 | 166 | struct irq_desc *desc = irq_desc + irq; |
06fcb0c6 | 167 | struct irqaction *action; |
1da177e4 LT |
168 | unsigned int status; |
169 | ||
170 | kstat_this_cpu.irqs[irq]++; | |
f26fdd59 | 171 | if (CHECK_IRQ_PER_CPU(desc->status)) { |
1da177e4 LT |
172 | irqreturn_t action_ret; |
173 | ||
174 | /* | |
175 | * No locking required for CPU-local interrupts: | |
176 | */ | |
d1bef4ed IM |
177 | if (desc->chip->ack) |
178 | desc->chip->ack(irq); | |
1da177e4 | 179 | action_ret = handle_IRQ_event(irq, regs, desc->action); |
d1bef4ed | 180 | desc->chip->end(irq); |
1da177e4 LT |
181 | return 1; |
182 | } | |
183 | ||
184 | spin_lock(&desc->lock); | |
d1bef4ed IM |
185 | if (desc->chip->ack) |
186 | desc->chip->ack(irq); | |
1da177e4 LT |
187 | /* |
188 | * REPLAY is when Linux resends an IRQ that was dropped earlier | |
189 | * WAITING is used by probe to mark irqs that are being tested | |
190 | */ | |
191 | status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); | |
192 | status |= IRQ_PENDING; /* we _want_ to handle it */ | |
193 | ||
194 | /* | |
195 | * If the IRQ is disabled for whatever reason, we cannot | |
196 | * use the action we have. | |
197 | */ | |
198 | action = NULL; | |
199 | if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { | |
200 | action = desc->action; | |
201 | status &= ~IRQ_PENDING; /* we commit to handling */ | |
202 | status |= IRQ_INPROGRESS; /* we are handling it */ | |
203 | } | |
204 | desc->status = status; | |
205 | ||
206 | /* | |
207 | * If there is no IRQ handler or it was disabled, exit early. | |
208 | * Since we set PENDING, if another processor is handling | |
209 | * a different instance of this same irq, the other processor | |
210 | * will take care of it. | |
211 | */ | |
212 | if (unlikely(!action)) | |
213 | goto out; | |
214 | ||
215 | /* | |
216 | * Edge triggered interrupts need to remember | |
217 | * pending events. | |
218 | * This applies to any hw interrupts that allow a second | |
219 | * instance of the same irq to arrive while we are in do_IRQ | |
220 | * or in the handler. But the code here only handles the _second_ | |
221 | * instance of the irq, not the third or fourth. So it is mostly | |
222 | * useful for irq hardware that does not mask cleanly in an | |
223 | * SMP environment. | |
224 | */ | |
225 | for (;;) { | |
226 | irqreturn_t action_ret; | |
227 | ||
228 | spin_unlock(&desc->lock); | |
229 | ||
230 | action_ret = handle_IRQ_event(irq, regs, action); | |
231 | ||
232 | spin_lock(&desc->lock); | |
233 | if (!noirqdebug) | |
200803df | 234 | note_interrupt(irq, desc, action_ret, regs); |
1da177e4 LT |
235 | if (likely(!(desc->status & IRQ_PENDING))) |
236 | break; | |
237 | desc->status &= ~IRQ_PENDING; | |
238 | } | |
239 | desc->status &= ~IRQ_INPROGRESS; | |
240 | ||
241 | out: | |
242 | /* | |
243 | * The ->end() handler has to deal with interrupts which got | |
244 | * disabled while the handler was running. | |
245 | */ | |
d1bef4ed | 246 | desc->chip->end(irq); |
1da177e4 LT |
247 | spin_unlock(&desc->lock); |
248 | ||
249 | return 1; | |
250 | } | |
251 | ||
243c7621 IM |
252 | #ifdef CONFIG_TRACE_IRQFLAGS |
253 | ||
254 | /* | |
255 | * lockdep: we want to handle all irq_desc locks as a single lock-class: | |
256 | */ | |
257 | static struct lock_class_key irq_desc_lock_class; | |
258 | ||
259 | void early_init_irq_lock_class(void) | |
260 | { | |
261 | int i; | |
262 | ||
263 | for (i = 0; i < NR_IRQS; i++) | |
264 | lockdep_set_class(&irq_desc[i].lock, &irq_desc_lock_class); | |
265 | } | |
266 | ||
267 | #endif |