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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/handle.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
1da177e4 LT |
6 | * |
7 | * This file contains the core interrupt handling code. | |
a34db9b2 IM |
8 | * |
9 | * Detailed information is available in Documentation/DocBook/genericirq | |
10 | * | |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/irq.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/random.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
6a6de9ef TG |
21 | /** |
22 | * handle_bad_irq - handle spurious and unhandled irqs | |
23 | */ | |
24 | void fastcall | |
25 | handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs) | |
26 | { | |
27 | kstat_this_cpu.irqs[irq]++; | |
28 | ack_bad_irq(irq); | |
29 | } | |
30 | ||
1da177e4 LT |
31 | /* |
32 | * Linux has a controller-independent interrupt architecture. | |
33 | * Every controller has a 'controller-template', that is used | |
34 | * by the main code to do the right thing. Each driver-visible | |
06fcb0c6 | 35 | * interrupt source is transparently wired to the appropriate |
1da177e4 LT |
36 | * controller. Thus drivers need not be aware of the |
37 | * interrupt-controller. | |
38 | * | |
39 | * The code is designed to be easily extended with new/different | |
40 | * interrupt controllers, without having to do assembly magic or | |
41 | * having to touch the generic code. | |
42 | * | |
43 | * Controller mappings for all interrupt sources: | |
44 | */ | |
34ffdb72 | 45 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned = { |
1da177e4 | 46 | [0 ... NR_IRQS-1] = { |
4f167fb4 | 47 | .status = IRQ_DISABLED, |
d1bef4ed | 48 | .chip = &no_irq_type, |
94d39e1f | 49 | .depth = 1, |
a53da52f IM |
50 | .lock = SPIN_LOCK_UNLOCKED, |
51 | #ifdef CONFIG_SMP | |
52 | .affinity = CPU_MASK_ALL | |
53 | #endif | |
1da177e4 LT |
54 | } |
55 | }; | |
56 | ||
57 | /* | |
77a5afec IM |
58 | * What should we do if we get a hw irq event on an illegal vector? |
59 | * Each architecture has to answer this themself. | |
1da177e4 | 60 | */ |
77a5afec | 61 | static void ack_bad(unsigned int irq) |
1da177e4 | 62 | { |
1da177e4 LT |
63 | ack_bad_irq(irq); |
64 | } | |
65 | ||
77a5afec IM |
66 | /* |
67 | * NOP functions | |
68 | */ | |
69 | static void noop(unsigned int irq) | |
70 | { | |
71 | } | |
72 | ||
73 | static unsigned int noop_ret(unsigned int irq) | |
74 | { | |
75 | return 0; | |
76 | } | |
77 | ||
78 | /* | |
79 | * Generic no controller implementation | |
80 | */ | |
1da177e4 | 81 | struct hw_interrupt_type no_irq_type = { |
77a5afec IM |
82 | .typename = "none", |
83 | .startup = noop_ret, | |
84 | .shutdown = noop, | |
85 | .enable = noop, | |
86 | .disable = noop, | |
87 | .ack = ack_bad, | |
88 | .end = noop, | |
1da177e4 LT |
89 | }; |
90 | ||
91 | /* | |
92 | * Special, empty irq handler: | |
93 | */ | |
94 | irqreturn_t no_action(int cpl, void *dev_id, struct pt_regs *regs) | |
95 | { | |
96 | return IRQ_NONE; | |
97 | } | |
98 | ||
8d28bc75 IM |
99 | /** |
100 | * handle_IRQ_event - irq action chain handler | |
101 | * @irq: the interrupt number | |
102 | * @regs: pointer to a register structure | |
103 | * @action: the interrupt action chain for this irq | |
104 | * | |
105 | * Handles the action chain of an irq event | |
1da177e4 | 106 | */ |
2e60bbb6 IM |
107 | irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs, |
108 | struct irqaction *action) | |
1da177e4 | 109 | { |
908dcecd JB |
110 | irqreturn_t ret, retval = IRQ_NONE; |
111 | unsigned int status = 0; | |
1da177e4 LT |
112 | |
113 | if (!(action->flags & SA_INTERRUPT)) | |
114 | local_irq_enable(); | |
115 | ||
116 | do { | |
117 | ret = action->handler(irq, action->dev_id, regs); | |
118 | if (ret == IRQ_HANDLED) | |
119 | status |= action->flags; | |
120 | retval |= ret; | |
121 | action = action->next; | |
122 | } while (action); | |
123 | ||
124 | if (status & SA_SAMPLE_RANDOM) | |
125 | add_interrupt_randomness(irq); | |
126 | local_irq_disable(); | |
127 | ||
128 | return retval; | |
129 | } | |
130 | ||
8d28bc75 IM |
131 | /** |
132 | * __do_IRQ - original all in one highlevel IRQ handler | |
133 | * @irq: the interrupt number | |
134 | * @regs: pointer to a register structure | |
135 | * | |
136 | * __do_IRQ handles all normal device IRQ's (the special | |
1da177e4 LT |
137 | * SMP cross-CPU interrupts have their own specific |
138 | * handlers). | |
8d28bc75 IM |
139 | * |
140 | * This is the original x86 implementation which is used for every | |
141 | * interrupt type. | |
1da177e4 LT |
142 | */ |
143 | fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs) | |
144 | { | |
34ffdb72 | 145 | struct irq_desc *desc = irq_desc + irq; |
06fcb0c6 | 146 | struct irqaction *action; |
1da177e4 LT |
147 | unsigned int status; |
148 | ||
149 | kstat_this_cpu.irqs[irq]++; | |
f26fdd59 | 150 | if (CHECK_IRQ_PER_CPU(desc->status)) { |
1da177e4 LT |
151 | irqreturn_t action_ret; |
152 | ||
153 | /* | |
154 | * No locking required for CPU-local interrupts: | |
155 | */ | |
d1bef4ed IM |
156 | if (desc->chip->ack) |
157 | desc->chip->ack(irq); | |
1da177e4 | 158 | action_ret = handle_IRQ_event(irq, regs, desc->action); |
d1bef4ed | 159 | desc->chip->end(irq); |
1da177e4 LT |
160 | return 1; |
161 | } | |
162 | ||
163 | spin_lock(&desc->lock); | |
d1bef4ed IM |
164 | if (desc->chip->ack) |
165 | desc->chip->ack(irq); | |
1da177e4 LT |
166 | /* |
167 | * REPLAY is when Linux resends an IRQ that was dropped earlier | |
168 | * WAITING is used by probe to mark irqs that are being tested | |
169 | */ | |
170 | status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); | |
171 | status |= IRQ_PENDING; /* we _want_ to handle it */ | |
172 | ||
173 | /* | |
174 | * If the IRQ is disabled for whatever reason, we cannot | |
175 | * use the action we have. | |
176 | */ | |
177 | action = NULL; | |
178 | if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { | |
179 | action = desc->action; | |
180 | status &= ~IRQ_PENDING; /* we commit to handling */ | |
181 | status |= IRQ_INPROGRESS; /* we are handling it */ | |
182 | } | |
183 | desc->status = status; | |
184 | ||
185 | /* | |
186 | * If there is no IRQ handler or it was disabled, exit early. | |
187 | * Since we set PENDING, if another processor is handling | |
188 | * a different instance of this same irq, the other processor | |
189 | * will take care of it. | |
190 | */ | |
191 | if (unlikely(!action)) | |
192 | goto out; | |
193 | ||
194 | /* | |
195 | * Edge triggered interrupts need to remember | |
196 | * pending events. | |
197 | * This applies to any hw interrupts that allow a second | |
198 | * instance of the same irq to arrive while we are in do_IRQ | |
199 | * or in the handler. But the code here only handles the _second_ | |
200 | * instance of the irq, not the third or fourth. So it is mostly | |
201 | * useful for irq hardware that does not mask cleanly in an | |
202 | * SMP environment. | |
203 | */ | |
204 | for (;;) { | |
205 | irqreturn_t action_ret; | |
206 | ||
207 | spin_unlock(&desc->lock); | |
208 | ||
209 | action_ret = handle_IRQ_event(irq, regs, action); | |
210 | ||
211 | spin_lock(&desc->lock); | |
212 | if (!noirqdebug) | |
200803df | 213 | note_interrupt(irq, desc, action_ret, regs); |
1da177e4 LT |
214 | if (likely(!(desc->status & IRQ_PENDING))) |
215 | break; | |
216 | desc->status &= ~IRQ_PENDING; | |
217 | } | |
218 | desc->status &= ~IRQ_INPROGRESS; | |
219 | ||
220 | out: | |
221 | /* | |
222 | * The ->end() handler has to deal with interrupts which got | |
223 | * disabled while the handler was running. | |
224 | */ | |
d1bef4ed | 225 | desc->chip->end(irq); |
1da177e4 LT |
226 | spin_unlock(&desc->lock); |
227 | ||
228 | return 1; | |
229 | } | |
230 |