Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * IRQ subsystem internal functions and variables: | |
dbec07ba TG |
3 | * |
4 | * Do not ever include this file from anything else than | |
5 | * kernel/irq/. Do not even think about using any information outside | |
6 | * of this file for your non core code. | |
1da177e4 | 7 | */ |
e144710b | 8 | #include <linux/irqdesc.h> |
1da177e4 | 9 | |
c1ee6264 TG |
10 | #ifdef CONFIG_SPARSE_IRQ |
11 | # define IRQ_BITMAP_BITS (NR_IRQS + 8196) | |
12 | #else | |
13 | # define IRQ_BITMAP_BITS NR_IRQS | |
14 | #endif | |
15 | ||
dbec07ba TG |
16 | #define istate core_internal_state__do_not_mess_with_it |
17 | ||
2329abfa | 18 | extern bool noirqdebug; |
1da177e4 | 19 | |
1535dfac TG |
20 | /* |
21 | * Bits used by threaded handlers: | |
22 | * IRQTF_RUNTHREAD - signals that the interrupt handler thread should run | |
1535dfac TG |
23 | * IRQTF_WARNED - warning "IRQ_WAKE_THREAD w/o thread_fn" has been printed |
24 | * IRQTF_AFFINITY - irq thread is requested to adjust affinity | |
8d32a307 | 25 | * IRQTF_FORCED_THREAD - irq action is force threaded |
1535dfac TG |
26 | */ |
27 | enum { | |
28 | IRQTF_RUNTHREAD, | |
1535dfac TG |
29 | IRQTF_WARNED, |
30 | IRQTF_AFFINITY, | |
8d32a307 | 31 | IRQTF_FORCED_THREAD, |
1535dfac TG |
32 | }; |
33 | ||
bd062e76 TG |
34 | /* |
35 | * Bit masks for desc->state | |
36 | * | |
37 | * IRQS_AUTODETECT - autodetection in progress | |
7acdd53e TG |
38 | * IRQS_SPURIOUS_DISABLED - was disabled due to spurious interrupt |
39 | * detection | |
6954b75b | 40 | * IRQS_POLL_INPROGRESS - polling in progress |
3d67baec | 41 | * IRQS_ONESHOT - irq is not unmasked in primary handler |
163ef309 TG |
42 | * IRQS_REPLAY - irq is replayed |
43 | * IRQS_WAITING - irq is waiting | |
2a0d6fb3 | 44 | * IRQS_PENDING - irq is pending and replayed later |
c531e836 | 45 | * IRQS_SUSPENDED - irq is suspended |
bd062e76 TG |
46 | */ |
47 | enum { | |
48 | IRQS_AUTODETECT = 0x00000001, | |
7acdd53e | 49 | IRQS_SPURIOUS_DISABLED = 0x00000002, |
6954b75b | 50 | IRQS_POLL_INPROGRESS = 0x00000008, |
3d67baec | 51 | IRQS_ONESHOT = 0x00000020, |
163ef309 TG |
52 | IRQS_REPLAY = 0x00000040, |
53 | IRQS_WAITING = 0x00000080, | |
2a0d6fb3 | 54 | IRQS_PENDING = 0x00000200, |
c531e836 | 55 | IRQS_SUSPENDED = 0x00000800, |
bd062e76 TG |
56 | }; |
57 | ||
1ce6068d TG |
58 | #include "debug.h" |
59 | #include "settings.h" | |
60 | ||
a77c4635 TG |
61 | #define irq_data_to_desc(data) container_of(data, struct irq_desc, irq_data) |
62 | ||
0c5d1eb7 DB |
63 | extern int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
64 | unsigned long flags); | |
0a0c5168 RW |
65 | extern void __disable_irq(struct irq_desc *desc, unsigned int irq, bool susp); |
66 | extern void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume); | |
0c5d1eb7 | 67 | |
b4bc724e | 68 | extern int irq_startup(struct irq_desc *desc, bool resend); |
46999238 | 69 | extern void irq_shutdown(struct irq_desc *desc); |
87923470 TG |
70 | extern void irq_enable(struct irq_desc *desc); |
71 | extern void irq_disable(struct irq_desc *desc); | |
31d9d9b6 MZ |
72 | extern void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu); |
73 | extern void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu); | |
d4d5e089 TG |
74 | extern void mask_irq(struct irq_desc *desc); |
75 | extern void unmask_irq(struct irq_desc *desc); | |
46999238 | 76 | |
85ac16d0 | 77 | extern void init_kstat_irqs(struct irq_desc *desc, int node, int nr); |
0fa0ebbf | 78 | |
4912609f TG |
79 | irqreturn_t handle_irq_event_percpu(struct irq_desc *desc, struct irqaction *action); |
80 | irqreturn_t handle_irq_event(struct irq_desc *desc); | |
81 | ||
e144710b TG |
82 | /* Resending of interrupts :*/ |
83 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); | |
fe200ae4 | 84 | bool irq_wait_for_poll(struct irq_desc *desc); |
e144710b | 85 | |
1da177e4 | 86 | #ifdef CONFIG_PROC_FS |
2c6927a3 | 87 | extern void register_irq_proc(unsigned int irq, struct irq_desc *desc); |
13bfe99e | 88 | extern void unregister_irq_proc(unsigned int irq, struct irq_desc *desc); |
1da177e4 LT |
89 | extern void register_handler_proc(unsigned int irq, struct irqaction *action); |
90 | extern void unregister_handler_proc(unsigned int irq, struct irqaction *action); | |
91 | #else | |
2c6927a3 | 92 | static inline void register_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
13bfe99e | 93 | static inline void unregister_irq_proc(unsigned int irq, struct irq_desc *desc) { } |
1da177e4 LT |
94 | static inline void register_handler_proc(unsigned int irq, |
95 | struct irqaction *action) { } | |
96 | static inline void unregister_handler_proc(unsigned int irq, | |
97 | struct irqaction *action) { } | |
98 | #endif | |
99 | ||
3b8249e7 | 100 | extern int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask); |
f6d87f4b | 101 | |
591d2fb0 | 102 | extern void irq_set_thread_affinity(struct irq_desc *desc); |
57b150cc | 103 | |
818b0f3b JL |
104 | extern int irq_do_set_affinity(struct irq_data *data, |
105 | const struct cpumask *dest, bool force); | |
106 | ||
70aedd24 | 107 | /* Inline functions for support of irq chips on slow busses */ |
3876ec9e | 108 | static inline void chip_bus_lock(struct irq_desc *desc) |
70aedd24 | 109 | { |
3876ec9e TG |
110 | if (unlikely(desc->irq_data.chip->irq_bus_lock)) |
111 | desc->irq_data.chip->irq_bus_lock(&desc->irq_data); | |
70aedd24 TG |
112 | } |
113 | ||
3876ec9e | 114 | static inline void chip_bus_sync_unlock(struct irq_desc *desc) |
70aedd24 | 115 | { |
3876ec9e TG |
116 | if (unlikely(desc->irq_data.chip->irq_bus_sync_unlock)) |
117 | desc->irq_data.chip->irq_bus_sync_unlock(&desc->irq_data); | |
70aedd24 TG |
118 | } |
119 | ||
31d9d9b6 MZ |
120 | #define _IRQ_DESC_CHECK (1 << 0) |
121 | #define _IRQ_DESC_PERCPU (1 << 1) | |
122 | ||
123 | #define IRQ_GET_DESC_CHECK_GLOBAL (_IRQ_DESC_CHECK) | |
124 | #define IRQ_GET_DESC_CHECK_PERCPU (_IRQ_DESC_CHECK | _IRQ_DESC_PERCPU) | |
125 | ||
d5eb4ad2 | 126 | struct irq_desc * |
31d9d9b6 MZ |
127 | __irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus, |
128 | unsigned int check); | |
d5eb4ad2 TG |
129 | void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus); |
130 | ||
131 | static inline struct irq_desc * | |
31d9d9b6 | 132 | irq_get_desc_buslock(unsigned int irq, unsigned long *flags, unsigned int check) |
d5eb4ad2 | 133 | { |
31d9d9b6 | 134 | return __irq_get_desc_lock(irq, flags, true, check); |
d5eb4ad2 TG |
135 | } |
136 | ||
137 | static inline void | |
138 | irq_put_desc_busunlock(struct irq_desc *desc, unsigned long flags) | |
139 | { | |
140 | __irq_put_desc_unlock(desc, flags, true); | |
141 | } | |
142 | ||
143 | static inline struct irq_desc * | |
31d9d9b6 | 144 | irq_get_desc_lock(unsigned int irq, unsigned long *flags, unsigned int check) |
d5eb4ad2 | 145 | { |
31d9d9b6 | 146 | return __irq_get_desc_lock(irq, flags, false, check); |
d5eb4ad2 TG |
147 | } |
148 | ||
149 | static inline void | |
150 | irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags) | |
151 | { | |
152 | __irq_put_desc_unlock(desc, flags, false); | |
153 | } | |
154 | ||
f230b6d5 TG |
155 | /* |
156 | * Manipulation functions for irq_data.state | |
157 | */ | |
158 | static inline void irqd_set_move_pending(struct irq_data *d) | |
159 | { | |
160 | d->state_use_accessors |= IRQD_SETAFFINITY_PENDING; | |
f230b6d5 TG |
161 | } |
162 | ||
163 | static inline void irqd_clr_move_pending(struct irq_data *d) | |
164 | { | |
165 | d->state_use_accessors &= ~IRQD_SETAFFINITY_PENDING; | |
f230b6d5 | 166 | } |
a005677b TG |
167 | |
168 | static inline void irqd_clear(struct irq_data *d, unsigned int mask) | |
169 | { | |
170 | d->state_use_accessors &= ~mask; | |
171 | } | |
172 | ||
173 | static inline void irqd_set(struct irq_data *d, unsigned int mask) | |
174 | { | |
175 | d->state_use_accessors |= mask; | |
176 | } | |
177 | ||
2bdd1055 TG |
178 | static inline bool irqd_has_set(struct irq_data *d, unsigned int mask) |
179 | { | |
180 | return d->state_use_accessors & mask; | |
181 | } |