Merge branches 'timers/clocksource', 'timers/hpet', 'timers/hrtimers', 'timers/nohz...
[deliverable/linux.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
10#include <linux/irq.h>
11#include <linux/module.h>
12#include <linux/random.h>
13#include <linux/interrupt.h>
1aeb272c 14#include <linux/slab.h>
1da177e4
LT
15
16#include "internals.h"
17
18#ifdef CONFIG_SMP
19
18404756
MK
20cpumask_t irq_default_affinity = CPU_MASK_ALL;
21
1da177e4
LT
22/**
23 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
1e5d5331 24 * @irq: interrupt number to wait for
1da177e4
LT
25 *
26 * This function waits for any pending IRQ handlers for this interrupt
27 * to complete before returning. If you use this function while
28 * holding a resource the IRQ handler may need you will deadlock.
29 *
30 * This function may be called - with care - from IRQ context.
31 */
32void synchronize_irq(unsigned int irq)
33{
cb5bc832 34 struct irq_desc *desc = irq_to_desc(irq);
a98ce5c6 35 unsigned int status;
1da177e4 36
7d94f7ca 37 if (!desc)
c2b5a251
MW
38 return;
39
a98ce5c6
HX
40 do {
41 unsigned long flags;
42
43 /*
44 * Wait until we're out of the critical section. This might
45 * give the wrong answer due to the lack of memory barriers.
46 */
47 while (desc->status & IRQ_INPROGRESS)
48 cpu_relax();
49
50 /* Ok, that indicated we're done: double-check carefully. */
51 spin_lock_irqsave(&desc->lock, flags);
52 status = desc->status;
53 spin_unlock_irqrestore(&desc->lock, flags);
54
55 /* Oops, that failed? */
56 } while (status & IRQ_INPROGRESS);
1da177e4 57}
1da177e4
LT
58EXPORT_SYMBOL(synchronize_irq);
59
771ee3b0
TG
60/**
61 * irq_can_set_affinity - Check if the affinity of a given irq can be set
62 * @irq: Interrupt to check
63 *
64 */
65int irq_can_set_affinity(unsigned int irq)
66{
08678b08 67 struct irq_desc *desc = irq_to_desc(irq);
771ee3b0
TG
68
69 if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip ||
70 !desc->chip->set_affinity)
71 return 0;
72
73 return 1;
74}
75
76/**
77 * irq_set_affinity - Set the irq affinity of a given irq
78 * @irq: Interrupt to set affinity
79 * @cpumask: cpumask
80 *
81 */
82int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
83{
08678b08 84 struct irq_desc *desc = irq_to_desc(irq);
f6d87f4b 85 unsigned long flags;
771ee3b0
TG
86
87 if (!desc->chip->set_affinity)
88 return -EINVAL;
89
f6d87f4b
TG
90 spin_lock_irqsave(&desc->lock, flags);
91
771ee3b0 92#ifdef CONFIG_GENERIC_PENDING_IRQ
932775a4 93 if (desc->status & IRQ_MOVE_PCNTXT || desc->status & IRQ_DISABLED) {
932775a4 94 desc->affinity = cpumask;
72b1e22d 95 desc->chip->set_affinity(irq, cpumask);
f6d87f4b
TG
96 } else {
97 desc->status |= IRQ_MOVE_PENDING;
98 desc->pending_mask = cpumask;
99 }
771ee3b0
TG
100#else
101 desc->affinity = cpumask;
102 desc->chip->set_affinity(irq, cpumask);
103#endif
f6d87f4b
TG
104 desc->status |= IRQ_AFFINITY_SET;
105 spin_unlock_irqrestore(&desc->lock, flags);
771ee3b0
TG
106 return 0;
107}
108
18404756
MK
109#ifndef CONFIG_AUTO_IRQ_AFFINITY
110/*
111 * Generic version of the affinity autoselector.
112 */
f6d87f4b 113int do_irq_select_affinity(unsigned int irq, struct irq_desc *desc)
18404756
MK
114{
115 cpumask_t mask;
116
117 if (!irq_can_set_affinity(irq))
118 return 0;
119
120 cpus_and(mask, cpu_online_map, irq_default_affinity);
121
f6d87f4b
TG
122 /*
123 * Preserve an userspace affinity setup, but make sure that
124 * one of the targets is online.
125 */
612e3684 126 if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) {
f6d87f4b
TG
127 if (cpus_intersects(desc->affinity, cpu_online_map))
128 mask = desc->affinity;
129 else
130 desc->status &= ~IRQ_AFFINITY_SET;
131 }
132
08678b08
YL
133 desc->affinity = mask;
134 desc->chip->set_affinity(irq, mask);
18404756 135
18404756
MK
136 return 0;
137}
f6d87f4b
TG
138#else
139static inline int do_irq_select_affinity(unsigned int irq, struct irq_desc *d)
140{
141 return irq_select_affinity(irq);
142}
18404756
MK
143#endif
144
f6d87f4b
TG
145/*
146 * Called when affinity is set via /proc/irq
147 */
148int irq_select_affinity_usr(unsigned int irq)
149{
150 struct irq_desc *desc = irq_to_desc(irq);
151 unsigned long flags;
152 int ret;
153
154 spin_lock_irqsave(&desc->lock, flags);
155 ret = do_irq_select_affinity(irq, desc);
156 spin_unlock_irqrestore(&desc->lock, flags);
157
158 return ret;
159}
160
161#else
f131e243 162static inline int do_irq_select_affinity(int irq, struct irq_desc *desc)
f6d87f4b
TG
163{
164 return 0;
165}
1da177e4
LT
166#endif
167
168/**
169 * disable_irq_nosync - disable an irq without waiting
170 * @irq: Interrupt to disable
171 *
172 * Disable the selected interrupt line. Disables and Enables are
173 * nested.
174 * Unlike disable_irq(), this function does not ensure existing
175 * instances of the IRQ handler have completed before returning.
176 *
177 * This function may be called from IRQ context.
178 */
179void disable_irq_nosync(unsigned int irq)
180{
d3c60047 181 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
182 unsigned long flags;
183
7d94f7ca 184 if (!desc)
c2b5a251
MW
185 return;
186
1da177e4
LT
187 spin_lock_irqsave(&desc->lock, flags);
188 if (!desc->depth++) {
189 desc->status |= IRQ_DISABLED;
d1bef4ed 190 desc->chip->disable(irq);
1da177e4
LT
191 }
192 spin_unlock_irqrestore(&desc->lock, flags);
193}
1da177e4
LT
194EXPORT_SYMBOL(disable_irq_nosync);
195
196/**
197 * disable_irq - disable an irq and wait for completion
198 * @irq: Interrupt to disable
199 *
200 * Disable the selected interrupt line. Enables and Disables are
201 * nested.
202 * This function waits for any pending IRQ handlers for this interrupt
203 * to complete before returning. If you use this function while
204 * holding a resource the IRQ handler may need you will deadlock.
205 *
206 * This function may be called - with care - from IRQ context.
207 */
208void disable_irq(unsigned int irq)
209{
d3c60047 210 struct irq_desc *desc = irq_to_desc(irq);
1da177e4 211
7d94f7ca 212 if (!desc)
c2b5a251
MW
213 return;
214
1da177e4
LT
215 disable_irq_nosync(irq);
216 if (desc->action)
217 synchronize_irq(irq);
218}
1da177e4
LT
219EXPORT_SYMBOL(disable_irq);
220
1adb0850
TG
221static void __enable_irq(struct irq_desc *desc, unsigned int irq)
222{
223 switch (desc->depth) {
224 case 0:
b8c512f6 225 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq);
1adb0850
TG
226 break;
227 case 1: {
228 unsigned int status = desc->status & ~IRQ_DISABLED;
229
230 /* Prevent probing on this irq: */
231 desc->status = status | IRQ_NOPROBE;
232 check_irq_resend(desc, irq);
233 /* fall-through */
234 }
235 default:
236 desc->depth--;
237 }
238}
239
1da177e4
LT
240/**
241 * enable_irq - enable handling of an irq
242 * @irq: Interrupt to enable
243 *
244 * Undoes the effect of one call to disable_irq(). If this
245 * matches the last disable, processing of interrupts on this
246 * IRQ line is re-enabled.
247 *
248 * This function may be called from IRQ context.
249 */
250void enable_irq(unsigned int irq)
251{
d3c60047 252 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
253 unsigned long flags;
254
7d94f7ca 255 if (!desc)
c2b5a251
MW
256 return;
257
1da177e4 258 spin_lock_irqsave(&desc->lock, flags);
1adb0850 259 __enable_irq(desc, irq);
1da177e4
LT
260 spin_unlock_irqrestore(&desc->lock, flags);
261}
1da177e4
LT
262EXPORT_SYMBOL(enable_irq);
263
0c5d1eb7 264static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 265{
08678b08 266 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
267 int ret = -ENXIO;
268
269 if (desc->chip->set_wake)
270 ret = desc->chip->set_wake(irq, on);
271
272 return ret;
273}
274
ba9a2331
TG
275/**
276 * set_irq_wake - control irq power management wakeup
277 * @irq: interrupt to control
278 * @on: enable/disable power management wakeup
279 *
15a647eb
DB
280 * Enable/disable power management wakeup mode, which is
281 * disabled by default. Enables and disables must match,
282 * just as they match for non-wakeup mode support.
283 *
284 * Wakeup mode lets this IRQ wake the system from sleep
285 * states like "suspend to RAM".
ba9a2331
TG
286 */
287int set_irq_wake(unsigned int irq, unsigned int on)
288{
08678b08 289 struct irq_desc *desc = irq_to_desc(irq);
ba9a2331 290 unsigned long flags;
2db87321 291 int ret = 0;
ba9a2331 292
15a647eb
DB
293 /* wakeup-capable irqs can be shared between drivers that
294 * don't need to have the same sleep mode behaviors.
295 */
ba9a2331 296 spin_lock_irqsave(&desc->lock, flags);
15a647eb 297 if (on) {
2db87321
UKK
298 if (desc->wake_depth++ == 0) {
299 ret = set_irq_wake_real(irq, on);
300 if (ret)
301 desc->wake_depth = 0;
302 else
303 desc->status |= IRQ_WAKEUP;
304 }
15a647eb
DB
305 } else {
306 if (desc->wake_depth == 0) {
7a2c4770 307 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
308 } else if (--desc->wake_depth == 0) {
309 ret = set_irq_wake_real(irq, on);
310 if (ret)
311 desc->wake_depth = 1;
312 else
313 desc->status &= ~IRQ_WAKEUP;
314 }
15a647eb 315 }
2db87321 316
ba9a2331
TG
317 spin_unlock_irqrestore(&desc->lock, flags);
318 return ret;
319}
320EXPORT_SYMBOL(set_irq_wake);
321
1da177e4
LT
322/*
323 * Internal function that tells the architecture code whether a
324 * particular irq has been exclusively allocated or is available
325 * for driver use.
326 */
327int can_request_irq(unsigned int irq, unsigned long irqflags)
328{
d3c60047 329 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
330 struct irqaction *action;
331
7d94f7ca
YL
332 if (!desc)
333 return 0;
334
335 if (desc->status & IRQ_NOREQUEST)
1da177e4
LT
336 return 0;
337
08678b08 338 action = desc->action;
1da177e4 339 if (action)
3cca53b0 340 if (irqflags & action->flags & IRQF_SHARED)
1da177e4
LT
341 action = NULL;
342
343 return !action;
344}
345
6a6de9ef
TG
346void compat_irq_chip_set_default_handler(struct irq_desc *desc)
347{
348 /*
349 * If the architecture still has not overriden
350 * the flow handler then zap the default. This
351 * should catch incorrect flow-type setting.
352 */
353 if (desc->handle_irq == &handle_bad_irq)
354 desc->handle_irq = NULL;
355}
356
0c5d1eb7 357int __irq_set_trigger(struct irq_desc *desc, unsigned int irq,
82736f4d
UKK
358 unsigned long flags)
359{
360 int ret;
0c5d1eb7 361 struct irq_chip *chip = desc->chip;
82736f4d
UKK
362
363 if (!chip || !chip->set_type) {
364 /*
365 * IRQF_TRIGGER_* but the PIC does not support multiple
366 * flow-types?
367 */
3ff68a6a 368 pr_debug("No set_type function for IRQ %d (%s)\n", irq,
82736f4d
UKK
369 chip ? (chip->name ? : "unknown") : "unknown");
370 return 0;
371 }
372
373 ret = chip->set_type(irq, flags & IRQF_TRIGGER_MASK);
374
375 if (ret)
c69ad71b
DB
376 pr_err("setting trigger mode %d for irq %u failed (%pF)\n",
377 (int)(flags & IRQF_TRIGGER_MASK),
82736f4d 378 irq, chip->set_type);
0c5d1eb7
DB
379 else {
380 /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */
381 desc->status &= ~IRQ_TYPE_SENSE_MASK;
382 desc->status |= flags & IRQ_TYPE_SENSE_MASK;
383 }
82736f4d
UKK
384
385 return ret;
386}
387
1da177e4
LT
388/*
389 * Internal function to register an irqaction - typically used to
390 * allocate special interrupts that are part of the architecture.
391 */
d3c60047
TG
392static int
393__setup_irq(unsigned int irq, struct irq_desc * desc, struct irqaction *new)
1da177e4 394{
1da177e4 395 struct irqaction *old, **p;
8b126b77 396 const char *old_name = NULL;
1da177e4
LT
397 unsigned long flags;
398 int shared = 0;
82736f4d 399 int ret;
1da177e4 400
7d94f7ca 401 if (!desc)
c2b5a251
MW
402 return -EINVAL;
403
f1c2662c 404 if (desc->chip == &no_irq_chip)
1da177e4
LT
405 return -ENOSYS;
406 /*
407 * Some drivers like serial.c use request_irq() heavily,
408 * so we have to be careful not to interfere with a
409 * running system.
410 */
3cca53b0 411 if (new->flags & IRQF_SAMPLE_RANDOM) {
1da177e4
LT
412 /*
413 * This function might sleep, we want to call it first,
414 * outside of the atomic block.
415 * Yes, this might clear the entropy pool if the wrong
416 * driver is attempted to be loaded, without actually
417 * installing a new handler, but is this really a problem,
418 * only the sysadmin is able to do this.
419 */
420 rand_initialize_irq(irq);
421 }
422
423 /*
424 * The following block of code has to be executed atomically
425 */
06fcb0c6 426 spin_lock_irqsave(&desc->lock, flags);
1da177e4 427 p = &desc->action;
06fcb0c6
IM
428 old = *p;
429 if (old) {
e76de9f8
TG
430 /*
431 * Can't share interrupts unless both agree to and are
432 * the same type (level, edge, polarity). So both flag
3cca53b0 433 * fields must have IRQF_SHARED set and the bits which
e76de9f8
TG
434 * set the trigger type must match.
435 */
3cca53b0 436 if (!((old->flags & new->flags) & IRQF_SHARED) ||
8b126b77
AM
437 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) {
438 old_name = old->name;
f5163427 439 goto mismatch;
8b126b77 440 }
f5163427 441
284c6680 442#if defined(CONFIG_IRQ_PER_CPU)
f5163427 443 /* All handlers must agree on per-cpuness */
3cca53b0
TG
444 if ((old->flags & IRQF_PERCPU) !=
445 (new->flags & IRQF_PERCPU))
f5163427
DS
446 goto mismatch;
447#endif
1da177e4
LT
448
449 /* add new interrupt at end of irq queue */
450 do {
451 p = &old->next;
452 old = *p;
453 } while (old);
454 shared = 1;
455 }
456
1da177e4 457 if (!shared) {
6a6de9ef 458 irq_chip_set_defaults(desc->chip);
e76de9f8
TG
459
460 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 461 if (new->flags & IRQF_TRIGGER_MASK) {
0c5d1eb7 462 ret = __irq_set_trigger(desc, irq, new->flags);
82736f4d
UKK
463
464 if (ret) {
465 spin_unlock_irqrestore(&desc->lock, flags);
466 return ret;
467 }
e76de9f8
TG
468 } else
469 compat_irq_chip_set_default_handler(desc);
82736f4d
UKK
470#if defined(CONFIG_IRQ_PER_CPU)
471 if (new->flags & IRQF_PERCPU)
472 desc->status |= IRQ_PER_CPU;
473#endif
6a6de9ef 474
94d39e1f 475 desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING |
1adb0850 476 IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED);
94d39e1f
TG
477
478 if (!(desc->status & IRQ_NOAUTOEN)) {
479 desc->depth = 0;
480 desc->status &= ~IRQ_DISABLED;
7e6e178a 481 desc->chip->startup(irq);
e76de9f8
TG
482 } else
483 /* Undo nested disables: */
484 desc->depth = 1;
18404756 485
612e3684
TG
486 /* Exclude IRQ from balancing if requested */
487 if (new->flags & IRQF_NOBALANCING)
488 desc->status |= IRQ_NO_BALANCING;
489
18404756 490 /* Set default affinity mask once everything is setup */
f6d87f4b 491 do_irq_select_affinity(irq, desc);
0c5d1eb7
DB
492
493 } else if ((new->flags & IRQF_TRIGGER_MASK)
494 && (new->flags & IRQF_TRIGGER_MASK)
495 != (desc->status & IRQ_TYPE_SENSE_MASK)) {
496 /* hope the handler works with the actual trigger mode... */
497 pr_warning("IRQ %d uses trigger mode %d; requested %d\n",
498 irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK),
499 (int)(new->flags & IRQF_TRIGGER_MASK));
1da177e4 500 }
82736f4d
UKK
501
502 *p = new;
503
8528b0f1
LT
504 /* Reset broken irq detection when installing new handler */
505 desc->irq_count = 0;
506 desc->irqs_unhandled = 0;
1adb0850
TG
507
508 /*
509 * Check whether we disabled the irq via the spurious handler
510 * before. Reenable it and give it another chance.
511 */
512 if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) {
513 desc->status &= ~IRQ_SPURIOUS_DISABLED;
514 __enable_irq(desc, irq);
515 }
516
06fcb0c6 517 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
518
519 new->irq = irq;
2c6927a3 520 register_irq_proc(irq, desc);
1da177e4
LT
521 new->dir = NULL;
522 register_handler_proc(irq, new);
523
524 return 0;
f5163427
DS
525
526mismatch:
3f050447 527#ifdef CONFIG_DEBUG_SHIRQ
3cca53b0 528 if (!(new->flags & IRQF_PROBE_SHARED)) {
e8c4b9d0 529 printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq);
8b126b77
AM
530 if (old_name)
531 printk(KERN_ERR "current handler: %s\n", old_name);
13e87ec6
AM
532 dump_stack();
533 }
3f050447 534#endif
8b126b77 535 spin_unlock_irqrestore(&desc->lock, flags);
f5163427 536 return -EBUSY;
1da177e4
LT
537}
538
d3c60047
TG
539/**
540 * setup_irq - setup an interrupt
541 * @irq: Interrupt line to setup
542 * @act: irqaction for the interrupt
543 *
544 * Used to statically setup interrupts in the early boot process.
545 */
546int setup_irq(unsigned int irq, struct irqaction *act)
547{
548 struct irq_desc *desc = irq_to_desc(irq);
549
550 return __setup_irq(irq, desc, act);
551}
552
1da177e4
LT
553/**
554 * free_irq - free an interrupt
555 * @irq: Interrupt line to free
556 * @dev_id: Device identity to free
557 *
558 * Remove an interrupt handler. The handler is removed and if the
559 * interrupt line is no longer in use by any driver it is disabled.
560 * On a shared IRQ the caller must ensure the interrupt is disabled
561 * on the card it drives before calling this function. The function
562 * does not return until any executing interrupts for this IRQ
563 * have completed.
564 *
565 * This function must not be called from interrupt context.
566 */
567void free_irq(unsigned int irq, void *dev_id)
568{
d3c60047 569 struct irq_desc *desc = irq_to_desc(irq);
1da177e4
LT
570 struct irqaction **p;
571 unsigned long flags;
572
cd7b24bb 573 WARN_ON(in_interrupt());
7d94f7ca 574
7d94f7ca 575 if (!desc)
1da177e4
LT
576 return;
577
06fcb0c6 578 spin_lock_irqsave(&desc->lock, flags);
1da177e4
LT
579 p = &desc->action;
580 for (;;) {
06fcb0c6 581 struct irqaction *action = *p;
1da177e4
LT
582
583 if (action) {
584 struct irqaction **pp = p;
585
586 p = &action->next;
587 if (action->dev_id != dev_id)
588 continue;
589
590 /* Found it - now remove it from the list of entries */
591 *pp = action->next;
dbce706e 592
b77d6adc
PBG
593 /* Currently used only by UML, might disappear one day.*/
594#ifdef CONFIG_IRQ_RELEASE_METHOD
d1bef4ed
IM
595 if (desc->chip->release)
596 desc->chip->release(irq, dev_id);
b77d6adc 597#endif
dbce706e 598
1da177e4
LT
599 if (!desc->action) {
600 desc->status |= IRQ_DISABLED;
d1bef4ed
IM
601 if (desc->chip->shutdown)
602 desc->chip->shutdown(irq);
1da177e4 603 else
d1bef4ed 604 desc->chip->disable(irq);
1da177e4 605 }
06fcb0c6 606 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
607 unregister_handler_proc(irq, action);
608
609 /* Make sure it's not being used on another CPU */
610 synchronize_irq(irq);
1d99493b
DW
611#ifdef CONFIG_DEBUG_SHIRQ
612 /*
613 * It's a shared IRQ -- the driver ought to be
614 * prepared for it to happen even now it's
615 * being freed, so let's make sure.... We do
616 * this after actually deregistering it, to
617 * make sure that a 'real' IRQ doesn't run in
618 * parallel with our fake
619 */
620 if (action->flags & IRQF_SHARED) {
621 local_irq_save(flags);
622 action->handler(irq, dev_id);
623 local_irq_restore(flags);
624 }
625#endif
1da177e4
LT
626 kfree(action);
627 return;
628 }
e8c4b9d0 629 printk(KERN_ERR "Trying to free already-free IRQ %d\n", irq);
70edcd77
IM
630#ifdef CONFIG_DEBUG_SHIRQ
631 dump_stack();
632#endif
06fcb0c6 633 spin_unlock_irqrestore(&desc->lock, flags);
1da177e4
LT
634 return;
635 }
636}
1da177e4
LT
637EXPORT_SYMBOL(free_irq);
638
639/**
640 * request_irq - allocate an interrupt line
641 * @irq: Interrupt line to allocate
642 * @handler: Function to be called when the IRQ occurs
643 * @irqflags: Interrupt type flags
644 * @devname: An ascii name for the claiming device
645 * @dev_id: A cookie passed back to the handler function
646 *
647 * This call allocates interrupt resources and enables the
648 * interrupt line and IRQ handling. From the point this
649 * call is made your handler function may be invoked. Since
650 * your handler function must clear any interrupt the board
651 * raises, you must take care both to initialise your hardware
652 * and to set up the interrupt handler in the right order.
653 *
654 * Dev_id must be globally unique. Normally the address of the
655 * device data structure is used as the cookie. Since the handler
656 * receives this value it makes sense to use it.
657 *
658 * If your interrupt is shared you must pass a non NULL dev_id
659 * as this is required when freeing the interrupt.
660 *
661 * Flags:
662 *
3cca53b0
TG
663 * IRQF_SHARED Interrupt is shared
664 * IRQF_DISABLED Disable local interrupts while processing
665 * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy
0c5d1eb7 666 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
667 *
668 */
da482792 669int request_irq(unsigned int irq, irq_handler_t handler,
06fcb0c6 670 unsigned long irqflags, const char *devname, void *dev_id)
1da177e4 671{
06fcb0c6 672 struct irqaction *action;
08678b08 673 struct irq_desc *desc;
d3c60047 674 int retval;
1da177e4 675
fbb9ce95
IM
676#ifdef CONFIG_LOCKDEP
677 /*
678 * Lockdep wants atomic interrupt handlers:
679 */
38515e90 680 irqflags |= IRQF_DISABLED;
fbb9ce95 681#endif
1da177e4
LT
682 /*
683 * Sanity-check: shared interrupts must pass in a real dev-ID,
684 * otherwise we'll have trouble later trying to figure out
685 * which interrupt is which (messes up the interrupt freeing
686 * logic etc).
687 */
3cca53b0 688 if ((irqflags & IRQF_SHARED) && !dev_id)
1da177e4 689 return -EINVAL;
7d94f7ca 690
cb5bc832 691 desc = irq_to_desc(irq);
7d94f7ca 692 if (!desc)
1da177e4 693 return -EINVAL;
7d94f7ca 694
08678b08 695 if (desc->status & IRQ_NOREQUEST)
6550c775 696 return -EINVAL;
1da177e4
LT
697 if (!handler)
698 return -EINVAL;
699
700 action = kmalloc(sizeof(struct irqaction), GFP_ATOMIC);
701 if (!action)
702 return -ENOMEM;
703
704 action->handler = handler;
705 action->flags = irqflags;
706 cpus_clear(action->mask);
707 action->name = devname;
708 action->next = NULL;
709 action->dev_id = dev_id;
710
d3c60047 711 retval = __setup_irq(irq, desc, action);
377bf1e4
AV
712 if (retval)
713 kfree(action);
714
a304e1b8
DW
715#ifdef CONFIG_DEBUG_SHIRQ
716 if (irqflags & IRQF_SHARED) {
717 /*
718 * It's a shared IRQ -- the driver ought to be prepared for it
719 * to happen immediately, so let's make sure....
377bf1e4
AV
720 * We disable the irq to make sure that a 'real' IRQ doesn't
721 * run in parallel with our fake.
a304e1b8 722 */
59845b1f 723 unsigned long flags;
a304e1b8 724
377bf1e4 725 disable_irq(irq);
59845b1f 726 local_irq_save(flags);
377bf1e4 727
59845b1f 728 handler(irq, dev_id);
377bf1e4 729
59845b1f 730 local_irq_restore(flags);
377bf1e4 731 enable_irq(irq);
a304e1b8
DW
732 }
733#endif
1da177e4
LT
734 return retval;
735}
1da177e4 736EXPORT_SYMBOL(request_irq);
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