Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
3aa551c9 | 11 | #include <linux/kthread.h> |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/random.h> | |
14 | #include <linux/interrupt.h> | |
1aeb272c | 15 | #include <linux/slab.h> |
3aa551c9 | 16 | #include <linux/sched.h> |
1da177e4 LT |
17 | |
18 | #include "internals.h" | |
19 | ||
1da177e4 LT |
20 | /** |
21 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 22 | * @irq: interrupt number to wait for |
1da177e4 LT |
23 | * |
24 | * This function waits for any pending IRQ handlers for this interrupt | |
25 | * to complete before returning. If you use this function while | |
26 | * holding a resource the IRQ handler may need you will deadlock. | |
27 | * | |
28 | * This function may be called - with care - from IRQ context. | |
29 | */ | |
30 | void synchronize_irq(unsigned int irq) | |
31 | { | |
cb5bc832 | 32 | struct irq_desc *desc = irq_to_desc(irq); |
009b4c3b | 33 | unsigned int state; |
1da177e4 | 34 | |
7d94f7ca | 35 | if (!desc) |
c2b5a251 MW |
36 | return; |
37 | ||
a98ce5c6 HX |
38 | do { |
39 | unsigned long flags; | |
40 | ||
41 | /* | |
42 | * Wait until we're out of the critical section. This might | |
43 | * give the wrong answer due to the lack of memory barriers. | |
44 | */ | |
009b4c3b | 45 | while (desc->istate & IRQS_INPROGRESS) |
a98ce5c6 HX |
46 | cpu_relax(); |
47 | ||
48 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 49 | raw_spin_lock_irqsave(&desc->lock, flags); |
009b4c3b | 50 | state = desc->istate; |
239007b8 | 51 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
52 | |
53 | /* Oops, that failed? */ | |
009b4c3b | 54 | } while (state & IRQS_INPROGRESS); |
3aa551c9 TG |
55 | |
56 | /* | |
57 | * We made sure that no hardirq handler is running. Now verify | |
58 | * that no threaded handlers are active. | |
59 | */ | |
60 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); | |
1da177e4 | 61 | } |
1da177e4 LT |
62 | EXPORT_SYMBOL(synchronize_irq); |
63 | ||
3aa551c9 TG |
64 | #ifdef CONFIG_SMP |
65 | cpumask_var_t irq_default_affinity; | |
66 | ||
771ee3b0 TG |
67 | /** |
68 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
69 | * @irq: Interrupt to check | |
70 | * | |
71 | */ | |
72 | int irq_can_set_affinity(unsigned int irq) | |
73 | { | |
08678b08 | 74 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 | 75 | |
bce43032 TG |
76 | if (!desc || !irqd_can_balance(&desc->irq_data) || |
77 | !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity) | |
771ee3b0 TG |
78 | return 0; |
79 | ||
80 | return 1; | |
81 | } | |
82 | ||
591d2fb0 TG |
83 | /** |
84 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
85 | * @desc: irq descriptor which has affitnity changed | |
86 | * | |
87 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
88 | * to the interrupt thread itself. We can not call | |
89 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
90 | * code can be called from hard interrupt context. | |
91 | */ | |
92 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 TG |
93 | { |
94 | struct irqaction *action = desc->action; | |
95 | ||
96 | while (action) { | |
97 | if (action->thread) | |
591d2fb0 | 98 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
99 | action = action->next; |
100 | } | |
101 | } | |
102 | ||
1fa46f1f TG |
103 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
104 | static inline bool irq_can_move_pcntxt(struct irq_desc *desc) | |
105 | { | |
1ccb4e61 | 106 | return irq_settings_can_move_pcntxt(desc); |
1fa46f1f TG |
107 | } |
108 | static inline bool irq_move_pending(struct irq_desc *desc) | |
109 | { | |
f230b6d5 | 110 | return irqd_is_setaffinity_pending(&desc->irq_data); |
1fa46f1f TG |
111 | } |
112 | static inline void | |
113 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
114 | { | |
115 | cpumask_copy(desc->pending_mask, mask); | |
116 | } | |
117 | static inline void | |
118 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
119 | { | |
120 | cpumask_copy(mask, desc->pending_mask); | |
121 | } | |
122 | #else | |
123 | static inline bool irq_can_move_pcntxt(struct irq_desc *desc) { return true; } | |
124 | static inline bool irq_move_pending(struct irq_desc *desc) { return false; } | |
125 | static inline void | |
126 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { } | |
127 | static inline void | |
128 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { } | |
129 | #endif | |
130 | ||
771ee3b0 TG |
131 | /** |
132 | * irq_set_affinity - Set the irq affinity of a given irq | |
133 | * @irq: Interrupt to set affinity | |
134 | * @cpumask: cpumask | |
135 | * | |
136 | */ | |
1fa46f1f | 137 | int irq_set_affinity(unsigned int irq, const struct cpumask *mask) |
771ee3b0 | 138 | { |
08678b08 | 139 | struct irq_desc *desc = irq_to_desc(irq); |
c96b3b3c | 140 | struct irq_chip *chip = desc->irq_data.chip; |
f6d87f4b | 141 | unsigned long flags; |
1fa46f1f | 142 | int ret = 0; |
771ee3b0 | 143 | |
c96b3b3c | 144 | if (!chip->irq_set_affinity) |
771ee3b0 TG |
145 | return -EINVAL; |
146 | ||
239007b8 | 147 | raw_spin_lock_irqsave(&desc->lock, flags); |
f6d87f4b | 148 | |
1fa46f1f TG |
149 | if (irq_can_move_pcntxt(desc)) { |
150 | ret = chip->irq_set_affinity(&desc->irq_data, mask, false); | |
3b8249e7 TG |
151 | switch (ret) { |
152 | case IRQ_SET_MASK_OK: | |
1fa46f1f | 153 | cpumask_copy(desc->irq_data.affinity, mask); |
3b8249e7 | 154 | case IRQ_SET_MASK_OK_NOCOPY: |
591d2fb0 | 155 | irq_set_thread_affinity(desc); |
3b8249e7 | 156 | ret = 0; |
57b150cc | 157 | } |
1fa46f1f | 158 | } else { |
f230b6d5 | 159 | irqd_set_move_pending(&desc->irq_data); |
1fa46f1f | 160 | irq_copy_pending(desc, mask); |
57b150cc | 161 | } |
1fa46f1f | 162 | |
cd7eab44 BH |
163 | if (desc->affinity_notify) { |
164 | kref_get(&desc->affinity_notify->kref); | |
165 | schedule_work(&desc->affinity_notify->work); | |
166 | } | |
2bdd1055 TG |
167 | irq_compat_set_affinity(desc); |
168 | irqd_set(&desc->irq_data, IRQD_AFFINITY_SET); | |
239007b8 | 169 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1fa46f1f | 170 | return ret; |
771ee3b0 TG |
171 | } |
172 | ||
e7a297b0 PWJ |
173 | int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) |
174 | { | |
e7a297b0 | 175 | unsigned long flags; |
02725e74 | 176 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags); |
e7a297b0 PWJ |
177 | |
178 | if (!desc) | |
179 | return -EINVAL; | |
e7a297b0 | 180 | desc->affinity_hint = m; |
02725e74 | 181 | irq_put_desc_unlock(desc, flags); |
e7a297b0 PWJ |
182 | return 0; |
183 | } | |
184 | EXPORT_SYMBOL_GPL(irq_set_affinity_hint); | |
185 | ||
cd7eab44 BH |
186 | static void irq_affinity_notify(struct work_struct *work) |
187 | { | |
188 | struct irq_affinity_notify *notify = | |
189 | container_of(work, struct irq_affinity_notify, work); | |
190 | struct irq_desc *desc = irq_to_desc(notify->irq); | |
191 | cpumask_var_t cpumask; | |
192 | unsigned long flags; | |
193 | ||
1fa46f1f | 194 | if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL)) |
cd7eab44 BH |
195 | goto out; |
196 | ||
197 | raw_spin_lock_irqsave(&desc->lock, flags); | |
1fa46f1f TG |
198 | if (irq_move_pending(desc)) |
199 | irq_get_pending(cpumask, desc); | |
cd7eab44 | 200 | else |
1fb0ef31 | 201 | cpumask_copy(cpumask, desc->irq_data.affinity); |
cd7eab44 BH |
202 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
203 | ||
204 | notify->notify(notify, cpumask); | |
205 | ||
206 | free_cpumask_var(cpumask); | |
207 | out: | |
208 | kref_put(¬ify->kref, notify->release); | |
209 | } | |
210 | ||
211 | /** | |
212 | * irq_set_affinity_notifier - control notification of IRQ affinity changes | |
213 | * @irq: Interrupt for which to enable/disable notification | |
214 | * @notify: Context for notification, or %NULL to disable | |
215 | * notification. Function pointers must be initialised; | |
216 | * the other fields will be initialised by this function. | |
217 | * | |
218 | * Must be called in process context. Notification may only be enabled | |
219 | * after the IRQ is allocated and must be disabled before the IRQ is | |
220 | * freed using free_irq(). | |
221 | */ | |
222 | int | |
223 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) | |
224 | { | |
225 | struct irq_desc *desc = irq_to_desc(irq); | |
226 | struct irq_affinity_notify *old_notify; | |
227 | unsigned long flags; | |
228 | ||
229 | /* The release function is promised process context */ | |
230 | might_sleep(); | |
231 | ||
232 | if (!desc) | |
233 | return -EINVAL; | |
234 | ||
235 | /* Complete initialisation of *notify */ | |
236 | if (notify) { | |
237 | notify->irq = irq; | |
238 | kref_init(¬ify->kref); | |
239 | INIT_WORK(¬ify->work, irq_affinity_notify); | |
240 | } | |
241 | ||
242 | raw_spin_lock_irqsave(&desc->lock, flags); | |
243 | old_notify = desc->affinity_notify; | |
244 | desc->affinity_notify = notify; | |
245 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
246 | ||
247 | if (old_notify) | |
248 | kref_put(&old_notify->kref, old_notify->release); | |
249 | ||
250 | return 0; | |
251 | } | |
252 | EXPORT_SYMBOL_GPL(irq_set_affinity_notifier); | |
253 | ||
18404756 MK |
254 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
255 | /* | |
256 | * Generic version of the affinity autoselector. | |
257 | */ | |
3b8249e7 TG |
258 | static int |
259 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
18404756 | 260 | { |
35e857cb | 261 | struct irq_chip *chip = irq_desc_get_chip(desc); |
569bda8d | 262 | struct cpumask *set = irq_default_affinity; |
3b8249e7 | 263 | int ret; |
569bda8d | 264 | |
b008207c | 265 | /* Excludes PER_CPU and NO_BALANCE interrupts */ |
18404756 MK |
266 | if (!irq_can_set_affinity(irq)) |
267 | return 0; | |
268 | ||
f6d87f4b TG |
269 | /* |
270 | * Preserve an userspace affinity setup, but make sure that | |
271 | * one of the targets is online. | |
272 | */ | |
2bdd1055 | 273 | if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) { |
569bda8d TG |
274 | if (cpumask_intersects(desc->irq_data.affinity, |
275 | cpu_online_mask)) | |
276 | set = desc->irq_data.affinity; | |
2bdd1055 TG |
277 | else { |
278 | irq_compat_clr_affinity(desc); | |
279 | irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET); | |
280 | } | |
f6d87f4b | 281 | } |
18404756 | 282 | |
3b8249e7 TG |
283 | cpumask_and(mask, cpu_online_mask, set); |
284 | ret = chip->irq_set_affinity(&desc->irq_data, mask, false); | |
285 | switch (ret) { | |
286 | case IRQ_SET_MASK_OK: | |
287 | cpumask_copy(desc->irq_data.affinity, mask); | |
288 | case IRQ_SET_MASK_OK_NOCOPY: | |
289 | irq_set_thread_affinity(desc); | |
290 | } | |
18404756 MK |
291 | return 0; |
292 | } | |
f6d87f4b | 293 | #else |
3b8249e7 TG |
294 | static inline int |
295 | setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask) | |
f6d87f4b TG |
296 | { |
297 | return irq_select_affinity(irq); | |
298 | } | |
18404756 MK |
299 | #endif |
300 | ||
f6d87f4b TG |
301 | /* |
302 | * Called when affinity is set via /proc/irq | |
303 | */ | |
3b8249e7 | 304 | int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask) |
f6d87f4b TG |
305 | { |
306 | struct irq_desc *desc = irq_to_desc(irq); | |
307 | unsigned long flags; | |
308 | int ret; | |
309 | ||
239007b8 | 310 | raw_spin_lock_irqsave(&desc->lock, flags); |
3b8249e7 | 311 | ret = setup_affinity(irq, desc, mask); |
239007b8 | 312 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
313 | return ret; |
314 | } | |
315 | ||
316 | #else | |
3b8249e7 TG |
317 | static inline int |
318 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
f6d87f4b TG |
319 | { |
320 | return 0; | |
321 | } | |
1da177e4 LT |
322 | #endif |
323 | ||
0a0c5168 RW |
324 | void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) |
325 | { | |
326 | if (suspend) { | |
685fd0b4 | 327 | if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND)) |
0a0c5168 | 328 | return; |
c531e836 | 329 | desc->istate |= IRQS_SUSPENDED; |
0a0c5168 RW |
330 | } |
331 | ||
3aae994f | 332 | if (!desc->depth++) |
87923470 | 333 | irq_disable(desc); |
0a0c5168 RW |
334 | } |
335 | ||
02725e74 TG |
336 | static int __disable_irq_nosync(unsigned int irq) |
337 | { | |
338 | unsigned long flags; | |
339 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); | |
340 | ||
341 | if (!desc) | |
342 | return -EINVAL; | |
343 | __disable_irq(desc, irq, false); | |
344 | irq_put_desc_busunlock(desc, flags); | |
345 | return 0; | |
346 | } | |
347 | ||
1da177e4 LT |
348 | /** |
349 | * disable_irq_nosync - disable an irq without waiting | |
350 | * @irq: Interrupt to disable | |
351 | * | |
352 | * Disable the selected interrupt line. Disables and Enables are | |
353 | * nested. | |
354 | * Unlike disable_irq(), this function does not ensure existing | |
355 | * instances of the IRQ handler have completed before returning. | |
356 | * | |
357 | * This function may be called from IRQ context. | |
358 | */ | |
359 | void disable_irq_nosync(unsigned int irq) | |
360 | { | |
02725e74 | 361 | __disable_irq_nosync(irq); |
1da177e4 | 362 | } |
1da177e4 LT |
363 | EXPORT_SYMBOL(disable_irq_nosync); |
364 | ||
365 | /** | |
366 | * disable_irq - disable an irq and wait for completion | |
367 | * @irq: Interrupt to disable | |
368 | * | |
369 | * Disable the selected interrupt line. Enables and Disables are | |
370 | * nested. | |
371 | * This function waits for any pending IRQ handlers for this interrupt | |
372 | * to complete before returning. If you use this function while | |
373 | * holding a resource the IRQ handler may need you will deadlock. | |
374 | * | |
375 | * This function may be called - with care - from IRQ context. | |
376 | */ | |
377 | void disable_irq(unsigned int irq) | |
378 | { | |
02725e74 | 379 | if (!__disable_irq_nosync(irq)) |
1da177e4 LT |
380 | synchronize_irq(irq); |
381 | } | |
1da177e4 LT |
382 | EXPORT_SYMBOL(disable_irq); |
383 | ||
0a0c5168 | 384 | void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) |
1adb0850 | 385 | { |
dc5f219e | 386 | if (resume) { |
c531e836 | 387 | if (!(desc->istate & IRQS_SUSPENDED)) { |
dc5f219e TG |
388 | if (!desc->action) |
389 | return; | |
390 | if (!(desc->action->flags & IRQF_FORCE_RESUME)) | |
391 | return; | |
392 | /* Pretend that it got disabled ! */ | |
393 | desc->depth++; | |
394 | } | |
c531e836 | 395 | desc->istate &= ~IRQS_SUSPENDED; |
dc5f219e | 396 | } |
0a0c5168 | 397 | |
1adb0850 TG |
398 | switch (desc->depth) { |
399 | case 0: | |
0a0c5168 | 400 | err_out: |
b8c512f6 | 401 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
402 | break; |
403 | case 1: { | |
c531e836 | 404 | if (desc->istate & IRQS_SUSPENDED) |
0a0c5168 | 405 | goto err_out; |
1adb0850 | 406 | /* Prevent probing on this irq: */ |
1ccb4e61 | 407 | irq_settings_set_noprobe(desc); |
3aae994f | 408 | irq_enable(desc); |
1adb0850 TG |
409 | check_irq_resend(desc, irq); |
410 | /* fall-through */ | |
411 | } | |
412 | default: | |
413 | desc->depth--; | |
414 | } | |
415 | } | |
416 | ||
1da177e4 LT |
417 | /** |
418 | * enable_irq - enable handling of an irq | |
419 | * @irq: Interrupt to enable | |
420 | * | |
421 | * Undoes the effect of one call to disable_irq(). If this | |
422 | * matches the last disable, processing of interrupts on this | |
423 | * IRQ line is re-enabled. | |
424 | * | |
70aedd24 | 425 | * This function may be called from IRQ context only when |
6b8ff312 | 426 | * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! |
1da177e4 LT |
427 | */ |
428 | void enable_irq(unsigned int irq) | |
429 | { | |
1da177e4 | 430 | unsigned long flags; |
02725e74 | 431 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); |
1da177e4 | 432 | |
7d94f7ca | 433 | if (!desc) |
c2b5a251 | 434 | return; |
50f7c032 TG |
435 | if (WARN(!desc->irq_data.chip, |
436 | KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq)) | |
02725e74 | 437 | goto out; |
2656c366 | 438 | |
0a0c5168 | 439 | __enable_irq(desc, irq, false); |
02725e74 TG |
440 | out: |
441 | irq_put_desc_busunlock(desc, flags); | |
1da177e4 | 442 | } |
1da177e4 LT |
443 | EXPORT_SYMBOL(enable_irq); |
444 | ||
0c5d1eb7 | 445 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 446 | { |
08678b08 | 447 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
448 | int ret = -ENXIO; |
449 | ||
2f7e99bb TG |
450 | if (desc->irq_data.chip->irq_set_wake) |
451 | ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on); | |
2db87321 UKK |
452 | |
453 | return ret; | |
454 | } | |
455 | ||
ba9a2331 | 456 | /** |
a0cd9ca2 | 457 | * irq_set_irq_wake - control irq power management wakeup |
ba9a2331 TG |
458 | * @irq: interrupt to control |
459 | * @on: enable/disable power management wakeup | |
460 | * | |
15a647eb DB |
461 | * Enable/disable power management wakeup mode, which is |
462 | * disabled by default. Enables and disables must match, | |
463 | * just as they match for non-wakeup mode support. | |
464 | * | |
465 | * Wakeup mode lets this IRQ wake the system from sleep | |
466 | * states like "suspend to RAM". | |
ba9a2331 | 467 | */ |
a0cd9ca2 | 468 | int irq_set_irq_wake(unsigned int irq, unsigned int on) |
ba9a2331 | 469 | { |
ba9a2331 | 470 | unsigned long flags; |
02725e74 | 471 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags); |
2db87321 | 472 | int ret = 0; |
ba9a2331 | 473 | |
15a647eb DB |
474 | /* wakeup-capable irqs can be shared between drivers that |
475 | * don't need to have the same sleep mode behaviors. | |
476 | */ | |
15a647eb | 477 | if (on) { |
2db87321 UKK |
478 | if (desc->wake_depth++ == 0) { |
479 | ret = set_irq_wake_real(irq, on); | |
480 | if (ret) | |
481 | desc->wake_depth = 0; | |
482 | else | |
7f94226f | 483 | irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 484 | } |
15a647eb DB |
485 | } else { |
486 | if (desc->wake_depth == 0) { | |
7a2c4770 | 487 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
488 | } else if (--desc->wake_depth == 0) { |
489 | ret = set_irq_wake_real(irq, on); | |
490 | if (ret) | |
491 | desc->wake_depth = 1; | |
492 | else | |
7f94226f | 493 | irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 494 | } |
15a647eb | 495 | } |
02725e74 | 496 | irq_put_desc_busunlock(desc, flags); |
ba9a2331 TG |
497 | return ret; |
498 | } | |
a0cd9ca2 | 499 | EXPORT_SYMBOL(irq_set_irq_wake); |
ba9a2331 | 500 | |
1da177e4 LT |
501 | /* |
502 | * Internal function that tells the architecture code whether a | |
503 | * particular irq has been exclusively allocated or is available | |
504 | * for driver use. | |
505 | */ | |
506 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
507 | { | |
cc8c3b78 | 508 | unsigned long flags; |
02725e74 TG |
509 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags); |
510 | int canrequest = 0; | |
1da177e4 | 511 | |
7d94f7ca YL |
512 | if (!desc) |
513 | return 0; | |
514 | ||
02725e74 TG |
515 | if (irq_settings_can_request(desc)) { |
516 | if (desc->action) | |
517 | if (irqflags & desc->action->flags & IRQF_SHARED) | |
518 | canrequest =1; | |
519 | } | |
520 | irq_put_desc_unlock(desc, flags); | |
521 | return canrequest; | |
1da177e4 LT |
522 | } |
523 | ||
0c5d1eb7 | 524 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
b2ba2c30 | 525 | unsigned long flags) |
82736f4d | 526 | { |
6b8ff312 | 527 | struct irq_chip *chip = desc->irq_data.chip; |
d4d5e089 | 528 | int ret, unmask = 0; |
82736f4d | 529 | |
b2ba2c30 | 530 | if (!chip || !chip->irq_set_type) { |
82736f4d UKK |
531 | /* |
532 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
533 | * flow-types? | |
534 | */ | |
3ff68a6a | 535 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
536 | chip ? (chip->name ? : "unknown") : "unknown"); |
537 | return 0; | |
538 | } | |
539 | ||
876dbd4c | 540 | flags &= IRQ_TYPE_SENSE_MASK; |
d4d5e089 TG |
541 | |
542 | if (chip->flags & IRQCHIP_SET_TYPE_MASKED) { | |
543 | if (!(desc->istate & IRQS_MASKED)) | |
544 | mask_irq(desc); | |
545 | if (!(desc->istate & IRQS_DISABLED)) | |
546 | unmask = 1; | |
547 | } | |
548 | ||
f2b662da | 549 | /* caller masked out all except trigger mode flags */ |
b2ba2c30 | 550 | ret = chip->irq_set_type(&desc->irq_data, flags); |
82736f4d | 551 | |
876dbd4c TG |
552 | switch (ret) { |
553 | case IRQ_SET_MASK_OK: | |
554 | irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK); | |
555 | irqd_set(&desc->irq_data, flags); | |
556 | ||
557 | case IRQ_SET_MASK_OK_NOCOPY: | |
558 | flags = irqd_get_trigger_type(&desc->irq_data); | |
559 | irq_settings_set_trigger_mask(desc, flags); | |
560 | irqd_clear(&desc->irq_data, IRQD_LEVEL); | |
561 | irq_settings_clr_level(desc); | |
562 | if (flags & IRQ_TYPE_LEVEL_MASK) { | |
563 | irq_settings_set_level(desc); | |
564 | irqd_set(&desc->irq_data, IRQD_LEVEL); | |
565 | } | |
46732475 | 566 | |
6b8ff312 TG |
567 | if (chip != desc->irq_data.chip) |
568 | irq_chip_set_defaults(desc->irq_data.chip); | |
d4d5e089 | 569 | ret = 0; |
8fff39e0 | 570 | break; |
876dbd4c TG |
571 | default: |
572 | pr_err("setting trigger mode %lu for irq %u failed (%pF)\n", | |
573 | flags, irq, chip->irq_set_type); | |
0c5d1eb7 | 574 | } |
d4d5e089 TG |
575 | if (unmask) |
576 | unmask_irq(desc); | |
82736f4d UKK |
577 | return ret; |
578 | } | |
579 | ||
b25c340c TG |
580 | /* |
581 | * Default primary interrupt handler for threaded interrupts. Is | |
582 | * assigned as primary handler when request_threaded_irq is called | |
583 | * with handler == NULL. Useful for oneshot interrupts. | |
584 | */ | |
585 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
586 | { | |
587 | return IRQ_WAKE_THREAD; | |
588 | } | |
589 | ||
399b5da2 TG |
590 | /* |
591 | * Primary handler for nested threaded interrupts. Should never be | |
592 | * called. | |
593 | */ | |
594 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
595 | { | |
596 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
597 | return IRQ_NONE; | |
598 | } | |
599 | ||
3aa551c9 TG |
600 | static int irq_wait_for_interrupt(struct irqaction *action) |
601 | { | |
602 | while (!kthread_should_stop()) { | |
603 | set_current_state(TASK_INTERRUPTIBLE); | |
f48fe81e TG |
604 | |
605 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
606 | &action->thread_flags)) { | |
3aa551c9 TG |
607 | __set_current_state(TASK_RUNNING); |
608 | return 0; | |
f48fe81e TG |
609 | } |
610 | schedule(); | |
3aa551c9 TG |
611 | } |
612 | return -1; | |
613 | } | |
614 | ||
b25c340c TG |
615 | /* |
616 | * Oneshot interrupts keep the irq line masked until the threaded | |
617 | * handler finished. unmask if the interrupt has not been disabled and | |
618 | * is marked MASKED. | |
619 | */ | |
620 | static void irq_finalize_oneshot(unsigned int irq, struct irq_desc *desc) | |
621 | { | |
0b1adaa0 | 622 | again: |
3876ec9e | 623 | chip_bus_lock(desc); |
239007b8 | 624 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
625 | |
626 | /* | |
627 | * Implausible though it may be we need to protect us against | |
628 | * the following scenario: | |
629 | * | |
630 | * The thread is faster done than the hard interrupt handler | |
631 | * on the other CPU. If we unmask the irq line then the | |
632 | * interrupt can come in again and masks the line, leaves due | |
009b4c3b | 633 | * to IRQS_INPROGRESS and the irq line is masked forever. |
0b1adaa0 | 634 | */ |
009b4c3b | 635 | if (unlikely(desc->istate & IRQS_INPROGRESS)) { |
0b1adaa0 | 636 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 637 | chip_bus_sync_unlock(desc); |
0b1adaa0 TG |
638 | cpu_relax(); |
639 | goto again; | |
640 | } | |
641 | ||
6e40262e TG |
642 | if (!(desc->istate & IRQS_DISABLED) && (desc->istate & IRQS_MASKED)) { |
643 | irq_compat_clr_masked(desc); | |
644 | desc->istate &= ~IRQS_MASKED; | |
0eda58b7 | 645 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
b25c340c | 646 | } |
239007b8 | 647 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 648 | chip_bus_sync_unlock(desc); |
b25c340c TG |
649 | } |
650 | ||
61f38261 | 651 | #ifdef CONFIG_SMP |
591d2fb0 | 652 | /* |
d4d5e089 | 653 | * Check whether we need to chasnge the affinity of the interrupt thread. |
591d2fb0 TG |
654 | */ |
655 | static void | |
656 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
657 | { | |
658 | cpumask_var_t mask; | |
659 | ||
660 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
661 | return; | |
662 | ||
663 | /* | |
664 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
665 | * try again next time | |
666 | */ | |
667 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
668 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
669 | return; | |
670 | } | |
671 | ||
239007b8 | 672 | raw_spin_lock_irq(&desc->lock); |
6b8ff312 | 673 | cpumask_copy(mask, desc->irq_data.affinity); |
239007b8 | 674 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 TG |
675 | |
676 | set_cpus_allowed_ptr(current, mask); | |
677 | free_cpumask_var(mask); | |
678 | } | |
61f38261 BP |
679 | #else |
680 | static inline void | |
681 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
682 | #endif | |
591d2fb0 | 683 | |
3aa551c9 TG |
684 | /* |
685 | * Interrupt handler thread | |
686 | */ | |
687 | static int irq_thread(void *data) | |
688 | { | |
c9b5f501 | 689 | static const struct sched_param param = { |
fe7de49f KM |
690 | .sched_priority = MAX_USER_RT_PRIO/2, |
691 | }; | |
3aa551c9 TG |
692 | struct irqaction *action = data; |
693 | struct irq_desc *desc = irq_to_desc(action->irq); | |
3d67baec | 694 | int wake, oneshot = desc->istate & IRQS_ONESHOT; |
3aa551c9 TG |
695 | |
696 | sched_setscheduler(current, SCHED_FIFO, ¶m); | |
697 | current->irqaction = action; | |
698 | ||
699 | while (!irq_wait_for_interrupt(action)) { | |
700 | ||
591d2fb0 TG |
701 | irq_thread_check_affinity(desc, action); |
702 | ||
3aa551c9 TG |
703 | atomic_inc(&desc->threads_active); |
704 | ||
239007b8 | 705 | raw_spin_lock_irq(&desc->lock); |
c1594b77 | 706 | if (unlikely(desc->istate & IRQS_DISABLED)) { |
3aa551c9 TG |
707 | /* |
708 | * CHECKME: We might need a dedicated | |
709 | * IRQ_THREAD_PENDING flag here, which | |
710 | * retriggers the thread in check_irq_resend() | |
2a0d6fb3 | 711 | * but AFAICT IRQS_PENDING should be fine as it |
3aa551c9 TG |
712 | * retriggers the interrupt itself --- tglx |
713 | */ | |
2a0d6fb3 TG |
714 | irq_compat_set_pending(desc); |
715 | desc->istate |= IRQS_PENDING; | |
239007b8 | 716 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 | 717 | } else { |
239007b8 | 718 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 TG |
719 | |
720 | action->thread_fn(action->irq, action->dev_id); | |
b25c340c TG |
721 | |
722 | if (oneshot) | |
723 | irq_finalize_oneshot(action->irq, desc); | |
3aa551c9 TG |
724 | } |
725 | ||
726 | wake = atomic_dec_and_test(&desc->threads_active); | |
727 | ||
728 | if (wake && waitqueue_active(&desc->wait_for_threads)) | |
729 | wake_up(&desc->wait_for_threads); | |
730 | } | |
731 | ||
732 | /* | |
733 | * Clear irqaction. Otherwise exit_irq_thread() would make | |
734 | * fuzz about an active irq thread going into nirvana. | |
735 | */ | |
736 | current->irqaction = NULL; | |
737 | return 0; | |
738 | } | |
739 | ||
740 | /* | |
741 | * Called from do_exit() | |
742 | */ | |
743 | void exit_irq_thread(void) | |
744 | { | |
745 | struct task_struct *tsk = current; | |
746 | ||
747 | if (!tsk->irqaction) | |
748 | return; | |
749 | ||
750 | printk(KERN_ERR | |
751 | "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", | |
752 | tsk->comm ? tsk->comm : "", tsk->pid, tsk->irqaction->irq); | |
753 | ||
754 | /* | |
755 | * Set the THREAD DIED flag to prevent further wakeups of the | |
756 | * soon to be gone threaded handler. | |
757 | */ | |
758 | set_bit(IRQTF_DIED, &tsk->irqaction->flags); | |
759 | } | |
760 | ||
1da177e4 LT |
761 | /* |
762 | * Internal function to register an irqaction - typically used to | |
763 | * allocate special interrupts that are part of the architecture. | |
764 | */ | |
d3c60047 | 765 | static int |
327ec569 | 766 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 767 | { |
f17c7545 | 768 | struct irqaction *old, **old_ptr; |
8b126b77 | 769 | const char *old_name = NULL; |
1da177e4 | 770 | unsigned long flags; |
3b8249e7 TG |
771 | int ret, nested, shared = 0; |
772 | cpumask_var_t mask; | |
1da177e4 | 773 | |
7d94f7ca | 774 | if (!desc) |
c2b5a251 MW |
775 | return -EINVAL; |
776 | ||
6b8ff312 | 777 | if (desc->irq_data.chip == &no_irq_chip) |
1da177e4 LT |
778 | return -ENOSYS; |
779 | /* | |
780 | * Some drivers like serial.c use request_irq() heavily, | |
781 | * so we have to be careful not to interfere with a | |
782 | * running system. | |
783 | */ | |
3cca53b0 | 784 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
785 | /* |
786 | * This function might sleep, we want to call it first, | |
787 | * outside of the atomic block. | |
788 | * Yes, this might clear the entropy pool if the wrong | |
789 | * driver is attempted to be loaded, without actually | |
790 | * installing a new handler, but is this really a problem, | |
791 | * only the sysadmin is able to do this. | |
792 | */ | |
793 | rand_initialize_irq(irq); | |
794 | } | |
795 | ||
b25c340c TG |
796 | /* Oneshot interrupts are not allowed with shared */ |
797 | if ((new->flags & IRQF_ONESHOT) && (new->flags & IRQF_SHARED)) | |
798 | return -EINVAL; | |
799 | ||
3aa551c9 | 800 | /* |
399b5da2 TG |
801 | * Check whether the interrupt nests into another interrupt |
802 | * thread. | |
803 | */ | |
1ccb4e61 | 804 | nested = irq_settings_is_nested_thread(desc); |
399b5da2 TG |
805 | if (nested) { |
806 | if (!new->thread_fn) | |
807 | return -EINVAL; | |
808 | /* | |
809 | * Replace the primary handler which was provided from | |
810 | * the driver for non nested interrupt handling by the | |
811 | * dummy function which warns when called. | |
812 | */ | |
813 | new->handler = irq_nested_primary_handler; | |
814 | } | |
815 | ||
3aa551c9 | 816 | /* |
399b5da2 TG |
817 | * Create a handler thread when a thread function is supplied |
818 | * and the interrupt does not nest into another interrupt | |
819 | * thread. | |
3aa551c9 | 820 | */ |
399b5da2 | 821 | if (new->thread_fn && !nested) { |
3aa551c9 TG |
822 | struct task_struct *t; |
823 | ||
824 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
825 | new->name); | |
826 | if (IS_ERR(t)) | |
827 | return PTR_ERR(t); | |
828 | /* | |
829 | * We keep the reference to the task struct even if | |
830 | * the thread dies to avoid that the interrupt code | |
831 | * references an already freed task_struct. | |
832 | */ | |
833 | get_task_struct(t); | |
834 | new->thread = t; | |
3aa551c9 TG |
835 | } |
836 | ||
3b8249e7 TG |
837 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { |
838 | ret = -ENOMEM; | |
839 | goto out_thread; | |
840 | } | |
841 | ||
1da177e4 LT |
842 | /* |
843 | * The following block of code has to be executed atomically | |
844 | */ | |
239007b8 | 845 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
846 | old_ptr = &desc->action; |
847 | old = *old_ptr; | |
06fcb0c6 | 848 | if (old) { |
e76de9f8 TG |
849 | /* |
850 | * Can't share interrupts unless both agree to and are | |
851 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 852 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
853 | * set the trigger type must match. |
854 | */ | |
3cca53b0 | 855 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
856 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
857 | old_name = old->name; | |
f5163427 | 858 | goto mismatch; |
8b126b77 | 859 | } |
f5163427 | 860 | |
f5163427 | 861 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
862 | if ((old->flags & IRQF_PERCPU) != |
863 | (new->flags & IRQF_PERCPU)) | |
f5163427 | 864 | goto mismatch; |
1da177e4 LT |
865 | |
866 | /* add new interrupt at end of irq queue */ | |
867 | do { | |
f17c7545 IM |
868 | old_ptr = &old->next; |
869 | old = *old_ptr; | |
1da177e4 LT |
870 | } while (old); |
871 | shared = 1; | |
872 | } | |
873 | ||
1da177e4 | 874 | if (!shared) { |
6b8ff312 | 875 | irq_chip_set_defaults(desc->irq_data.chip); |
e76de9f8 | 876 | |
3aa551c9 TG |
877 | init_waitqueue_head(&desc->wait_for_threads); |
878 | ||
e76de9f8 | 879 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 880 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
881 | ret = __irq_set_trigger(desc, irq, |
882 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 883 | |
3aa551c9 | 884 | if (ret) |
3b8249e7 | 885 | goto out_mask; |
091738a2 | 886 | } |
6a6de9ef | 887 | |
009b4c3b | 888 | desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \ |
163ef309 TG |
889 | IRQS_INPROGRESS | IRQS_ONESHOT | \ |
890 | IRQS_WAITING); | |
94d39e1f | 891 | |
a005677b TG |
892 | if (new->flags & IRQF_PERCPU) { |
893 | irqd_set(&desc->irq_data, IRQD_PER_CPU); | |
894 | irq_settings_set_per_cpu(desc); | |
895 | } | |
6a58fb3b | 896 | |
b25c340c | 897 | if (new->flags & IRQF_ONESHOT) |
3d67baec | 898 | desc->istate |= IRQS_ONESHOT; |
b25c340c | 899 | |
1ccb4e61 | 900 | if (irq_settings_can_autoenable(desc)) |
46999238 TG |
901 | irq_startup(desc); |
902 | else | |
e76de9f8 TG |
903 | /* Undo nested disables: */ |
904 | desc->depth = 1; | |
18404756 | 905 | |
612e3684 | 906 | /* Exclude IRQ from balancing if requested */ |
a005677b TG |
907 | if (new->flags & IRQF_NOBALANCING) { |
908 | irq_settings_set_no_balancing(desc); | |
909 | irqd_set(&desc->irq_data, IRQD_NO_BALANCING); | |
910 | } | |
612e3684 | 911 | |
18404756 | 912 | /* Set default affinity mask once everything is setup */ |
3b8249e7 | 913 | setup_affinity(irq, desc, mask); |
0c5d1eb7 | 914 | |
876dbd4c TG |
915 | } else if (new->flags & IRQF_TRIGGER_MASK) { |
916 | unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK; | |
917 | unsigned int omsk = irq_settings_get_trigger_mask(desc); | |
918 | ||
919 | if (nmsk != omsk) | |
920 | /* hope the handler works with current trigger mode */ | |
921 | pr_warning("IRQ %d uses trigger mode %u; requested %u\n", | |
922 | irq, nmsk, omsk); | |
1da177e4 | 923 | } |
82736f4d | 924 | |
69ab8494 | 925 | new->irq = irq; |
f17c7545 | 926 | *old_ptr = new; |
82736f4d | 927 | |
8528b0f1 LT |
928 | /* Reset broken irq detection when installing new handler */ |
929 | desc->irq_count = 0; | |
930 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
931 | |
932 | /* | |
933 | * Check whether we disabled the irq via the spurious handler | |
934 | * before. Reenable it and give it another chance. | |
935 | */ | |
7acdd53e TG |
936 | if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) { |
937 | desc->istate &= ~IRQS_SPURIOUS_DISABLED; | |
0a0c5168 | 938 | __enable_irq(desc, irq, false); |
1adb0850 TG |
939 | } |
940 | ||
239007b8 | 941 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 942 | |
69ab8494 TG |
943 | /* |
944 | * Strictly no need to wake it up, but hung_task complains | |
945 | * when no hard interrupt wakes the thread up. | |
946 | */ | |
947 | if (new->thread) | |
948 | wake_up_process(new->thread); | |
949 | ||
2c6927a3 | 950 | register_irq_proc(irq, desc); |
1da177e4 LT |
951 | new->dir = NULL; |
952 | register_handler_proc(irq, new); | |
953 | ||
954 | return 0; | |
f5163427 DS |
955 | |
956 | mismatch: | |
3f050447 | 957 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 958 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 959 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
960 | if (old_name) |
961 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
962 | dump_stack(); |
963 | } | |
3f050447 | 964 | #endif |
3aa551c9 TG |
965 | ret = -EBUSY; |
966 | ||
3b8249e7 TG |
967 | out_mask: |
968 | free_cpumask_var(mask); | |
969 | ||
3aa551c9 | 970 | out_thread: |
239007b8 | 971 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3aa551c9 TG |
972 | if (new->thread) { |
973 | struct task_struct *t = new->thread; | |
974 | ||
975 | new->thread = NULL; | |
976 | if (likely(!test_bit(IRQTF_DIED, &new->thread_flags))) | |
977 | kthread_stop(t); | |
978 | put_task_struct(t); | |
979 | } | |
980 | return ret; | |
1da177e4 LT |
981 | } |
982 | ||
d3c60047 TG |
983 | /** |
984 | * setup_irq - setup an interrupt | |
985 | * @irq: Interrupt line to setup | |
986 | * @act: irqaction for the interrupt | |
987 | * | |
988 | * Used to statically setup interrupts in the early boot process. | |
989 | */ | |
990 | int setup_irq(unsigned int irq, struct irqaction *act) | |
991 | { | |
986c011d | 992 | int retval; |
d3c60047 TG |
993 | struct irq_desc *desc = irq_to_desc(irq); |
994 | ||
986c011d DD |
995 | chip_bus_lock(desc); |
996 | retval = __setup_irq(irq, desc, act); | |
997 | chip_bus_sync_unlock(desc); | |
998 | ||
999 | return retval; | |
d3c60047 | 1000 | } |
eb53b4e8 | 1001 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 1002 | |
cbf94f06 MD |
1003 | /* |
1004 | * Internal function to unregister an irqaction - used to free | |
1005 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 1006 | */ |
cbf94f06 | 1007 | static struct irqaction *__free_irq(unsigned int irq, void *dev_id) |
1da177e4 | 1008 | { |
d3c60047 | 1009 | struct irq_desc *desc = irq_to_desc(irq); |
f17c7545 | 1010 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
1011 | unsigned long flags; |
1012 | ||
ae88a23b | 1013 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 1014 | |
7d94f7ca | 1015 | if (!desc) |
f21cfb25 | 1016 | return NULL; |
1da177e4 | 1017 | |
239007b8 | 1018 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
1019 | |
1020 | /* | |
1021 | * There can be multiple actions per IRQ descriptor, find the right | |
1022 | * one based on the dev_id: | |
1023 | */ | |
f17c7545 | 1024 | action_ptr = &desc->action; |
1da177e4 | 1025 | for (;;) { |
f17c7545 | 1026 | action = *action_ptr; |
1da177e4 | 1027 | |
ae88a23b IM |
1028 | if (!action) { |
1029 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 1030 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 1031 | |
f21cfb25 | 1032 | return NULL; |
ae88a23b | 1033 | } |
1da177e4 | 1034 | |
8316e381 IM |
1035 | if (action->dev_id == dev_id) |
1036 | break; | |
f17c7545 | 1037 | action_ptr = &action->next; |
ae88a23b | 1038 | } |
dbce706e | 1039 | |
ae88a23b | 1040 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 1041 | *action_ptr = action->next; |
ae88a23b IM |
1042 | |
1043 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 1044 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
6b8ff312 TG |
1045 | if (desc->irq_data.chip->release) |
1046 | desc->irq_data.chip->release(irq, dev_id); | |
b77d6adc | 1047 | #endif |
dbce706e | 1048 | |
ae88a23b | 1049 | /* If this was the last handler, shut down the IRQ line: */ |
46999238 TG |
1050 | if (!desc->action) |
1051 | irq_shutdown(desc); | |
3aa551c9 | 1052 | |
e7a297b0 PWJ |
1053 | #ifdef CONFIG_SMP |
1054 | /* make sure affinity_hint is cleaned up */ | |
1055 | if (WARN_ON_ONCE(desc->affinity_hint)) | |
1056 | desc->affinity_hint = NULL; | |
1057 | #endif | |
1058 | ||
239007b8 | 1059 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ae88a23b IM |
1060 | |
1061 | unregister_handler_proc(irq, action); | |
1062 | ||
1063 | /* Make sure it's not being used on another CPU: */ | |
1064 | synchronize_irq(irq); | |
1da177e4 | 1065 | |
70edcd77 | 1066 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
1067 | /* |
1068 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
1069 | * event to happen even now it's being freed, so let's make sure that | |
1070 | * is so by doing an extra call to the handler .... | |
1071 | * | |
1072 | * ( We do this after actually deregistering it, to make sure that a | |
1073 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
1074 | */ | |
1075 | if (action->flags & IRQF_SHARED) { | |
1076 | local_irq_save(flags); | |
1077 | action->handler(irq, dev_id); | |
1078 | local_irq_restore(flags); | |
1da177e4 | 1079 | } |
ae88a23b | 1080 | #endif |
2d860ad7 LT |
1081 | |
1082 | if (action->thread) { | |
1083 | if (!test_bit(IRQTF_DIED, &action->thread_flags)) | |
1084 | kthread_stop(action->thread); | |
1085 | put_task_struct(action->thread); | |
1086 | } | |
1087 | ||
f21cfb25 MD |
1088 | return action; |
1089 | } | |
1090 | ||
cbf94f06 MD |
1091 | /** |
1092 | * remove_irq - free an interrupt | |
1093 | * @irq: Interrupt line to free | |
1094 | * @act: irqaction for the interrupt | |
1095 | * | |
1096 | * Used to remove interrupts statically setup by the early boot process. | |
1097 | */ | |
1098 | void remove_irq(unsigned int irq, struct irqaction *act) | |
1099 | { | |
1100 | __free_irq(irq, act->dev_id); | |
1101 | } | |
eb53b4e8 | 1102 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 1103 | |
f21cfb25 MD |
1104 | /** |
1105 | * free_irq - free an interrupt allocated with request_irq | |
1106 | * @irq: Interrupt line to free | |
1107 | * @dev_id: Device identity to free | |
1108 | * | |
1109 | * Remove an interrupt handler. The handler is removed and if the | |
1110 | * interrupt line is no longer in use by any driver it is disabled. | |
1111 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
1112 | * on the card it drives before calling this function. The function | |
1113 | * does not return until any executing interrupts for this IRQ | |
1114 | * have completed. | |
1115 | * | |
1116 | * This function must not be called from interrupt context. | |
1117 | */ | |
1118 | void free_irq(unsigned int irq, void *dev_id) | |
1119 | { | |
70aedd24 TG |
1120 | struct irq_desc *desc = irq_to_desc(irq); |
1121 | ||
1122 | if (!desc) | |
1123 | return; | |
1124 | ||
cd7eab44 BH |
1125 | #ifdef CONFIG_SMP |
1126 | if (WARN_ON(desc->affinity_notify)) | |
1127 | desc->affinity_notify = NULL; | |
1128 | #endif | |
1129 | ||
3876ec9e | 1130 | chip_bus_lock(desc); |
cbf94f06 | 1131 | kfree(__free_irq(irq, dev_id)); |
3876ec9e | 1132 | chip_bus_sync_unlock(desc); |
1da177e4 | 1133 | } |
1da177e4 LT |
1134 | EXPORT_SYMBOL(free_irq); |
1135 | ||
1136 | /** | |
3aa551c9 | 1137 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 1138 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
1139 | * @handler: Function to be called when the IRQ occurs. |
1140 | * Primary handler for threaded interrupts | |
b25c340c TG |
1141 | * If NULL and thread_fn != NULL the default |
1142 | * primary handler is installed | |
f48fe81e TG |
1143 | * @thread_fn: Function called from the irq handler thread |
1144 | * If NULL, no irq thread is created | |
1da177e4 LT |
1145 | * @irqflags: Interrupt type flags |
1146 | * @devname: An ascii name for the claiming device | |
1147 | * @dev_id: A cookie passed back to the handler function | |
1148 | * | |
1149 | * This call allocates interrupt resources and enables the | |
1150 | * interrupt line and IRQ handling. From the point this | |
1151 | * call is made your handler function may be invoked. Since | |
1152 | * your handler function must clear any interrupt the board | |
1153 | * raises, you must take care both to initialise your hardware | |
1154 | * and to set up the interrupt handler in the right order. | |
1155 | * | |
3aa551c9 TG |
1156 | * If you want to set up a threaded irq handler for your device |
1157 | * then you need to supply @handler and @thread_fn. @handler ist | |
1158 | * still called in hard interrupt context and has to check | |
1159 | * whether the interrupt originates from the device. If yes it | |
1160 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1161 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1162 | * @thread_fn. This split handler design is necessary to support |
1163 | * shared interrupts. | |
1164 | * | |
1da177e4 LT |
1165 | * Dev_id must be globally unique. Normally the address of the |
1166 | * device data structure is used as the cookie. Since the handler | |
1167 | * receives this value it makes sense to use it. | |
1168 | * | |
1169 | * If your interrupt is shared you must pass a non NULL dev_id | |
1170 | * as this is required when freeing the interrupt. | |
1171 | * | |
1172 | * Flags: | |
1173 | * | |
3cca53b0 | 1174 | * IRQF_SHARED Interrupt is shared |
3cca53b0 | 1175 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy |
0c5d1eb7 | 1176 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1177 | * |
1178 | */ | |
3aa551c9 TG |
1179 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1180 | irq_handler_t thread_fn, unsigned long irqflags, | |
1181 | const char *devname, void *dev_id) | |
1da177e4 | 1182 | { |
06fcb0c6 | 1183 | struct irqaction *action; |
08678b08 | 1184 | struct irq_desc *desc; |
d3c60047 | 1185 | int retval; |
1da177e4 LT |
1186 | |
1187 | /* | |
1188 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1189 | * otherwise we'll have trouble later trying to figure out | |
1190 | * which interrupt is which (messes up the interrupt freeing | |
1191 | * logic etc). | |
1192 | */ | |
3cca53b0 | 1193 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 1194 | return -EINVAL; |
7d94f7ca | 1195 | |
cb5bc832 | 1196 | desc = irq_to_desc(irq); |
7d94f7ca | 1197 | if (!desc) |
1da177e4 | 1198 | return -EINVAL; |
7d94f7ca | 1199 | |
1ccb4e61 | 1200 | if (!irq_settings_can_request(desc)) |
6550c775 | 1201 | return -EINVAL; |
b25c340c TG |
1202 | |
1203 | if (!handler) { | |
1204 | if (!thread_fn) | |
1205 | return -EINVAL; | |
1206 | handler = irq_default_primary_handler; | |
1207 | } | |
1da177e4 | 1208 | |
45535732 | 1209 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1210 | if (!action) |
1211 | return -ENOMEM; | |
1212 | ||
1213 | action->handler = handler; | |
3aa551c9 | 1214 | action->thread_fn = thread_fn; |
1da177e4 | 1215 | action->flags = irqflags; |
1da177e4 | 1216 | action->name = devname; |
1da177e4 LT |
1217 | action->dev_id = dev_id; |
1218 | ||
3876ec9e | 1219 | chip_bus_lock(desc); |
d3c60047 | 1220 | retval = __setup_irq(irq, desc, action); |
3876ec9e | 1221 | chip_bus_sync_unlock(desc); |
70aedd24 | 1222 | |
377bf1e4 AV |
1223 | if (retval) |
1224 | kfree(action); | |
1225 | ||
6d83f94d | 1226 | #ifdef CONFIG_DEBUG_SHIRQ_FIXME |
6ce51c43 | 1227 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1228 | /* |
1229 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1230 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1231 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1232 | * run in parallel with our fake. | |
a304e1b8 | 1233 | */ |
59845b1f | 1234 | unsigned long flags; |
a304e1b8 | 1235 | |
377bf1e4 | 1236 | disable_irq(irq); |
59845b1f | 1237 | local_irq_save(flags); |
377bf1e4 | 1238 | |
59845b1f | 1239 | handler(irq, dev_id); |
377bf1e4 | 1240 | |
59845b1f | 1241 | local_irq_restore(flags); |
377bf1e4 | 1242 | enable_irq(irq); |
a304e1b8 DW |
1243 | } |
1244 | #endif | |
1da177e4 LT |
1245 | return retval; |
1246 | } | |
3aa551c9 | 1247 | EXPORT_SYMBOL(request_threaded_irq); |
ae731f8d MZ |
1248 | |
1249 | /** | |
1250 | * request_any_context_irq - allocate an interrupt line | |
1251 | * @irq: Interrupt line to allocate | |
1252 | * @handler: Function to be called when the IRQ occurs. | |
1253 | * Threaded handler for threaded interrupts. | |
1254 | * @flags: Interrupt type flags | |
1255 | * @name: An ascii name for the claiming device | |
1256 | * @dev_id: A cookie passed back to the handler function | |
1257 | * | |
1258 | * This call allocates interrupt resources and enables the | |
1259 | * interrupt line and IRQ handling. It selects either a | |
1260 | * hardirq or threaded handling method depending on the | |
1261 | * context. | |
1262 | * | |
1263 | * On failure, it returns a negative value. On success, | |
1264 | * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED. | |
1265 | */ | |
1266 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
1267 | unsigned long flags, const char *name, void *dev_id) | |
1268 | { | |
1269 | struct irq_desc *desc = irq_to_desc(irq); | |
1270 | int ret; | |
1271 | ||
1272 | if (!desc) | |
1273 | return -EINVAL; | |
1274 | ||
1ccb4e61 | 1275 | if (irq_settings_is_nested_thread(desc)) { |
ae731f8d MZ |
1276 | ret = request_threaded_irq(irq, NULL, handler, |
1277 | flags, name, dev_id); | |
1278 | return !ret ? IRQC_IS_NESTED : ret; | |
1279 | } | |
1280 | ||
1281 | ret = request_irq(irq, handler, flags, name, dev_id); | |
1282 | return !ret ? IRQC_IS_HARDIRQ : ret; | |
1283 | } | |
1284 | EXPORT_SYMBOL_GPL(request_any_context_irq); |