Commit | Line | Data |
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cf37b6b4 NP |
1 | /* |
2 | * Generic entry point for the idle threads | |
3 | */ | |
4 | #include <linux/sched.h> | |
5 | #include <linux/cpu.h> | |
6 | #include <linux/cpuidle.h> | |
7 | #include <linux/tick.h> | |
8 | #include <linux/mm.h> | |
9 | #include <linux/stackprotector.h> | |
38106313 | 10 | #include <linux/suspend.h> |
cf37b6b4 NP |
11 | |
12 | #include <asm/tlb.h> | |
13 | ||
14 | #include <trace/events/power.h> | |
15 | ||
e3baac47 PZ |
16 | #include "sched.h" |
17 | ||
faad3849 RW |
18 | /** |
19 | * sched_idle_set_state - Record idle state for the current CPU. | |
20 | * @idle_state: State to record. | |
21 | */ | |
22 | void sched_idle_set_state(struct cpuidle_state *idle_state) | |
23 | { | |
24 | idle_set_state(this_rq(), idle_state); | |
25 | } | |
26 | ||
cf37b6b4 NP |
27 | static int __read_mostly cpu_idle_force_poll; |
28 | ||
29 | void cpu_idle_poll_ctrl(bool enable) | |
30 | { | |
31 | if (enable) { | |
32 | cpu_idle_force_poll++; | |
33 | } else { | |
34 | cpu_idle_force_poll--; | |
35 | WARN_ON_ONCE(cpu_idle_force_poll < 0); | |
36 | } | |
37 | } | |
38 | ||
39 | #ifdef CONFIG_GENERIC_IDLE_POLL_SETUP | |
40 | static int __init cpu_idle_poll_setup(char *__unused) | |
41 | { | |
42 | cpu_idle_force_poll = 1; | |
43 | return 1; | |
44 | } | |
45 | __setup("nohlt", cpu_idle_poll_setup); | |
46 | ||
47 | static int __init cpu_idle_nopoll_setup(char *__unused) | |
48 | { | |
49 | cpu_idle_force_poll = 0; | |
50 | return 1; | |
51 | } | |
52 | __setup("hlt", cpu_idle_nopoll_setup); | |
53 | #endif | |
54 | ||
55 | static inline int cpu_idle_poll(void) | |
56 | { | |
57 | rcu_idle_enter(); | |
58 | trace_cpu_idle_rcuidle(0, smp_processor_id()); | |
59 | local_irq_enable(); | |
ff6f2d29 PM |
60 | while (!tif_need_resched() && |
61 | (cpu_idle_force_poll || tick_check_broadcast_expired())) | |
cf37b6b4 NP |
62 | cpu_relax(); |
63 | trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id()); | |
64 | rcu_idle_exit(); | |
65 | return 1; | |
66 | } | |
67 | ||
68 | /* Weak implementations for optional arch specific functions */ | |
69 | void __weak arch_cpu_idle_prepare(void) { } | |
70 | void __weak arch_cpu_idle_enter(void) { } | |
71 | void __weak arch_cpu_idle_exit(void) { } | |
72 | void __weak arch_cpu_idle_dead(void) { } | |
73 | void __weak arch_cpu_idle(void) | |
74 | { | |
75 | cpu_idle_force_poll = 1; | |
76 | local_irq_enable(); | |
77 | } | |
78 | ||
827a5aef RW |
79 | /** |
80 | * default_idle_call - Default CPU idle routine. | |
81 | * | |
82 | * To use when the cpuidle framework cannot be used. | |
83 | */ | |
84 | void default_idle_call(void) | |
82f66327 | 85 | { |
82f66327 RW |
86 | if (current_clr_polling_and_test()) |
87 | local_irq_enable(); | |
88 | else | |
89 | arch_cpu_idle(); | |
90 | } | |
91 | ||
bcf6ad8a RW |
92 | static int call_cpuidle(struct cpuidle_driver *drv, struct cpuidle_device *dev, |
93 | int next_state) | |
94 | { | |
bcf6ad8a RW |
95 | /* Fall back to the default arch idle method on errors. */ |
96 | if (next_state < 0) { | |
97 | default_idle_call(); | |
98 | return next_state; | |
99 | } | |
100 | ||
101 | /* | |
102 | * The idle task must be scheduled, it is pointless to go to idle, just | |
103 | * update no idle residency and return. | |
104 | */ | |
105 | if (current_clr_polling_and_test()) { | |
106 | dev->last_residency = 0; | |
107 | local_irq_enable(); | |
108 | return -EBUSY; | |
109 | } | |
110 | ||
bcf6ad8a RW |
111 | /* |
112 | * Enter the idle state previously returned by the governor decision. | |
113 | * This function will block until an interrupt occurs and will take | |
114 | * care of re-enabling the local interrupts | |
115 | */ | |
827a5aef | 116 | return cpuidle_enter(drv, dev, next_state); |
bcf6ad8a RW |
117 | } |
118 | ||
30cdd69e DL |
119 | /** |
120 | * cpuidle_idle_call - the main idle function | |
121 | * | |
122 | * NOTE: no locks or semaphores should be used here | |
82c65d60 AL |
123 | * |
124 | * On archs that support TIF_POLLING_NRFLAG, is called with polling | |
125 | * set, and it returns with polling set. If it ever stops polling, it | |
126 | * must clear the polling bit. | |
30cdd69e | 127 | */ |
08c373e5 | 128 | static void cpuidle_idle_call(void) |
30cdd69e DL |
129 | { |
130 | struct cpuidle_device *dev = __this_cpu_read(cpuidle_devices); | |
131 | struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev); | |
37352273 | 132 | int next_state, entered_state; |
30cdd69e | 133 | |
a1d028bd DL |
134 | /* |
135 | * Check if the idle task must be rescheduled. If it is the | |
c444117f | 136 | * case, exit the function after re-enabling the local irq. |
a1d028bd | 137 | */ |
c444117f | 138 | if (need_resched()) { |
8ca3c642 | 139 | local_irq_enable(); |
08c373e5 | 140 | return; |
8ca3c642 DL |
141 | } |
142 | ||
a1d028bd DL |
143 | /* |
144 | * During the idle period, stop measuring the disabled irqs | |
145 | * critical sections latencies | |
146 | */ | |
c8cc7d4d | 147 | stop_critical_timings(); |
a1d028bd DL |
148 | |
149 | /* | |
150 | * Tell the RCU framework we are entering an idle section, | |
151 | * so no more rcu read side critical sections and one more | |
152 | * step to the grace period | |
153 | */ | |
c8cc7d4d DL |
154 | rcu_idle_enter(); |
155 | ||
82f66327 RW |
156 | if (cpuidle_not_available(drv, dev)) { |
157 | default_idle_call(); | |
158 | goto exit_idle; | |
159 | } | |
ef2b22ac | 160 | |
38106313 RW |
161 | /* |
162 | * Suspend-to-idle ("freeze") is a system state in which all user space | |
163 | * has been frozen, all I/O devices have been suspended and the only | |
164 | * activity happens here and in iterrupts (if any). In that case bypass | |
165 | * the cpuidle governor and go stratight for the deepest idle state | |
166 | * available. Possibly also suspend the local tick and the entire | |
167 | * timekeeping to prevent timer interrupts from kicking us out of idle | |
168 | * until a proper wakeup interrupt happens. | |
169 | */ | |
170 | if (idle_should_freeze()) { | |
ef2b22ac RW |
171 | entered_state = cpuidle_enter_freeze(drv, dev); |
172 | if (entered_state >= 0) { | |
173 | local_irq_enable(); | |
174 | goto exit_idle; | |
175 | } | |
176 | ||
ef2b22ac | 177 | next_state = cpuidle_find_deepest_state(drv, dev); |
bcf6ad8a | 178 | call_cpuidle(drv, dev, next_state); |
ef2b22ac | 179 | } else { |
ef2b22ac RW |
180 | /* |
181 | * Ask the cpuidle framework to choose a convenient idle state. | |
182 | */ | |
183 | next_state = cpuidle_select(drv, dev); | |
bcf6ad8a RW |
184 | entered_state = call_cpuidle(drv, dev, next_state); |
185 | /* | |
186 | * Give the governor an opportunity to reflect on the outcome | |
187 | */ | |
ef2b22ac | 188 | cpuidle_reflect(dev, entered_state); |
bcf6ad8a | 189 | } |
37352273 PZ |
190 | |
191 | exit_idle: | |
8ca3c642 | 192 | __current_set_polling(); |
30cdd69e | 193 | |
a1d028bd | 194 | /* |
37352273 | 195 | * It is up to the idle functions to reenable local interrupts |
a1d028bd | 196 | */ |
c8cc7d4d DL |
197 | if (WARN_ON_ONCE(irqs_disabled())) |
198 | local_irq_enable(); | |
199 | ||
200 | rcu_idle_exit(); | |
201 | start_critical_timings(); | |
30cdd69e | 202 | } |
30cdd69e | 203 | |
528a25b0 PM |
204 | DEFINE_PER_CPU(bool, cpu_dead_idle); |
205 | ||
cf37b6b4 NP |
206 | /* |
207 | * Generic idle loop implementation | |
82c65d60 AL |
208 | * |
209 | * Called with polling cleared. | |
cf37b6b4 NP |
210 | */ |
211 | static void cpu_idle_loop(void) | |
212 | { | |
213 | while (1) { | |
82c65d60 AL |
214 | /* |
215 | * If the arch has a polling bit, we maintain an invariant: | |
216 | * | |
217 | * Our polling bit is clear if we're not scheduled (i.e. if | |
218 | * rq->curr != rq->idle). This means that, if rq->idle has | |
219 | * the polling bit set, then setting need_resched is | |
220 | * guaranteed to cause the cpu to reschedule. | |
221 | */ | |
222 | ||
223 | __current_set_polling(); | |
cf37b6b4 NP |
224 | tick_nohz_idle_enter(); |
225 | ||
226 | while (!need_resched()) { | |
227 | check_pgt_cache(); | |
228 | rmb(); | |
229 | ||
528a25b0 | 230 | if (cpu_is_offline(smp_processor_id())) { |
88428cc5 PM |
231 | rcu_cpu_notify(NULL, CPU_DYING_IDLE, |
232 | (void *)(long)smp_processor_id()); | |
528a25b0 PM |
233 | smp_mb(); /* all activity before dead. */ |
234 | this_cpu_write(cpu_dead_idle, true); | |
cf37b6b4 | 235 | arch_cpu_idle_dead(); |
528a25b0 | 236 | } |
cf37b6b4 NP |
237 | |
238 | local_irq_disable(); | |
239 | arch_cpu_idle_enter(); | |
240 | ||
241 | /* | |
242 | * In poll mode we reenable interrupts and spin. | |
243 | * | |
244 | * Also if we detected in the wakeup from idle | |
245 | * path that the tick broadcast device expired | |
246 | * for us, we don't want to go deep idle as we | |
247 | * know that the IPI is going to arrive right | |
248 | * away | |
249 | */ | |
8ca3c642 | 250 | if (cpu_idle_force_poll || tick_check_broadcast_expired()) |
cf37b6b4 | 251 | cpu_idle_poll(); |
8ca3c642 DL |
252 | else |
253 | cpuidle_idle_call(); | |
254 | ||
cf37b6b4 | 255 | arch_cpu_idle_exit(); |
cf37b6b4 | 256 | } |
06d50c65 PZ |
257 | |
258 | /* | |
259 | * Since we fell out of the loop above, we know | |
260 | * TIF_NEED_RESCHED must be set, propagate it into | |
261 | * PREEMPT_NEED_RESCHED. | |
262 | * | |
263 | * This is required because for polling idle loops we will | |
264 | * not have had an IPI to fold the state for us. | |
265 | */ | |
266 | preempt_set_need_resched(); | |
cf37b6b4 | 267 | tick_nohz_idle_exit(); |
82c65d60 AL |
268 | __current_clr_polling(); |
269 | ||
270 | /* | |
e3baac47 PZ |
271 | * We promise to call sched_ttwu_pending and reschedule |
272 | * if need_resched is set while polling is set. That | |
273 | * means that clearing polling needs to be visible | |
274 | * before doing these things. | |
82c65d60 AL |
275 | */ |
276 | smp_mb__after_atomic(); | |
277 | ||
e3baac47 | 278 | sched_ttwu_pending(); |
cf37b6b4 NP |
279 | schedule_preempt_disabled(); |
280 | } | |
281 | } | |
282 | ||
283 | void cpu_startup_entry(enum cpuhp_state state) | |
284 | { | |
285 | /* | |
286 | * This #ifdef needs to die, but it's too late in the cycle to | |
287 | * make this generic (arm and sh have never invoked the canary | |
288 | * init for the non boot cpus!). Will be fixed in 3.11 | |
289 | */ | |
290 | #ifdef CONFIG_X86 | |
291 | /* | |
292 | * If we're the non-boot CPU, nothing set the stack canary up | |
293 | * for us. The boot CPU already has it initialized but no harm | |
294 | * in doing it again. This is a good place for updating it, as | |
295 | * we wont ever return from this function (so the invalid | |
296 | * canaries already on the stack wont ever trigger). | |
297 | */ | |
298 | boot_init_stack_canary(); | |
299 | #endif | |
cf37b6b4 NP |
300 | arch_cpu_idle_prepare(); |
301 | cpu_idle_loop(); | |
302 | } |