Commit | Line | Data |
---|---|---|
f8381cba TG |
1 | /* |
2 | * linux/kernel/time/tick-broadcast.c | |
3 | * | |
4 | * This file contains functions which emulate a local clock-event | |
5 | * device via a broadcast event source. | |
6 | * | |
7 | * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de> | |
8 | * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar | |
9 | * Copyright(C) 2006-2007, Timesys Corp., Thomas Gleixner | |
10 | * | |
11 | * This code is licenced under the GPL version 2. For details see | |
12 | * kernel-base/COPYING. | |
13 | */ | |
14 | #include <linux/cpu.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/hrtimer.h> | |
d7b90689 | 17 | #include <linux/interrupt.h> |
f8381cba TG |
18 | #include <linux/percpu.h> |
19 | #include <linux/profile.h> | |
20 | #include <linux/sched.h> | |
12ad1000 | 21 | #include <linux/smp.h> |
ccf33d68 | 22 | #include <linux/module.h> |
f8381cba TG |
23 | |
24 | #include "tick-internal.h" | |
25 | ||
26 | /* | |
27 | * Broadcast support for broken x86 hardware, where the local apic | |
28 | * timer stops in C3 state. | |
29 | */ | |
30 | ||
a52f5c56 | 31 | static struct tick_device tick_broadcast_device; |
b352bc1c | 32 | static cpumask_var_t tick_broadcast_mask; |
07bd1172 | 33 | static cpumask_var_t tick_broadcast_on; |
b352bc1c | 34 | static cpumask_var_t tmpmask; |
b5f91da0 | 35 | static DEFINE_RAW_SPINLOCK(tick_broadcast_lock); |
aa276e1c | 36 | static int tick_broadcast_force; |
f8381cba | 37 | |
5590a536 TG |
38 | #ifdef CONFIG_TICK_ONESHOT |
39 | static void tick_broadcast_clear_oneshot(int cpu); | |
40 | #else | |
41 | static inline void tick_broadcast_clear_oneshot(int cpu) { } | |
42 | #endif | |
43 | ||
289f480a IM |
44 | /* |
45 | * Debugging: see timer_list.c | |
46 | */ | |
47 | struct tick_device *tick_get_broadcast_device(void) | |
48 | { | |
49 | return &tick_broadcast_device; | |
50 | } | |
51 | ||
6b954823 | 52 | struct cpumask *tick_get_broadcast_mask(void) |
289f480a | 53 | { |
b352bc1c | 54 | return tick_broadcast_mask; |
289f480a IM |
55 | } |
56 | ||
f8381cba TG |
57 | /* |
58 | * Start the device in periodic mode | |
59 | */ | |
60 | static void tick_broadcast_start_periodic(struct clock_event_device *bc) | |
61 | { | |
18de5bc4 | 62 | if (bc) |
f8381cba TG |
63 | tick_setup_periodic(bc, 1); |
64 | } | |
65 | ||
66 | /* | |
67 | * Check, if the device can be utilized as broadcast device: | |
68 | */ | |
45cb8e01 TG |
69 | static bool tick_check_broadcast_device(struct clock_event_device *curdev, |
70 | struct clock_event_device *newdev) | |
71 | { | |
72 | if ((newdev->features & CLOCK_EVT_FEAT_DUMMY) || | |
245a3496 | 73 | (newdev->features & CLOCK_EVT_FEAT_PERCPU) || |
45cb8e01 TG |
74 | (newdev->features & CLOCK_EVT_FEAT_C3STOP)) |
75 | return false; | |
76 | ||
77 | if (tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT && | |
78 | !(newdev->features & CLOCK_EVT_FEAT_ONESHOT)) | |
79 | return false; | |
80 | ||
81 | return !curdev || newdev->rating > curdev->rating; | |
82 | } | |
83 | ||
84 | /* | |
85 | * Conditionally install/replace broadcast device | |
86 | */ | |
7172a286 | 87 | void tick_install_broadcast_device(struct clock_event_device *dev) |
f8381cba | 88 | { |
6f7a05d7 TG |
89 | struct clock_event_device *cur = tick_broadcast_device.evtdev; |
90 | ||
45cb8e01 | 91 | if (!tick_check_broadcast_device(cur, dev)) |
7172a286 | 92 | return; |
45cb8e01 | 93 | |
ccf33d68 TG |
94 | if (!try_module_get(dev->owner)) |
95 | return; | |
f8381cba | 96 | |
45cb8e01 | 97 | clockevents_exchange_device(cur, dev); |
6f7a05d7 TG |
98 | if (cur) |
99 | cur->event_handler = clockevents_handle_noop; | |
f8381cba | 100 | tick_broadcast_device.evtdev = dev; |
b352bc1c | 101 | if (!cpumask_empty(tick_broadcast_mask)) |
f8381cba | 102 | tick_broadcast_start_periodic(dev); |
c038c1c4 SB |
103 | /* |
104 | * Inform all cpus about this. We might be in a situation | |
105 | * where we did not switch to oneshot mode because the per cpu | |
106 | * devices are affected by CLOCK_EVT_FEAT_C3STOP and the lack | |
107 | * of a oneshot capable broadcast device. Without that | |
108 | * notification the systems stays stuck in periodic mode | |
109 | * forever. | |
110 | */ | |
111 | if (dev->features & CLOCK_EVT_FEAT_ONESHOT) | |
112 | tick_clock_notify(); | |
f8381cba TG |
113 | } |
114 | ||
115 | /* | |
116 | * Check, if the device is the broadcast device | |
117 | */ | |
118 | int tick_is_broadcast_device(struct clock_event_device *dev) | |
119 | { | |
120 | return (dev && tick_broadcast_device.evtdev == dev); | |
121 | } | |
122 | ||
627ee794 TG |
123 | int tick_broadcast_update_freq(struct clock_event_device *dev, u32 freq) |
124 | { | |
125 | int ret = -ENODEV; | |
126 | ||
127 | if (tick_is_broadcast_device(dev)) { | |
128 | raw_spin_lock(&tick_broadcast_lock); | |
129 | ret = __clockevents_update_freq(dev, freq); | |
130 | raw_spin_unlock(&tick_broadcast_lock); | |
131 | } | |
132 | return ret; | |
133 | } | |
134 | ||
135 | ||
12ad1000 MR |
136 | static void err_broadcast(const struct cpumask *mask) |
137 | { | |
138 | pr_crit_once("Failed to broadcast timer tick. Some CPUs may be unresponsive.\n"); | |
139 | } | |
140 | ||
5d1d9a29 MR |
141 | static void tick_device_setup_broadcast_func(struct clock_event_device *dev) |
142 | { | |
143 | if (!dev->broadcast) | |
144 | dev->broadcast = tick_broadcast; | |
145 | if (!dev->broadcast) { | |
146 | pr_warn_once("%s depends on broadcast, but no broadcast function available\n", | |
147 | dev->name); | |
148 | dev->broadcast = err_broadcast; | |
149 | } | |
150 | } | |
151 | ||
f8381cba TG |
152 | /* |
153 | * Check, if the device is disfunctional and a place holder, which | |
154 | * needs to be handled by the broadcast device. | |
155 | */ | |
156 | int tick_device_uses_broadcast(struct clock_event_device *dev, int cpu) | |
157 | { | |
07bd1172 | 158 | struct clock_event_device *bc = tick_broadcast_device.evtdev; |
f8381cba | 159 | unsigned long flags; |
07bd1172 | 160 | int ret; |
f8381cba | 161 | |
b5f91da0 | 162 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
f8381cba TG |
163 | |
164 | /* | |
165 | * Devices might be registered with both periodic and oneshot | |
166 | * mode disabled. This signals, that the device needs to be | |
167 | * operated from the broadcast device and is a placeholder for | |
168 | * the cpu local device. | |
169 | */ | |
170 | if (!tick_device_is_functional(dev)) { | |
171 | dev->event_handler = tick_handle_periodic; | |
5d1d9a29 | 172 | tick_device_setup_broadcast_func(dev); |
b352bc1c | 173 | cpumask_set_cpu(cpu, tick_broadcast_mask); |
a272dcca SB |
174 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) |
175 | tick_broadcast_start_periodic(bc); | |
176 | else | |
177 | tick_broadcast_setup_oneshot(bc); | |
f8381cba | 178 | ret = 1; |
5590a536 TG |
179 | } else { |
180 | /* | |
07bd1172 TG |
181 | * Clear the broadcast bit for this cpu if the |
182 | * device is not power state affected. | |
5590a536 | 183 | */ |
07bd1172 | 184 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) |
b352bc1c | 185 | cpumask_clear_cpu(cpu, tick_broadcast_mask); |
07bd1172 | 186 | else |
5d1d9a29 | 187 | tick_device_setup_broadcast_func(dev); |
07bd1172 TG |
188 | |
189 | /* | |
190 | * Clear the broadcast bit if the CPU is not in | |
191 | * periodic broadcast on state. | |
192 | */ | |
193 | if (!cpumask_test_cpu(cpu, tick_broadcast_on)) | |
194 | cpumask_clear_cpu(cpu, tick_broadcast_mask); | |
195 | ||
196 | switch (tick_broadcast_device.mode) { | |
197 | case TICKDEV_MODE_ONESHOT: | |
198 | /* | |
199 | * If the system is in oneshot mode we can | |
200 | * unconditionally clear the oneshot mask bit, | |
201 | * because the CPU is running and therefore | |
202 | * not in an idle state which causes the power | |
203 | * state affected device to stop. Let the | |
204 | * caller initialize the device. | |
205 | */ | |
206 | tick_broadcast_clear_oneshot(cpu); | |
207 | ret = 0; | |
208 | break; | |
209 | ||
210 | case TICKDEV_MODE_PERIODIC: | |
211 | /* | |
212 | * If the system is in periodic mode, check | |
213 | * whether the broadcast device can be | |
214 | * switched off now. | |
215 | */ | |
216 | if (cpumask_empty(tick_broadcast_mask) && bc) | |
217 | clockevents_shutdown(bc); | |
218 | /* | |
219 | * If we kept the cpu in the broadcast mask, | |
220 | * tell the caller to leave the per cpu device | |
221 | * in shutdown state. The periodic interrupt | |
222 | * is delivered by the broadcast device. | |
223 | */ | |
224 | ret = cpumask_test_cpu(cpu, tick_broadcast_mask); | |
225 | break; | |
226 | default: | |
227 | /* Nothing to do */ | |
228 | ret = 0; | |
229 | break; | |
5590a536 TG |
230 | } |
231 | } | |
b5f91da0 | 232 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
f8381cba TG |
233 | return ret; |
234 | } | |
235 | ||
12572dbb MR |
236 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
237 | int tick_receive_broadcast(void) | |
238 | { | |
239 | struct tick_device *td = this_cpu_ptr(&tick_cpu_device); | |
240 | struct clock_event_device *evt = td->evtdev; | |
241 | ||
242 | if (!evt) | |
243 | return -ENODEV; | |
244 | ||
245 | if (!evt->event_handler) | |
246 | return -EINVAL; | |
247 | ||
248 | evt->event_handler(evt); | |
249 | return 0; | |
250 | } | |
251 | #endif | |
252 | ||
f8381cba | 253 | /* |
6b954823 | 254 | * Broadcast the event to the cpus, which are set in the mask (mangled). |
f8381cba | 255 | */ |
6b954823 | 256 | static void tick_do_broadcast(struct cpumask *mask) |
f8381cba | 257 | { |
186e3cb8 | 258 | int cpu = smp_processor_id(); |
f8381cba TG |
259 | struct tick_device *td; |
260 | ||
261 | /* | |
262 | * Check, if the current cpu is in the mask | |
263 | */ | |
6b954823 RR |
264 | if (cpumask_test_cpu(cpu, mask)) { |
265 | cpumask_clear_cpu(cpu, mask); | |
f8381cba TG |
266 | td = &per_cpu(tick_cpu_device, cpu); |
267 | td->evtdev->event_handler(td->evtdev); | |
f8381cba TG |
268 | } |
269 | ||
6b954823 | 270 | if (!cpumask_empty(mask)) { |
f8381cba TG |
271 | /* |
272 | * It might be necessary to actually check whether the devices | |
273 | * have different broadcast functions. For now, just use the | |
274 | * one of the first device. This works as long as we have this | |
275 | * misfeature only on x86 (lapic) | |
276 | */ | |
6b954823 RR |
277 | td = &per_cpu(tick_cpu_device, cpumask_first(mask)); |
278 | td->evtdev->broadcast(mask); | |
f8381cba | 279 | } |
f8381cba TG |
280 | } |
281 | ||
282 | /* | |
283 | * Periodic broadcast: | |
284 | * - invoke the broadcast handlers | |
285 | */ | |
286 | static void tick_do_periodic_broadcast(void) | |
287 | { | |
b352bc1c TG |
288 | cpumask_and(tmpmask, cpu_online_mask, tick_broadcast_mask); |
289 | tick_do_broadcast(tmpmask); | |
f8381cba TG |
290 | } |
291 | ||
292 | /* | |
293 | * Event handler for periodic broadcast ticks | |
294 | */ | |
295 | static void tick_handle_periodic_broadcast(struct clock_event_device *dev) | |
296 | { | |
d4496b39 TG |
297 | ktime_t next; |
298 | ||
627ee794 TG |
299 | raw_spin_lock(&tick_broadcast_lock); |
300 | ||
f8381cba TG |
301 | tick_do_periodic_broadcast(); |
302 | ||
303 | /* | |
304 | * The device is in periodic mode. No reprogramming necessary: | |
305 | */ | |
306 | if (dev->mode == CLOCK_EVT_MODE_PERIODIC) | |
627ee794 | 307 | goto unlock; |
f8381cba TG |
308 | |
309 | /* | |
310 | * Setup the next period for devices, which do not have | |
d4496b39 | 311 | * periodic mode. We read dev->next_event first and add to it |
698f9315 | 312 | * when the event already expired. clockevents_program_event() |
d4496b39 TG |
313 | * sets dev->next_event only when the event is really |
314 | * programmed to the device. | |
f8381cba | 315 | */ |
d4496b39 TG |
316 | for (next = dev->next_event; ;) { |
317 | next = ktime_add(next, tick_period); | |
f8381cba | 318 | |
d1748302 | 319 | if (!clockevents_program_event(dev, next, false)) |
627ee794 | 320 | goto unlock; |
f8381cba TG |
321 | tick_do_periodic_broadcast(); |
322 | } | |
627ee794 TG |
323 | unlock: |
324 | raw_spin_unlock(&tick_broadcast_lock); | |
f8381cba TG |
325 | } |
326 | ||
327 | /* | |
328 | * Powerstate information: The system enters/leaves a state, where | |
329 | * affected devices might stop | |
330 | */ | |
f833bab8 | 331 | static void tick_do_broadcast_on_off(unsigned long *reason) |
f8381cba TG |
332 | { |
333 | struct clock_event_device *bc, *dev; | |
334 | struct tick_device *td; | |
f833bab8 | 335 | unsigned long flags; |
9c17bcda | 336 | int cpu, bc_stopped; |
f8381cba | 337 | |
b5f91da0 | 338 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
f8381cba TG |
339 | |
340 | cpu = smp_processor_id(); | |
341 | td = &per_cpu(tick_cpu_device, cpu); | |
342 | dev = td->evtdev; | |
343 | bc = tick_broadcast_device.evtdev; | |
344 | ||
345 | /* | |
1595f452 | 346 | * Is the device not affected by the powerstate ? |
f8381cba | 347 | */ |
1595f452 | 348 | if (!dev || !(dev->features & CLOCK_EVT_FEAT_C3STOP)) |
f8381cba TG |
349 | goto out; |
350 | ||
3dfbc884 TG |
351 | if (!tick_device_is_functional(dev)) |
352 | goto out; | |
1595f452 | 353 | |
b352bc1c | 354 | bc_stopped = cpumask_empty(tick_broadcast_mask); |
9c17bcda | 355 | |
1595f452 TG |
356 | switch (*reason) { |
357 | case CLOCK_EVT_NOTIFY_BROADCAST_ON: | |
358 | case CLOCK_EVT_NOTIFY_BROADCAST_FORCE: | |
07bd1172 | 359 | cpumask_set_cpu(cpu, tick_broadcast_on); |
b352bc1c | 360 | if (!cpumask_test_and_set_cpu(cpu, tick_broadcast_mask)) { |
07454bff TG |
361 | if (tick_broadcast_device.mode == |
362 | TICKDEV_MODE_PERIODIC) | |
2344abbc | 363 | clockevents_shutdown(dev); |
f8381cba | 364 | } |
3dfbc884 | 365 | if (*reason == CLOCK_EVT_NOTIFY_BROADCAST_FORCE) |
aa276e1c | 366 | tick_broadcast_force = 1; |
1595f452 TG |
367 | break; |
368 | case CLOCK_EVT_NOTIFY_BROADCAST_OFF: | |
07bd1172 TG |
369 | if (tick_broadcast_force) |
370 | break; | |
371 | cpumask_clear_cpu(cpu, tick_broadcast_on); | |
372 | if (!tick_device_is_functional(dev)) | |
373 | break; | |
374 | if (cpumask_test_and_clear_cpu(cpu, tick_broadcast_mask)) { | |
07454bff TG |
375 | if (tick_broadcast_device.mode == |
376 | TICKDEV_MODE_PERIODIC) | |
f8381cba TG |
377 | tick_setup_periodic(dev, 0); |
378 | } | |
1595f452 | 379 | break; |
f8381cba TG |
380 | } |
381 | ||
b352bc1c | 382 | if (cpumask_empty(tick_broadcast_mask)) { |
9c17bcda | 383 | if (!bc_stopped) |
2344abbc | 384 | clockevents_shutdown(bc); |
9c17bcda | 385 | } else if (bc_stopped) { |
f8381cba TG |
386 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) |
387 | tick_broadcast_start_periodic(bc); | |
79bf2bb3 TG |
388 | else |
389 | tick_broadcast_setup_oneshot(bc); | |
f8381cba TG |
390 | } |
391 | out: | |
b5f91da0 | 392 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
f8381cba TG |
393 | } |
394 | ||
395 | /* | |
396 | * Powerstate information: The system enters/leaves a state, where | |
397 | * affected devices might stop. | |
398 | */ | |
399 | void tick_broadcast_on_off(unsigned long reason, int *oncpu) | |
400 | { | |
6b954823 | 401 | if (!cpumask_test_cpu(*oncpu, cpu_online_mask)) |
833df317 | 402 | printk(KERN_ERR "tick-broadcast: ignoring broadcast for " |
72fcde96 | 403 | "offline CPU #%d\n", *oncpu); |
bf020cb7 | 404 | else |
f833bab8 | 405 | tick_do_broadcast_on_off(&reason); |
f8381cba TG |
406 | } |
407 | ||
408 | /* | |
409 | * Set the periodic handler depending on broadcast on/off | |
410 | */ | |
411 | void tick_set_periodic_handler(struct clock_event_device *dev, int broadcast) | |
412 | { | |
413 | if (!broadcast) | |
414 | dev->event_handler = tick_handle_periodic; | |
415 | else | |
416 | dev->event_handler = tick_handle_periodic_broadcast; | |
417 | } | |
418 | ||
419 | /* | |
420 | * Remove a CPU from broadcasting | |
421 | */ | |
422 | void tick_shutdown_broadcast(unsigned int *cpup) | |
423 | { | |
424 | struct clock_event_device *bc; | |
425 | unsigned long flags; | |
426 | unsigned int cpu = *cpup; | |
427 | ||
b5f91da0 | 428 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
f8381cba TG |
429 | |
430 | bc = tick_broadcast_device.evtdev; | |
b352bc1c | 431 | cpumask_clear_cpu(cpu, tick_broadcast_mask); |
07bd1172 | 432 | cpumask_clear_cpu(cpu, tick_broadcast_on); |
f8381cba TG |
433 | |
434 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) { | |
b352bc1c | 435 | if (bc && cpumask_empty(tick_broadcast_mask)) |
2344abbc | 436 | clockevents_shutdown(bc); |
f8381cba TG |
437 | } |
438 | ||
b5f91da0 | 439 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
f8381cba | 440 | } |
79bf2bb3 | 441 | |
6321dd60 TG |
442 | void tick_suspend_broadcast(void) |
443 | { | |
444 | struct clock_event_device *bc; | |
445 | unsigned long flags; | |
446 | ||
b5f91da0 | 447 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
6321dd60 TG |
448 | |
449 | bc = tick_broadcast_device.evtdev; | |
18de5bc4 | 450 | if (bc) |
2344abbc | 451 | clockevents_shutdown(bc); |
6321dd60 | 452 | |
b5f91da0 | 453 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
6321dd60 TG |
454 | } |
455 | ||
456 | int tick_resume_broadcast(void) | |
457 | { | |
458 | struct clock_event_device *bc; | |
459 | unsigned long flags; | |
460 | int broadcast = 0; | |
461 | ||
b5f91da0 | 462 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
6321dd60 TG |
463 | |
464 | bc = tick_broadcast_device.evtdev; | |
6321dd60 | 465 | |
cd05a1f8 | 466 | if (bc) { |
18de5bc4 TG |
467 | clockevents_set_mode(bc, CLOCK_EVT_MODE_RESUME); |
468 | ||
cd05a1f8 TG |
469 | switch (tick_broadcast_device.mode) { |
470 | case TICKDEV_MODE_PERIODIC: | |
b352bc1c | 471 | if (!cpumask_empty(tick_broadcast_mask)) |
cd05a1f8 | 472 | tick_broadcast_start_periodic(bc); |
6b954823 | 473 | broadcast = cpumask_test_cpu(smp_processor_id(), |
b352bc1c | 474 | tick_broadcast_mask); |
cd05a1f8 TG |
475 | break; |
476 | case TICKDEV_MODE_ONESHOT: | |
b352bc1c | 477 | if (!cpumask_empty(tick_broadcast_mask)) |
a6371f80 | 478 | broadcast = tick_resume_broadcast_oneshot(bc); |
cd05a1f8 TG |
479 | break; |
480 | } | |
6321dd60 | 481 | } |
b5f91da0 | 482 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
6321dd60 TG |
483 | |
484 | return broadcast; | |
485 | } | |
486 | ||
487 | ||
79bf2bb3 TG |
488 | #ifdef CONFIG_TICK_ONESHOT |
489 | ||
b352bc1c | 490 | static cpumask_var_t tick_broadcast_oneshot_mask; |
26517f3e | 491 | static cpumask_var_t tick_broadcast_pending_mask; |
989dcb64 | 492 | static cpumask_var_t tick_broadcast_force_mask; |
79bf2bb3 | 493 | |
289f480a | 494 | /* |
6b954823 | 495 | * Exposed for debugging: see timer_list.c |
289f480a | 496 | */ |
6b954823 | 497 | struct cpumask *tick_get_broadcast_oneshot_mask(void) |
289f480a | 498 | { |
b352bc1c | 499 | return tick_broadcast_oneshot_mask; |
289f480a IM |
500 | } |
501 | ||
eaa907c5 TG |
502 | /* |
503 | * Called before going idle with interrupts disabled. Checks whether a | |
504 | * broadcast event from the other core is about to happen. We detected | |
505 | * that in tick_broadcast_oneshot_control(). The callsite can use this | |
506 | * to avoid a deep idle transition as we are about to get the | |
507 | * broadcast IPI right away. | |
508 | */ | |
509 | int tick_check_broadcast_expired(void) | |
510 | { | |
511 | return cpumask_test_cpu(smp_processor_id(), tick_broadcast_force_mask); | |
512 | } | |
513 | ||
d2348fb6 DL |
514 | /* |
515 | * Set broadcast interrupt affinity | |
516 | */ | |
517 | static void tick_broadcast_set_affinity(struct clock_event_device *bc, | |
518 | const struct cpumask *cpumask) | |
519 | { | |
520 | if (!(bc->features & CLOCK_EVT_FEAT_DYNIRQ)) | |
521 | return; | |
522 | ||
523 | if (cpumask_equal(bc->cpumask, cpumask)) | |
524 | return; | |
525 | ||
526 | bc->cpumask = cpumask; | |
527 | irq_set_affinity(bc->irq, bc->cpumask); | |
528 | } | |
529 | ||
530 | static int tick_broadcast_set_event(struct clock_event_device *bc, int cpu, | |
f9ae39d0 | 531 | ktime_t expires, int force) |
79bf2bb3 | 532 | { |
d2348fb6 DL |
533 | int ret; |
534 | ||
b9a6a235 TG |
535 | if (bc->mode != CLOCK_EVT_MODE_ONESHOT) |
536 | clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT); | |
537 | ||
d2348fb6 DL |
538 | ret = clockevents_program_event(bc, expires, force); |
539 | if (!ret) | |
540 | tick_broadcast_set_affinity(bc, cpumask_of(cpu)); | |
541 | return ret; | |
79bf2bb3 TG |
542 | } |
543 | ||
cd05a1f8 TG |
544 | int tick_resume_broadcast_oneshot(struct clock_event_device *bc) |
545 | { | |
546 | clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT); | |
b7e113dc | 547 | return 0; |
cd05a1f8 TG |
548 | } |
549 | ||
fb02fbc1 TG |
550 | /* |
551 | * Called from irq_enter() when idle was interrupted to reenable the | |
552 | * per cpu device. | |
553 | */ | |
e8fcaa5c | 554 | void tick_check_oneshot_broadcast_this_cpu(void) |
fb02fbc1 | 555 | { |
e8fcaa5c FW |
556 | if (cpumask_test_cpu(smp_processor_id(), tick_broadcast_oneshot_mask)) { |
557 | struct tick_device *td = &__get_cpu_var(tick_cpu_device); | |
fb02fbc1 | 558 | |
1f73a980 TG |
559 | /* |
560 | * We might be in the middle of switching over from | |
561 | * periodic to oneshot. If the CPU has not yet | |
562 | * switched over, leave the device alone. | |
563 | */ | |
564 | if (td->mode == TICKDEV_MODE_ONESHOT) { | |
565 | clockevents_set_mode(td->evtdev, | |
566 | CLOCK_EVT_MODE_ONESHOT); | |
567 | } | |
fb02fbc1 TG |
568 | } |
569 | } | |
570 | ||
79bf2bb3 TG |
571 | /* |
572 | * Handle oneshot mode broadcasting | |
573 | */ | |
574 | static void tick_handle_oneshot_broadcast(struct clock_event_device *dev) | |
575 | { | |
576 | struct tick_device *td; | |
cdc6f27d | 577 | ktime_t now, next_event; |
d2348fb6 | 578 | int cpu, next_cpu = 0; |
79bf2bb3 | 579 | |
b5f91da0 | 580 | raw_spin_lock(&tick_broadcast_lock); |
79bf2bb3 TG |
581 | again: |
582 | dev->next_event.tv64 = KTIME_MAX; | |
cdc6f27d | 583 | next_event.tv64 = KTIME_MAX; |
b352bc1c | 584 | cpumask_clear(tmpmask); |
79bf2bb3 TG |
585 | now = ktime_get(); |
586 | /* Find all expired events */ | |
b352bc1c | 587 | for_each_cpu(cpu, tick_broadcast_oneshot_mask) { |
79bf2bb3 | 588 | td = &per_cpu(tick_cpu_device, cpu); |
d2348fb6 | 589 | if (td->evtdev->next_event.tv64 <= now.tv64) { |
b352bc1c | 590 | cpumask_set_cpu(cpu, tmpmask); |
26517f3e TG |
591 | /* |
592 | * Mark the remote cpu in the pending mask, so | |
593 | * it can avoid reprogramming the cpu local | |
594 | * timer in tick_broadcast_oneshot_control(). | |
595 | */ | |
596 | cpumask_set_cpu(cpu, tick_broadcast_pending_mask); | |
d2348fb6 | 597 | } else if (td->evtdev->next_event.tv64 < next_event.tv64) { |
cdc6f27d | 598 | next_event.tv64 = td->evtdev->next_event.tv64; |
d2348fb6 DL |
599 | next_cpu = cpu; |
600 | } | |
79bf2bb3 TG |
601 | } |
602 | ||
2938d275 TG |
603 | /* |
604 | * Remove the current cpu from the pending mask. The event is | |
605 | * delivered immediately in tick_do_broadcast() ! | |
606 | */ | |
607 | cpumask_clear_cpu(smp_processor_id(), tick_broadcast_pending_mask); | |
608 | ||
989dcb64 TG |
609 | /* Take care of enforced broadcast requests */ |
610 | cpumask_or(tmpmask, tmpmask, tick_broadcast_force_mask); | |
611 | cpumask_clear(tick_broadcast_force_mask); | |
612 | ||
c9b5a266 TG |
613 | /* |
614 | * Sanity check. Catch the case where we try to broadcast to | |
615 | * offline cpus. | |
616 | */ | |
617 | if (WARN_ON_ONCE(!cpumask_subset(tmpmask, cpu_online_mask))) | |
618 | cpumask_and(tmpmask, tmpmask, cpu_online_mask); | |
619 | ||
79bf2bb3 | 620 | /* |
cdc6f27d TG |
621 | * Wakeup the cpus which have an expired event. |
622 | */ | |
b352bc1c | 623 | tick_do_broadcast(tmpmask); |
cdc6f27d TG |
624 | |
625 | /* | |
626 | * Two reasons for reprogram: | |
627 | * | |
628 | * - The global event did not expire any CPU local | |
629 | * events. This happens in dyntick mode, as the maximum PIT | |
630 | * delta is quite small. | |
631 | * | |
632 | * - There are pending events on sleeping CPUs which were not | |
633 | * in the event mask | |
79bf2bb3 | 634 | */ |
cdc6f27d | 635 | if (next_event.tv64 != KTIME_MAX) { |
79bf2bb3 | 636 | /* |
cdc6f27d TG |
637 | * Rearm the broadcast device. If event expired, |
638 | * repeat the above | |
79bf2bb3 | 639 | */ |
d2348fb6 | 640 | if (tick_broadcast_set_event(dev, next_cpu, next_event, 0)) |
79bf2bb3 TG |
641 | goto again; |
642 | } | |
b5f91da0 | 643 | raw_spin_unlock(&tick_broadcast_lock); |
79bf2bb3 TG |
644 | } |
645 | ||
5d1638ac PM |
646 | static int broadcast_needs_cpu(struct clock_event_device *bc, int cpu) |
647 | { | |
648 | if (!(bc->features & CLOCK_EVT_FEAT_HRTIMER)) | |
649 | return 0; | |
650 | if (bc->next_event.tv64 == KTIME_MAX) | |
651 | return 0; | |
652 | return bc->bound_on == cpu ? -EBUSY : 0; | |
653 | } | |
654 | ||
655 | static void broadcast_shutdown_local(struct clock_event_device *bc, | |
656 | struct clock_event_device *dev) | |
657 | { | |
658 | /* | |
659 | * For hrtimer based broadcasting we cannot shutdown the cpu | |
660 | * local device if our own event is the first one to expire or | |
661 | * if we own the broadcast timer. | |
662 | */ | |
663 | if (bc->features & CLOCK_EVT_FEAT_HRTIMER) { | |
664 | if (broadcast_needs_cpu(bc, smp_processor_id())) | |
665 | return; | |
666 | if (dev->next_event.tv64 < bc->next_event.tv64) | |
667 | return; | |
668 | } | |
669 | clockevents_set_mode(dev, CLOCK_EVT_MODE_SHUTDOWN); | |
670 | } | |
671 | ||
672 | static void broadcast_move_bc(int deadcpu) | |
673 | { | |
674 | struct clock_event_device *bc = tick_broadcast_device.evtdev; | |
675 | ||
676 | if (!bc || !broadcast_needs_cpu(bc, deadcpu)) | |
677 | return; | |
678 | /* This moves the broadcast assignment to this cpu */ | |
679 | clockevents_program_event(bc, bc->next_event, 1); | |
680 | } | |
681 | ||
79bf2bb3 TG |
682 | /* |
683 | * Powerstate information: The system enters/leaves a state, where | |
684 | * affected devices might stop | |
da7e6f45 | 685 | * Returns 0 on success, -EBUSY if the cpu is used to broadcast wakeups. |
79bf2bb3 | 686 | */ |
da7e6f45 | 687 | int tick_broadcast_oneshot_control(unsigned long reason) |
79bf2bb3 TG |
688 | { |
689 | struct clock_event_device *bc, *dev; | |
690 | struct tick_device *td; | |
691 | unsigned long flags; | |
989dcb64 | 692 | ktime_t now; |
da7e6f45 | 693 | int cpu, ret = 0; |
79bf2bb3 | 694 | |
79bf2bb3 TG |
695 | /* |
696 | * Periodic mode does not care about the enter/exit of power | |
697 | * states | |
698 | */ | |
699 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) | |
5d1638ac | 700 | return 0; |
79bf2bb3 | 701 | |
7372b0b1 AK |
702 | /* |
703 | * We are called with preemtion disabled from the depth of the | |
704 | * idle code, so we can't be moved away. | |
705 | */ | |
79bf2bb3 TG |
706 | cpu = smp_processor_id(); |
707 | td = &per_cpu(tick_cpu_device, cpu); | |
708 | dev = td->evtdev; | |
709 | ||
710 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) | |
5d1638ac | 711 | return 0; |
7372b0b1 AK |
712 | |
713 | bc = tick_broadcast_device.evtdev; | |
79bf2bb3 | 714 | |
7372b0b1 | 715 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
79bf2bb3 | 716 | if (reason == CLOCK_EVT_NOTIFY_BROADCAST_ENTER) { |
b352bc1c | 717 | if (!cpumask_test_and_set_cpu(cpu, tick_broadcast_oneshot_mask)) { |
2938d275 | 718 | WARN_ON_ONCE(cpumask_test_cpu(cpu, tick_broadcast_pending_mask)); |
5d1638ac | 719 | broadcast_shutdown_local(bc, dev); |
989dcb64 TG |
720 | /* |
721 | * We only reprogram the broadcast timer if we | |
722 | * did not mark ourself in the force mask and | |
723 | * if the cpu local event is earlier than the | |
724 | * broadcast event. If the current CPU is in | |
725 | * the force mask, then we are going to be | |
726 | * woken by the IPI right away. | |
727 | */ | |
728 | if (!cpumask_test_cpu(cpu, tick_broadcast_force_mask) && | |
729 | dev->next_event.tv64 < bc->next_event.tv64) | |
d2348fb6 | 730 | tick_broadcast_set_event(bc, cpu, dev->next_event, 1); |
79bf2bb3 | 731 | } |
5d1638ac PM |
732 | /* |
733 | * If the current CPU owns the hrtimer broadcast | |
734 | * mechanism, it cannot go deep idle and we remove the | |
735 | * CPU from the broadcast mask. We don't have to go | |
736 | * through the EXIT path as the local timer is not | |
737 | * shutdown. | |
738 | */ | |
739 | ret = broadcast_needs_cpu(bc, cpu); | |
740 | if (ret) | |
741 | cpumask_clear_cpu(cpu, tick_broadcast_oneshot_mask); | |
79bf2bb3 | 742 | } else { |
b352bc1c | 743 | if (cpumask_test_and_clear_cpu(cpu, tick_broadcast_oneshot_mask)) { |
79bf2bb3 | 744 | clockevents_set_mode(dev, CLOCK_EVT_MODE_ONESHOT); |
26517f3e TG |
745 | /* |
746 | * The cpu which was handling the broadcast | |
747 | * timer marked this cpu in the broadcast | |
748 | * pending mask and fired the broadcast | |
749 | * IPI. So we are going to handle the expired | |
750 | * event anyway via the broadcast IPI | |
751 | * handler. No need to reprogram the timer | |
752 | * with an already expired event. | |
753 | */ | |
754 | if (cpumask_test_and_clear_cpu(cpu, | |
755 | tick_broadcast_pending_mask)) | |
756 | goto out; | |
757 | ||
ea8deb8d DL |
758 | /* |
759 | * Bail out if there is no next event. | |
760 | */ | |
761 | if (dev->next_event.tv64 == KTIME_MAX) | |
762 | goto out; | |
989dcb64 TG |
763 | /* |
764 | * If the pending bit is not set, then we are | |
765 | * either the CPU handling the broadcast | |
766 | * interrupt or we got woken by something else. | |
767 | * | |
768 | * We are not longer in the broadcast mask, so | |
769 | * if the cpu local expiry time is already | |
770 | * reached, we would reprogram the cpu local | |
771 | * timer with an already expired event. | |
772 | * | |
773 | * This can lead to a ping-pong when we return | |
774 | * to idle and therefor rearm the broadcast | |
775 | * timer before the cpu local timer was able | |
776 | * to fire. This happens because the forced | |
777 | * reprogramming makes sure that the event | |
778 | * will happen in the future and depending on | |
779 | * the min_delta setting this might be far | |
780 | * enough out that the ping-pong starts. | |
781 | * | |
782 | * If the cpu local next_event has expired | |
783 | * then we know that the broadcast timer | |
784 | * next_event has expired as well and | |
785 | * broadcast is about to be handled. So we | |
786 | * avoid reprogramming and enforce that the | |
787 | * broadcast handler, which did not run yet, | |
788 | * will invoke the cpu local handler. | |
789 | * | |
790 | * We cannot call the handler directly from | |
791 | * here, because we might be in a NOHZ phase | |
792 | * and we did not go through the irq_enter() | |
793 | * nohz fixups. | |
794 | */ | |
795 | now = ktime_get(); | |
796 | if (dev->next_event.tv64 <= now.tv64) { | |
797 | cpumask_set_cpu(cpu, tick_broadcast_force_mask); | |
798 | goto out; | |
799 | } | |
800 | /* | |
801 | * We got woken by something else. Reprogram | |
802 | * the cpu local timer device. | |
803 | */ | |
26517f3e | 804 | tick_program_event(dev->next_event, 1); |
79bf2bb3 TG |
805 | } |
806 | } | |
26517f3e | 807 | out: |
b5f91da0 | 808 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
da7e6f45 | 809 | return ret; |
79bf2bb3 TG |
810 | } |
811 | ||
5590a536 TG |
812 | /* |
813 | * Reset the one shot broadcast for a cpu | |
814 | * | |
815 | * Called with tick_broadcast_lock held | |
816 | */ | |
817 | static void tick_broadcast_clear_oneshot(int cpu) | |
818 | { | |
b352bc1c | 819 | cpumask_clear_cpu(cpu, tick_broadcast_oneshot_mask); |
dd5fd9b9 | 820 | cpumask_clear_cpu(cpu, tick_broadcast_pending_mask); |
5590a536 TG |
821 | } |
822 | ||
6b954823 RR |
823 | static void tick_broadcast_init_next_event(struct cpumask *mask, |
824 | ktime_t expires) | |
7300711e TG |
825 | { |
826 | struct tick_device *td; | |
827 | int cpu; | |
828 | ||
5db0e1e9 | 829 | for_each_cpu(cpu, mask) { |
7300711e TG |
830 | td = &per_cpu(tick_cpu_device, cpu); |
831 | if (td->evtdev) | |
832 | td->evtdev->next_event = expires; | |
833 | } | |
834 | } | |
835 | ||
79bf2bb3 | 836 | /** |
8dce39c2 | 837 | * tick_broadcast_setup_oneshot - setup the broadcast device |
79bf2bb3 TG |
838 | */ |
839 | void tick_broadcast_setup_oneshot(struct clock_event_device *bc) | |
840 | { | |
07f4beb0 TG |
841 | int cpu = smp_processor_id(); |
842 | ||
9c17bcda TG |
843 | /* Set it up only once ! */ |
844 | if (bc->event_handler != tick_handle_oneshot_broadcast) { | |
7300711e | 845 | int was_periodic = bc->mode == CLOCK_EVT_MODE_PERIODIC; |
7300711e | 846 | |
9c17bcda | 847 | bc->event_handler = tick_handle_oneshot_broadcast; |
7300711e | 848 | |
7300711e TG |
849 | /* |
850 | * We must be careful here. There might be other CPUs | |
851 | * waiting for periodic broadcast. We need to set the | |
852 | * oneshot_mask bits for those and program the | |
853 | * broadcast device to fire. | |
854 | */ | |
b352bc1c TG |
855 | cpumask_copy(tmpmask, tick_broadcast_mask); |
856 | cpumask_clear_cpu(cpu, tmpmask); | |
857 | cpumask_or(tick_broadcast_oneshot_mask, | |
858 | tick_broadcast_oneshot_mask, tmpmask); | |
6b954823 | 859 | |
b352bc1c | 860 | if (was_periodic && !cpumask_empty(tmpmask)) { |
b435092f | 861 | clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT); |
b352bc1c | 862 | tick_broadcast_init_next_event(tmpmask, |
6b954823 | 863 | tick_next_period); |
d2348fb6 | 864 | tick_broadcast_set_event(bc, cpu, tick_next_period, 1); |
7300711e TG |
865 | } else |
866 | bc->next_event.tv64 = KTIME_MAX; | |
07f4beb0 TG |
867 | } else { |
868 | /* | |
869 | * The first cpu which switches to oneshot mode sets | |
870 | * the bit for all other cpus which are in the general | |
871 | * (periodic) broadcast mask. So the bit is set and | |
872 | * would prevent the first broadcast enter after this | |
873 | * to program the bc device. | |
874 | */ | |
875 | tick_broadcast_clear_oneshot(cpu); | |
9c17bcda | 876 | } |
79bf2bb3 TG |
877 | } |
878 | ||
879 | /* | |
880 | * Select oneshot operating mode for the broadcast device | |
881 | */ | |
882 | void tick_broadcast_switch_to_oneshot(void) | |
883 | { | |
884 | struct clock_event_device *bc; | |
885 | unsigned long flags; | |
886 | ||
b5f91da0 | 887 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
fa4da365 SS |
888 | |
889 | tick_broadcast_device.mode = TICKDEV_MODE_ONESHOT; | |
79bf2bb3 TG |
890 | bc = tick_broadcast_device.evtdev; |
891 | if (bc) | |
892 | tick_broadcast_setup_oneshot(bc); | |
77b0d60c | 893 | |
b5f91da0 | 894 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
79bf2bb3 TG |
895 | } |
896 | ||
897 | ||
898 | /* | |
899 | * Remove a dead CPU from broadcasting | |
900 | */ | |
901 | void tick_shutdown_broadcast_oneshot(unsigned int *cpup) | |
902 | { | |
79bf2bb3 TG |
903 | unsigned long flags; |
904 | unsigned int cpu = *cpup; | |
905 | ||
b5f91da0 | 906 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
79bf2bb3 | 907 | |
31d9b393 | 908 | /* |
c9b5a266 TG |
909 | * Clear the broadcast masks for the dead cpu, but do not stop |
910 | * the broadcast device! | |
31d9b393 | 911 | */ |
b352bc1c | 912 | cpumask_clear_cpu(cpu, tick_broadcast_oneshot_mask); |
c9b5a266 TG |
913 | cpumask_clear_cpu(cpu, tick_broadcast_pending_mask); |
914 | cpumask_clear_cpu(cpu, tick_broadcast_force_mask); | |
79bf2bb3 | 915 | |
5d1638ac PM |
916 | broadcast_move_bc(cpu); |
917 | ||
b5f91da0 | 918 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
79bf2bb3 TG |
919 | } |
920 | ||
27ce4cb4 TG |
921 | /* |
922 | * Check, whether the broadcast device is in one shot mode | |
923 | */ | |
924 | int tick_broadcast_oneshot_active(void) | |
925 | { | |
926 | return tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT; | |
927 | } | |
928 | ||
3a142a06 TG |
929 | /* |
930 | * Check whether the broadcast device supports oneshot. | |
931 | */ | |
932 | bool tick_broadcast_oneshot_available(void) | |
933 | { | |
934 | struct clock_event_device *bc = tick_broadcast_device.evtdev; | |
935 | ||
936 | return bc ? bc->features & CLOCK_EVT_FEAT_ONESHOT : false; | |
937 | } | |
938 | ||
79bf2bb3 | 939 | #endif |
b352bc1c TG |
940 | |
941 | void __init tick_broadcast_init(void) | |
942 | { | |
fbd44a60 | 943 | zalloc_cpumask_var(&tick_broadcast_mask, GFP_NOWAIT); |
07bd1172 | 944 | zalloc_cpumask_var(&tick_broadcast_on, GFP_NOWAIT); |
fbd44a60 | 945 | zalloc_cpumask_var(&tmpmask, GFP_NOWAIT); |
b352bc1c | 946 | #ifdef CONFIG_TICK_ONESHOT |
fbd44a60 TG |
947 | zalloc_cpumask_var(&tick_broadcast_oneshot_mask, GFP_NOWAIT); |
948 | zalloc_cpumask_var(&tick_broadcast_pending_mask, GFP_NOWAIT); | |
949 | zalloc_cpumask_var(&tick_broadcast_force_mask, GFP_NOWAIT); | |
b352bc1c TG |
950 | #endif |
951 | } |