Commit | Line | Data |
---|---|---|
f8381cba TG |
1 | /* |
2 | * linux/kernel/time/tick-broadcast.c | |
3 | * | |
4 | * This file contains functions which emulate a local clock-event | |
5 | * device via a broadcast event source. | |
6 | * | |
7 | * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de> | |
8 | * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar | |
9 | * Copyright(C) 2006-2007, Timesys Corp., Thomas Gleixner | |
10 | * | |
11 | * This code is licenced under the GPL version 2. For details see | |
12 | * kernel-base/COPYING. | |
13 | */ | |
14 | #include <linux/cpu.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/hrtimer.h> | |
d7b90689 | 17 | #include <linux/interrupt.h> |
f8381cba TG |
18 | #include <linux/percpu.h> |
19 | #include <linux/profile.h> | |
20 | #include <linux/sched.h> | |
12ad1000 | 21 | #include <linux/smp.h> |
ccf33d68 | 22 | #include <linux/module.h> |
f8381cba TG |
23 | |
24 | #include "tick-internal.h" | |
25 | ||
26 | /* | |
27 | * Broadcast support for broken x86 hardware, where the local apic | |
28 | * timer stops in C3 state. | |
29 | */ | |
30 | ||
a52f5c56 | 31 | static struct tick_device tick_broadcast_device; |
b352bc1c | 32 | static cpumask_var_t tick_broadcast_mask; |
07bd1172 | 33 | static cpumask_var_t tick_broadcast_on; |
b352bc1c | 34 | static cpumask_var_t tmpmask; |
b5f91da0 | 35 | static DEFINE_RAW_SPINLOCK(tick_broadcast_lock); |
aa276e1c | 36 | static int tick_broadcast_force; |
f8381cba | 37 | |
5590a536 TG |
38 | #ifdef CONFIG_TICK_ONESHOT |
39 | static void tick_broadcast_clear_oneshot(int cpu); | |
080873ce | 40 | static void tick_resume_broadcast_oneshot(struct clock_event_device *bc); |
5590a536 TG |
41 | #else |
42 | static inline void tick_broadcast_clear_oneshot(int cpu) { } | |
080873ce | 43 | static inline void tick_resume_broadcast_oneshot(struct clock_event_device *bc) { } |
5590a536 TG |
44 | #endif |
45 | ||
289f480a IM |
46 | /* |
47 | * Debugging: see timer_list.c | |
48 | */ | |
49 | struct tick_device *tick_get_broadcast_device(void) | |
50 | { | |
51 | return &tick_broadcast_device; | |
52 | } | |
53 | ||
6b954823 | 54 | struct cpumask *tick_get_broadcast_mask(void) |
289f480a | 55 | { |
b352bc1c | 56 | return tick_broadcast_mask; |
289f480a IM |
57 | } |
58 | ||
f8381cba TG |
59 | /* |
60 | * Start the device in periodic mode | |
61 | */ | |
62 | static void tick_broadcast_start_periodic(struct clock_event_device *bc) | |
63 | { | |
18de5bc4 | 64 | if (bc) |
f8381cba TG |
65 | tick_setup_periodic(bc, 1); |
66 | } | |
67 | ||
68 | /* | |
69 | * Check, if the device can be utilized as broadcast device: | |
70 | */ | |
45cb8e01 TG |
71 | static bool tick_check_broadcast_device(struct clock_event_device *curdev, |
72 | struct clock_event_device *newdev) | |
73 | { | |
74 | if ((newdev->features & CLOCK_EVT_FEAT_DUMMY) || | |
245a3496 | 75 | (newdev->features & CLOCK_EVT_FEAT_PERCPU) || |
45cb8e01 TG |
76 | (newdev->features & CLOCK_EVT_FEAT_C3STOP)) |
77 | return false; | |
78 | ||
79 | if (tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT && | |
80 | !(newdev->features & CLOCK_EVT_FEAT_ONESHOT)) | |
81 | return false; | |
82 | ||
83 | return !curdev || newdev->rating > curdev->rating; | |
84 | } | |
85 | ||
86 | /* | |
87 | * Conditionally install/replace broadcast device | |
88 | */ | |
7172a286 | 89 | void tick_install_broadcast_device(struct clock_event_device *dev) |
f8381cba | 90 | { |
6f7a05d7 TG |
91 | struct clock_event_device *cur = tick_broadcast_device.evtdev; |
92 | ||
45cb8e01 | 93 | if (!tick_check_broadcast_device(cur, dev)) |
7172a286 | 94 | return; |
45cb8e01 | 95 | |
ccf33d68 TG |
96 | if (!try_module_get(dev->owner)) |
97 | return; | |
f8381cba | 98 | |
45cb8e01 | 99 | clockevents_exchange_device(cur, dev); |
6f7a05d7 TG |
100 | if (cur) |
101 | cur->event_handler = clockevents_handle_noop; | |
f8381cba | 102 | tick_broadcast_device.evtdev = dev; |
b352bc1c | 103 | if (!cpumask_empty(tick_broadcast_mask)) |
f8381cba | 104 | tick_broadcast_start_periodic(dev); |
c038c1c4 SB |
105 | /* |
106 | * Inform all cpus about this. We might be in a situation | |
107 | * where we did not switch to oneshot mode because the per cpu | |
108 | * devices are affected by CLOCK_EVT_FEAT_C3STOP and the lack | |
109 | * of a oneshot capable broadcast device. Without that | |
110 | * notification the systems stays stuck in periodic mode | |
111 | * forever. | |
112 | */ | |
113 | if (dev->features & CLOCK_EVT_FEAT_ONESHOT) | |
114 | tick_clock_notify(); | |
f8381cba TG |
115 | } |
116 | ||
117 | /* | |
118 | * Check, if the device is the broadcast device | |
119 | */ | |
120 | int tick_is_broadcast_device(struct clock_event_device *dev) | |
121 | { | |
122 | return (dev && tick_broadcast_device.evtdev == dev); | |
123 | } | |
124 | ||
627ee794 TG |
125 | int tick_broadcast_update_freq(struct clock_event_device *dev, u32 freq) |
126 | { | |
127 | int ret = -ENODEV; | |
128 | ||
129 | if (tick_is_broadcast_device(dev)) { | |
130 | raw_spin_lock(&tick_broadcast_lock); | |
131 | ret = __clockevents_update_freq(dev, freq); | |
132 | raw_spin_unlock(&tick_broadcast_lock); | |
133 | } | |
134 | return ret; | |
135 | } | |
136 | ||
137 | ||
12ad1000 MR |
138 | static void err_broadcast(const struct cpumask *mask) |
139 | { | |
140 | pr_crit_once("Failed to broadcast timer tick. Some CPUs may be unresponsive.\n"); | |
141 | } | |
142 | ||
5d1d9a29 MR |
143 | static void tick_device_setup_broadcast_func(struct clock_event_device *dev) |
144 | { | |
145 | if (!dev->broadcast) | |
146 | dev->broadcast = tick_broadcast; | |
147 | if (!dev->broadcast) { | |
148 | pr_warn_once("%s depends on broadcast, but no broadcast function available\n", | |
149 | dev->name); | |
150 | dev->broadcast = err_broadcast; | |
151 | } | |
152 | } | |
153 | ||
f8381cba TG |
154 | /* |
155 | * Check, if the device is disfunctional and a place holder, which | |
156 | * needs to be handled by the broadcast device. | |
157 | */ | |
158 | int tick_device_uses_broadcast(struct clock_event_device *dev, int cpu) | |
159 | { | |
07bd1172 | 160 | struct clock_event_device *bc = tick_broadcast_device.evtdev; |
f8381cba | 161 | unsigned long flags; |
07bd1172 | 162 | int ret; |
f8381cba | 163 | |
b5f91da0 | 164 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
f8381cba TG |
165 | |
166 | /* | |
167 | * Devices might be registered with both periodic and oneshot | |
168 | * mode disabled. This signals, that the device needs to be | |
169 | * operated from the broadcast device and is a placeholder for | |
170 | * the cpu local device. | |
171 | */ | |
172 | if (!tick_device_is_functional(dev)) { | |
173 | dev->event_handler = tick_handle_periodic; | |
5d1d9a29 | 174 | tick_device_setup_broadcast_func(dev); |
b352bc1c | 175 | cpumask_set_cpu(cpu, tick_broadcast_mask); |
a272dcca SB |
176 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) |
177 | tick_broadcast_start_periodic(bc); | |
178 | else | |
179 | tick_broadcast_setup_oneshot(bc); | |
f8381cba | 180 | ret = 1; |
5590a536 TG |
181 | } else { |
182 | /* | |
07bd1172 TG |
183 | * Clear the broadcast bit for this cpu if the |
184 | * device is not power state affected. | |
5590a536 | 185 | */ |
07bd1172 | 186 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) |
b352bc1c | 187 | cpumask_clear_cpu(cpu, tick_broadcast_mask); |
07bd1172 | 188 | else |
5d1d9a29 | 189 | tick_device_setup_broadcast_func(dev); |
07bd1172 TG |
190 | |
191 | /* | |
192 | * Clear the broadcast bit if the CPU is not in | |
193 | * periodic broadcast on state. | |
194 | */ | |
195 | if (!cpumask_test_cpu(cpu, tick_broadcast_on)) | |
196 | cpumask_clear_cpu(cpu, tick_broadcast_mask); | |
197 | ||
198 | switch (tick_broadcast_device.mode) { | |
199 | case TICKDEV_MODE_ONESHOT: | |
200 | /* | |
201 | * If the system is in oneshot mode we can | |
202 | * unconditionally clear the oneshot mask bit, | |
203 | * because the CPU is running and therefore | |
204 | * not in an idle state which causes the power | |
205 | * state affected device to stop. Let the | |
206 | * caller initialize the device. | |
207 | */ | |
208 | tick_broadcast_clear_oneshot(cpu); | |
209 | ret = 0; | |
210 | break; | |
211 | ||
212 | case TICKDEV_MODE_PERIODIC: | |
213 | /* | |
214 | * If the system is in periodic mode, check | |
215 | * whether the broadcast device can be | |
216 | * switched off now. | |
217 | */ | |
218 | if (cpumask_empty(tick_broadcast_mask) && bc) | |
219 | clockevents_shutdown(bc); | |
220 | /* | |
221 | * If we kept the cpu in the broadcast mask, | |
222 | * tell the caller to leave the per cpu device | |
223 | * in shutdown state. The periodic interrupt | |
224 | * is delivered by the broadcast device. | |
225 | */ | |
226 | ret = cpumask_test_cpu(cpu, tick_broadcast_mask); | |
227 | break; | |
228 | default: | |
229 | /* Nothing to do */ | |
230 | ret = 0; | |
231 | break; | |
5590a536 TG |
232 | } |
233 | } | |
b5f91da0 | 234 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
f8381cba TG |
235 | return ret; |
236 | } | |
237 | ||
12572dbb MR |
238 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
239 | int tick_receive_broadcast(void) | |
240 | { | |
241 | struct tick_device *td = this_cpu_ptr(&tick_cpu_device); | |
242 | struct clock_event_device *evt = td->evtdev; | |
243 | ||
244 | if (!evt) | |
245 | return -ENODEV; | |
246 | ||
247 | if (!evt->event_handler) | |
248 | return -EINVAL; | |
249 | ||
250 | evt->event_handler(evt); | |
251 | return 0; | |
252 | } | |
253 | #endif | |
254 | ||
f8381cba | 255 | /* |
6b954823 | 256 | * Broadcast the event to the cpus, which are set in the mask (mangled). |
f8381cba | 257 | */ |
6b954823 | 258 | static void tick_do_broadcast(struct cpumask *mask) |
f8381cba | 259 | { |
186e3cb8 | 260 | int cpu = smp_processor_id(); |
f8381cba TG |
261 | struct tick_device *td; |
262 | ||
263 | /* | |
264 | * Check, if the current cpu is in the mask | |
265 | */ | |
6b954823 RR |
266 | if (cpumask_test_cpu(cpu, mask)) { |
267 | cpumask_clear_cpu(cpu, mask); | |
f8381cba TG |
268 | td = &per_cpu(tick_cpu_device, cpu); |
269 | td->evtdev->event_handler(td->evtdev); | |
f8381cba TG |
270 | } |
271 | ||
6b954823 | 272 | if (!cpumask_empty(mask)) { |
f8381cba TG |
273 | /* |
274 | * It might be necessary to actually check whether the devices | |
275 | * have different broadcast functions. For now, just use the | |
276 | * one of the first device. This works as long as we have this | |
277 | * misfeature only on x86 (lapic) | |
278 | */ | |
6b954823 RR |
279 | td = &per_cpu(tick_cpu_device, cpumask_first(mask)); |
280 | td->evtdev->broadcast(mask); | |
f8381cba | 281 | } |
f8381cba TG |
282 | } |
283 | ||
284 | /* | |
285 | * Periodic broadcast: | |
286 | * - invoke the broadcast handlers | |
287 | */ | |
288 | static void tick_do_periodic_broadcast(void) | |
289 | { | |
b352bc1c TG |
290 | cpumask_and(tmpmask, cpu_online_mask, tick_broadcast_mask); |
291 | tick_do_broadcast(tmpmask); | |
f8381cba TG |
292 | } |
293 | ||
294 | /* | |
295 | * Event handler for periodic broadcast ticks | |
296 | */ | |
297 | static void tick_handle_periodic_broadcast(struct clock_event_device *dev) | |
298 | { | |
d4496b39 TG |
299 | ktime_t next; |
300 | ||
627ee794 TG |
301 | raw_spin_lock(&tick_broadcast_lock); |
302 | ||
f8381cba TG |
303 | tick_do_periodic_broadcast(); |
304 | ||
305 | /* | |
306 | * The device is in periodic mode. No reprogramming necessary: | |
307 | */ | |
77e32c89 | 308 | if (dev->state == CLOCK_EVT_STATE_PERIODIC) |
627ee794 | 309 | goto unlock; |
f8381cba TG |
310 | |
311 | /* | |
312 | * Setup the next period for devices, which do not have | |
d4496b39 | 313 | * periodic mode. We read dev->next_event first and add to it |
698f9315 | 314 | * when the event already expired. clockevents_program_event() |
d4496b39 TG |
315 | * sets dev->next_event only when the event is really |
316 | * programmed to the device. | |
f8381cba | 317 | */ |
d4496b39 TG |
318 | for (next = dev->next_event; ;) { |
319 | next = ktime_add(next, tick_period); | |
f8381cba | 320 | |
d1748302 | 321 | if (!clockevents_program_event(dev, next, false)) |
627ee794 | 322 | goto unlock; |
f8381cba TG |
323 | tick_do_periodic_broadcast(); |
324 | } | |
627ee794 TG |
325 | unlock: |
326 | raw_spin_unlock(&tick_broadcast_lock); | |
f8381cba TG |
327 | } |
328 | ||
329 | /* | |
330 | * Powerstate information: The system enters/leaves a state, where | |
331 | * affected devices might stop | |
332 | */ | |
f833bab8 | 333 | static void tick_do_broadcast_on_off(unsigned long *reason) |
f8381cba TG |
334 | { |
335 | struct clock_event_device *bc, *dev; | |
336 | struct tick_device *td; | |
f833bab8 | 337 | unsigned long flags; |
9c17bcda | 338 | int cpu, bc_stopped; |
f8381cba | 339 | |
b5f91da0 | 340 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
f8381cba TG |
341 | |
342 | cpu = smp_processor_id(); | |
343 | td = &per_cpu(tick_cpu_device, cpu); | |
344 | dev = td->evtdev; | |
345 | bc = tick_broadcast_device.evtdev; | |
346 | ||
347 | /* | |
1595f452 | 348 | * Is the device not affected by the powerstate ? |
f8381cba | 349 | */ |
1595f452 | 350 | if (!dev || !(dev->features & CLOCK_EVT_FEAT_C3STOP)) |
f8381cba TG |
351 | goto out; |
352 | ||
3dfbc884 TG |
353 | if (!tick_device_is_functional(dev)) |
354 | goto out; | |
1595f452 | 355 | |
b352bc1c | 356 | bc_stopped = cpumask_empty(tick_broadcast_mask); |
9c17bcda | 357 | |
1595f452 TG |
358 | switch (*reason) { |
359 | case CLOCK_EVT_NOTIFY_BROADCAST_ON: | |
360 | case CLOCK_EVT_NOTIFY_BROADCAST_FORCE: | |
07bd1172 | 361 | cpumask_set_cpu(cpu, tick_broadcast_on); |
b352bc1c | 362 | if (!cpumask_test_and_set_cpu(cpu, tick_broadcast_mask)) { |
07454bff TG |
363 | if (tick_broadcast_device.mode == |
364 | TICKDEV_MODE_PERIODIC) | |
2344abbc | 365 | clockevents_shutdown(dev); |
f8381cba | 366 | } |
3dfbc884 | 367 | if (*reason == CLOCK_EVT_NOTIFY_BROADCAST_FORCE) |
aa276e1c | 368 | tick_broadcast_force = 1; |
1595f452 TG |
369 | break; |
370 | case CLOCK_EVT_NOTIFY_BROADCAST_OFF: | |
07bd1172 TG |
371 | if (tick_broadcast_force) |
372 | break; | |
373 | cpumask_clear_cpu(cpu, tick_broadcast_on); | |
374 | if (!tick_device_is_functional(dev)) | |
375 | break; | |
376 | if (cpumask_test_and_clear_cpu(cpu, tick_broadcast_mask)) { | |
07454bff TG |
377 | if (tick_broadcast_device.mode == |
378 | TICKDEV_MODE_PERIODIC) | |
f8381cba TG |
379 | tick_setup_periodic(dev, 0); |
380 | } | |
1595f452 | 381 | break; |
f8381cba TG |
382 | } |
383 | ||
b352bc1c | 384 | if (cpumask_empty(tick_broadcast_mask)) { |
9c17bcda | 385 | if (!bc_stopped) |
2344abbc | 386 | clockevents_shutdown(bc); |
9c17bcda | 387 | } else if (bc_stopped) { |
f8381cba TG |
388 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) |
389 | tick_broadcast_start_periodic(bc); | |
79bf2bb3 TG |
390 | else |
391 | tick_broadcast_setup_oneshot(bc); | |
f8381cba TG |
392 | } |
393 | out: | |
b5f91da0 | 394 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
f8381cba TG |
395 | } |
396 | ||
397 | /* | |
398 | * Powerstate information: The system enters/leaves a state, where | |
399 | * affected devices might stop. | |
400 | */ | |
401 | void tick_broadcast_on_off(unsigned long reason, int *oncpu) | |
402 | { | |
6b954823 | 403 | if (!cpumask_test_cpu(*oncpu, cpu_online_mask)) |
833df317 | 404 | printk(KERN_ERR "tick-broadcast: ignoring broadcast for " |
72fcde96 | 405 | "offline CPU #%d\n", *oncpu); |
bf020cb7 | 406 | else |
f833bab8 | 407 | tick_do_broadcast_on_off(&reason); |
f8381cba TG |
408 | } |
409 | ||
410 | /* | |
411 | * Set the periodic handler depending on broadcast on/off | |
412 | */ | |
413 | void tick_set_periodic_handler(struct clock_event_device *dev, int broadcast) | |
414 | { | |
415 | if (!broadcast) | |
416 | dev->event_handler = tick_handle_periodic; | |
417 | else | |
418 | dev->event_handler = tick_handle_periodic_broadcast; | |
419 | } | |
420 | ||
421 | /* | |
422 | * Remove a CPU from broadcasting | |
423 | */ | |
424 | void tick_shutdown_broadcast(unsigned int *cpup) | |
425 | { | |
426 | struct clock_event_device *bc; | |
427 | unsigned long flags; | |
428 | unsigned int cpu = *cpup; | |
429 | ||
b5f91da0 | 430 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
f8381cba TG |
431 | |
432 | bc = tick_broadcast_device.evtdev; | |
b352bc1c | 433 | cpumask_clear_cpu(cpu, tick_broadcast_mask); |
07bd1172 | 434 | cpumask_clear_cpu(cpu, tick_broadcast_on); |
f8381cba TG |
435 | |
436 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) { | |
b352bc1c | 437 | if (bc && cpumask_empty(tick_broadcast_mask)) |
2344abbc | 438 | clockevents_shutdown(bc); |
f8381cba TG |
439 | } |
440 | ||
b5f91da0 | 441 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
f8381cba | 442 | } |
79bf2bb3 | 443 | |
6321dd60 TG |
444 | void tick_suspend_broadcast(void) |
445 | { | |
446 | struct clock_event_device *bc; | |
447 | unsigned long flags; | |
448 | ||
b5f91da0 | 449 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
6321dd60 TG |
450 | |
451 | bc = tick_broadcast_device.evtdev; | |
18de5bc4 | 452 | if (bc) |
2344abbc | 453 | clockevents_shutdown(bc); |
6321dd60 | 454 | |
b5f91da0 | 455 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
6321dd60 TG |
456 | } |
457 | ||
f46481d0 TG |
458 | /* |
459 | * This is called from tick_resume_local() on a resuming CPU. That's | |
460 | * called from the core resume function, tick_unfreeze() and the magic XEN | |
461 | * resume hackery. | |
462 | * | |
463 | * In none of these cases the broadcast device mode can change and the | |
464 | * bit of the resuming CPU in the broadcast mask is safe as well. | |
465 | */ | |
466 | bool tick_resume_check_broadcast(void) | |
467 | { | |
468 | if (tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT) | |
469 | return false; | |
470 | else | |
471 | return cpumask_test_cpu(smp_processor_id(), tick_broadcast_mask); | |
472 | } | |
473 | ||
474 | void tick_resume_broadcast(void) | |
6321dd60 TG |
475 | { |
476 | struct clock_event_device *bc; | |
477 | unsigned long flags; | |
6321dd60 | 478 | |
b5f91da0 | 479 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
6321dd60 TG |
480 | |
481 | bc = tick_broadcast_device.evtdev; | |
6321dd60 | 482 | |
cd05a1f8 | 483 | if (bc) { |
554ef387 | 484 | clockevents_tick_resume(bc); |
18de5bc4 | 485 | |
cd05a1f8 TG |
486 | switch (tick_broadcast_device.mode) { |
487 | case TICKDEV_MODE_PERIODIC: | |
b352bc1c | 488 | if (!cpumask_empty(tick_broadcast_mask)) |
cd05a1f8 | 489 | tick_broadcast_start_periodic(bc); |
cd05a1f8 TG |
490 | break; |
491 | case TICKDEV_MODE_ONESHOT: | |
b352bc1c | 492 | if (!cpumask_empty(tick_broadcast_mask)) |
080873ce | 493 | tick_resume_broadcast_oneshot(bc); |
cd05a1f8 TG |
494 | break; |
495 | } | |
6321dd60 | 496 | } |
b5f91da0 | 497 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
6321dd60 TG |
498 | } |
499 | ||
79bf2bb3 TG |
500 | #ifdef CONFIG_TICK_ONESHOT |
501 | ||
b352bc1c | 502 | static cpumask_var_t tick_broadcast_oneshot_mask; |
26517f3e | 503 | static cpumask_var_t tick_broadcast_pending_mask; |
989dcb64 | 504 | static cpumask_var_t tick_broadcast_force_mask; |
79bf2bb3 | 505 | |
289f480a | 506 | /* |
6b954823 | 507 | * Exposed for debugging: see timer_list.c |
289f480a | 508 | */ |
6b954823 | 509 | struct cpumask *tick_get_broadcast_oneshot_mask(void) |
289f480a | 510 | { |
b352bc1c | 511 | return tick_broadcast_oneshot_mask; |
289f480a IM |
512 | } |
513 | ||
eaa907c5 TG |
514 | /* |
515 | * Called before going idle with interrupts disabled. Checks whether a | |
516 | * broadcast event from the other core is about to happen. We detected | |
517 | * that in tick_broadcast_oneshot_control(). The callsite can use this | |
518 | * to avoid a deep idle transition as we are about to get the | |
519 | * broadcast IPI right away. | |
520 | */ | |
521 | int tick_check_broadcast_expired(void) | |
522 | { | |
523 | return cpumask_test_cpu(smp_processor_id(), tick_broadcast_force_mask); | |
524 | } | |
525 | ||
d2348fb6 DL |
526 | /* |
527 | * Set broadcast interrupt affinity | |
528 | */ | |
529 | static void tick_broadcast_set_affinity(struct clock_event_device *bc, | |
530 | const struct cpumask *cpumask) | |
531 | { | |
532 | if (!(bc->features & CLOCK_EVT_FEAT_DYNIRQ)) | |
533 | return; | |
534 | ||
535 | if (cpumask_equal(bc->cpumask, cpumask)) | |
536 | return; | |
537 | ||
538 | bc->cpumask = cpumask; | |
539 | irq_set_affinity(bc->irq, bc->cpumask); | |
540 | } | |
541 | ||
542 | static int tick_broadcast_set_event(struct clock_event_device *bc, int cpu, | |
f9ae39d0 | 543 | ktime_t expires, int force) |
79bf2bb3 | 544 | { |
d2348fb6 DL |
545 | int ret; |
546 | ||
77e32c89 VK |
547 | if (bc->state != CLOCK_EVT_STATE_ONESHOT) |
548 | clockevents_set_state(bc, CLOCK_EVT_STATE_ONESHOT); | |
b9a6a235 | 549 | |
d2348fb6 DL |
550 | ret = clockevents_program_event(bc, expires, force); |
551 | if (!ret) | |
552 | tick_broadcast_set_affinity(bc, cpumask_of(cpu)); | |
553 | return ret; | |
79bf2bb3 TG |
554 | } |
555 | ||
080873ce | 556 | static void tick_resume_broadcast_oneshot(struct clock_event_device *bc) |
cd05a1f8 | 557 | { |
77e32c89 | 558 | clockevents_set_state(bc, CLOCK_EVT_STATE_ONESHOT); |
cd05a1f8 TG |
559 | } |
560 | ||
fb02fbc1 TG |
561 | /* |
562 | * Called from irq_enter() when idle was interrupted to reenable the | |
563 | * per cpu device. | |
564 | */ | |
e8fcaa5c | 565 | void tick_check_oneshot_broadcast_this_cpu(void) |
fb02fbc1 | 566 | { |
e8fcaa5c | 567 | if (cpumask_test_cpu(smp_processor_id(), tick_broadcast_oneshot_mask)) { |
22127e93 | 568 | struct tick_device *td = this_cpu_ptr(&tick_cpu_device); |
fb02fbc1 | 569 | |
1f73a980 TG |
570 | /* |
571 | * We might be in the middle of switching over from | |
572 | * periodic to oneshot. If the CPU has not yet | |
573 | * switched over, leave the device alone. | |
574 | */ | |
575 | if (td->mode == TICKDEV_MODE_ONESHOT) { | |
77e32c89 VK |
576 | clockevents_set_state(td->evtdev, |
577 | CLOCK_EVT_STATE_ONESHOT); | |
1f73a980 | 578 | } |
fb02fbc1 TG |
579 | } |
580 | } | |
581 | ||
79bf2bb3 TG |
582 | /* |
583 | * Handle oneshot mode broadcasting | |
584 | */ | |
585 | static void tick_handle_oneshot_broadcast(struct clock_event_device *dev) | |
586 | { | |
587 | struct tick_device *td; | |
cdc6f27d | 588 | ktime_t now, next_event; |
d2348fb6 | 589 | int cpu, next_cpu = 0; |
79bf2bb3 | 590 | |
b5f91da0 | 591 | raw_spin_lock(&tick_broadcast_lock); |
79bf2bb3 TG |
592 | again: |
593 | dev->next_event.tv64 = KTIME_MAX; | |
cdc6f27d | 594 | next_event.tv64 = KTIME_MAX; |
b352bc1c | 595 | cpumask_clear(tmpmask); |
79bf2bb3 TG |
596 | now = ktime_get(); |
597 | /* Find all expired events */ | |
b352bc1c | 598 | for_each_cpu(cpu, tick_broadcast_oneshot_mask) { |
79bf2bb3 | 599 | td = &per_cpu(tick_cpu_device, cpu); |
d2348fb6 | 600 | if (td->evtdev->next_event.tv64 <= now.tv64) { |
b352bc1c | 601 | cpumask_set_cpu(cpu, tmpmask); |
26517f3e TG |
602 | /* |
603 | * Mark the remote cpu in the pending mask, so | |
604 | * it can avoid reprogramming the cpu local | |
605 | * timer in tick_broadcast_oneshot_control(). | |
606 | */ | |
607 | cpumask_set_cpu(cpu, tick_broadcast_pending_mask); | |
d2348fb6 | 608 | } else if (td->evtdev->next_event.tv64 < next_event.tv64) { |
cdc6f27d | 609 | next_event.tv64 = td->evtdev->next_event.tv64; |
d2348fb6 DL |
610 | next_cpu = cpu; |
611 | } | |
79bf2bb3 TG |
612 | } |
613 | ||
2938d275 TG |
614 | /* |
615 | * Remove the current cpu from the pending mask. The event is | |
616 | * delivered immediately in tick_do_broadcast() ! | |
617 | */ | |
618 | cpumask_clear_cpu(smp_processor_id(), tick_broadcast_pending_mask); | |
619 | ||
989dcb64 TG |
620 | /* Take care of enforced broadcast requests */ |
621 | cpumask_or(tmpmask, tmpmask, tick_broadcast_force_mask); | |
622 | cpumask_clear(tick_broadcast_force_mask); | |
623 | ||
c9b5a266 TG |
624 | /* |
625 | * Sanity check. Catch the case where we try to broadcast to | |
626 | * offline cpus. | |
627 | */ | |
628 | if (WARN_ON_ONCE(!cpumask_subset(tmpmask, cpu_online_mask))) | |
629 | cpumask_and(tmpmask, tmpmask, cpu_online_mask); | |
630 | ||
79bf2bb3 | 631 | /* |
cdc6f27d TG |
632 | * Wakeup the cpus which have an expired event. |
633 | */ | |
b352bc1c | 634 | tick_do_broadcast(tmpmask); |
cdc6f27d TG |
635 | |
636 | /* | |
637 | * Two reasons for reprogram: | |
638 | * | |
639 | * - The global event did not expire any CPU local | |
640 | * events. This happens in dyntick mode, as the maximum PIT | |
641 | * delta is quite small. | |
642 | * | |
643 | * - There are pending events on sleeping CPUs which were not | |
644 | * in the event mask | |
79bf2bb3 | 645 | */ |
cdc6f27d | 646 | if (next_event.tv64 != KTIME_MAX) { |
79bf2bb3 | 647 | /* |
cdc6f27d TG |
648 | * Rearm the broadcast device. If event expired, |
649 | * repeat the above | |
79bf2bb3 | 650 | */ |
d2348fb6 | 651 | if (tick_broadcast_set_event(dev, next_cpu, next_event, 0)) |
79bf2bb3 TG |
652 | goto again; |
653 | } | |
b5f91da0 | 654 | raw_spin_unlock(&tick_broadcast_lock); |
79bf2bb3 TG |
655 | } |
656 | ||
5d1638ac PM |
657 | static int broadcast_needs_cpu(struct clock_event_device *bc, int cpu) |
658 | { | |
659 | if (!(bc->features & CLOCK_EVT_FEAT_HRTIMER)) | |
660 | return 0; | |
661 | if (bc->next_event.tv64 == KTIME_MAX) | |
662 | return 0; | |
663 | return bc->bound_on == cpu ? -EBUSY : 0; | |
664 | } | |
665 | ||
666 | static void broadcast_shutdown_local(struct clock_event_device *bc, | |
667 | struct clock_event_device *dev) | |
668 | { | |
669 | /* | |
670 | * For hrtimer based broadcasting we cannot shutdown the cpu | |
671 | * local device if our own event is the first one to expire or | |
672 | * if we own the broadcast timer. | |
673 | */ | |
674 | if (bc->features & CLOCK_EVT_FEAT_HRTIMER) { | |
675 | if (broadcast_needs_cpu(bc, smp_processor_id())) | |
676 | return; | |
677 | if (dev->next_event.tv64 < bc->next_event.tv64) | |
678 | return; | |
679 | } | |
77e32c89 | 680 | clockevents_set_state(dev, CLOCK_EVT_STATE_SHUTDOWN); |
5d1638ac PM |
681 | } |
682 | ||
345527b1 | 683 | void hotplug_cpu__broadcast_tick_pull(int deadcpu) |
5d1638ac | 684 | { |
345527b1 PM |
685 | struct clock_event_device *bc; |
686 | unsigned long flags; | |
5d1638ac | 687 | |
345527b1 PM |
688 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
689 | bc = tick_broadcast_device.evtdev; | |
690 | ||
691 | if (bc && broadcast_needs_cpu(bc, deadcpu)) { | |
692 | /* This moves the broadcast assignment to this CPU: */ | |
693 | clockevents_program_event(bc, bc->next_event, 1); | |
694 | } | |
695 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); | |
5d1638ac PM |
696 | } |
697 | ||
79bf2bb3 TG |
698 | /* |
699 | * Powerstate information: The system enters/leaves a state, where | |
700 | * affected devices might stop | |
da7e6f45 | 701 | * Returns 0 on success, -EBUSY if the cpu is used to broadcast wakeups. |
79bf2bb3 | 702 | */ |
da7e6f45 | 703 | int tick_broadcast_oneshot_control(unsigned long reason) |
79bf2bb3 TG |
704 | { |
705 | struct clock_event_device *bc, *dev; | |
706 | struct tick_device *td; | |
707 | unsigned long flags; | |
989dcb64 | 708 | ktime_t now; |
da7e6f45 | 709 | int cpu, ret = 0; |
79bf2bb3 | 710 | |
79bf2bb3 TG |
711 | /* |
712 | * Periodic mode does not care about the enter/exit of power | |
713 | * states | |
714 | */ | |
715 | if (tick_broadcast_device.mode == TICKDEV_MODE_PERIODIC) | |
5d1638ac | 716 | return 0; |
79bf2bb3 | 717 | |
7372b0b1 AK |
718 | /* |
719 | * We are called with preemtion disabled from the depth of the | |
720 | * idle code, so we can't be moved away. | |
721 | */ | |
79bf2bb3 TG |
722 | cpu = smp_processor_id(); |
723 | td = &per_cpu(tick_cpu_device, cpu); | |
724 | dev = td->evtdev; | |
725 | ||
726 | if (!(dev->features & CLOCK_EVT_FEAT_C3STOP)) | |
5d1638ac | 727 | return 0; |
7372b0b1 AK |
728 | |
729 | bc = tick_broadcast_device.evtdev; | |
79bf2bb3 | 730 | |
7372b0b1 | 731 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
79bf2bb3 | 732 | if (reason == CLOCK_EVT_NOTIFY_BROADCAST_ENTER) { |
b352bc1c | 733 | if (!cpumask_test_and_set_cpu(cpu, tick_broadcast_oneshot_mask)) { |
2938d275 | 734 | WARN_ON_ONCE(cpumask_test_cpu(cpu, tick_broadcast_pending_mask)); |
5d1638ac | 735 | broadcast_shutdown_local(bc, dev); |
989dcb64 TG |
736 | /* |
737 | * We only reprogram the broadcast timer if we | |
738 | * did not mark ourself in the force mask and | |
739 | * if the cpu local event is earlier than the | |
740 | * broadcast event. If the current CPU is in | |
741 | * the force mask, then we are going to be | |
742 | * woken by the IPI right away. | |
743 | */ | |
744 | if (!cpumask_test_cpu(cpu, tick_broadcast_force_mask) && | |
745 | dev->next_event.tv64 < bc->next_event.tv64) | |
d2348fb6 | 746 | tick_broadcast_set_event(bc, cpu, dev->next_event, 1); |
79bf2bb3 | 747 | } |
5d1638ac PM |
748 | /* |
749 | * If the current CPU owns the hrtimer broadcast | |
750 | * mechanism, it cannot go deep idle and we remove the | |
751 | * CPU from the broadcast mask. We don't have to go | |
752 | * through the EXIT path as the local timer is not | |
753 | * shutdown. | |
754 | */ | |
755 | ret = broadcast_needs_cpu(bc, cpu); | |
756 | if (ret) | |
757 | cpumask_clear_cpu(cpu, tick_broadcast_oneshot_mask); | |
79bf2bb3 | 758 | } else { |
b352bc1c | 759 | if (cpumask_test_and_clear_cpu(cpu, tick_broadcast_oneshot_mask)) { |
77e32c89 | 760 | clockevents_set_state(dev, CLOCK_EVT_STATE_ONESHOT); |
26517f3e TG |
761 | /* |
762 | * The cpu which was handling the broadcast | |
763 | * timer marked this cpu in the broadcast | |
764 | * pending mask and fired the broadcast | |
765 | * IPI. So we are going to handle the expired | |
766 | * event anyway via the broadcast IPI | |
767 | * handler. No need to reprogram the timer | |
768 | * with an already expired event. | |
769 | */ | |
770 | if (cpumask_test_and_clear_cpu(cpu, | |
771 | tick_broadcast_pending_mask)) | |
772 | goto out; | |
773 | ||
ea8deb8d DL |
774 | /* |
775 | * Bail out if there is no next event. | |
776 | */ | |
777 | if (dev->next_event.tv64 == KTIME_MAX) | |
778 | goto out; | |
989dcb64 TG |
779 | /* |
780 | * If the pending bit is not set, then we are | |
781 | * either the CPU handling the broadcast | |
782 | * interrupt or we got woken by something else. | |
783 | * | |
784 | * We are not longer in the broadcast mask, so | |
785 | * if the cpu local expiry time is already | |
786 | * reached, we would reprogram the cpu local | |
787 | * timer with an already expired event. | |
788 | * | |
789 | * This can lead to a ping-pong when we return | |
790 | * to idle and therefor rearm the broadcast | |
791 | * timer before the cpu local timer was able | |
792 | * to fire. This happens because the forced | |
793 | * reprogramming makes sure that the event | |
794 | * will happen in the future and depending on | |
795 | * the min_delta setting this might be far | |
796 | * enough out that the ping-pong starts. | |
797 | * | |
798 | * If the cpu local next_event has expired | |
799 | * then we know that the broadcast timer | |
800 | * next_event has expired as well and | |
801 | * broadcast is about to be handled. So we | |
802 | * avoid reprogramming and enforce that the | |
803 | * broadcast handler, which did not run yet, | |
804 | * will invoke the cpu local handler. | |
805 | * | |
806 | * We cannot call the handler directly from | |
807 | * here, because we might be in a NOHZ phase | |
808 | * and we did not go through the irq_enter() | |
809 | * nohz fixups. | |
810 | */ | |
811 | now = ktime_get(); | |
812 | if (dev->next_event.tv64 <= now.tv64) { | |
813 | cpumask_set_cpu(cpu, tick_broadcast_force_mask); | |
814 | goto out; | |
815 | } | |
816 | /* | |
817 | * We got woken by something else. Reprogram | |
818 | * the cpu local timer device. | |
819 | */ | |
26517f3e | 820 | tick_program_event(dev->next_event, 1); |
79bf2bb3 TG |
821 | } |
822 | } | |
26517f3e | 823 | out: |
b5f91da0 | 824 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
da7e6f45 | 825 | return ret; |
79bf2bb3 TG |
826 | } |
827 | ||
5590a536 TG |
828 | /* |
829 | * Reset the one shot broadcast for a cpu | |
830 | * | |
831 | * Called with tick_broadcast_lock held | |
832 | */ | |
833 | static void tick_broadcast_clear_oneshot(int cpu) | |
834 | { | |
b352bc1c | 835 | cpumask_clear_cpu(cpu, tick_broadcast_oneshot_mask); |
dd5fd9b9 | 836 | cpumask_clear_cpu(cpu, tick_broadcast_pending_mask); |
5590a536 TG |
837 | } |
838 | ||
6b954823 RR |
839 | static void tick_broadcast_init_next_event(struct cpumask *mask, |
840 | ktime_t expires) | |
7300711e TG |
841 | { |
842 | struct tick_device *td; | |
843 | int cpu; | |
844 | ||
5db0e1e9 | 845 | for_each_cpu(cpu, mask) { |
7300711e TG |
846 | td = &per_cpu(tick_cpu_device, cpu); |
847 | if (td->evtdev) | |
848 | td->evtdev->next_event = expires; | |
849 | } | |
850 | } | |
851 | ||
79bf2bb3 | 852 | /** |
8dce39c2 | 853 | * tick_broadcast_setup_oneshot - setup the broadcast device |
79bf2bb3 TG |
854 | */ |
855 | void tick_broadcast_setup_oneshot(struct clock_event_device *bc) | |
856 | { | |
07f4beb0 TG |
857 | int cpu = smp_processor_id(); |
858 | ||
9c17bcda TG |
859 | /* Set it up only once ! */ |
860 | if (bc->event_handler != tick_handle_oneshot_broadcast) { | |
77e32c89 | 861 | int was_periodic = bc->state == CLOCK_EVT_STATE_PERIODIC; |
7300711e | 862 | |
9c17bcda | 863 | bc->event_handler = tick_handle_oneshot_broadcast; |
7300711e | 864 | |
7300711e TG |
865 | /* |
866 | * We must be careful here. There might be other CPUs | |
867 | * waiting for periodic broadcast. We need to set the | |
868 | * oneshot_mask bits for those and program the | |
869 | * broadcast device to fire. | |
870 | */ | |
b352bc1c TG |
871 | cpumask_copy(tmpmask, tick_broadcast_mask); |
872 | cpumask_clear_cpu(cpu, tmpmask); | |
873 | cpumask_or(tick_broadcast_oneshot_mask, | |
874 | tick_broadcast_oneshot_mask, tmpmask); | |
6b954823 | 875 | |
b352bc1c | 876 | if (was_periodic && !cpumask_empty(tmpmask)) { |
77e32c89 | 877 | clockevents_set_state(bc, CLOCK_EVT_STATE_ONESHOT); |
b352bc1c | 878 | tick_broadcast_init_next_event(tmpmask, |
6b954823 | 879 | tick_next_period); |
d2348fb6 | 880 | tick_broadcast_set_event(bc, cpu, tick_next_period, 1); |
7300711e TG |
881 | } else |
882 | bc->next_event.tv64 = KTIME_MAX; | |
07f4beb0 TG |
883 | } else { |
884 | /* | |
885 | * The first cpu which switches to oneshot mode sets | |
886 | * the bit for all other cpus which are in the general | |
887 | * (periodic) broadcast mask. So the bit is set and | |
888 | * would prevent the first broadcast enter after this | |
889 | * to program the bc device. | |
890 | */ | |
891 | tick_broadcast_clear_oneshot(cpu); | |
9c17bcda | 892 | } |
79bf2bb3 TG |
893 | } |
894 | ||
895 | /* | |
896 | * Select oneshot operating mode for the broadcast device | |
897 | */ | |
898 | void tick_broadcast_switch_to_oneshot(void) | |
899 | { | |
900 | struct clock_event_device *bc; | |
901 | unsigned long flags; | |
902 | ||
b5f91da0 | 903 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
fa4da365 SS |
904 | |
905 | tick_broadcast_device.mode = TICKDEV_MODE_ONESHOT; | |
79bf2bb3 TG |
906 | bc = tick_broadcast_device.evtdev; |
907 | if (bc) | |
908 | tick_broadcast_setup_oneshot(bc); | |
77b0d60c | 909 | |
b5f91da0 | 910 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
79bf2bb3 TG |
911 | } |
912 | ||
913 | ||
914 | /* | |
915 | * Remove a dead CPU from broadcasting | |
916 | */ | |
917 | void tick_shutdown_broadcast_oneshot(unsigned int *cpup) | |
918 | { | |
79bf2bb3 TG |
919 | unsigned long flags; |
920 | unsigned int cpu = *cpup; | |
921 | ||
b5f91da0 | 922 | raw_spin_lock_irqsave(&tick_broadcast_lock, flags); |
79bf2bb3 | 923 | |
31d9b393 | 924 | /* |
c9b5a266 TG |
925 | * Clear the broadcast masks for the dead cpu, but do not stop |
926 | * the broadcast device! | |
31d9b393 | 927 | */ |
b352bc1c | 928 | cpumask_clear_cpu(cpu, tick_broadcast_oneshot_mask); |
c9b5a266 TG |
929 | cpumask_clear_cpu(cpu, tick_broadcast_pending_mask); |
930 | cpumask_clear_cpu(cpu, tick_broadcast_force_mask); | |
79bf2bb3 | 931 | |
b5f91da0 | 932 | raw_spin_unlock_irqrestore(&tick_broadcast_lock, flags); |
79bf2bb3 TG |
933 | } |
934 | ||
27ce4cb4 TG |
935 | /* |
936 | * Check, whether the broadcast device is in one shot mode | |
937 | */ | |
938 | int tick_broadcast_oneshot_active(void) | |
939 | { | |
940 | return tick_broadcast_device.mode == TICKDEV_MODE_ONESHOT; | |
941 | } | |
942 | ||
3a142a06 TG |
943 | /* |
944 | * Check whether the broadcast device supports oneshot. | |
945 | */ | |
946 | bool tick_broadcast_oneshot_available(void) | |
947 | { | |
948 | struct clock_event_device *bc = tick_broadcast_device.evtdev; | |
949 | ||
950 | return bc ? bc->features & CLOCK_EVT_FEAT_ONESHOT : false; | |
951 | } | |
952 | ||
79bf2bb3 | 953 | #endif |
b352bc1c TG |
954 | |
955 | void __init tick_broadcast_init(void) | |
956 | { | |
fbd44a60 | 957 | zalloc_cpumask_var(&tick_broadcast_mask, GFP_NOWAIT); |
07bd1172 | 958 | zalloc_cpumask_var(&tick_broadcast_on, GFP_NOWAIT); |
fbd44a60 | 959 | zalloc_cpumask_var(&tmpmask, GFP_NOWAIT); |
b352bc1c | 960 | #ifdef CONFIG_TICK_ONESHOT |
fbd44a60 TG |
961 | zalloc_cpumask_var(&tick_broadcast_oneshot_mask, GFP_NOWAIT); |
962 | zalloc_cpumask_var(&tick_broadcast_pending_mask, GFP_NOWAIT); | |
963 | zalloc_cpumask_var(&tick_broadcast_force_mask, GFP_NOWAIT); | |
b352bc1c TG |
964 | #endif |
965 | } |