Have the linker's help text include the default setting of the --hash-style option...
[deliverable/binutils-gdb.git] / ld / emultempl / armelf.em
CommitLineData
252b5132 1# This shell script emits a C file. -*- C -*-
b3adc24a 2# Copyright (C) 1991-2020 Free Software Foundation, Inc.
41392f03 3#
f96b4a7b 4# This file is part of the GNU Binutils.
41392f03
AM
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
f96b4a7b 8# the Free Software Foundation; either version 3 of the License, or
41392f03
AM
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
f96b4a7b
NC
18# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19# MA 02110-1301, USA.
41392f03
AM
20#
21
075a2b89 22# This file is sourced from elf.em, and defines extra arm-elf
41392f03
AM
23# specific routines.
24#
a82644e2 25test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
92b93329 26fragment <<EOF
7ca69e9e 27
906e58ca 28#include "ldctor.h"
1d022697 29#include "elf/arm.h"
f37164d7 30#include "elf32-arm.h"
1d022697 31
68c39892
TP
32static struct elf32_arm_params params =
33{
34 NULL, /* thumb_entry_symbol */
35 0, /* byteswap_code */
36 0${TARGET1_IS_REL}, /* target1_is_rel */
37 "${TARGET2_TYPE}", /* target2_type */
38 0, /* fix_v4bx */
39 0, /* use_blx */
40 BFD_ARM_VFP11_FIX_DEFAULT, /* vfp11_denorm_fix */
41 BFD_ARM_STM32L4XX_FIX_NONE, /* stm32l4xx_fix */
42 0, /* no_enum_size_warning */
43 0, /* no_wchar_size_warning */
44 0, /* pic_veneer */
45 -1, /* fix_cortex_a8 */
46 1, /* fix_arm1176 */
47 -1, /* merge_exidx_entries */
48 0, /* cmse_implib */
49 NULL /* in_implib_bfd */
50};
0955507f 51static char *in_implib_filename = NULL;
7ca69e9e 52
252b5132 53static void
0c7a8e5a 54gld${EMULATION_NAME}_before_parse (void)
252b5132
RH
55{
56#ifndef TARGET_ /* I.e., if not generic. */
5e2f1575 57 ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
252b5132 58#endif /* not TARGET_ */
66be1055 59 input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
b34976b6 60 config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
e2caaa1f 61 config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
5c3261b0 62 link_info.check_relocs_after_open_input = TRUE;
576438f0 63 link_info.relro = DEFAULT_LD_Z_RELRO;
252b5132
RH
64}
65
3940d2c3
NC
66static void
67gld${EMULATION_NAME}_set_symbols (void)
68{
69 /* PR 19106: The section resizing code in gldarmelf_after_allocation
70 is effectively the same as relaxation, so prevent early memory
71 region checks which produce bogus error messages.
72 Note - this test has nothing to do with symbols. It is just here
73 because this is the first emulation routine that is called after
74 the command line has been parsed. */
75 if (!bfd_link_relocatable (&link_info))
76 TARGET_ENABLE_RELAXATION;
77}
78
1220a729 79static void
0c7a8e5a 80arm_elf_before_allocation (void)
1220a729 81{
68c39892 82 bfd_elf32_arm_set_byteswap_code (&link_info, params.byteswap_code);
d504ffc8 83
c6dd86c6
JB
84 /* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
85 due to architecture version. */
f13a99db 86 bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
c6dd86c6 87
a504d23a
LA
88 /* Choose type of STM32L4XX erratum fix, or warn if specified fix is
89 unnecessary due to architecture version. */
90 bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
91
48229727
JB
92 /* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified. */
93 bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
94
daa4adae
TP
95 /* Ensure the output sections of veneers needing a dedicated one is not
96 removed. */
97 bfd_elf32_arm_keep_private_stub_output_sections (&link_info);
98
d504ffc8
DJ
99 /* We should be able to set the size of the interworking stub section. We
100 can't do it until later if we have dynamic sections, though. */
cbc704f3 101 if (elf_hash_table (&link_info)->dynobj == NULL)
d504ffc8
DJ
102 {
103 /* Here we rummage through the found bfds to collect glue information. */
104 LANG_FOR_EACH_INPUT_STATEMENT (is)
105 {
6c19b93b
AM
106 /* Initialise mapping tables for code/data. */
107 bfd_elf32_arm_init_maps (is->the_bfd);
c6dd86c6 108
d504ffc8 109 if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
c6dd86c6 110 &link_info)
a504d23a
LA
111 || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
112 || !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
113 &link_info))
252b5132 114 /* xgettext:c-format */
df5f2391
AM
115 einfo (_("%P: errors encountered processing file %s\n"),
116 is->filename);
d504ffc8 117 }
3e6b1042
DJ
118
119 /* We have seen it all. Allocate it, and carry on. */
120 bfd_elf32_arm_allocate_interworking_sections (& link_info);
d504ffc8 121 }
252b5132 122
063d4ee1
AM
123 /* Call the standard elf routine. */
124 gld${EMULATION_NAME}_before_allocation ();
252b5132
RH
125}
126
906e58ca
NC
127/* Fake input file for stubs. */
128static lang_input_statement_type *stub_file;
129
130/* Whether we need to call gldarm_layout_sections_again. */
131static int need_laying_out = 0;
132
133/* Maximum size of a group of input sections that can be handled by
134 one stub section. A value of +/-1 indicates the bfd back-end
135 should use a suitable default size. */
136static bfd_signed_vma group_size = 1;
137
138struct hook_stub_info
139{
140 lang_statement_list_type add;
141 asection *input_section;
142};
143
144/* Traverse the linker tree to find the spot where the stub goes. */
145
146static bfd_boolean
147hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
148{
149 lang_statement_union_type *l;
150 bfd_boolean ret;
151
152 for (; (l = *lp) != NULL; lp = &l->header.next)
153 {
154 switch (l->header.type)
155 {
156 case lang_constructors_statement_enum:
157 ret = hook_in_stub (info, &constructor_list.head);
158 if (ret)
159 return ret;
160 break;
161
162 case lang_output_section_statement_enum:
163 ret = hook_in_stub (info,
164 &l->output_section_statement.children.head);
165 if (ret)
166 return ret;
167 break;
168
169 case lang_wild_statement_enum:
170 ret = hook_in_stub (info, &l->wild_statement.children.head);
171 if (ret)
172 return ret;
173 break;
174
175 case lang_group_statement_enum:
176 ret = hook_in_stub (info, &l->group_statement.children.head);
177 if (ret)
178 return ret;
179 break;
180
181 case lang_input_section_enum:
182 if (l->input_section.section == info->input_section)
183 {
184 /* We've found our section. Insert the stub immediately
07d72278
DJ
185 after its associated input section. */
186 *(info->add.tail) = l->header.next;
187 l->header.next = info->add.head;
906e58ca
NC
188 return TRUE;
189 }
190 break;
191
192 case lang_data_statement_enum:
193 case lang_reloc_statement_enum:
194 case lang_object_symbols_statement_enum:
195 case lang_output_statement_enum:
196 case lang_target_statement_enum:
197 case lang_input_statement_enum:
198 case lang_assignment_statement_enum:
199 case lang_padding_statement_enum:
200 case lang_address_statement_enum:
201 case lang_fill_statement_enum:
202 break;
203
204 default:
205 FAIL ();
206 break;
207 }
208 }
209 return FALSE;
210}
211
212
213/* Call-back for elf32_arm_size_stubs. */
214
215/* Create a new stub section, and arrange for it to be linked
07d72278 216 immediately after INPUT_SECTION. */
906e58ca
NC
217
218static asection *
7a89b94e 219elf32_arm_add_stub_section (const char * stub_sec_name,
6bde4c52
TP
220 asection * output_section,
221 asection * after_input_section,
7a89b94e 222 unsigned int alignment_power)
906e58ca
NC
223{
224 asection *stub_sec;
225 flagword flags;
906e58ca
NC
226 lang_output_section_statement_type *os;
227 struct hook_stub_info info;
228
906e58ca 229 flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
abf874aa
CL
230 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP
231 | SEC_LINKER_CREATED);
9795b468
AM
232 stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
233 stub_sec_name, flags);
234 if (stub_sec == NULL)
906e58ca
NC
235 goto err_ret;
236
fd361982 237 bfd_set_section_alignment (stub_sec, alignment_power);
906e58ca 238
24ef1aa7 239 os = lang_output_section_get (output_section);
906e58ca 240
6bde4c52 241 info.input_section = after_input_section;
906e58ca 242 lang_list_init (&info.add);
b9c361e0 243 lang_add_section (&info.add, stub_sec, NULL, os);
906e58ca
NC
244
245 if (info.add.head == NULL)
246 goto err_ret;
247
6bde4c52
TP
248 if (after_input_section == NULL)
249 {
250 lang_statement_union_type **lp = &os->children.head;
251 lang_statement_union_type *l, *lprev = NULL;
252
253 for (; (l = *lp) != NULL; lp = &l->header.next, lprev = l);
254
255 if (lprev)
256 lprev->header.next = info.add.head;
257 else
258 os->children.head = info.add.head;
259
260 return stub_sec;
261 }
262 else
263 {
264 if (hook_in_stub (&info, &os->children.head))
265 return stub_sec;
266 }
906e58ca
NC
267
268 err_ret:
d003af55 269 einfo (_("%X%P: can not make stub section: %E\n"));
906e58ca
NC
270 return NULL;
271}
272
273/* Another call-back for elf_arm_size_stubs. */
274
6f798e5c 275static void
906e58ca
NC
276gldarm_layout_sections_again (void)
277{
278 /* If we have changed sizes of the stub sections, then we need
279 to recalculate all the section offsets. This may mean we need to
280 add even more stubs. */
d871d478 281 ldelf_map_segments (TRUE);
906e58ca
NC
282 need_laying_out = -1;
283}
284
285static void
286build_section_lists (lang_statement_union_type *statement)
287{
288 if (statement->header.type == lang_input_section_enum)
289 {
290 asection *i = statement->input_section.section;
291
dbaa2011 292 if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
906e58ca
NC
293 && (i->flags & SEC_EXCLUDE) == 0
294 && i->output_section != NULL
295 && i->output_section->owner == link_info.output_bfd)
296 elf32_arm_next_input_section (& link_info, i);
297 }
298}
299
2468f9c9
PB
300static int
301compare_output_sec_vma (const void *a, const void *b)
302{
303 asection *asec = *(asection **) a, *bsec = *(asection **) b;
304 asection *aout = asec->output_section, *bout = bsec->output_section;
305 bfd_vma avma, bvma;
e2caaa1f 306
2468f9c9
PB
307 /* If there's no output section for some reason, compare equal. */
308 if (!aout || !bout)
309 return 0;
e2caaa1f 310
2468f9c9
PB
311 avma = aout->vma + asec->output_offset;
312 bvma = bout->vma + bsec->output_offset;
e2caaa1f 313
2468f9c9
PB
314 if (avma > bvma)
315 return 1;
316 else if (avma < bvma)
317 return -1;
e2caaa1f 318
2468f9c9
PB
319 return 0;
320}
321
906e58ca 322static void
eaeb0a9d 323gld${EMULATION_NAME}_after_allocation (void)
6f798e5c 324{
75938853
AM
325 int ret;
326
491d01d3
YU
327 /* Build a sorted list of input text sections, then use that to process
328 the unwind table index. */
329 unsigned int list_size = 10;
330 asection **sec_list = (asection **)
331 xmalloc (list_size * sizeof (asection *));
332 unsigned int sec_count = 0;
333
334 LANG_FOR_EACH_INPUT_STATEMENT (is)
2468f9c9 335 {
491d01d3
YU
336 bfd *abfd = is->the_bfd;
337 asection *sec;
e2caaa1f 338
491d01d3
YU
339 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
340 continue;
e2caaa1f 341
491d01d3
YU
342 for (sec = abfd->sections; sec != NULL; sec = sec->next)
343 {
344 asection *out_sec = sec->output_section;
345
346 if (out_sec
347 && elf_section_data (sec)
348 && elf_section_type (sec) == SHT_PROGBITS
349 && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
350 && (sec->flags & SEC_EXCLUDE) == 0
351 && sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
352 && out_sec != bfd_abs_section_ptr)
2468f9c9 353 {
491d01d3 354 if (sec_count == list_size)
2468f9c9 355 {
491d01d3
YU
356 list_size *= 2;
357 sec_list = (asection **)
358 xrealloc (sec_list, list_size * sizeof (asection *));
2468f9c9 359 }
491d01d3
YU
360
361 sec_list[sec_count++] = sec;
2468f9c9
PB
362 }
363 }
491d01d3 364 }
e2caaa1f 365
491d01d3 366 qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
e2caaa1f 367
491d01d3 368 if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
68c39892 369 params.merge_exidx_entries))
491d01d3 370 need_laying_out = 1;
e2caaa1f 371
491d01d3 372 free (sec_list);
6f798e5c 373
906e58ca
NC
374 /* bfd_elf32_discard_info just plays with debugging sections,
375 ie. doesn't affect any code, so we can delay resizing the
376 sections. It's likely we'll resize everything in the process of
377 adding stubs. */
75938853
AM
378 ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
379 if (ret < 0)
380 {
d003af55 381 einfo (_("%X%P: .eh_frame/.stab edit: %E\n"));
75938853
AM
382 return;
383 }
384 else if (ret > 0)
906e58ca
NC
385 need_laying_out = 1;
386
387 /* If generating a relocatable output file, then we don't
388 have to examine the relocs. */
0e1862bb 389 if (stub_file != NULL && !bfd_link_relocatable (&link_info))
906e58ca 390 {
75938853 391 ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
906e58ca
NC
392 if (ret != 0)
393 {
394 if (ret < 0)
395 {
d003af55
AM
396 einfo (_("%X%P: could not compute sections lists "
397 "for stub generation: %E\n"));
906e58ca
NC
398 return;
399 }
400
401 lang_for_each_statement (build_section_lists);
402
403 /* Call into the BFD backend to do the real work. */
404 if (! elf32_arm_size_stubs (link_info.output_bfd,
405 stub_file->the_bfd,
406 & link_info,
407 group_size,
408 & elf32_arm_add_stub_section,
409 & gldarm_layout_sections_again))
410 {
df5f2391 411 einfo (_("%X%P: can not size stub section: %E\n"));
906e58ca
NC
412 return;
413 }
414 }
415 }
416
417 if (need_laying_out != -1)
d871d478 418 ldelf_map_segments (need_laying_out);
eaeb0a9d
AM
419}
420
421static void
422gld${EMULATION_NAME}_finish (void)
423{
424 struct bfd_link_hash_entry * h;
425
426 {
427 LANG_FOR_EACH_INPUT_STATEMENT (is)
428 {
6c19b93b
AM
429 /* Figure out where VFP11 erratum veneers (and the labels returning
430 from same) have been placed. */
431 bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
a504d23a
LA
432
433 /* Figure out where STM32L4XX erratum veneers (and the labels returning
434 from them) have been placed. */
435 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
eaeb0a9d
AM
436 }
437 }
906e58ca 438
0e1862bb 439 if (!bfd_link_relocatable (&link_info))
906e58ca
NC
440 {
441 /* Now build the linker stubs. */
442 if (stub_file->the_bfd->sections != NULL)
443 {
444 if (! elf32_arm_build_stubs (& link_info))
d003af55 445 einfo (_("%X%P: can not build stubs: %E\n"));
906e58ca
NC
446 }
447 }
448
449 finish_default ();
c56feb2b 450
68c39892 451 if (params.thumb_entry_symbol)
1d022697 452 {
68c39892 453 h = bfd_link_hash_lookup (link_info.hash, params.thumb_entry_symbol,
1d022697
PB
454 FALSE, FALSE, TRUE);
455 }
456 else
457 {
458 struct elf_link_hash_entry * eh;
459
460 if (!entry_symbol.name)
461 return;
462
463 h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
464 FALSE, FALSE, TRUE);
465 eh = (struct elf_link_hash_entry *)h;
39d911fc
TP
466 if (!h || ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
467 != ST_BRANCH_TO_THUMB)
1d022697
PB
468 return;
469 }
0c7a8e5a 470
6f798e5c
NC
471
472 if (h != (struct bfd_link_hash_entry *) NULL
473 && (h->type == bfd_link_hash_defined
474 || h->type == bfd_link_hash_defweak)
475 && h->u.def.section->output_section != NULL)
476 {
477 static char buffer[32];
88f7bcd5 478 bfd_vma val;
0c7a8e5a 479
88f7bcd5
NC
480 /* Special procesing is required for a Thumb entry symbol. The
481 bottom bit of its address must be set. */
482 val = (h->u.def.value
fd361982 483 + bfd_section_vma (h->u.def.section->output_section)
88f7bcd5 484 + h->u.def.section->output_offset);
0c7a8e5a 485
88f7bcd5 486 val |= 1;
6f798e5c 487
88f7bcd5 488 /* Now convert this value into a string and store it in entry_symbol
0c7a8e5a 489 where the lang_finish() function will pick it up. */
88f7bcd5
NC
490 buffer[0] = '0';
491 buffer[1] = 'x';
0c7a8e5a 492
88f7bcd5 493 sprintf_vma (buffer + 2, val);
6f798e5c 494
68c39892 495 if (params.thumb_entry_symbol != NULL && entry_symbol.name != NULL
1d022697 496 && entry_from_cmdline)
88f7bcd5 497 einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
68c39892 498 params.thumb_entry_symbol, entry_symbol.name);
88f7bcd5 499 entry_symbol.name = buffer;
6f798e5c 500 }
88f7bcd5 501 else
6241fe3d 502 einfo (_("%P: warning: cannot find thumb start symbol %s\n"),
f5a1cdde 503 h->root.string);
6f798e5c
NC
504}
505
bf21ed78 506/* This is a convenient point to tell BFD about target specific flags.
3674e28a
PB
507 After the output has been created, but before inputs are read. */
508static void
509arm_elf_create_output_section_statements (void)
510{
b8976b05
NC
511 if (strstr (bfd_get_target (link_info.output_bfd), "arm") == NULL)
512 {
513 /* The arm backend needs special fields in the output hash structure.
514 These will only be created if the output format is an arm format,
515 hence we do not support linking and changing output formats at the
516 same time. Use a link followed by objcopy to change output formats. */
df5f2391
AM
517 einfo (_("%F%P: error: cannot change output format "
518 "whilst linking %s binaries\n"), "ARM");
b8976b05
NC
519 return;
520 }
521
0955507f
TP
522 if (in_implib_filename)
523 {
68c39892
TP
524 params.in_implib_bfd = bfd_openr (in_implib_filename,
525 bfd_get_target (link_info.output_bfd));
0955507f 526
68c39892 527 if (params.in_implib_bfd == NULL)
df5f2391 528 einfo (_("%F%P: %s: can't open: %E\n"), in_implib_filename);
0955507f 529
68c39892 530 if (!bfd_check_format (params.in_implib_bfd, bfd_object))
df5f2391 531 einfo (_("%F%P: %s: not a relocatable file: %E\n"), in_implib_filename);
0955507f 532 }
0955507f 533
68c39892 534 bfd_elf32_arm_set_target_params (link_info.output_bfd, &link_info, &params);
906e58ca
NC
535
536 stub_file = lang_add_input_file ("linker stubs",
6c19b93b
AM
537 lang_input_file_is_fake_enum,
538 NULL);
906e58ca
NC
539 stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
540 if (stub_file->the_bfd == NULL
541 || ! bfd_set_arch_mach (stub_file->the_bfd,
6c19b93b
AM
542 bfd_get_arch (link_info.output_bfd),
543 bfd_get_mach (link_info.output_bfd)))
906e58ca 544 {
df5f2391 545 einfo (_("%F%P: can not create BFD: %E\n"));
906e58ca
NC
546 return;
547 }
e2caaa1f 548
906e58ca
NC
549 stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
550 ldlang_add_file (stub_file);
3e6b1042
DJ
551
552 /* Also use the stub file for stubs placed in a single output section. */
553 bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
554 bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
906e58ca
NC
555}
556
252b5132
RH
557EOF
558
41392f03
AM
559# Define some shell vars to insert bits of code into the standard elf
560# parse_args and list_options functions.
561#
562PARSE_AND_LIST_PROLOGUE='
563#define OPTION_THUMB_ENTRY 301
e489d0ae 564#define OPTION_BE8 302
9c504268
PB
565#define OPTION_TARGET1_REL 303
566#define OPTION_TARGET1_ABS 304
3674e28a 567#define OPTION_TARGET2 305
33bfe774
JB
568#define OPTION_FIX_V4BX 306
569#define OPTION_USE_BLX 307
c6dd86c6 570#define OPTION_VFP11_DENORM_FIX 308
bf21ed78 571#define OPTION_NO_ENUM_SIZE_WARNING 309
27e55c4d 572#define OPTION_PIC_VENEER 310
845b51d6 573#define OPTION_FIX_V4BX_INTERWORKING 311
8c45e5ec 574#define OPTION_STUBGROUP_SIZE 312
a9dc9481 575#define OPTION_NO_WCHAR_SIZE_WARNING 313
48229727
JB
576#define OPTION_FIX_CORTEX_A8 314
577#define OPTION_NO_FIX_CORTEX_A8 315
8c45e5ec 578#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
2de70689
MGD
579#define OPTION_FIX_ARM1176 317
580#define OPTION_NO_FIX_ARM1176 318
8c45e5ec 581#define OPTION_LONG_PLT 319
a504d23a 582#define OPTION_STM32L4XX_FIX 320
54ddd295 583#define OPTION_CMSE_IMPLIB 321
0955507f 584#define OPTION_IN_IMPLIB 322
41392f03 585'
252b5132 586
ef5bdbd1 587PARSE_AND_LIST_SHORTOPTS=p
252b5132 588
41392f03
AM
589PARSE_AND_LIST_LONGOPTS='
590 { "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
591 { "thumb-entry", required_argument, NULL, OPTION_THUMB_ENTRY},
e489d0ae 592 { "be8", no_argument, NULL, OPTION_BE8},
9c504268
PB
593 { "target1-rel", no_argument, NULL, OPTION_TARGET1_REL},
594 { "target1-abs", no_argument, NULL, OPTION_TARGET1_ABS},
3674e28a 595 { "target2", required_argument, NULL, OPTION_TARGET2},
319850b4 596 { "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
845b51d6 597 { "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
33bfe774 598 { "use-blx", no_argument, NULL, OPTION_USE_BLX},
c6dd86c6 599 { "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
a504d23a 600 { "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
bf21ed78 601 { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
27e55c4d 602 { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
906e58ca 603 { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
a9dc9481 604 { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
48229727
JB
605 { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
606 { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
85fdf906 607 { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
2de70689
MGD
608 { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
609 { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
1db37fe6 610 { "long-plt", no_argument, NULL, OPTION_LONG_PLT },
54ddd295 611 { "cmse-implib", no_argument, NULL, OPTION_CMSE_IMPLIB },
0955507f 612 { "in-implib", required_argument, NULL, OPTION_IN_IMPLIB },
41392f03 613'
252b5132 614
41392f03 615PARSE_AND_LIST_OPTIONS='
442996ee 616 fprintf (file, _(" --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"));
4a977a31 617 fprintf (file, _(" --be8 Output BE8 format image\n"));
f8266dc4
NC
618 fprintf (file, _(" --target1-rel Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
619 fprintf (file, _(" --target1-abs Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
442996ee
AM
620 fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
621 fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
845b51d6 622 fprintf (file, _(" --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer\n"));
442996ee
AM
623 fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
624 fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
a504d23a 625 fprintf (file, _(" --fix-stm32l4xx-629360 Specify how to fix STM32L4XX 629360 erratum\n"));
893dcb0e 626 fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
442996ee 627 " enum sizes\n"));
a272e28c 628 fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible\n"
a9dc9481 629 " wchar_t sizes\n"));
442996ee 630 fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
1db37fe6
YG
631 fprintf (file, _(" --long-plt Generate long .plt entries\n"
632 " to handle large .plt/.got displacements\n"));
54ddd295
TP
633 fprintf (file, _(" --cmse-implib Make import library to be a secure gateway import\n"
634 " library as per ARMv8-M Security Extensions\n"));
0955507f
TP
635 fprintf (file, _(" --in-implib Import library whose symbols address must\n"
636 " remain stable\n"));
906e58ca 637 fprintf (file, _("\
a272e28c 638 --stub-group-size=N Maximum size of a group of input sections that\n\
df5f2391
AM
639 can be handled by one stub section. A negative\n\
640 value locates all stubs after their branches\n\
641 (with a group size of -N), while a positive\n\
642 value allows two groups of input sections, one\n\
643 before, and one after each stub section.\n\
644 Values of +/-1 indicate the linker should\n\
645 choose suitable defaults.\n"));
48229727 646 fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
85fdf906 647 fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
2de70689 648 fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
41392f03 649'
252b5132 650
41392f03
AM
651PARSE_AND_LIST_ARGS_CASES='
652 case '\'p\'':
dea514f5 653 /* Only here for backwards compatibility. */
41392f03 654 break;
252b5132 655
41392f03 656 case OPTION_THUMB_ENTRY:
68c39892 657 params.thumb_entry_symbol = optarg;
41392f03 658 break;
e489d0ae
PB
659
660 case OPTION_BE8:
68c39892 661 params.byteswap_code = 1;
e489d0ae 662 break;
9c504268
PB
663
664 case OPTION_TARGET1_REL:
68c39892 665 params.target1_is_rel = 1;
9c504268
PB
666 break;
667
668 case OPTION_TARGET1_ABS:
68c39892 669 params.target1_is_rel = 0;
9c504268 670 break;
3674e28a
PB
671
672 case OPTION_TARGET2:
68c39892 673 params.target2_type = optarg;
3674e28a 674 break;
319850b4
JB
675
676 case OPTION_FIX_V4BX:
68c39892 677 params.fix_v4bx = 1;
319850b4 678 break;
33bfe774 679
845b51d6 680 case OPTION_FIX_V4BX_INTERWORKING:
68c39892 681 params.fix_v4bx = 2;
845b51d6
PB
682 break;
683
33bfe774 684 case OPTION_USE_BLX:
68c39892 685 params.use_blx = 1;
33bfe774 686 break;
92b93329 687
c6dd86c6
JB
688 case OPTION_VFP11_DENORM_FIX:
689 if (strcmp (optarg, "none") == 0)
6c19b93b 690 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
c6dd86c6 691 else if (strcmp (optarg, "scalar") == 0)
6c19b93b 692 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
c6dd86c6 693 else if (strcmp (optarg, "vector") == 0)
6c19b93b 694 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
c6dd86c6 695 else
df5f2391 696 einfo (_("%P: unrecognized VFP11 fix type '\''%s'\''\n"), optarg);
c6dd86c6 697 break;
bf21ed78 698
a504d23a
LA
699 case OPTION_STM32L4XX_FIX:
700 if (!optarg)
6c19b93b 701 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
a504d23a 702 else if (strcmp (optarg, "none") == 0)
6c19b93b 703 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
a504d23a 704 else if (strcmp (optarg, "default") == 0)
6c19b93b 705 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
a504d23a 706 else if (strcmp (optarg, "all") == 0)
6c19b93b 707 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
a504d23a 708 else
df5f2391 709 einfo (_("%P: unrecognized STM32L4XX fix type '\''%s'\''\n"), optarg);
a504d23a
LA
710 break;
711
bf21ed78 712 case OPTION_NO_ENUM_SIZE_WARNING:
68c39892 713 params.no_enum_size_warning = 1;
bf21ed78 714 break;
27e55c4d 715
a9dc9481 716 case OPTION_NO_WCHAR_SIZE_WARNING:
68c39892 717 params.no_wchar_size_warning = 1;
a9dc9481
JM
718 break;
719
27e55c4d 720 case OPTION_PIC_VENEER:
68c39892 721 params.pic_veneer = 1;
27e55c4d 722 break;
906e58ca
NC
723
724 case OPTION_STUBGROUP_SIZE:
725 {
726 const char *end;
727
6c19b93b
AM
728 group_size = bfd_scan_vma (optarg, &end, 0);
729 if (*end)
df5f2391 730 einfo (_("%F%P: invalid number `%s'\''\n"), optarg);
906e58ca
NC
731 }
732 break;
48229727
JB
733
734 case OPTION_FIX_CORTEX_A8:
68c39892 735 params.fix_cortex_a8 = 1;
48229727
JB
736 break;
737
738 case OPTION_NO_FIX_CORTEX_A8:
68c39892 739 params.fix_cortex_a8 = 0;
48229727 740 break;
85fdf906
AH
741
742 case OPTION_NO_MERGE_EXIDX_ENTRIES:
68c39892 743 params.merge_exidx_entries = 0;
2de70689 744 break;
85fdf906 745
2de70689 746 case OPTION_FIX_ARM1176:
68c39892 747 params.fix_arm1176 = 1;
2de70689
MGD
748 break;
749
750 case OPTION_NO_FIX_ARM1176:
68c39892 751 params.fix_arm1176 = 0;
2de70689 752 break;
1db37fe6
YG
753
754 case OPTION_LONG_PLT:
755 bfd_elf32_arm_use_long_plt ();
756 break;
54ddd295
TP
757
758 case OPTION_CMSE_IMPLIB:
68c39892 759 params.cmse_implib = 1;
54ddd295 760 break;
0955507f
TP
761
762 case OPTION_IN_IMPLIB:
763 in_implib_filename = optarg;
764 break;
41392f03 765'
252b5132 766
3e6b1042 767# We have our own before_allocation etc. functions, but they call
41392f03 768# the standard routines, so give them a different name.
41392f03 769LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
eaeb0a9d 770LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
3674e28a 771LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
252b5132 772
41392f03
AM
773# Replace the elf before_parse function with our own.
774LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
3940d2c3 775LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
252b5132 776
41392f03 777# Call the extra arm-elf function
906e58ca 778LDEMUL_FINISH=gld${EMULATION_NAME}_finish
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