Reduce parameter list in bfd_elf32_arm_target_relocs
[deliverable/binutils-gdb.git] / ld / emultempl / armelf.em
CommitLineData
252b5132 1# This shell script emits a C file. -*- C -*-
6f2750fe 2# Copyright (C) 1991-2016 Free Software Foundation, Inc.
41392f03 3#
f96b4a7b 4# This file is part of the GNU Binutils.
41392f03
AM
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
f96b4a7b 8# the Free Software Foundation; either version 3 of the License, or
41392f03
AM
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
f96b4a7b
NC
18# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19# MA 02110-1301, USA.
41392f03
AM
20#
21
22# This file is sourced from elf32.em, and defines extra arm-elf
23# specific routines.
24#
a82644e2 25test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
92b93329 26fragment <<EOF
7ca69e9e 27
906e58ca 28#include "ldctor.h"
1d022697
PB
29#include "elf/arm.h"
30
68c39892
TP
31static struct elf32_arm_params params =
32{
33 NULL, /* thumb_entry_symbol */
34 0, /* byteswap_code */
35 0${TARGET1_IS_REL}, /* target1_is_rel */
36 "${TARGET2_TYPE}", /* target2_type */
37 0, /* fix_v4bx */
38 0, /* use_blx */
39 BFD_ARM_VFP11_FIX_DEFAULT, /* vfp11_denorm_fix */
40 BFD_ARM_STM32L4XX_FIX_NONE, /* stm32l4xx_fix */
41 0, /* no_enum_size_warning */
42 0, /* no_wchar_size_warning */
43 0, /* pic_veneer */
44 -1, /* fix_cortex_a8 */
45 1, /* fix_arm1176 */
46 -1, /* merge_exidx_entries */
47 0, /* cmse_implib */
48 NULL /* in_implib_bfd */
49};
0955507f 50static char *in_implib_filename = NULL;
7ca69e9e 51
252b5132 52static void
0c7a8e5a 53gld${EMULATION_NAME}_before_parse (void)
252b5132
RH
54{
55#ifndef TARGET_ /* I.e., if not generic. */
5e2f1575 56 ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
252b5132 57#endif /* not TARGET_ */
66be1055 58 input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
b34976b6 59 config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
e2caaa1f 60 config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
576438f0 61 link_info.relro = DEFAULT_LD_Z_RELRO;
252b5132
RH
62}
63
3940d2c3
NC
64static void
65gld${EMULATION_NAME}_set_symbols (void)
66{
67 /* PR 19106: The section resizing code in gldarmelf_after_allocation
68 is effectively the same as relaxation, so prevent early memory
69 region checks which produce bogus error messages.
70 Note - this test has nothing to do with symbols. It is just here
71 because this is the first emulation routine that is called after
72 the command line has been parsed. */
73 if (!bfd_link_relocatable (&link_info))
74 TARGET_ENABLE_RELAXATION;
75}
76
1220a729 77static void
0c7a8e5a 78arm_elf_before_allocation (void)
1220a729 79{
68c39892 80 bfd_elf32_arm_set_byteswap_code (&link_info, params.byteswap_code);
d504ffc8 81
c6dd86c6
JB
82 /* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
83 due to architecture version. */
f13a99db 84 bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
c6dd86c6 85
a504d23a
LA
86 /* Choose type of STM32L4XX erratum fix, or warn if specified fix is
87 unnecessary due to architecture version. */
88 bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
89
48229727
JB
90 /* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified. */
91 bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
92
daa4adae
TP
93 /* Ensure the output sections of veneers needing a dedicated one is not
94 removed. */
95 bfd_elf32_arm_keep_private_stub_output_sections (&link_info);
96
d504ffc8
DJ
97 /* We should be able to set the size of the interworking stub section. We
98 can't do it until later if we have dynamic sections, though. */
cbc704f3 99 if (elf_hash_table (&link_info)->dynobj == NULL)
d504ffc8
DJ
100 {
101 /* Here we rummage through the found bfds to collect glue information. */
102 LANG_FOR_EACH_INPUT_STATEMENT (is)
103 {
c6dd86c6
JB
104 /* Initialise mapping tables for code/data. */
105 bfd_elf32_arm_init_maps (is->the_bfd);
106
d504ffc8 107 if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
c6dd86c6 108 &link_info)
a504d23a
LA
109 || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
110 || !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
111 &link_info))
252b5132
RH
112 /* xgettext:c-format */
113 einfo (_("Errors encountered processing file %s"), is->filename);
d504ffc8 114 }
3e6b1042
DJ
115
116 /* We have seen it all. Allocate it, and carry on. */
117 bfd_elf32_arm_allocate_interworking_sections (& link_info);
d504ffc8 118 }
252b5132 119
063d4ee1
AM
120 /* Call the standard elf routine. */
121 gld${EMULATION_NAME}_before_allocation ();
252b5132
RH
122}
123
906e58ca
NC
124/* Fake input file for stubs. */
125static lang_input_statement_type *stub_file;
126
127/* Whether we need to call gldarm_layout_sections_again. */
128static int need_laying_out = 0;
129
130/* Maximum size of a group of input sections that can be handled by
131 one stub section. A value of +/-1 indicates the bfd back-end
132 should use a suitable default size. */
133static bfd_signed_vma group_size = 1;
134
135struct hook_stub_info
136{
137 lang_statement_list_type add;
138 asection *input_section;
139};
140
141/* Traverse the linker tree to find the spot where the stub goes. */
142
143static bfd_boolean
144hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
145{
146 lang_statement_union_type *l;
147 bfd_boolean ret;
148
149 for (; (l = *lp) != NULL; lp = &l->header.next)
150 {
151 switch (l->header.type)
152 {
153 case lang_constructors_statement_enum:
154 ret = hook_in_stub (info, &constructor_list.head);
155 if (ret)
156 return ret;
157 break;
158
159 case lang_output_section_statement_enum:
160 ret = hook_in_stub (info,
161 &l->output_section_statement.children.head);
162 if (ret)
163 return ret;
164 break;
165
166 case lang_wild_statement_enum:
167 ret = hook_in_stub (info, &l->wild_statement.children.head);
168 if (ret)
169 return ret;
170 break;
171
172 case lang_group_statement_enum:
173 ret = hook_in_stub (info, &l->group_statement.children.head);
174 if (ret)
175 return ret;
176 break;
177
178 case lang_input_section_enum:
179 if (l->input_section.section == info->input_section)
180 {
181 /* We've found our section. Insert the stub immediately
07d72278
DJ
182 after its associated input section. */
183 *(info->add.tail) = l->header.next;
184 l->header.next = info->add.head;
906e58ca
NC
185 return TRUE;
186 }
187 break;
188
189 case lang_data_statement_enum:
190 case lang_reloc_statement_enum:
191 case lang_object_symbols_statement_enum:
192 case lang_output_statement_enum:
193 case lang_target_statement_enum:
194 case lang_input_statement_enum:
195 case lang_assignment_statement_enum:
196 case lang_padding_statement_enum:
197 case lang_address_statement_enum:
198 case lang_fill_statement_enum:
199 break;
200
201 default:
202 FAIL ();
203 break;
204 }
205 }
206 return FALSE;
207}
208
209
210/* Call-back for elf32_arm_size_stubs. */
211
212/* Create a new stub section, and arrange for it to be linked
07d72278 213 immediately after INPUT_SECTION. */
906e58ca
NC
214
215static asection *
7a89b94e 216elf32_arm_add_stub_section (const char * stub_sec_name,
6bde4c52
TP
217 asection * output_section,
218 asection * after_input_section,
7a89b94e 219 unsigned int alignment_power)
906e58ca
NC
220{
221 asection *stub_sec;
222 flagword flags;
906e58ca
NC
223 lang_output_section_statement_type *os;
224 struct hook_stub_info info;
225
906e58ca
NC
226 flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
227 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP);
9795b468
AM
228 stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
229 stub_sec_name, flags);
230 if (stub_sec == NULL)
906e58ca
NC
231 goto err_ret;
232
7a89b94e 233 bfd_set_section_alignment (stub_file->the_bfd, stub_sec, alignment_power);
906e58ca 234
24ef1aa7 235 os = lang_output_section_get (output_section);
906e58ca 236
6bde4c52 237 info.input_section = after_input_section;
906e58ca 238 lang_list_init (&info.add);
b9c361e0 239 lang_add_section (&info.add, stub_sec, NULL, os);
906e58ca
NC
240
241 if (info.add.head == NULL)
242 goto err_ret;
243
6bde4c52
TP
244 if (after_input_section == NULL)
245 {
246 lang_statement_union_type **lp = &os->children.head;
247 lang_statement_union_type *l, *lprev = NULL;
248
249 for (; (l = *lp) != NULL; lp = &l->header.next, lprev = l);
250
251 if (lprev)
252 lprev->header.next = info.add.head;
253 else
254 os->children.head = info.add.head;
255
256 return stub_sec;
257 }
258 else
259 {
260 if (hook_in_stub (&info, &os->children.head))
261 return stub_sec;
262 }
906e58ca
NC
263
264 err_ret:
265 einfo ("%X%P: can not make stub section: %E\n");
266 return NULL;
267}
268
269/* Another call-back for elf_arm_size_stubs. */
270
6f798e5c 271static void
906e58ca
NC
272gldarm_layout_sections_again (void)
273{
274 /* If we have changed sizes of the stub sections, then we need
275 to recalculate all the section offsets. This may mean we need to
276 add even more stubs. */
277 gld${EMULATION_NAME}_map_segments (TRUE);
278 need_laying_out = -1;
279}
280
281static void
282build_section_lists (lang_statement_union_type *statement)
283{
284 if (statement->header.type == lang_input_section_enum)
285 {
286 asection *i = statement->input_section.section;
287
dbaa2011 288 if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
906e58ca
NC
289 && (i->flags & SEC_EXCLUDE) == 0
290 && i->output_section != NULL
291 && i->output_section->owner == link_info.output_bfd)
292 elf32_arm_next_input_section (& link_info, i);
293 }
294}
295
2468f9c9
PB
296static int
297compare_output_sec_vma (const void *a, const void *b)
298{
299 asection *asec = *(asection **) a, *bsec = *(asection **) b;
300 asection *aout = asec->output_section, *bout = bsec->output_section;
301 bfd_vma avma, bvma;
e2caaa1f 302
2468f9c9
PB
303 /* If there's no output section for some reason, compare equal. */
304 if (!aout || !bout)
305 return 0;
e2caaa1f 306
2468f9c9
PB
307 avma = aout->vma + asec->output_offset;
308 bvma = bout->vma + bsec->output_offset;
e2caaa1f 309
2468f9c9
PB
310 if (avma > bvma)
311 return 1;
312 else if (avma < bvma)
313 return -1;
e2caaa1f 314
2468f9c9
PB
315 return 0;
316}
317
906e58ca 318static void
eaeb0a9d 319gld${EMULATION_NAME}_after_allocation (void)
6f798e5c 320{
75938853
AM
321 int ret;
322
491d01d3
YU
323 /* Build a sorted list of input text sections, then use that to process
324 the unwind table index. */
325 unsigned int list_size = 10;
326 asection **sec_list = (asection **)
327 xmalloc (list_size * sizeof (asection *));
328 unsigned int sec_count = 0;
329
330 LANG_FOR_EACH_INPUT_STATEMENT (is)
2468f9c9 331 {
491d01d3
YU
332 bfd *abfd = is->the_bfd;
333 asection *sec;
e2caaa1f 334
491d01d3
YU
335 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
336 continue;
e2caaa1f 337
491d01d3
YU
338 for (sec = abfd->sections; sec != NULL; sec = sec->next)
339 {
340 asection *out_sec = sec->output_section;
341
342 if (out_sec
343 && elf_section_data (sec)
344 && elf_section_type (sec) == SHT_PROGBITS
345 && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
346 && (sec->flags & SEC_EXCLUDE) == 0
347 && sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
348 && out_sec != bfd_abs_section_ptr)
2468f9c9 349 {
491d01d3 350 if (sec_count == list_size)
2468f9c9 351 {
491d01d3
YU
352 list_size *= 2;
353 sec_list = (asection **)
354 xrealloc (sec_list, list_size * sizeof (asection *));
2468f9c9 355 }
491d01d3
YU
356
357 sec_list[sec_count++] = sec;
2468f9c9
PB
358 }
359 }
491d01d3 360 }
e2caaa1f 361
491d01d3 362 qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
e2caaa1f 363
491d01d3 364 if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
68c39892 365 params.merge_exidx_entries))
491d01d3 366 need_laying_out = 1;
e2caaa1f 367
491d01d3 368 free (sec_list);
6f798e5c 369
906e58ca
NC
370 /* bfd_elf32_discard_info just plays with debugging sections,
371 ie. doesn't affect any code, so we can delay resizing the
372 sections. It's likely we'll resize everything in the process of
373 adding stubs. */
75938853
AM
374 ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
375 if (ret < 0)
376 {
377 einfo ("%X%P: .eh_frame/.stab edit: %E\n");
378 return;
379 }
380 else if (ret > 0)
906e58ca
NC
381 need_laying_out = 1;
382
383 /* If generating a relocatable output file, then we don't
384 have to examine the relocs. */
0e1862bb 385 if (stub_file != NULL && !bfd_link_relocatable (&link_info))
906e58ca 386 {
75938853 387 ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
906e58ca
NC
388 if (ret != 0)
389 {
390 if (ret < 0)
391 {
1a51c1a4 392 einfo ("%X%P: could not compute sections lists for stub generation: %E\n");
906e58ca
NC
393 return;
394 }
395
396 lang_for_each_statement (build_section_lists);
397
398 /* Call into the BFD backend to do the real work. */
399 if (! elf32_arm_size_stubs (link_info.output_bfd,
400 stub_file->the_bfd,
401 & link_info,
402 group_size,
403 & elf32_arm_add_stub_section,
404 & gldarm_layout_sections_again))
405 {
1a51c1a4 406 einfo ("%X%P: cannot size stub section: %E\n");
906e58ca
NC
407 return;
408 }
409 }
410 }
411
412 if (need_laying_out != -1)
413 gld${EMULATION_NAME}_map_segments (need_laying_out);
eaeb0a9d
AM
414}
415
416static void
417gld${EMULATION_NAME}_finish (void)
418{
419 struct bfd_link_hash_entry * h;
420
421 {
422 LANG_FOR_EACH_INPUT_STATEMENT (is)
423 {
424 /* Figure out where VFP11 erratum veneers (and the labels returning
425 from same) have been placed. */
426 bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
a504d23a
LA
427
428 /* Figure out where STM32L4XX erratum veneers (and the labels returning
429 from them) have been placed. */
430 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
eaeb0a9d
AM
431 }
432 }
906e58ca 433
0e1862bb 434 if (!bfd_link_relocatable (&link_info))
906e58ca
NC
435 {
436 /* Now build the linker stubs. */
437 if (stub_file->the_bfd->sections != NULL)
438 {
439 if (! elf32_arm_build_stubs (& link_info))
440 einfo ("%X%P: can not build stubs: %E\n");
441 }
442 }
443
444 finish_default ();
c56feb2b 445
68c39892 446 if (params.thumb_entry_symbol)
1d022697 447 {
68c39892 448 h = bfd_link_hash_lookup (link_info.hash, params.thumb_entry_symbol,
1d022697
PB
449 FALSE, FALSE, TRUE);
450 }
451 else
452 {
453 struct elf_link_hash_entry * eh;
454
455 if (!entry_symbol.name)
456 return;
457
458 h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
459 FALSE, FALSE, TRUE);
460 eh = (struct elf_link_hash_entry *)h;
39d911fc
TP
461 if (!h || ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
462 != ST_BRANCH_TO_THUMB)
1d022697
PB
463 return;
464 }
0c7a8e5a 465
6f798e5c
NC
466
467 if (h != (struct bfd_link_hash_entry *) NULL
468 && (h->type == bfd_link_hash_defined
469 || h->type == bfd_link_hash_defweak)
470 && h->u.def.section->output_section != NULL)
471 {
472 static char buffer[32];
88f7bcd5 473 bfd_vma val;
0c7a8e5a 474
88f7bcd5
NC
475 /* Special procesing is required for a Thumb entry symbol. The
476 bottom bit of its address must be set. */
477 val = (h->u.def.value
f13a99db 478 + bfd_get_section_vma (link_info.output_bfd,
88f7bcd5
NC
479 h->u.def.section->output_section)
480 + h->u.def.section->output_offset);
0c7a8e5a 481
88f7bcd5 482 val |= 1;
6f798e5c 483
88f7bcd5 484 /* Now convert this value into a string and store it in entry_symbol
0c7a8e5a 485 where the lang_finish() function will pick it up. */
88f7bcd5
NC
486 buffer[0] = '0';
487 buffer[1] = 'x';
0c7a8e5a 488
88f7bcd5 489 sprintf_vma (buffer + 2, val);
6f798e5c 490
68c39892 491 if (params.thumb_entry_symbol != NULL && entry_symbol.name != NULL
1d022697 492 && entry_from_cmdline)
88f7bcd5 493 einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
68c39892 494 params.thumb_entry_symbol, entry_symbol.name);
88f7bcd5 495 entry_symbol.name = buffer;
6f798e5c 496 }
88f7bcd5 497 else
6241fe3d 498 einfo (_("%P: warning: cannot find thumb start symbol %s\n"),
68c39892 499 params.thumb_entry_symbol);
6f798e5c
NC
500}
501
bf21ed78 502/* This is a convenient point to tell BFD about target specific flags.
3674e28a
PB
503 After the output has been created, but before inputs are read. */
504static void
505arm_elf_create_output_section_statements (void)
506{
b8976b05
NC
507 if (strstr (bfd_get_target (link_info.output_bfd), "arm") == NULL)
508 {
509 /* The arm backend needs special fields in the output hash structure.
510 These will only be created if the output format is an arm format,
511 hence we do not support linking and changing output formats at the
512 same time. Use a link followed by objcopy to change output formats. */
513 einfo ("%F%X%P: error: Cannot change output format whilst linking ARM binaries.\n");
514 return;
515 }
516
0955507f
TP
517 if (in_implib_filename)
518 {
68c39892
TP
519 params.in_implib_bfd = bfd_openr (in_implib_filename,
520 bfd_get_target (link_info.output_bfd));
0955507f 521
68c39892 522 if (params.in_implib_bfd == NULL)
0955507f
TP
523 einfo ("%F%s: Can't open: %E\n", in_implib_filename);
524
68c39892 525 if (!bfd_check_format (params.in_implib_bfd, bfd_object))
0955507f
TP
526 einfo ("%F%s: Not a relocatable file: %E\n", in_implib_filename);
527 }
0955507f 528
68c39892 529 bfd_elf32_arm_set_target_params (link_info.output_bfd, &link_info, &params);
906e58ca
NC
530
531 stub_file = lang_add_input_file ("linker stubs",
532 lang_input_file_is_fake_enum,
533 NULL);
534 stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
535 if (stub_file->the_bfd == NULL
536 || ! bfd_set_arch_mach (stub_file->the_bfd,
537 bfd_get_arch (link_info.output_bfd),
538 bfd_get_mach (link_info.output_bfd)))
539 {
540 einfo ("%X%P: can not create BFD %E\n");
541 return;
542 }
e2caaa1f 543
906e58ca
NC
544 stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
545 ldlang_add_file (stub_file);
3e6b1042
DJ
546
547 /* Also use the stub file for stubs placed in a single output section. */
548 bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
549 bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
906e58ca
NC
550}
551
552/* Avoid processing the fake stub_file in vercheck, stat_needed and
553 check_needed routines. */
554
555static void (*real_func) (lang_input_statement_type *);
556
557static void arm_for_each_input_file_wrapper (lang_input_statement_type *l)
558{
559 if (l != stub_file)
560 (*real_func) (l);
3674e28a
PB
561}
562
906e58ca
NC
563static void
564arm_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
565{
566 real_func = func;
567 lang_for_each_input_file (&arm_for_each_input_file_wrapper);
568}
569
570#define lang_for_each_input_file arm_lang_for_each_input_file
571
252b5132
RH
572EOF
573
41392f03
AM
574# Define some shell vars to insert bits of code into the standard elf
575# parse_args and list_options functions.
576#
577PARSE_AND_LIST_PROLOGUE='
578#define OPTION_THUMB_ENTRY 301
e489d0ae 579#define OPTION_BE8 302
9c504268
PB
580#define OPTION_TARGET1_REL 303
581#define OPTION_TARGET1_ABS 304
3674e28a 582#define OPTION_TARGET2 305
33bfe774
JB
583#define OPTION_FIX_V4BX 306
584#define OPTION_USE_BLX 307
c6dd86c6 585#define OPTION_VFP11_DENORM_FIX 308
bf21ed78 586#define OPTION_NO_ENUM_SIZE_WARNING 309
27e55c4d 587#define OPTION_PIC_VENEER 310
845b51d6 588#define OPTION_FIX_V4BX_INTERWORKING 311
8c45e5ec 589#define OPTION_STUBGROUP_SIZE 312
a9dc9481 590#define OPTION_NO_WCHAR_SIZE_WARNING 313
48229727
JB
591#define OPTION_FIX_CORTEX_A8 314
592#define OPTION_NO_FIX_CORTEX_A8 315
8c45e5ec 593#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
2de70689
MGD
594#define OPTION_FIX_ARM1176 317
595#define OPTION_NO_FIX_ARM1176 318
8c45e5ec 596#define OPTION_LONG_PLT 319
a504d23a 597#define OPTION_STM32L4XX_FIX 320
54ddd295 598#define OPTION_CMSE_IMPLIB 321
0955507f 599#define OPTION_IN_IMPLIB 322
41392f03 600'
252b5132 601
ef5bdbd1 602PARSE_AND_LIST_SHORTOPTS=p
252b5132 603
41392f03
AM
604PARSE_AND_LIST_LONGOPTS='
605 { "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
606 { "thumb-entry", required_argument, NULL, OPTION_THUMB_ENTRY},
e489d0ae 607 { "be8", no_argument, NULL, OPTION_BE8},
9c504268
PB
608 { "target1-rel", no_argument, NULL, OPTION_TARGET1_REL},
609 { "target1-abs", no_argument, NULL, OPTION_TARGET1_ABS},
3674e28a 610 { "target2", required_argument, NULL, OPTION_TARGET2},
319850b4 611 { "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
845b51d6 612 { "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
33bfe774 613 { "use-blx", no_argument, NULL, OPTION_USE_BLX},
c6dd86c6 614 { "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
a504d23a 615 { "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
bf21ed78 616 { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
27e55c4d 617 { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
906e58ca 618 { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
a9dc9481 619 { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
48229727
JB
620 { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
621 { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
85fdf906 622 { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
2de70689
MGD
623 { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
624 { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
1db37fe6 625 { "long-plt", no_argument, NULL, OPTION_LONG_PLT },
54ddd295 626 { "cmse-implib", no_argument, NULL, OPTION_CMSE_IMPLIB },
0955507f 627 { "in-implib", required_argument, NULL, OPTION_IN_IMPLIB },
41392f03 628'
252b5132 629
41392f03 630PARSE_AND_LIST_OPTIONS='
442996ee 631 fprintf (file, _(" --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"));
4a977a31 632 fprintf (file, _(" --be8 Output BE8 format image\n"));
f8266dc4
NC
633 fprintf (file, _(" --target1-rel Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
634 fprintf (file, _(" --target1-abs Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
442996ee
AM
635 fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
636 fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
845b51d6 637 fprintf (file, _(" --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer\n"));
442996ee
AM
638 fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
639 fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
a504d23a 640 fprintf (file, _(" --fix-stm32l4xx-629360 Specify how to fix STM32L4XX 629360 erratum\n"));
893dcb0e 641 fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
442996ee 642 " enum sizes\n"));
a272e28c 643 fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible\n"
a9dc9481 644 " wchar_t sizes\n"));
442996ee 645 fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
1db37fe6
YG
646 fprintf (file, _(" --long-plt Generate long .plt entries\n"
647 " to handle large .plt/.got displacements\n"));
54ddd295
TP
648 fprintf (file, _(" --cmse-implib Make import library to be a secure gateway import\n"
649 " library as per ARMv8-M Security Extensions\n"));
0955507f
TP
650 fprintf (file, _(" --in-implib Import library whose symbols address must\n"
651 " remain stable\n"));
906e58ca 652 fprintf (file, _("\
a272e28c
NC
653 --stub-group-size=N Maximum size of a group of input sections that\n\
654 can be handled by one stub section. A negative\n\
655 value locates all stubs after their branches\n\
656 (with a group size of -N), while a positive\n\
657 value allows two groups of input sections, one\n\
658 before, and one after each stub section.\n\
659 Values of +/-1 indicate the linker should\n\
660 choose suitable defaults.\n"));
48229727 661 fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
85fdf906 662 fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
2de70689 663 fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
41392f03 664'
252b5132 665
41392f03
AM
666PARSE_AND_LIST_ARGS_CASES='
667 case '\'p\'':
dea514f5 668 /* Only here for backwards compatibility. */
41392f03 669 break;
252b5132 670
41392f03 671 case OPTION_THUMB_ENTRY:
68c39892 672 params.thumb_entry_symbol = optarg;
41392f03 673 break;
e489d0ae
PB
674
675 case OPTION_BE8:
68c39892 676 params.byteswap_code = 1;
e489d0ae 677 break;
9c504268
PB
678
679 case OPTION_TARGET1_REL:
68c39892 680 params.target1_is_rel = 1;
9c504268
PB
681 break;
682
683 case OPTION_TARGET1_ABS:
68c39892 684 params.target1_is_rel = 0;
9c504268 685 break;
3674e28a
PB
686
687 case OPTION_TARGET2:
68c39892 688 params.target2_type = optarg;
3674e28a 689 break;
319850b4
JB
690
691 case OPTION_FIX_V4BX:
68c39892 692 params.fix_v4bx = 1;
319850b4 693 break;
33bfe774 694
845b51d6 695 case OPTION_FIX_V4BX_INTERWORKING:
68c39892 696 params.fix_v4bx = 2;
845b51d6
PB
697 break;
698
33bfe774 699 case OPTION_USE_BLX:
68c39892 700 params.use_blx = 1;
33bfe774 701 break;
92b93329 702
c6dd86c6
JB
703 case OPTION_VFP11_DENORM_FIX:
704 if (strcmp (optarg, "none") == 0)
68c39892 705 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
c6dd86c6 706 else if (strcmp (optarg, "scalar") == 0)
68c39892 707 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
c6dd86c6 708 else if (strcmp (optarg, "vector") == 0)
68c39892 709 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
c6dd86c6
JB
710 else
711 einfo (_("Unrecognized VFP11 fix type '\''%s'\''.\n"), optarg);
712 break;
bf21ed78 713
a504d23a
LA
714 case OPTION_STM32L4XX_FIX:
715 if (!optarg)
68c39892 716 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
a504d23a 717 else if (strcmp (optarg, "none") == 0)
68c39892 718 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
a504d23a 719 else if (strcmp (optarg, "default") == 0)
68c39892 720 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
a504d23a 721 else if (strcmp (optarg, "all") == 0)
68c39892 722 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
a504d23a
LA
723 else
724 einfo (_("Unrecognized STM32L4XX fix type '\''%s'\''.\n"), optarg);
725 break;
726
bf21ed78 727 case OPTION_NO_ENUM_SIZE_WARNING:
68c39892 728 params.no_enum_size_warning = 1;
bf21ed78 729 break;
27e55c4d 730
a9dc9481 731 case OPTION_NO_WCHAR_SIZE_WARNING:
68c39892 732 params.no_wchar_size_warning = 1;
a9dc9481
JM
733 break;
734
27e55c4d 735 case OPTION_PIC_VENEER:
68c39892 736 params.pic_veneer = 1;
27e55c4d 737 break;
906e58ca
NC
738
739 case OPTION_STUBGROUP_SIZE:
740 {
741 const char *end;
742
743 group_size = bfd_scan_vma (optarg, &end, 0);
744 if (*end)
745 einfo (_("%P%F: invalid number `%s'\''\n"), optarg);
746 }
747 break;
48229727
JB
748
749 case OPTION_FIX_CORTEX_A8:
68c39892 750 params.fix_cortex_a8 = 1;
48229727
JB
751 break;
752
753 case OPTION_NO_FIX_CORTEX_A8:
68c39892 754 params.fix_cortex_a8 = 0;
48229727 755 break;
85fdf906
AH
756
757 case OPTION_NO_MERGE_EXIDX_ENTRIES:
68c39892 758 params.merge_exidx_entries = 0;
2de70689 759 break;
85fdf906 760
2de70689 761 case OPTION_FIX_ARM1176:
68c39892 762 params.fix_arm1176 = 1;
2de70689
MGD
763 break;
764
765 case OPTION_NO_FIX_ARM1176:
68c39892 766 params.fix_arm1176 = 0;
2de70689 767 break;
1db37fe6
YG
768
769 case OPTION_LONG_PLT:
770 bfd_elf32_arm_use_long_plt ();
771 break;
54ddd295
TP
772
773 case OPTION_CMSE_IMPLIB:
68c39892 774 params.cmse_implib = 1;
54ddd295 775 break;
0955507f
TP
776
777 case OPTION_IN_IMPLIB:
778 in_implib_filename = optarg;
779 break;
41392f03 780'
252b5132 781
3e6b1042 782# We have our own before_allocation etc. functions, but they call
41392f03 783# the standard routines, so give them a different name.
41392f03 784LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
eaeb0a9d 785LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
3674e28a 786LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
252b5132 787
41392f03
AM
788# Replace the elf before_parse function with our own.
789LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
3940d2c3 790LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
252b5132 791
41392f03 792# Call the extra arm-elf function
906e58ca 793LDEMUL_FINISH=gld${EMULATION_NAME}_finish
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