Add linker relaxation support for the AVR
[deliverable/binutils-gdb.git] / ld / scripttempl / elfm68hc11.sc
CommitLineData
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1#
2# Unusual variables checked by this code:
563e308f 3# NOP - four byte opcode for no-op (defaults to 0)
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4# DATA_ADDR - if end-of-text-plus-one-page isn't right for data start
5# OTHER_READWRITE_SECTIONS - other than .data .bss .ctors .sdata ...
6# (e.g., .PARISC.global)
7# OTHER_SECTIONS - at the end
8# EXECUTABLE_SYMBOLS - symbols that must be defined for an
9# executable (e.g., _DYNAMIC_LINK)
10# TEXT_START_SYMBOLS - symbols that appear at the start of the
11# .text section.
12# DATA_START_SYMBOLS - symbols that appear at the start of the
13# .data section.
14# OTHER_BSS_SYMBOLS - symbols that appear at the start of the
15# .bss section besides __bss_start.
16# EMBEDDED - whether this is for an embedded system.
17#
18# When adding sections, do note that the names of some sections are used
19# when specifying the start address of the next.
20#
21test -z "$ENTRY" && ENTRY=_start
22test -z "${BIG_OUTPUT_FORMAT}" && BIG_OUTPUT_FORMAT=${OUTPUT_FORMAT}
23test -z "${LITTLE_OUTPUT_FORMAT}" && LITTLE_OUTPUT_FORMAT=${OUTPUT_FORMAT}
24if [ -z "$MACHINE" ]; then OUTPUT_ARCH=${ARCH}; else OUTPUT_ARCH=${ARCH}:${MACHINE}; fi
25test "$LD_FLAG" = "N" && DATA_ADDR=.
26
27CTOR=".ctors ${CONSTRUCTING-0} :
28 {
de0b1853 29 ${CONSTRUCTING+ PROVIDE (__CTOR_LIST__ = .); }
60bcf0fa 30 ${CONSTRUCTING+${CTOR_START}}
494fee87 31 KEEP (*(.ctors))
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32
33 ${CONSTRUCTING+${CTOR_END}}
de0b1853 34 ${CONSTRUCTING+ PROVIDE(__CTOR_END__ = .); }
ecfdd20c 35 } ${RELOCATING+ > ${TEXT_MEMORY}}"
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36
37DTOR=" .dtors ${CONSTRUCTING-0} :
38 {
de0b1853 39 ${CONSTRUCTING+ PROVIDE(__DTOR_LIST__ = .); }
494fee87 40 KEEP (*(.dtors))
de0b1853 41 ${CONSTRUCTING+ PROVIDE(__DTOR_END__ = .); }
ecfdd20c 42 } ${RELOCATING+ > ${TEXT_MEMORY}}"
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43
44
45VECTORS="
46 /* If the 'vectors_addr' symbol is defined, it indicates the start address
47 of interrupt vectors. This depends on the 68HC11 operating mode:
48
49 Addr
50 Single chip 0xffc0
51 Extended mode 0xffc0
52 Bootstrap 0x00c0
53 Test 0xbfc0
54
55 In general, the vectors address is 0xffc0. This can be overriden
56 with the '-defsym vectors_addr=0xbfc0' ld option.
57
58 Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
59 they are redirected to 0x00c0 by the internal PROM. Application's vectors
60 must also consist of jump instructions (see Motorola's manual). */
61
62 PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
63 .vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
64 {
e1026ffb 65 KEEP (*(.vectors))
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66 }"
67
68#
69# We provide two emulations: a fixed on that defines some memory banks
70# and a configurable one that includes a user provided memory definition.
71#
72case $GENERIC_BOARD in
73 yes|1|YES)
74 MEMORY_DEF="
75/* Get memory banks definition from some user configuration file.
76 This file must be located in some linker directory (search path
77 with -L<dir>). See fixed memory banks emulation script. */
78INCLUDE memory.x;
79"
80 ;;
81 *)
82MEMORY_DEF="
83/* Fixed definition of the available memory banks.
84 See generic emulation script for a user defined configuration. */
85MEMORY
86{
87 page0 (rwx) : ORIGIN = 0x0, LENGTH = 256
88 text (rx) : ORIGIN = ${ROM_START_ADDR}, LENGTH = ${ROM_SIZE}
89 data : ORIGIN = ${RAM_START_ADDR}, LENGTH = ${RAM_SIZE}
a66c0f2c 90 eeprom : ORIGIN = ${EEPROM_START_ADDR}, LENGTH = ${EEPROM_SIZE}
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91}
92
93/* Setup the stack on the top of the data memory bank. */
94PROVIDE (_stack = ${RAM_START_ADDR} + ${RAM_SIZE} - 1);
95"
96 ;;
97esac
98
99STARTUP_CODE="
100 /* Startup code. */
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101 KEEP (*(.install0)) /* Section should setup the stack pointer. */
102 KEEP (*(.install1)) /* Place holder for applications. */
103 KEEP (*(.install2)) /* Optional installation of data sections in RAM. */
104 KEEP (*(.install3)) /* Place holder for applications. */
105 KEEP (*(.install4)) /* Section that calls the main. */
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106"
107
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108FINISH_CODE="
109 /* Finish code. */
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110 KEEP (*(.fini0)) /* Beginning of finish code (_exit symbol). */
111 KEEP (*(.fini1)) /* Place holder for applications. */
112 KEEP (*(.fini2)) /* C++ destructors. */
113 KEEP (*(.fini3)) /* Place holder for applications. */
114 KEEP (*(.fini4)) /* Runtime exit. */
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115"
116
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117PRE_COMPUTE_DATA_SIZE="
118/* SCz: this does not work yet... This is supposed to force the loading
119 of _map_data.o (from libgcc.a) when the .data section is not empty.
120 By doing so, this should bring the code that copies the .data section
121 from ROM to RAM at init time.
122
123 ___pre_comp_data_size = SIZEOF(.data);
124 __install_data_sections = ___pre_comp_data_size > 0 ?
125 __map_data_sections : 0;
126*/
127"
128
129INSTALL_RELOC="
130 .install0 0 : { *(.install0) }
131 .install1 0 : { *(.install1) }
132 .install2 0 : { *(.install2) }
133 .install3 0 : { *(.install3) }
134 .install4 0 : { *(.install4) }
135"
136
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137FINISH_RELOC="
138 .fini0 0 : { *(.fini0) }
139 .fini1 0 : { *(.fini1) }
140 .fini2 0 : { *(.fini2) }
141 .fini3 0 : { *(.fini3) }
142 .fini4 0 : { *(.fini4) }
143"
144
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145BSS_DATA_RELOC="
146 .data1 0 : { *(.data1) }
147
148 /* We want the small data sections together, so single-instruction offsets
149 can access them all, and initialized data all before uninitialized, so
150 we can shorten the on-disk segment size. */
151 .sdata 0 : { *(.sdata) }
152 .sbss 0 : { *(.sbss) }
153 .scommon 0 : { *(.scommon) }
154"
155
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156SOFT_REGS_RELOC="
157 .softregs 0 : { *(.softregs) }
158"
159
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160cat <<EOF
161${RELOCATING+/* Linker script for 68HC11 executable (PROM). */}
162${RELOCATING-/* Linker script for 68HC11 object file (ld -r). */}
163
164OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
165 "${LITTLE_OUTPUT_FORMAT}")
166OUTPUT_ARCH(${OUTPUT_ARCH})
167ENTRY(${ENTRY})
168
169${RELOCATING+${LIB_SEARCH_DIRS}}
170${RELOCATING+${EXECUTABLE_SYMBOLS}}
171${RELOCATING+${MEMORY_DEF}}
172
173SECTIONS
174{
175 .hash ${RELOCATING-0} : { *(.hash) }
176 .dynsym ${RELOCATING-0} : { *(.dynsym) }
177 .dynstr ${RELOCATING-0} : { *(.dynstr) }
178 .gnu.version ${RELOCATING-0} : { *(.gnu.version) }
179 .gnu.version_d ${RELOCATING-0} : { *(.gnu.version_d) }
180 .gnu.version_r ${RELOCATING-0} : { *(.gnu.version_r) }
181
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182 .rel.text ${RELOCATING-0} :
183 {
184 *(.rel.text)
185 ${RELOCATING+*(.rel.text.*)}
186 ${RELOCATING+*(.rel.gnu.linkonce.t.*)}
187 }
188 .rela.text ${RELOCATING-0} :
189 {
190 *(.rela.text)
191 ${RELOCATING+*(.rela.text.*)}
192 ${RELOCATING+*(.rela.gnu.linkonce.t.*)}
193 }
194 .rel.data ${RELOCATING-0} :
195 {
196 *(.rel.data)
197 ${RELOCATING+*(.rel.data.*)}
198 ${RELOCATING+*(.rel.gnu.linkonce.d.*)}
199 }
200 .rela.data ${RELOCATING-0} :
201 {
202 *(.rela.data)
203 ${RELOCATING+*(.rela.data.*)}
204 ${RELOCATING+*(.rela.gnu.linkonce.d.*)}
205 }
206 .rel.rodata ${RELOCATING-0} :
207 {
208 *(.rel.rodata)
209 ${RELOCATING+*(.rel.rodata.*)}
210 ${RELOCATING+*(.rel.gnu.linkonce.r.*)}
211 }
212 .rela.rodata ${RELOCATING-0} :
213 {
214 *(.rela.rodata)
215 ${RELOCATING+*(.rela.rodata.*)}
216 ${RELOCATING+*(.rela.gnu.linkonce.r.*)}
217 }
218 .rel.sdata ${RELOCATING-0} :
219 {
220 *(.rel.sdata)
221 ${RELOCATING+*(.rel.sdata.*)}
222 ${RELOCATING+*(.rel.gnu.linkonce.s.*)}
223 }
224 .rela.sdata ${RELOCATING-0} :
225 {
226 *(.rela.sdata)
227 ${RELOCATING+*(.rela.sdata.*)}
228 ${RELOCATING+*(.rela.gnu.linkonce.s.*)}
229 }
230 .rel.sbss ${RELOCATING-0} :
231 {
232 *(.rel.sbss)
233 ${RELOCATING+*(.rel.sbss.*)}
234 ${RELOCATING+*(.rel.gnu.linkonce.sb.*)}
235 }
236 .rela.sbss ${RELOCATING-0} :
237 {
238 *(.rela.sbss)
239 ${RELOCATING+*(.rela.sbss.*)}
240 ${RELOCATING+*(.rel.gnu.linkonce.sb.*)}
241 }
242 .rel.bss ${RELOCATING-0} :
243 {
244 *(.rel.bss)
245 ${RELOCATING+*(.rel.bss.*)}
246 ${RELOCATING+*(.rel.gnu.linkonce.b.*)}
247 }
248 .rela.bss ${RELOCATING-0} :
249 {
250 *(.rela.bss)
251 ${RELOCATING+*(.rela.bss.*)}
252 ${RELOCATING+*(.rela.gnu.linkonce.b.*)}
253 }
1bf0a4d9 254 .rel.stext ${RELOCATING-0} : { *(.rel.stest) }
60bcf0fa 255 .rela.stext ${RELOCATING-0} : { *(.rela.stest) }
1bf0a4d9 256 .rel.etext ${RELOCATING-0} : { *(.rel.etest) }
60bcf0fa 257 .rela.etext ${RELOCATING-0} : { *(.rela.etest) }
1bf0a4d9 258 .rel.sdata ${RELOCATING-0} : { *(.rel.sdata) }
60bcf0fa 259 .rela.sdata ${RELOCATING-0} : { *(.rela.sdata) }
1bf0a4d9 260 .rel.edata ${RELOCATING-0} : { *(.rel.edata) }
60bcf0fa 261 .rela.edata ${RELOCATING-0} : { *(.rela.edata) }
1bf0a4d9 262 .rel.eit_v ${RELOCATING-0} : { *(.rel.eit_v) }
60bcf0fa 263 .rela.eit_v ${RELOCATING-0} : { *(.rela.eit_v) }
60bcf0fa 264 .rel.ebss ${RELOCATING-0} : { *(.rel.ebss) }
1bf0a4d9 265 .rela.ebss ${RELOCATING-0} : { *(.rela.ebss) }
60bcf0fa 266 .rel.srodata ${RELOCATING-0} : { *(.rel.srodata) }
1bf0a4d9 267 .rela.srodata ${RELOCATING-0} : { *(.rela.srodata) }
60bcf0fa 268 .rel.erodata ${RELOCATING-0} : { *(.rel.erodata) }
1bf0a4d9 269 .rela.erodata ${RELOCATING-0} : { *(.rela.erodata) }
60bcf0fa 270 .rel.got ${RELOCATING-0} : { *(.rel.got) }
1bf0a4d9 271 .rela.got ${RELOCATING-0} : { *(.rela.got) }
60bcf0fa 272 .rel.ctors ${RELOCATING-0} : { *(.rel.ctors) }
1bf0a4d9 273 .rela.ctors ${RELOCATING-0} : { *(.rela.ctors) }
60bcf0fa 274 .rel.dtors ${RELOCATING-0} : { *(.rel.dtors) }
1bf0a4d9 275 .rela.dtors ${RELOCATING-0} : { *(.rela.dtors) }
60bcf0fa 276 .rel.init ${RELOCATING-0} : { *(.rel.init) }
1bf0a4d9 277 .rela.init ${RELOCATING-0} : { *(.rela.init) }
60bcf0fa 278 .rel.fini ${RELOCATING-0} : { *(.rel.fini) }
1bf0a4d9 279 .rela.fini ${RELOCATING-0} : { *(.rela.fini) }
60bcf0fa 280 .rel.plt ${RELOCATING-0} : { *(.rel.plt) }
1bf0a4d9 281 .rela.plt ${RELOCATING-0} : { *(.rela.plt) }
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282
283 /* Concatenate .page0 sections. Put them in the page0 memory bank
284 unless we are creating a relocatable file. */
285 .page0 :
286 {
287 *(.page0)
a66c0f2c 288 ${RELOCATING+*(.softregs)}
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289 } ${RELOCATING+ > page0}
290
291 /* Start of text section. */
292 .stext ${RELOCATING-0} :
293 {
294 *(.stext)
295 } ${RELOCATING+ > ${TEXT_MEMORY}}
296
297 .init ${RELOCATING-0} :
298 {
299 *(.init)
300 } ${RELOCATING+=${NOP-0}}
301
302 ${RELOCATING-${INSTALL_RELOC}}
de0b1853 303 ${RELOCATING-${FINISH_RELOC}}
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304
305 .text ${RELOCATING-0}:
306 {
307 /* Put startup code at beginning so that _start keeps same address. */
308 ${RELOCATING+${STARTUP_CODE}}
309
310 ${RELOCATING+*(.init)}
311 *(.text)
de0b1853 312 ${RELOCATING+*(.text.*)}
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313 /* .gnu.warning sections are handled specially by elf32.em. */
314 *(.gnu.warning)
de0b1853 315 ${RELOCATING+*(.gnu.linkonce.t.*)}
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316 ${RELOCATING+*(.tramp)}
317 ${RELOCATING+*(.tramp.*)}
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318
319 ${RELOCATING+${FINISH_CODE}}
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320
321 ${RELOCATING+_etext = .;}
322 ${RELOCATING+PROVIDE (etext = .);}
323
324 } ${RELOCATING+ > ${TEXT_MEMORY}}
325
326 .eh_frame ${RELOCATING-0} :
327 {
24098abb 328 KEEP (*(.eh_frame))
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329 } ${RELOCATING+ > ${TEXT_MEMORY}}
330
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331 .gcc_except_table ${RELOCATING-0} :
332 {
333 *(.gcc_except_table)
334 } ${RELOCATING+ > ${TEXT_MEMORY}}
335
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336 .rodata ${RELOCATING-0} :
337 {
338 *(.rodata)
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339 ${RELOCATING+*(.rodata.*)}
340 ${RELOCATING+*(.gnu.linkonce.r*)}
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341 } ${RELOCATING+ > ${TEXT_MEMORY}}
342
343 .rodata1 ${RELOCATING-0} :
344 {
345 *(.rodata1)
346 } ${RELOCATING+ > ${TEXT_MEMORY}}
347
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348 /* Constructor and destructor tables are in ROM. */
349 ${RELOCATING+${CTOR}}
350 ${RELOCATING+${DTOR}}
351
24098abb
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352 .jcr ${RELOCATING-0} :
353 {
354 KEEP (*(.jcr))
355 } ${RELOCATING+ > ${TEXT_MEMORY}}
356
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357 /* Start of the data section image in ROM. */
358 ${RELOCATING+__data_image = .;}
359 ${RELOCATING+PROVIDE (__data_image = .);}
360
361 /* All read-only sections that normally go in PROM must be above.
362 We construct the DATA image section in PROM at end of all these
363 read-only sections. The data image must be copied at init time.
364 Refer to GNU ld, Section 3.6.8.2 Output Section LMA. */
365 .data ${RELOCATING-0} : ${RELOCATING+AT (__data_image)}
366 {
367 ${RELOCATING+__data_section_start = .;}
368 ${RELOCATING+PROVIDE (__data_section_start = .);}
369
370 ${RELOCATING+${DATA_START_SYMBOLS}}
371 ${RELOCATING+*(.sdata)}
372 *(.data)
de0b1853 373 ${RELOCATING+*(.data.*)}
60bcf0fa 374 ${RELOCATING+*(.data1)}
de0b1853 375 ${RELOCATING+*(.gnu.linkonce.d.*)}
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376 ${CONSTRUCTING+CONSTRUCTORS}
377
378 ${RELOCATING+_edata = .;}
379 ${RELOCATING+PROVIDE (edata = .);}
380 } ${RELOCATING+ > ${DATA_MEMORY}}
381
382 ${RELOCATING+__data_section_size = SIZEOF(.data);}
383 ${RELOCATING+PROVIDE (__data_section_size = SIZEOF(.data));}
384 ${RELOCATING+__data_image_end = __data_image + __data_section_size;}
385
386 ${RELOCATING+${PRE_COMPUTE_DATA_SIZE}}
387
388 /* .install ${RELOCATING-0}:
389 {
390 . = _data_image_end;
391 } ${RELOCATING+ > ${TEXT_MEMORY}} */
392
393 /* Relocation for some bss and data sections. */
394 ${RELOCATING-${BSS_DATA_RELOC}}
a66c0f2c 395 ${RELOCATING-${SOFT_REGS_RELOC}}
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396
397 .bss ${RELOCATING-0} :
398 {
399 ${RELOCATING+__bss_start = .;}
400 ${RELOCATING+*(.sbss)}
401 ${RELOCATING+*(.scommon)}
402
403 *(.dynbss)
404 *(.bss)
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405 ${RELOCATING+*(.bss.*)}
406 ${RELOCATING+*(.gnu.linkonce.b.*)}
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407 *(COMMON)
408 ${RELOCATING+PROVIDE (_end = .);}
409 } ${RELOCATING+ > ${DATA_MEMORY}}
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410 ${RELOCATING+__bss_size = SIZEOF(.bss);}
411 ${RELOCATING+PROVIDE (__bss_size = SIZEOF(.bss));}
60bcf0fa 412
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413 .eeprom ${RELOCATING-0} :
414 {
415 *(.eeprom)
416 *(.eeprom.*)
417 } ${RELOCATING+ > ${EEPROM_MEMORY}}
418
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419 ${RELOCATING+${VECTORS}}
420
421 /* Stabs debugging sections. */
422 .stab 0 : { *(.stab) }
423 .stabstr 0 : { *(.stabstr) }
424 .stab.excl 0 : { *(.stab.excl) }
425 .stab.exclstr 0 : { *(.stab.exclstr) }
426 .stab.index 0 : { *(.stab.index) }
427 .stab.indexstr 0 : { *(.stab.indexstr) }
428
429 .comment 0 : { *(.comment) }
430
431 /* DWARF debug sections.
432 Symbols in the DWARF debugging sections are relative to the beginning
433 of the section so we begin them at 0.
434 Treatment of DWARF debug section must be at end of the linker
435 script to avoid problems when there are undefined symbols. It's necessary
436 to avoid that the DWARF section is relocated before such undefined
437 symbols are found. */
438
439 /* DWARF 1 */
440 .debug 0 : { *(.debug) }
441 .line 0 : { *(.line) }
442
443 /* GNU DWARF 1 extensions */
444 .debug_srcinfo 0 : { *(.debug_srcinfo) }
445 .debug_sfnames 0 : { *(.debug_sfnames) }
446
447 /* DWARF 1.1 and DWARF 2 */
448 .debug_aranges 0 : { *(.debug_aranges) }
449 .debug_pubnames 0 : { *(.debug_pubnames) }
450
451 /* DWARF 2 */
3a9d486c 452 .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
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453 .debug_abbrev 0 : { *(.debug_abbrev) }
454 .debug_line 0 : { *(.debug_line) }
455 .debug_frame 0 : { *(.debug_frame) }
456 .debug_str 0 : { *(.debug_str) }
457 .debug_loc 0 : { *(.debug_loc) }
458 .debug_macinfo 0 : { *(.debug_macinfo) }
459}
460EOF
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