[deliverable/binutils-gdb.git] / ld / testsuite / ld-aarch64 / tlsle.s

	.section	.tbss,"awT",%nobits
a10:
	.zero   0x7fef
a7fff:
	.zero	0x1
a8000:
	.zero	0x7fff
affff:
	.zero	0x1
a10000:
	.zero	0x7ffeffff
a7fffffff:
	.zero	0x1
a80000000:
	.zero	0x7fff0000
affff0000:
	.zero	0x0000ffff
affffffff:
	.zero	0x1234
a100001233:
	.zero	0x123356787e78
a1234567890ab:
	.zero	0xa9866f55
a1234ffff0000:
	.zero	0xfffe
a1234fffffffe:
	.zero	0x6dcb00000003
a800000000001:
	.zero	0x7ffffffffffe
affffffffffff:
	.zero	0x1234

	.text
	movz	x0, #:tprel_g1:a10
	movk	x0, #:tprel_g0_nc:a10
	movz	x0, #:tprel_g1:a7fff
	movk	x0, #:tprel_g0_nc:a7fff
	movz	x0, #:tprel_g1:a8000
	movk	x0, #:tprel_g0_nc:a8000
	movz	x0, #:tprel_g1:affff
	movk	x0, #:tprel_g0_nc:affff
	movz	x0, #:tprel_g1:a10000
	movk	x0, #:tprel_g0_nc:a10000
	movz	x0, #:tprel_g1:a7fffffff
	movk	x0, #:tprel_g0_nc:a7fffffff
	movz	x0, #:tprel_g1:a80000000
	movk	x0, #:tprel_g0_nc:a80000000
	movz	x0, #:tprel_g1:affff0000
	movk	x0, #:tprel_g0_nc:affff0000
	movz	x0, #:tprel_g1:affffffff
	movk	x0, #:tprel_g0_nc:affffffff

	movz	x0, #:tprel_g2:a10
	movk	x0, #:tprel_g1_nc:a10
	movk	x0, #:tprel_g0_nc:a10
	movz	x0, #:tprel_g2:a7fff
	movk	x0, #:tprel_g1_nc:a7fff
	movk	x0, #:tprel_g0_nc:a7fff
	movz	x0, #:tprel_g2:a8000
	movk	x0, #:tprel_g1_nc:a8000
	movk	x0, #:tprel_g0_nc:a8000
	movz	x0, #:tprel_g2:affff
	movk	x0, #:tprel_g1_nc:affff
	movk	x0, #:tprel_g0_nc:affff
	movz	x0, #:tprel_g2:a10000
	movk	x0, #:tprel_g1_nc:a10000
	movk	x0, #:tprel_g0_nc:a10000
	movz	x0, #:tprel_g2:a7fffffff
	movk	x0, #:tprel_g1_nc:a7fffffff
	movk	x0, #:tprel_g0_nc:a7fffffff
	movz	x0, #:tprel_g2:a80000000
	movk	x0, #:tprel_g1_nc:a80000000
	movk	x0, #:tprel_g0_nc:a80000000
	movz	x0, #:tprel_g2:affff0000
	movk	x0, #:tprel_g1_nc:affff0000
	movk	x0, #:tprel_g0_nc:affff0000
	movz	x0, #:tprel_g2:affffffff
	movk	x0, #:tprel_g1_nc:affffffff
	movk	x0, #:tprel_g0_nc:affffffff
	movz	x0, #:tprel_g2:a100001233
	movk	x0, #:tprel_g1_nc:a100001233
	movk	x0, #:tprel_g0_nc:a100001233
	movz	x0, #:tprel_g2:a1234567890ab
	movk	x0, #:tprel_g1_nc:a1234567890ab
	movk	x0, #:tprel_g0_nc:a1234567890ab
	movz	x0, #:tprel_g2:a1234ffff0000
	movk	x0, #:tprel_g1_nc:a1234ffff0000
	movk	x0, #:tprel_g0_nc:a1234ffff0000
	movz	x0, #:tprel_g2:a1234fffffffe
	movk	x0, #:tprel_g1_nc:a1234fffffffe
	movk	x0, #:tprel_g0_nc:a1234fffffffe
	movz	x0, #:tprel_g2:a800000000001
	movk	x0, #:tprel_g1_nc:a800000000001
	movk	x0, #:tprel_g0_nc:a800000000001
	movz	x0, #:tprel_g2:affffffffffff
	movk	x0, #:tprel_g1_nc:affffffffffff
	movk	x0, #:tprel_g0_nc:affffffffffff
	ret
Commit	Line	Data
e09ab7ac RS	1	.section .tbss,"awT",%nobits
	2	a10:
	3	.zero 0x7fef
	4	a7fff:
	5	.zero 0x1
	6	a8000:
	7	.zero 0x7fff
	8	affff:
	9	.zero 0x1
	10	a10000:
	11	.zero 0x7ffeffff
	12	a7fffffff:
	13	.zero 0x1
	14	a80000000:
	15	.zero 0x7fff0000
	16	affff0000:
	17	.zero 0x0000ffff
	18	affffffff:
	19	.zero 0x1234
	20	a100001233:
	21	.zero 0x123356787e78
	22	a1234567890ab:
	23	.zero 0xa9866f55
	24	a1234ffff0000:
	25	.zero 0xfffe
	26	a1234fffffffe:
	27	.zero 0x6dcb00000003
	28	a800000000001:
	29	.zero 0x7ffffffffffe
	30	affffffffffff:
	31	.zero 0x1234
	32
	33	.text
	34	movz x0, #:tprel_g1:a10
	35	movk x0, #:tprel_g0_nc:a10
	36	movz x0, #:tprel_g1:a7fff
	37	movk x0, #:tprel_g0_nc:a7fff
	38	movz x0, #:tprel_g1:a8000
	39	movk x0, #:tprel_g0_nc:a8000
	40	movz x0, #:tprel_g1:affff
	41	movk x0, #:tprel_g0_nc:affff
	42	movz x0, #:tprel_g1:a10000
	43	movk x0, #:tprel_g0_nc:a10000
	44	movz x0, #:tprel_g1:a7fffffff
	45	movk x0, #:tprel_g0_nc:a7fffffff
	46	movz x0, #:tprel_g1:a80000000
	47	movk x0, #:tprel_g0_nc:a80000000
	48	movz x0, #:tprel_g1:affff0000
	49	movk x0, #:tprel_g0_nc:affff0000
	50	movz x0, #:tprel_g1:affffffff
	51	movk x0, #:tprel_g0_nc:affffffff
	52
	53	movz x0, #:tprel_g2:a10
	54	movk x0, #:tprel_g1_nc:a10
	55	movk x0, #:tprel_g0_nc:a10
	56	movz x0, #:tprel_g2:a7fff
	57	movk x0, #:tprel_g1_nc:a7fff
	58	movk x0, #:tprel_g0_nc:a7fff
	59	movz x0, #:tprel_g2:a8000
	60	movk x0, #:tprel_g1_nc:a8000
	61	movk x0, #:tprel_g0_nc:a8000
	62	movz x0, #:tprel_g2:affff
	63	movk x0, #:tprel_g1_nc:affff
	64	movk x0, #:tprel_g0_nc:affff
65	movz x0, #:tprel_g2:a10000
66	movk x0, #:tprel_g1_nc:a10000
67	movk x0, #:tprel_g0_nc:a10000
68	movz x0, #:tprel_g2:a7fffffff
69	movk x0, #:tprel_g1_nc:a7fffffff
70	movk x0, #:tprel_g0_nc:a7fffffff
71	movz x0, #:tprel_g2:a80000000
72	movk x0, #:tprel_g1_nc:a80000000
73	movk x0, #:tprel_g0_nc:a80000000
74	movz x0, #:tprel_g2:affff0000
75	movk x0, #:tprel_g1_nc:affff0000
76	movk x0, #:tprel_g0_nc:affff0000
77	movz x0, #:tprel_g2:affffffff
78	movk x0, #:tprel_g1_nc:affffffff
79	movk x0, #:tprel_g0_nc:affffffff
80	movz x0, #:tprel_g2:a100001233
81	movk x0, #:tprel_g1_nc:a100001233
82	movk x0, #:tprel_g0_nc:a100001233
83	movz x0, #:tprel_g2:a1234567890ab
84	movk x0, #:tprel_g1_nc:a1234567890ab
85	movk x0, #:tprel_g0_nc:a1234567890ab
86	movz x0, #:tprel_g2:a1234ffff0000
87	movk x0, #:tprel_g1_nc:a1234ffff0000
88	movk x0, #:tprel_g0_nc:a1234ffff0000
89	movz x0, #:tprel_g2:a1234fffffffe
90	movk x0, #:tprel_g1_nc:a1234fffffffe
91	movk x0, #:tprel_g0_nc:a1234fffffffe
92	movz x0, #:tprel_g2:a800000000001
93	movk x0, #:tprel_g1_nc:a800000000001
94	movk x0, #:tprel_g0_nc:a800000000001
95	movz x0, #:tprel_g2:affffffffffff
96	movk x0, #:tprel_g1_nc:affffffffffff
97	movk x0, #:tprel_g0_nc:affffffffffff
98	ret