Add support for a MIPS specific .MIPS.xhash section.
[deliverable/binutils-gdb.git] / ld / testsuite / ld-arc / arclinux-nps.d
CommitLineData
07ccf83c 1#source: arclinux-nps.s
0d0b0a37 2#as: -mcpu=arc700 -mnps400
07ccf83c
GM
3#ld: -marclinux_nps
4#objdump: -dr
5
6.*: +file format .*arc.*
7
8Disassembly of section .text:
9
10[0-9a-f]+ <.*>:
11 [0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
12 [0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
13 [0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
14 [0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
15 [0-9a-f]+: 200a 0f80 5800 0000 mov r0,0x58000000
16 [0-9a-f]+: 200a 0f80 5880 0000 mov r0,0x58800000
17 [0-9a-f]+: 200a 0f80 5900 0000 mov r0,0x59000000
18 [0-9a-f]+: 200a 0f80 5980 0000 mov r0,0x59800000
19 [0-9a-f]+: 200a 0f80 5a00 0000 mov r0,0x5a000000
20 [0-9a-f]+: 200a 0f80 5a80 0000 mov r0,0x5a800000
21 [0-9a-f]+: 200a 0f80 5b00 0000 mov r0,0x5b000000
22 [0-9a-f]+: 200a 0f80 5b80 0000 mov r0,0x5b800000
23 [0-9a-f]+: 200a 0f80 5c00 0000 mov r0,0x5c000000
24 [0-9a-f]+: 200a 0f80 5c80 0000 mov r0,0x5c800000
25 [0-9a-f]+: 200a 0f80 5d00 0000 mov r0,0x5d000000
26 [0-9a-f]+: 200a 0f80 5d80 0000 mov r0,0x5d800000
27 [0-9a-f]+: 200a 0f80 5e00 0000 mov r0,0x5e000000
28 [0-9a-f]+: 200a 0f80 5e80 0000 mov r0,0x5e800000
29 [0-9a-f]+: 200a 0f80 5f00 0000 mov r0,0x5f000000
30 [0-9a-f]+: 200a 0f80 5f80 0000 mov r0,0x5f800000
31 [0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
32 [0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
33 [0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
34 [0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
35 [0-9a-f]+: 200a 0f80 5800 0000 mov r0,0x58000000
36 [0-9a-f]+: 200a 0f80 5880 0000 mov r0,0x58800000
37 [0-9a-f]+: 200a 0f80 5900 0000 mov r0,0x59000000
38 [0-9a-f]+: 200a 0f80 5980 0000 mov r0,0x59800000
39 [0-9a-f]+: 200a 0f80 5a00 0000 mov r0,0x5a000000
40 [0-9a-f]+: 200a 0f80 5a80 0000 mov r0,0x5a800000
41 [0-9a-f]+: 200a 0f80 5b00 0000 mov r0,0x5b000000
42 [0-9a-f]+: 200a 0f80 5b80 0000 mov r0,0x5b800000
43 [0-9a-f]+: 200a 0f80 5c00 0000 mov r0,0x5c000000
44 [0-9a-f]+: 200a 0f80 5c80 0000 mov r0,0x5c800000
45 [0-9a-f]+: 200a 0f80 5d00 0000 mov r0,0x5d000000
46 [0-9a-f]+: 200a 0f80 5d80 0000 mov r0,0x5d800000
47 [0-9a-f]+: 200a 0f80 5e00 0000 mov r0,0x5e000000
48 [0-9a-f]+: 200a 0f80 5e80 0000 mov r0,0x5e800000
49 [0-9a-f]+: 200a 0f80 5f00 0000 mov r0,0x5f000000
50 [0-9a-f]+: 200a 0f80 5f80 0000 mov r0,0x5f800000
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