[deliverable/binutils-gdb.git] / ld / testsuite / ld-frv / tls-initial-shared-2.d

#name: FRV TLS relocs with addends, shared linking with static TLS
#source: tls-2.s
#as: --defsym static_tls=1
#objdump: -DR -j .text -j .got -j .plt
#ld: -shared tmpdir/tls-1-dep.so --version-script tls-1-shared.lds

.*:     file format elf.*frv.*

Disassembly of section \.plt:

00000464 <\.plt>:
 464:	92 c8 f0 5c 	ldi @\(gr15,92\),gr9
 468:	c0 3a 40 00 	bralr
 46c:	90 cc ff e8 	lddi @\(gr15,-24\),gr8
 470:	80 30 80 00 	jmpl @\(gr8,gr0\)
 474:	92 c8 f0 78 	ldi @\(gr15,120\),gr9
 478:	c0 3a 40 00 	bralr
 47c:	90 cc ff f8 	lddi @\(gr15,-8\),gr8
 480:	80 30 80 00 	jmpl @\(gr8,gr0\)
Disassembly of section \.text:

00000484 <_start>:
 484:	92 c8 f0 30 	ldi @\(gr15,48\),gr9
 488:	92 c8 f0 78 	ldi @\(gr15,120\),gr9
 48c:	92 c8 f0 4c 	ldi @\(gr15,76\),gr9
 490:	00 88 00 00 	nop\.p
 494:	80 88 00 00 	nop
 498:	92 c8 f0 70 	ldi @\(gr15,112\),gr9
 49c:	80 88 00 00 	nop
 4a0:	00 88 00 00 	nop\.p
 4a4:	80 88 00 00 	nop
 4a8:	92 c8 f0 7c 	ldi @\(gr15,124\),gr9
 4ac:	80 88 00 00 	nop
 4b0:	00 88 00 00 	nop\.p
 4b4:	80 88 00 00 	nop
 4b8:	92 c8 f0 8c 	ldi @\(gr15,140\),gr9
 4bc:	80 88 00 00 	nop
 4c0:	12 c8 f0 34 	ldi\.p @\(gr15,52\),gr9
 4c4:	80 88 00 00 	nop
 4c8:	80 88 00 00 	nop
 4cc:	12 c8 f0 3c 	ldi\.p @\(gr15,60\),gr9
 4d0:	80 88 00 00 	nop
 4d4:	80 88 00 00 	nop
 4d8:	12 c8 f0 50 	ldi\.p @\(gr15,80\),gr9
 4dc:	80 88 00 00 	nop
 4e0:	80 88 00 00 	nop
 4e4:	80 88 00 00 	nop
 4e8:	92 fc f8 14 	setlos 0xf*fffff814,gr9
 4ec:	80 88 00 00 	nop
 4f0:	92 fc 08 14 	setlos 0x814,gr9
 4f4:	92 f8 00 00 	sethi hi\(0x0\),gr9
 4f8:	92 f4 f8 14 	setlo 0xf814,gr9
 4fc:	92 c8 f0 54 	ldi @\(gr15,84\),gr9
 500:	92 c8 f0 5c 	ldi @\(gr15,92\),gr9
 504:	92 c8 f0 18 	ldi @\(gr15,24\),gr9
 508:	00 88 00 00 	nop\.p
 50c:	80 88 00 00 	nop
 510:	92 c8 f0 90 	ldi @\(gr15,144\),gr9
 514:	80 88 00 00 	nop
 518:	00 88 00 00 	nop\.p
 51c:	80 88 00 00 	nop
 520:	92 c8 f0 60 	ldi @\(gr15,96\),gr9
 524:	80 88 00 00 	nop
 528:	00 88 00 00 	nop\.p
 52c:	80 88 00 00 	nop
 530:	92 c8 f0 64 	ldi @\(gr15,100\),gr9
 534:	80 88 00 00 	nop
 538:	12 c8 f0 58 	ldi\.p @\(gr15,88\),gr9
 53c:	80 88 00 00 	nop
 540:	80 88 00 00 	nop
 544:	12 c8 f0 0c 	ldi\.p @\(gr15,12\),gr9
 548:	80 88 00 00 	nop
 54c:	80 88 00 00 	nop
 550:	12 c8 f0 1c 	ldi\.p @\(gr15,28\),gr9
 554:	80 88 00 00 	nop
 558:	80 88 00 00 	nop
 55c:	80 88 00 00 	nop
 560:	92 fc f8 24 	setlos 0xf*fffff824,gr9
 564:	80 88 00 00 	nop
 568:	92 fc 08 24 	setlos 0x824,gr9
 56c:	92 f8 00 00 	sethi hi\(0x0\),gr9
 570:	92 f4 f8 24 	setlo 0xf824,gr9
 574:	92 c8 f0 24 	ldi @\(gr15,36\),gr9
 578:	fe 3f ff c1 	call 47c <i\+0x46c>
 57c:	92 c8 f0 40 	ldi @\(gr15,64\),gr9
 580:	00 88 00 00 	nop\.p
 584:	80 88 00 00 	nop
 588:	92 c8 f0 68 	ldi @\(gr15,104\),gr9
 58c:	80 88 00 00 	nop
 590:	00 88 00 00 	nop\.p
 594:	80 88 00 00 	nop
 598:	92 c8 f0 80 	ldi @\(gr15,128\),gr9
 59c:	80 88 00 00 	nop
 5a0:	00 88 00 00 	nop\.p
 5a4:	80 88 00 00 	nop
 5a8:	92 c8 f0 84 	ldi @\(gr15,132\),gr9
 5ac:	80 88 00 00 	nop
 5b0:	12 c8 f0 28 	ldi\.p @\(gr15,40\),gr9
 5b4:	80 88 00 00 	nop
 5b8:	80 88 00 00 	nop
 5bc:	12 c8 f0 38 	ldi\.p @\(gr15,56\),gr9
 5c0:	80 88 00 00 	nop
 5c4:	80 88 00 00 	nop
 5c8:	12 c8 f0 44 	ldi\.p @\(gr15,68\),gr9
 5cc:	80 88 00 00 	nop
 5d0:	80 88 00 00 	nop
 5d4:	80 88 00 00 	nop
 5d8:	92 fc 00 04 	setlos 0x4,gr9
 5dc:	80 88 00 00 	nop
 5e0:	92 fc 10 04 	setlos 0x1004,gr9
 5e4:	92 f8 00 01 	sethi 0x1,gr9
 5e8:	92 f4 00 04 	setlo 0x4,gr9
 5ec:	92 c8 f0 2c 	ldi @\(gr15,44\),gr9
 5f0:	fe 3f ff 9f 	call 46c <i\+0x45c>
 5f4:	92 c8 f0 48 	ldi @\(gr15,72\),gr9
 5f8:	00 88 00 00 	nop\.p
 5fc:	80 88 00 00 	nop
 600:	92 c8 f0 6c 	ldi @\(gr15,108\),gr9
 604:	80 88 00 00 	nop
 608:	00 88 00 00 	nop\.p
 60c:	80 88 00 00 	nop
 610:	92 c8 f0 74 	ldi @\(gr15,116\),gr9
 614:	80 88 00 00 	nop
 618:	00 88 00 00 	nop\.p
 61c:	80 88 00 00 	nop
 620:	92 c8 f0 88 	ldi @\(gr15,136\),gr9
 624:	80 88 00 00 	nop
 628:	12 c8 f0 10 	ldi\.p @\(gr15,16\),gr9
 62c:	80 88 00 00 	nop
 630:	80 88 00 00 	nop
 634:	12 c8 f0 14 	ldi\.p @\(gr15,20\),gr9
 638:	80 88 00 00 	nop
 63c:	80 88 00 00 	nop
 640:	12 c8 f0 20 	ldi\.p @\(gr15,32\),gr9
 644:	80 88 00 00 	nop
 648:	80 88 00 00 	nop
 64c:	92 c8 f0 30 	ldi @\(gr15,48\),gr9
 650:	92 c8 f0 4c 	ldi @\(gr15,76\),gr9
 654:	92 c8 f0 54 	ldi @\(gr15,84\),gr9
 658:	92 c8 f0 18 	ldi @\(gr15,24\),gr9
 65c:	92 c8 f0 24 	ldi @\(gr15,36\),gr9
 660:	92 c8 f0 40 	ldi @\(gr15,64\),gr9
 664:	92 c8 f0 2c 	ldi @\(gr15,44\),gr9
 668:	92 c8 f0 48 	ldi @\(gr15,72\),gr9
 66c:	80 88 00 00 	nop
 670:	92 c8 f0 78 	ldi @\(gr15,120\),gr9
 674:	80 88 00 00 	nop
 678:	80 88 00 00 	nop
 67c:	92 c8 f0 5c 	ldi @\(gr15,92\),gr9
Disassembly of section \.got:

00004718 <_GLOBAL_OFFSET_TABLE_-0x20>:
    4718:	00 00 00 00 	add\.p gr0,gr0,gr0
			4718: R_FRV_TLSDESC_VALUE	\.tbss
    471c:	00 00 10 11 	add\.p sp,gr17,gr0
    4720:	00 00 00 00 	add\.p gr0,gr0,gr0
			4720: R_FRV_TLSDESC_VALUE	x
    4724:	00 00 10 01 	add\.p sp,sp,gr0
    4728:	00 00 00 00 	add\.p gr0,gr0,gr0
			4728: R_FRV_TLSDESC_VALUE	\.tbss
    472c:	00 00 10 01 	add\.p sp,sp,gr0
    4730:	00 00 00 00 	add\.p gr0,gr0,gr0
			4730: R_FRV_TLSDESC_VALUE	\.tbss
    4734:	00 00 17 f1 	\*unknown\*

00004738 <_GLOBAL_OFFSET_TABLE_>:
	\.\.\.
    4744:	00 00 10 13 	add\.p sp,gr19,gr0
			4744: R_FRV_TLSOFF	\.tbss
    4748:	00 00 00 03 	add\.p gr0,gr3,gr0
			4748: R_FRV_TLSOFF	x
    474c:	00 00 10 03 	add\.p sp,gr3,gr0
			474c: R_FRV_TLSOFF	x
    4750:	00 01 00 11 	add\.p gr16,gr17,gr0
			4750: R_FRV_TLSOFF	\.tbss
    4754:	00 01 00 13 	add\.p gr16,gr19,gr0
			4754: R_FRV_TLSOFF	\.tbss
    4758:	00 01 00 03 	add\.p gr16,gr3,gr0
			4758: R_FRV_TLSOFF	x
    475c:	00 00 07 f1 	\*unknown\*
			475c: R_FRV_TLSOFF	\.tbss
    4760:	00 00 07 f3 	\*unknown\*
			4760: R_FRV_TLSOFF	\.tbss
    4764:	00 00 00 01 	add\.p gr0,sp,gr0
			4764: R_FRV_TLSOFF	x
    4768:	00 00 00 01 	add\.p gr0,sp,gr0
			4768: R_FRV_TLSOFF	\.tbss
    476c:	00 00 00 03 	add\.p gr0,gr3,gr0
			476c: R_FRV_TLSOFF	\.tbss
    4770:	00 00 17 f3 	\*unknown\*
			4770: R_FRV_TLSOFF	\.tbss
    4774:	00 00 10 03 	add\.p sp,gr3,gr0
			4774: R_FRV_TLSOFF	\.tbss
    4778:	00 01 07 f1 	\*unknown\*
			4778: R_FRV_TLSOFF	\.tbss
    477c:	00 01 07 f3 	\*unknown\*
			477c: R_FRV_TLSOFF	\.tbss
    4780:	00 01 00 01 	add\.p gr16,sp,gr0
			4780: R_FRV_TLSOFF	x
    4784:	00 01 00 01 	add\.p gr16,sp,gr0
			4784: R_FRV_TLSOFF	\.tbss
    4788:	00 01 00 03 	add\.p gr16,gr3,gr0
			4788: R_FRV_TLSOFF	\.tbss
    478c:	00 00 00 11 	add\.p gr0,gr17,gr0
			478c: R_FRV_TLSOFF	\.tbss
    4790:	00 00 00 13 	add\.p gr0,gr19,gr0
			4790: R_FRV_TLSOFF	\.tbss
    4794:	00 00 10 11 	add\.p sp,gr17,gr0
			4794: R_FRV_TLSOFF	\.tbss
    4798:	00 00 10 12 	add\.p sp,gr18,gr0
			4798: R_FRV_TLSOFF	\.tbss
    479c:	00 01 00 12 	add\.p gr16,gr18,gr0
			479c: R_FRV_TLSOFF	\.tbss
    47a0:	00 00 07 f2 	\*unknown\*
			47a0: R_FRV_TLSOFF	\.tbss
    47a4:	00 00 00 02 	add\.p gr0,fp,gr0
			47a4: R_FRV_TLSOFF	x
    47a8:	00 00 00 02 	add\.p gr0,fp,gr0
			47a8: R_FRV_TLSOFF	\.tbss
    47ac:	00 00 10 02 	add\.p sp,fp,gr0
			47ac: R_FRV_TLSOFF	x
    47b0:	00 00 10 01 	add\.p sp,sp,gr0
			47b0: R_FRV_TLSOFF	\.tbss
    47b4:	00 00 10 02 	add\.p sp,fp,gr0
			47b4: R_FRV_TLSOFF	\.tbss
    47b8:	00 00 17 f2 	\*unknown\*
			47b8: R_FRV_TLSOFF	\.tbss
    47bc:	00 01 07 f2 	\*unknown\*
			47bc: R_FRV_TLSOFF	\.tbss
    47c0:	00 01 00 02 	add\.p gr16,fp,gr0
			47c0: R_FRV_TLSOFF	x
    47c4:	00 01 00 02 	add\.p gr16,fp,gr0
			47c4: R_FRV_TLSOFF	\.tbss
    47c8:	00 00 00 12 	add\.p gr0,gr18,gr0
			47c8: R_FRV_TLSOFF	\.tbss
Commit	Line	Data
90219bd0 AO	1	#name: FRV TLS relocs with addends, shared linking with static TLS
	2	#source: tls-2.s
	3	#as: --defsym static_tls=1
	4	#objdump: -DR -j .text -j .got -j .plt
	5	#ld: -shared tmpdir/tls-1-dep.so --version-script tls-1-shared.lds
	6
	7	.: file format elf.frv.*
	8
	9	Disassembly of section \.plt:
	10
	11	00000464 <\.plt>:
	12	464: 92 c8 f0 5c ldi @\(gr15,92\),gr9
	13	468: c0 3a 40 00 bralr
	14	46c: 90 cc ff e8 lddi @\(gr15,-24\),gr8
	15	470: 80 30 80 00 jmpl @\(gr8,gr0\)
	16	474: 92 c8 f0 78 ldi @\(gr15,120\),gr9
	17	478: c0 3a 40 00 bralr
	18	47c: 90 cc ff f8 lddi @\(gr15,-8\),gr8
	19	480: 80 30 80 00 jmpl @\(gr8,gr0\)
	20	Disassembly of section \.text:
	21
	22	00000484 <_start>:
	23	484: 92 c8 f0 30 ldi @\(gr15,48\),gr9
	24	488: 92 c8 f0 78 ldi @\(gr15,120\),gr9
	25	48c: 92 c8 f0 4c ldi @\(gr15,76\),gr9
	26	490: 00 88 00 00 nop\.p
	27	494: 80 88 00 00 nop
	28	498: 92 c8 f0 70 ldi @\(gr15,112\),gr9
	29	49c: 80 88 00 00 nop
	30	4a0: 00 88 00 00 nop\.p
	31	4a4: 80 88 00 00 nop
	32	4a8: 92 c8 f0 7c ldi @\(gr15,124\),gr9
	33	4ac: 80 88 00 00 nop
	34	4b0: 00 88 00 00 nop\.p
	35	4b4: 80 88 00 00 nop
	36	4b8: 92 c8 f0 8c ldi @\(gr15,140\),gr9
	37	4bc: 80 88 00 00 nop
	38	4c0: 12 c8 f0 34 ldi\.p @\(gr15,52\),gr9
	39	4c4: 80 88 00 00 nop
	40	4c8: 80 88 00 00 nop
	41	4cc: 12 c8 f0 3c ldi\.p @\(gr15,60\),gr9
	42	4d0: 80 88 00 00 nop
	43	4d4: 80 88 00 00 nop
	44	4d8: 12 c8 f0 50 ldi\.p @\(gr15,80\),gr9
	45	4dc: 80 88 00 00 nop
	46	4e0: 80 88 00 00 nop
	47	4e4: 80 88 00 00 nop
	48	4e8: 92 fc f8 14 setlos 0xf*fffff814,gr9
	49	4ec: 80 88 00 00 nop
	50	4f0: 92 fc 08 14 setlos 0x814,gr9
	51	4f4: 92 f8 00 00 sethi hi\(0x0\),gr9
	52	4f8: 92 f4 f8 14 setlo 0xf814,gr9
	53	4fc: 92 c8 f0 54 ldi @\(gr15,84\),gr9
	54	500: 92 c8 f0 5c ldi @\(gr15,92\),gr9
	55	504: 92 c8 f0 18 ldi @\(gr15,24\),gr9
	56	508: 00 88 00 00 nop\.p
	57	50c: 80 88 00 00 nop
	58	510: 92 c8 f0 90 ldi @\(gr15,144\),gr9
	59	514: 80 88 00 00 nop
	60	518: 00 88 00 00 nop\.p
	61	51c: 80 88 00 00 nop
	62	520: 92 c8 f0 60 ldi @\(gr15,96\),gr9
	63	524: 80 88 00 00 nop
	64	528: 00 88 00 00 nop\.p
65	52c: 80 88 00 00 nop
66	530: 92 c8 f0 64 ldi @\(gr15,100\),gr9
67	534: 80 88 00 00 nop
68	538: 12 c8 f0 58 ldi\.p @\(gr15,88\),gr9
69	53c: 80 88 00 00 nop
70	540: 80 88 00 00 nop
71	544: 12 c8 f0 0c ldi\.p @\(gr15,12\),gr9
72	548: 80 88 00 00 nop
73	54c: 80 88 00 00 nop
74	550: 12 c8 f0 1c ldi\.p @\(gr15,28\),gr9
75	554: 80 88 00 00 nop
76	558: 80 88 00 00 nop
77	55c: 80 88 00 00 nop
78	560: 92 fc f8 24 setlos 0xf*fffff824,gr9
79	564: 80 88 00 00 nop
80	568: 92 fc 08 24 setlos 0x824,gr9
81	56c: 92 f8 00 00 sethi hi\(0x0\),gr9
82	570: 92 f4 f8 24 setlo 0xf824,gr9
83	574: 92 c8 f0 24 ldi @\(gr15,36\),gr9
84	578: fe 3f ff c1 call 47c <i\+0x46c>
85	57c: 92 c8 f0 40 ldi @\(gr15,64\),gr9
86	580: 00 88 00 00 nop\.p
87	584: 80 88 00 00 nop
88	588: 92 c8 f0 68 ldi @\(gr15,104\),gr9
89	58c: 80 88 00 00 nop
90	590: 00 88 00 00 nop\.p
91	594: 80 88 00 00 nop
92	598: 92 c8 f0 80 ldi @\(gr15,128\),gr9
93	59c: 80 88 00 00 nop
94	5a0: 00 88 00 00 nop\.p
95	5a4: 80 88 00 00 nop
96	5a8: 92 c8 f0 84 ldi @\(gr15,132\),gr9
97	5ac: 80 88 00 00 nop
98	5b0: 12 c8 f0 28 ldi\.p @\(gr15,40\),gr9
99	5b4: 80 88 00 00 nop
100	5b8: 80 88 00 00 nop
101	5bc: 12 c8 f0 38 ldi\.p @\(gr15,56\),gr9
102	5c0: 80 88 00 00 nop
103	5c4: 80 88 00 00 nop
104	5c8: 12 c8 f0 44 ldi\.p @\(gr15,68\),gr9
105	5cc: 80 88 00 00 nop
106	5d0: 80 88 00 00 nop
107	5d4: 80 88 00 00 nop
108	5d8: 92 fc 00 04 setlos 0x4,gr9
109	5dc: 80 88 00 00 nop
110	5e0: 92 fc 10 04 setlos 0x1004,gr9
111	5e4: 92 f8 00 01 sethi 0x1,gr9
112	5e8: 92 f4 00 04 setlo 0x4,gr9
113	5ec: 92 c8 f0 2c ldi @\(gr15,44\),gr9
114	5f0: fe 3f ff 9f call 46c <i\+0x45c>
115	5f4: 92 c8 f0 48 ldi @\(gr15,72\),gr9
116	5f8: 00 88 00 00 nop\.p
117	5fc: 80 88 00 00 nop
118	600: 92 c8 f0 6c ldi @\(gr15,108\),gr9
119	604: 80 88 00 00 nop
120	608: 00 88 00 00 nop\.p
121	60c: 80 88 00 00 nop
122	610: 92 c8 f0 74 ldi @\(gr15,116\),gr9
123	614: 80 88 00 00 nop
124	618: 00 88 00 00 nop\.p
125	61c: 80 88 00 00 nop
126	620: 92 c8 f0 88 ldi @\(gr15,136\),gr9
127	624: 80 88 00 00 nop
128	628: 12 c8 f0 10 ldi\.p @\(gr15,16\),gr9
129	62c: 80 88 00 00 nop
130	630: 80 88 00 00 nop
131	634: 12 c8 f0 14 ldi\.p @\(gr15,20\),gr9
132	638: 80 88 00 00 nop
133	63c: 80 88 00 00 nop
134	640: 12 c8 f0 20 ldi\.p @\(gr15,32\),gr9
135	644: 80 88 00 00 nop
136	648: 80 88 00 00 nop
137	64c: 92 c8 f0 30 ldi @\(gr15,48\),gr9
138	650: 92 c8 f0 4c ldi @\(gr15,76\),gr9
139	654: 92 c8 f0 54 ldi @\(gr15,84\),gr9
140	658: 92 c8 f0 18 ldi @\(gr15,24\),gr9
141	65c: 92 c8 f0 24 ldi @\(gr15,36\),gr9
142	660: 92 c8 f0 40 ldi @\(gr15,64\),gr9
143	664: 92 c8 f0 2c ldi @\(gr15,44\),gr9
144	668: 92 c8 f0 48 ldi @\(gr15,72\),gr9
145	66c: 80 88 00 00 nop
146	670: 92 c8 f0 78 ldi @\(gr15,120\),gr9
147	674: 80 88 00 00 nop
148	678: 80 88 00 00 nop
149	67c: 92 c8 f0 5c ldi @\(gr15,92\),gr9
150	Disassembly of section \.got:
151
152	00004718 <_GLOBAL_OFFSET_TABLE_-0x20>:
153	4718: 00 00 00 00 add\.p gr0,gr0,gr0
154	4718: R_FRV_TLSDESC_VALUE \.tbss
155	471c: 00 00 10 11 add\.p sp,gr17,gr0
156	4720: 00 00 00 00 add\.p gr0,gr0,gr0
157	4720: R_FRV_TLSDESC_VALUE x
158	4724: 00 00 10 01 add\.p sp,sp,gr0
159	4728: 00 00 00 00 add\.p gr0,gr0,gr0
160	4728: R_FRV_TLSDESC_VALUE \.tbss
161	472c: 00 00 10 01 add\.p sp,sp,gr0
162	4730: 00 00 00 00 add\.p gr0,gr0,gr0
163	4730: R_FRV_TLSDESC_VALUE \.tbss
164	4734: 00 00 17 f1 \unknown\
165
166	00004738 <_GLOBAL_OFFSET_TABLE_>:
167	\.\.\.
168	4744: 00 00 10 13 add\.p sp,gr19,gr0
169	4744: R_FRV_TLSOFF \.tbss
170	4748: 00 00 00 03 add\.p gr0,gr3,gr0
171	4748: R_FRV_TLSOFF x
172	474c: 00 00 10 03 add\.p sp,gr3,gr0
173	474c: R_FRV_TLSOFF x
174	4750: 00 01 00 11 add\.p gr16,gr17,gr0
175	4750: R_FRV_TLSOFF \.tbss
176	4754: 00 01 00 13 add\.p gr16,gr19,gr0
177	4754: R_FRV_TLSOFF \.tbss
178	4758: 00 01 00 03 add\.p gr16,gr3,gr0
179	4758: R_FRV_TLSOFF x
180	475c: 00 00 07 f1 \unknown\
181	475c: R_FRV_TLSOFF \.tbss
182	4760: 00 00 07 f3 \unknown\
183	4760: R_FRV_TLSOFF \.tbss
184	4764: 00 00 00 01 add\.p gr0,sp,gr0
185	4764: R_FRV_TLSOFF x
186	4768: 00 00 00 01 add\.p gr0,sp,gr0
187	4768: R_FRV_TLSOFF \.tbss
188	476c: 00 00 00 03 add\.p gr0,gr3,gr0
189	476c: R_FRV_TLSOFF \.tbss
190	4770: 00 00 17 f3 \unknown\
191	4770: R_FRV_TLSOFF \.tbss
192	4774: 00 00 10 03 add\.p sp,gr3,gr0
193	4774: R_FRV_TLSOFF \.tbss
194	4778: 00 01 07 f1 \unknown\
195	4778: R_FRV_TLSOFF \.tbss
196	477c: 00 01 07 f3 \unknown\
197	477c: R_FRV_TLSOFF \.tbss
198	4780: 00 01 00 01 add\.p gr16,sp,gr0
199	4780: R_FRV_TLSOFF x
200	4784: 00 01 00 01 add\.p gr16,sp,gr0
201	4784: R_FRV_TLSOFF \.tbss
202	4788: 00 01 00 03 add\.p gr16,gr3,gr0
203	4788: R_FRV_TLSOFF \.tbss
204	478c: 00 00 00 11 add\.p gr0,gr17,gr0
205	478c: R_FRV_TLSOFF \.tbss
206	4790: 00 00 00 13 add\.p gr0,gr19,gr0
207	4790: R_FRV_TLSOFF \.tbss
208	4794: 00 00 10 11 add\.p sp,gr17,gr0
209	4794: R_FRV_TLSOFF \.tbss
210	4798: 00 00 10 12 add\.p sp,gr18,gr0
211	4798: R_FRV_TLSOFF \.tbss
212	479c: 00 01 00 12 add\.p gr16,gr18,gr0
213	479c: R_FRV_TLSOFF \.tbss
214	47a0: 00 00 07 f2 \unknown\
215	47a0: R_FRV_TLSOFF \.tbss
216	47a4: 00 00 00 02 add\.p gr0,fp,gr0
217	47a4: R_FRV_TLSOFF x
218	47a8: 00 00 00 02 add\.p gr0,fp,gr0
219	47a8: R_FRV_TLSOFF \.tbss
220	47ac: 00 00 10 02 add\.p sp,fp,gr0
221	47ac: R_FRV_TLSOFF x
222	47b0: 00 00 10 01 add\.p sp,sp,gr0
223	47b0: R_FRV_TLSOFF \.tbss
224	47b4: 00 00 10 02 add\.p sp,fp,gr0
225	47b4: R_FRV_TLSOFF \.tbss
226	47b8: 00 00 17 f2 \unknown\
227	47b8: R_FRV_TLSOFF \.tbss
228	47bc: 00 01 07 f2 \unknown\
229	47bc: R_FRV_TLSOFF \.tbss
230	47c0: 00 01 00 02 add\.p gr16,fp,gr0
231	47c0: R_FRV_TLSOFF x
232	47c4: 00 01 00 02 add\.p gr16,fp,gr0
233	47c4: R_FRV_TLSOFF \.tbss
234	47c8: 00 00 00 12 add\.p gr0,gr18,gr0
235	47c8: R_FRV_TLSOFF \.tbss