Commit | Line | Data |
---|---|---|
e9f53129 | 1 | #source: ovl.s |
53d25da6 | 2 | #ld: -N -T ovl1.lnk -T ovl.lnk --emit-relocs |
706d7558 | 3 | #objdump: -D -r |
e9f53129 AM |
4 | |
5 | .*elf32-spu | |
6 | ||
7 | Disassembly of section \.text: | |
8 | ||
9 | 00000100 <_start>: | |
47f6dab9 AM |
10 | .* ai \$1,\$1,-32 |
11 | .* xor \$0,\$0,\$0 | |
12 | .* stqd \$0,0\(\$1\) | |
13 | .* stqd \$0,16\(\$1\) | |
14 | .* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.* | |
15 | .*SPU_REL16 f1_a1 | |
16 | .* brsl \$0,.* <00000000\.ovl_call\.f2_a1>.* | |
17 | .*SPU_REL16 f2_a1 | |
18 | .* brsl \$0,.* <00000000\.ovl_call\.f1_a2>.* | |
19 | .*SPU_REL16 f1_a2 | |
bbb0fc04 | 20 | .* ila \$9,.* |
47f6dab9 AM |
21 | .*SPU_ADDR18 f2_a2 |
22 | .* bisl \$0,\$9 | |
23 | .* ai \$1,\$1,32 # 20 | |
24 | .* br 100 <_start> # 100 | |
25 | .*SPU_REL16 _start | |
e9f53129 AM |
26 | |
27 | 0000012c <f0>: | |
47f6dab9 AM |
28 | .* bi \$0 |
29 | ||
bbb0fc04 AM |
30 | #... |
31 | [0-9a-f]+ <__ovly_return>: | |
32 | #... | |
33 | [0-9a-f]+ <__ovly_load>: | |
34 | #... | |
35 | [0-9a-f]+ <_ovly_debug_event>: | |
36 | #... | |
37 | 00000330 <00000000\.ovl_call\.f1_a1>: | |
47f6dab9 AM |
38 | .* ila \$78,1 |
39 | .* lnop | |
40 | .* ila \$79,1024 # 400 | |
cd4a7468 | 41 | .* bra? .* <__ovly_load>.* |
47f6dab9 | 42 | |
bbb0fc04 | 43 | 00000340 <00000000\.ovl_call\.f2_a1>: |
47f6dab9 AM |
44 | .* ila \$78,1 |
45 | .* lnop | |
46 | .* ila \$79,1028 # 404 | |
cd4a7468 | 47 | .* bra? .* <__ovly_load>.* |
47f6dab9 | 48 | |
bbb0fc04 | 49 | 00000350 <00000000.ovl_call.f1_a2>: |
47f6dab9 AM |
50 | .* ila \$78,2 |
51 | .* lnop | |
52 | .* ila \$79,1024 # 400 | |
cd4a7468 | 53 | .* bra? .* <__ovly_load>.* |
47f6dab9 | 54 | |
bbb0fc04 | 55 | 00000360 <00000000\.ovl_call\.f2_a2>: |
47f6dab9 AM |
56 | .* ila \$78,2 |
57 | .* lnop | |
58 | .* ila \$79,1060 # 424 | |
cd4a7468 | 59 | .* bra? .* <__ovly_load>.* |
47f6dab9 | 60 | |
bbb0fc04 | 61 | 00000370 <00000000\.ovl_call\.f4_a1>: |
47f6dab9 AM |
62 | .* ila \$78,1 |
63 | .* lnop | |
64 | .* ila \$79,1040 # 410 | |
cd4a7468 | 65 | .* bra? .* <__ovly_load>.* |
47f6dab9 | 66 | |
bbb0fc04 | 67 | 00000380 <00000000.ovl_call.14:8>: |
47f6dab9 AM |
68 | .* ila \$78,2 |
69 | .* lnop | |
70 | .* ila \$79,1076 # 434 | |
cd4a7468 | 71 | .* bra? .* <__ovly_load>.* |
47f6dab9 | 72 | |
bbb0fc04 AM |
73 | #00000330 <00000000\.ovl_call\.f1_a1>: |
74 | #.* bra?sl \$75,.* <__ovly_load>.* | |
75 | #.*00 04 04 00.* | |
76 | # | |
77 | #00000338 <00000000\.ovl_call\.f2_a1>: | |
78 | #.* bra?sl \$75,.* <__ovly_load>.* | |
79 | #.*00 04 04 04.* | |
80 | # | |
81 | #00000340 <00000000\.ovl_call\.f1_a2>: | |
82 | #.* bra?sl \$75,.* <__ovly_load>.* | |
83 | #.*00 08 04 00.* | |
84 | # | |
85 | #00000348 <00000000\.ovl_call\.f2_a2>: | |
86 | #.* bra?sl \$75,.* <__ovly_load>.* | |
87 | #.*00 08 04 24.* | |
88 | # | |
89 | #00000350 <00000000\.ovl_call\.f4_a1>: | |
90 | #.* bra?sl \$75,.* <__ovly_load>.* | |
91 | #.*00 04 04 10.* | |
92 | # | |
93 | #00000358 <00000000.ovl_call.14:8>: | |
94 | #.* bra?sl \$75,.* <__ovly_load>.* | |
95 | #.*00 08 04 34.* | |
96 | ||
e9f53129 AM |
97 | Disassembly of section \.ov_a1: |
98 | ||
99 | 00000400 <f1_a1>: | |
47f6dab9 AM |
100 | .* br .* <f3_a1>.* |
101 | .*SPU_REL16 f3_a1 | |
e9f53129 AM |
102 | |
103 | 00000404 <f2_a1>: | |
bbb0fc04 | 104 | .* ila \$3,.* |
47f6dab9 AM |
105 | .*SPU_ADDR18 f4_a1 |
106 | .* bi \$0 | |
e9f53129 AM |
107 | |
108 | 0000040c <f3_a1>: | |
47f6dab9 | 109 | .* bi \$0 |
e9f53129 AM |
110 | |
111 | 00000410 <f4_a1>: | |
47f6dab9 | 112 | .* bi \$0 |
e9f53129 AM |
113 | \.\.\. |
114 | Disassembly of section \.ov_a2: | |
115 | ||
116 | 00000400 <f1_a2>: | |
47f6dab9 AM |
117 | .* stqd \$0,16\(\$1\) |
118 | .* stqd \$1,-32\(\$1\) | |
119 | .* ai \$1,\$1,-32 | |
120 | .* brsl \$0,12c <f0> # 12c | |
121 | .*SPU_REL16 f0 | |
bbb0fc04 | 122 | .* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.* |
47f6dab9 | 123 | .*SPU_REL16 f1_a1 |
bbb0fc04 | 124 | .* brsl \$0,.* <f3_a2>.* |
47f6dab9 AM |
125 | .*SPU_REL16 f3_a2 |
126 | .* lqd \$0,48\(\$1\) # 30 | |
127 | .* ai \$1,\$1,32 # 20 | |
128 | .* bi \$0 | |
e9f53129 AM |
129 | |
130 | 00000424 <f2_a2>: | |
bbb0fc04 | 131 | .* ilhu \$3,.* |
47f6dab9 | 132 | .*SPU_ADDR16_HI f4_a2 |
bbb0fc04 | 133 | .* iohl \$3,.* |
47f6dab9 AM |
134 | .*SPU_ADDR16_LO f4_a2 |
135 | .* bi \$0 | |
e9f53129 AM |
136 | |
137 | 00000430 <f3_a2>: | |
47f6dab9 | 138 | .* bi \$0 |
e9f53129 AM |
139 | |
140 | 00000434 <f4_a2>: | |
47f6dab9 AM |
141 | .* br .* <f3_a2>.* |
142 | .*SPU_REL16 f3_a2 | |
e9f53129 AM |
143 | \.\.\. |
144 | Disassembly of section .data: | |
145 | ||
47f6dab9 | 146 | 00000440 <_ovly_table-0x10>: |
ea696b7b AM |
147 | 440: 00 00 00 00 .* |
148 | 444: 00 00 00 01 .* | |
47f6dab9 | 149 | \.\.\. |
47f6dab9 | 150 | 00000450 <_ovly_table>: |
e9f53129 | 151 | 450: 00 00 04 00 .* |
47f6dab9 AM |
152 | 454: 00 00 00 20 .* |
153 | # 458: 00 00 03 40 .* | |
b1295757 | 154 | 458: 00 00 03 90 .* |
ea696b7b | 155 | 45c: 00 00 00 01 .* |
47f6dab9 AM |
156 | 460: 00 00 04 00 .* |
157 | 464: 00 00 00 40 .* | |
158 | # 468: 00 00 03 60 .* | |
b1295757 | 159 | 468: 00 00 03 b0 .* |
ea696b7b | 160 | 46c: 00 00 00 01 .* |
47f6dab9 AM |
161 | |
162 | 00000470 <_ovly_buf_table>: | |
ea696b7b | 163 | 470: 00 00 00 00 .* |
e9f53129 | 164 | |
e9f53129 AM |
165 | Disassembly of section \.toe: |
166 | ||
47f6dab9 | 167 | 00000480 <_EAR_>: |
e9f53129 AM |
168 | \.\.\. |
169 | Disassembly of section \.note\.spu_name: | |
170 | ||
171 | .* <\.note\.spu_name>: | |
172 | .*: 00 00 00 08 .* | |
173 | .*: 00 00 00 0c .* | |
174 | .*: 00 00 00 01 .* | |
175 | .*: 53 50 55 4e .* | |
176 | .*: 41 4d 45 00 .* | |
177 | .*: 74 6d 70 64 .* | |
178 | .*: 69 72 2f 64 .* | |
179 | .*: 75 6d 70 00 .* |