[deliverable/binutils-gdb.git] / ld / testsuite / ld-spu / ovl2.d

#source: ovl2.s
#ld: -N -T ovl2.lnk -T ovl.lnk --emit-relocs
#objdump: -D -r

.*elf32-spu

Disassembly of section \.text:

00000100 <_start>:
.*	brsl	\$0,.* <00000000\.ovl_call\.f1_a1>.*
.*SPU_REL16	f1_a1
.*	brsl	\$0,.* <00000000\.ovl_call\.10:4>.*
.*SPU_REL16	setjmp
.*	br	100 <_start>	# 100
.*SPU_REL16	_start

0000010c <setjmp>:
.*	bi	\$0

00000110 <longjmp>:
.*	bi	\$0
.*

#00000118 <00000000\.ovl_call.f1_a1>:
#.*	brsl	\$75,.* <__ovly_load>.*
#.*00 04 04 00.*
#
#00000120 <00000000\.ovl_call.10:4>:
#.*	brsl	\$75,.* <__ovly_load>.*
#.*00 00 01 0c.*
#
#00000128 <_SPUEAR_f1_a2>:
#.*	brsl	\$75,.* <__ovly_load>.*
#.*00 08 04 00.*

00000120 <00000000\.ovl_call.f1_a1>:
.*	ila	\$78,1
.*	lnop
.*	ila	\$79,1024	# 400
.*	br	.* <__ovly_load>.*

00000130 <00000000\.ovl_call.10:4>:
.*	ila	\$78,0
.*	lnop
.*	ila	\$79,268	# 10c
.*	br	.* <__ovly_load>.*

00000140 <_SPUEAR_f1_a2>:
.*	ila	\$78,2
.*	lnop
.*	ila	\$79,1024	# 400
.*	br	.* <__ovly_load>.*

#...
Disassembly of section \.ov_a1:

00000400 <f1_a1>:
 400:	35 00 00 00 	bi	\$0
	\.\.\.
Disassembly of section \.ov_a2:

00000400 <f1_a2>:
 400:	32 7f a2 00 	br	110 <longjmp>	# 110
			400: SPU_REL16	longjmp
	\.\.\.
Disassembly of section \.data:

00000410 <_ovly_table-0x10>:
	\.\.\.
 41c:	00 00 00 01 	.*
00000420 <_ovly_table>:
 420:	00 00 04 00 	.*
 424:	00 00 00 10 	.*
# 428:	00 00 03 10 	.*
 428:	00 00 03 30 	.*
 42c:	00 00 00 02 	.*
 430:	00 00 04 00 	.*
 434:	00 00 00 10 	.*
# 438:	00 00 03 20 	.*
 438:	00 00 03 40 	.*
 43c:	00 00 00 02 	.*

00000440 <_ovly_buf_table>:
	\.\.\.

Disassembly of section \.toe:

00000450 <_EAR_>:
	\.\.\.
Disassembly of section \.note\.spu_name:

.* <\.note\.spu_name>:
.*:	00 00 00 08 .*
.*:	00 00 00 0c .*
.*:	00 00 00 01 .*
.*:	53 50 55 4e .*
.*:	41 4d 45 00 .*
.*:	74 6d 70 64 .*
.*:	69 72 2f 64 .*
.*:	75 6d 70 00 .*
Commit	Line	Data
0fd7d342	1	#source: ovl2.s
53d25da6	2	#ld: -N -T ovl2.lnk -T ovl.lnk --emit-relocs
0fd7d342 AM	3	#objdump: -D -r
	4
	5	.*elf32-spu
	6
	7	Disassembly of section \.text:
	8
	9	00000100 <_start>:
47f6dab9 AM	10	.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
	11	.*SPU_REL16 f1_a1
	12	.* brsl \$0,.* <00000000\.ovl_call\.10:4>.*
	13	.*SPU_REL16 setjmp
	14	.* br 100 <_start> # 100
	15	.*SPU_REL16 _start
0fd7d342 AM	16
0fd7d342 AM	17	0000010c <setjmp>:
47f6dab9	18	.* bi \$0
0fd7d342 AM	19
0fd7d342 AM	20	00000110 <longjmp>:
47f6dab9 AM	21	.* bi \$0
	22	.*
	23
	24	#00000118 <00000000\.ovl_call.f1_a1>:
	25	#.* brsl \$75,.* <__ovly_load>.*
	26	#.00 04 04 00.
	27	#
	28	#00000120 <00000000\.ovl_call.10:4>:
	29	#.* brsl \$75,.* <__ovly_load>.*
	30	#.00 00 01 0c.
	31	#
	32	#00000128 <_SPUEAR_f1_a2>:
	33	#.* brsl \$75,.* <__ovly_load>.*
	34	#.00 08 04 00.
	35
	36	00000120 <00000000\.ovl_call.f1_a1>:
	37	.* ila \$78,1
	38	.* lnop
	39	.* ila \$79,1024 # 400
	40	.* br .* <__ovly_load>.*
	41
	42	00000130 <00000000\.ovl_call.10:4>:
	43	.* ila \$78,0
	44	.* lnop
	45	.* ila \$79,268 # 10c
	46	.* br .* <__ovly_load>.*
0fd7d342	47
c1b2796f	48	00000140 <_SPUEAR_f1_a2>:
47f6dab9 AM	49	.* ila \$78,2
	50	.* lnop
	51	.* ila \$79,1024 # 400
	52	.* br .* <__ovly_load>.*
	53
0fd7d342 AM	54	#...
	55	Disassembly of section \.ov_a1:
	56
	57	00000400 <f1_a1>:
	58	400: 35 00 00 00 bi \$0
	59	\.\.\.
	60	Disassembly of section \.ov_a2:
	61
c1b2796f	62	00000400 <f1_a2>:
0fd7d342 AM	63	400: 32 7f a2 00 br 110 <longjmp> # 110
	64	400: SPU_REL16 longjmp
	65	\.\.\.
	66	Disassembly of section \.data:
	67
47f6dab9 AM	68	00000410 <_ovly_table-0x10>:
47f6dab9 AM	69	\.\.\.
0fd7d342	70	41c: 00 00 00 01 .*
47f6dab9	71	00000420 <_ovly_table>:
0fd7d342 AM	72	420: 00 00 04 00 .*
0fd7d342 AM	73	424: 00 00 00 10 .*
47f6dab9 AM	74	# 428: 00 00 03 10 .*
	75	428: 00 00 03 30 .*
	76	42c: 00 00 00 02 .*
	77	430: 00 00 04 00 .*
	78	434: 00 00 00 10 .*
	79	# 438: 00 00 03 20 .*
	80	438: 00 00 03 40 .*
	81	43c: 00 00 00 02 .*
	82
	83	00000440 <_ovly_buf_table>:
	84	\.\.\.
0fd7d342	85
0fd7d342 AM	86	Disassembly of section \.toe:
0fd7d342 AM	87
47f6dab9	88	00000450 <_EAR_>:
0fd7d342 AM	89	\.\.\.
	90	Disassembly of section \.note\.spu_name:
	91
	92	.* <\.note\.spu_name>:
	93	.: 00 00 00 08 .
	94	.: 00 00 00 0c .
	95	.: 00 00 00 01 .
	96	.: 53 50 55 4e .
	97	.: 41 4d 45 00 .
	98	.: 74 6d 70 64 .
	99	.: 69 72 2f 64 .
	100	.: 75 6d 70 00 .