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Rename ms1 to mt, part 1
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
4970f871
NS		 12005-12-12 Nathan Sidwell <nathan@codesourcery.com>
2
3 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
4 * Makefile.in: Rebuilt.
5 * configure.in: Replace ms1 files with mt files.
6 * configure: Rebuilt.
7
272c9217
JB		 82005-12-08 Jan Beulich <jbeulich@novell.com>
9
10 * i386-dis.c (MAXLEN): Reduce to architectural limit.
11 (fetch_data): Check for sufficient buffer size.
12
422673a9
JB		 132005-12-08 Jan Beulich <jbeulich@novell.com>
14
15 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
16
6e50d963
AM		 172005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
18
19 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
20
cf54500c
HPN		 212005-12-07 Hans-Peter Nilsson <hp@axis.com>
22
23 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
24 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
25
cb712a9e
L		 262005-12-06 H.J. Lu <hongjiu.lu@intel.com>
27
28 PR gas/1874
29 * i386-dis.c (address_mode): New enum type.
30 (address_mode): New variable.
31 (mode_64bit): Removed.
32 (ckprefix): Updated to check address_mode instead of mode_64bit.
33 (prefix_name): Likewise.
34 (print_insn): Likewise.
35 (putop): Likewise.
36 (print_operand_value): Likewise.
37 (intel_operand_size): Likewise.
38 (OP_E): Likewise.
39 (OP_G): Likewise.
40 (set_op): Likewise.
41 (OP_REG): Likewise.
42 (OP_I): Likewise.
43 (OP_I64): Likewise.
44 (OP_OFF): Likewise.
45 (OP_OFF64): Likewise.
46 (ptr_reg): Likewise.
47 (OP_C): Likewise.
48 (SVME_Fixup): Likewise.
49 (print_insn): Set address_mode.
50 (PNI_Fixup): Add 64bit and address size override support for
51 monitor and mwait.
52
cdedc9f0
HPN		 532005-12-06 Hans-Peter Nilsson <hp@axis.com>
54
55 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
56 (print_with_operands): Check for prefix when [PC+] is seen.
57
3609e0fe
DB		 582005-12-02 Dave Brolley <brolley@redhat.com>
59
60 * configure.in (cgen_files): Add cgen-bitset.lo.
61 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
62 * Makefile.am (CFILES): Add cgen-bitset.c.
63 (ALL_MACHINES): Add cgen-bitset.lo.
64 (cgen-bitset.lo): New target.
6e50d963
AM		 65 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
66 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
67 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
3609e0fe
DB		 68 (cgen_bitset_union): Moved from here ...
69 * cgen-bitset.c: ... to here. New file.
70 * Makefile.in: Regenerated.
71 * configure: Regenerated.
72
aa2273ba
JW		 732005-11-22 James E Wilson <wilson@specifix.com>
74
75 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
76 opcode_fprintf_vma): New.
77 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
78
ce7a772b
AM		 792005-11-16 Alan Modra <amodra@bigpond.net.au>
80
81 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
82 frsqrtes.
83
0499d65b
TS		 842005-11-14 David Ung <davidu@mips.com>
85
86 * mips16-opc.c: Add MIPS16e save/restore opcodes.
87 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
88 codes for save/restore.
89
dc82c973
AS		 902005-11-10 Andreas Schwab <schwab@suse.de>
91
92 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
93 coprocessor ID 1.
94
dbb33a87
NC		 952005-11-08 H.J. Lu <hongjiu.lu@intel.com>
96
97 * m32c-desc.c: Regenerated.
98
6f84a2a6
NS		 992005-11-08 Nathan Sidwell <nathan@codesourcery.com>
100
101 Add ms2.
102 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
103 ms1-opc.c, ms1-opc.h: Regenerated.
104
a541e3ce
SE		 1052005-11-07 Steve Ellcey <sje@cup.hp.com>
106
107 * configure: Regenerate after modifying bfd/warning.m4.
108
3e7d61b2
AM		 1092005-11-07 Alan Modra <amodra@bigpond.net.au>
110
111 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
112 ignored rex prefixes here.
113 (print_insn): Instead, handle them similarly to fwait followed
114 by non-fp insns.
115
a92e0d0a
L		 1162005-11-02 H.J. Lu <hongjiu.lu@intel.com>
117
118 * iq2000-desc.c: Regenerated.
119 * iq2000-desc.h: Likewise.
120 * iq2000-dis.c: Likewise.
121 * iq2000-opc.c: Likewise.
122
36b0c57d
PB		 1232005-11-02 Paul Brook <paul@codesourcery.com>
124
125 * arm-dis.c (print_insn_thumb32): Word align blx target address.
126
9a2ff3f5
AM		 1272005-10-31 Alan Modra <amodra@bigpond.net.au>
128
129 * arm-dis.c (print_insn): Warning fix.
130
9e5169a8
L		 1312005-10-30 H.J. Lu <hongjiu.lu@intel.com>
132
133 * Makefile.am: Run "make dep-am".
134 * Makefile.in: Regenerated.
135
136 * dep-in.sed: Replace " ./" with " ".
137
fb53f5a8
DB		 1382005-10-28 Dave Brolley <brolley@redhat.com>
139
140 * All CGEN-generated sources: Regenerate.
141
142 Contribute the following changes:
143 2005-09-19 Dave Brolley <brolley@redhat.com>
144
145 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
146 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
147 bfd_arch_m32c case.
148
149 2005-02-16 Dave Brolley <brolley@redhat.com>
150
151 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
152 cgen_isa_mask_* to cgen_bitset_*.
153 * cgen-opc.c: Likewise.
154
155 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
156
157 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
158 * *-dis.c: Regenerate.
159
160 2003-06-05 DJ Delorie <dj@redhat.com>
161
162 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
163 it, as it may point to a reused buffer. Set prev_isas when we
164 change cpus.
165
166 2002-12-13 Dave Brolley <brolley@redhat.com>
167
168 * cgen-opc.c (cgen_isa_mask_create): New support function for
169 CGEN_ISA_MASK.
170 (cgen_isa_mask_init): Ditto.
171 (cgen_isa_mask_clear): Ditto.
172 (cgen_isa_mask_add): Ditto.
173 (cgen_isa_mask_set): Ditto.
174 (cgen_isa_supported): Ditto.
175 (cgen_isa_mask_compare): Ditto.
176 (cgen_isa_mask_intersection): Ditto.
177 (cgen_isa_mask_copy): Ditto.
178 (cgen_isa_mask_combine): Ditto.
179 * cgen-dis.in (libiberty.h): #include it.
180 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
181 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
182 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
183 * Makefile.in: Regenerated.
184
c6552317
DD		 1852005-10-27 DJ Delorie <dj@redhat.com>
186
187 * m32c-asm.c: Regenerate.
188 * m32c-desc.c: Regenerate.
189 * m32c-desc.h: Regenerate.
190 * m32c-dis.c: Regenerate.
191 * m32c-ibld.c: Regenerate.
192 * m32c-opc.c: Regenerate.
193 * m32c-opc.h: Regenerate.
194
f75eb1c0
DD		 1952005-10-26 DJ Delorie <dj@redhat.com>
196
197 * m32c-asm.c: Regenerate.
198 * m32c-desc.c: Regenerate.
199 * m32c-desc.h: Regenerate.
200 * m32c-dis.c: Regenerate.
201 * m32c-ibld.c: Regenerate.
202 * m32c-opc.c: Regenerate.
203 * m32c-opc.h: Regenerate.
204
f1022c90
PB		 2052005-10-26 Paul Brook <paul@codesourcery.com>
206
207 * arm-dis.c (arm_opcodes): Correct "sel" entry.
208
e277c00b
AM		 2092005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
210
211 * m32r-asm.c: Regenerate.
212
92e0a941
DD		 2132005-10-25 DJ Delorie <dj@redhat.com>
214
215 * m32c-asm.c: Regenerate.
216 * m32c-desc.c: Regenerate.
217 * m32c-desc.h: Regenerate.
218 * m32c-dis.c: Regenerate.
219 * m32c-ibld.c: Regenerate.
220 * m32c-opc.c: Regenerate.
221 * m32c-opc.h: Regenerate.
222
3c9b82ba
NC		 2232005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
224
225 * configure.in: Add target architecture bfd_arch_z80.
226 * configure: Regenerated.
3e7d61b2 227 * disassemble.c (disassembler)<ARCH_z80>: Add case
3c9b82ba
NC		 228 bfd_arch_z80.
229 * z80-dis.c: New file.
230
3caac5b8
AM		 2312005-10-25 Alan Modra <amodra@bigpond.net.au>
232
233 * po/POTFILES.in: Regenerate.
234 * po/opcodes.pot: Regenerate.
235
6a2375c6
JB		 2362005-10-24 Jan Beulich <jbeulich@novell.com>
237
238 * ia64-asmtab.c: Regenerate.
239
a1a280bb
DD		 2402005-10-21 DJ Delorie <dj@redhat.com>
241
242 * m32c-asm.c: Regenerate.
243 * m32c-desc.c: Regenerate.
244 * m32c-desc.h: Regenerate.
245 * m32c-dis.c: Regenerate.
246 * m32c-ibld.c: Regenerate.
247 * m32c-opc.c: Regenerate.
248 * m32c-opc.h: Regenerate.
249
b7d48530
NC		 2502005-10-21 Nick Clifton <nickc@redhat.com>
251
252 * bfin-dis.c: Tidy up code, removing redundant constructs.
253
8dd744b6
MS		 2542005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
255
256 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
257 instructions.
258
e74eb924
NC		 2592005-10-18 Nick Clifton <nickc@redhat.com>
260
261 * m32r-asm.c: Regenerate after updating m32r.opc.
262
471e4e36
JZ		 2632005-10-18 Jie Zhang <jie.zhang@analog.com>
264
265 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
266 reading instruction from memory.
267
5e03663f
NC		 2682005-10-18 Nick Clifton <nickc@redhat.com>
269
270 * m32r-asm.c: Regenerate after updating m32r.opc.
271
ab7c9a26
NC		 2722005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
273
274 * m32r-asm.c: Regenerate after updating m32r.opc.
275
19590ef7
RE		 2762005-10-08 James Lemke <jim@wasabisystems.com>
277
278 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
279 operations.
280
6edfbbad
DJ		 2812005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
282
283 * ppc-dis.c (struct dis_private): Remove.
284 (powerpc_dialect): Avoid aliasing warnings.
285 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
286
095f2843
NC		 2872005-09-30 Nick Clifton <nickc@redhat.com>
288
289 * po/ga.po: New Irish translation.
290 * configure.in (ALL_LINGUAS): Add "ga".
291 * configure: Regenerate.
292
fdd3b9b3
L		 2932005-09-30 H.J. Lu <hongjiu.lu@intel.com>
294
295 * Makefile.am: Run "make dep-am".
296 * Makefile.in: Regenerated.
297 * aclocal.m4: Likewise.
298 * configure: Likewise.
299
4b7f6baa
CM		 3002005-09-30 Catherine Moore <clm@cm00re.com>
301
302 * Makefile.am: Bfin support.
303 * Makefile.in: Regenerated.
304 * aclocal.m4: Regenerated.
305 * bfin-dis.c: New file.
306 * configure.in: Bfin support.
307 * configure: Regenerated.
308 * disassemble.c (ARCH_bfin): Define.
309 (disassembler): Add case for bfd_arch_bfin.
310
1a114b12
JB		 3112005-09-28 Jan Beulich <jbeulich@novell.com>
312
313 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
314 (indirEv): Use it.
315 (stackEv): New.
316 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
317 (dis386): Document and use new 'V' meta character. Use it for
318 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
319 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
320 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
321 data prefix as used whenever DFLAG was examined. Handle 'V'.
322 (intel_operand_size): Use stack_v_mode.
323 (OP_E): Use stack_v_mode, but handle only the special case of
324 64-bit mode without operand size override here; fall through to
325 v_mode case otherwise.
326 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
327 and no operand size override is present.
328 (OP_J): Use get32s for obtaining the displacement also when rex64
329 is present.
330
3eb17e6b
PB		 3312005-09-08 Paul Brook <paul@codesourcery.com>
332
333 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
334
61cc0267
CF		 3352005-09-06 Chao-ying Fu <fu@mips.com>
336
337 * mips-opc.c (MT32): New define.
338 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
339 bottom to avoid opcode collision with "mftr" and "mttr".
340 Add MT instructions.
341 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
342 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
343 formats.
344
b13dd07a
PB		 3452005-09-02 Paul Brook <paul@codesourcery.com>
346
347 * arm-dis.c (coprocessor_opcodes): Add null terminator.
348
8f06b2d8
PB		 3492005-09-02 Paul Brook <paul@codesourcery.com>
350
351 * arm-dis.c (coprocessor_opcodes): New.
352 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
353 (print_insn_coprocessor): New function.
354 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
355 format characters.
356 (print_insn_thumb32): Use print_insn_coprocessor.
357
a2dfd01f
PB		 3582005-08-30 Paul Brook <paul@codesourcery.com>
359
360 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
361
3f31e633
JB		 3622005-08-26 Jan Beulich <jbeulich@novell.com>
363
364 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
365 re-use.
366 (OP_E): Call intel_operand_size, move call site out of mode
367 dependent code.
368 (OP_OFF): Call intel_operand_size if suffix_always. Remove
369 ATTRIBUTE_UNUSED from parameters.
370 (OP_OFF64): Likewise.
371 (OP_ESreg): Call intel_operand_size.
372 (OP_DSreg): Likewise.
373 (OP_DIR): Use colon rather than semicolon as separator of far
374 jump/call operands.
375
fd25c5a9
CF		 3762005-08-25 Chao-ying Fu <fu@mips.com>
377
378 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
379 (mips_builtin_opcodes): Add DSP instructions.
380 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
381 mips64, mips64r2.
382 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
383 operand formats.
384
dd8b7c22
DU		 3852005-08-23 David Ung <davidu@mips.com>
386
387 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
3e7d61b2 388 instructions to the table.
dd8b7c22 389
c17ae8a2
AM		 3902005-08-18 Alan Modra <amodra@bigpond.net.au>
391
848cf006 392 * a29k-dis.c: Delete.
c17ae8a2
AM		 393 * Makefile.am: Remove a29k support.
394 * configure.in: Likewise.
395 * disassemble.c: Likewise.
396 * Makefile.in: Regenerate.
397 * configure: Regenerate.
398 * po/POTFILES.in: Regenerate.
399
36ae0db3
DJ		 4002005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
401
402 * ppc-dis.c (powerpc_dialect): Handle e300.
403 (print_ppc_disassembler_options): Likewise.
404 * ppc-opc.c (PPCE300): Define.
405 (powerpc_opcodes): Mark icbt as available for the e300.
406
63a3357b
DA		 4072005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
408
409 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
410 Use "rp" instead of "%r2" in "b,l" insns.
411
ad101263
MS		 4122005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
413
414 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
415 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
416 (main): Likewise.
417 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
418 and 4 bit optional masks.
419 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
420 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
421 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
422 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
423 (s390_opformats): Likewise.
424 * s390-opc.txt: Add new instructions for cpu type z9-109.
425
f1fa1093
DA		 4262005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
427
428 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
429
e9f89963
PB		 4302005-07-29 Paul Brook <paul@codesourcery.com>
431
432 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
433
92e90b6e
PB		 4342005-07-29 Paul Brook <paul@codesourcery.com>
435
436 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
437 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
438
fd54057a
DD		 4392005-07-25 DJ Delorie <dj@redhat.com>
440
441 * m32c-asm.c Regenerate.
442 * m32c-dis.c Regenerate.
443
760c0f6a
DD		 4442005-07-20 DJ Delorie <dj@redhat.com>
445
446 * disassemble.c (disassemble_init_for_target): M32C ISAs are
447 enums, so convert them to bit masks, which attributes are.
448
85da3a56
NC		 4492005-07-18 Nick Clifton <nickc@redhat.com>
450
451 * configure.in: Restore alpha ordering to list of arches.
452 * configure: Regenerate.
453 * disassemble.c: Restore alpha ordering to list of arches.
454
4552005-07-18 Nick Clifton <nickc@redhat.com>
456
457 * m32c-asm.c: Regenerate.
458 * m32c-desc.c: Regenerate.
459 * m32c-desc.h: Regenerate.
460 * m32c-dis.c: Regenerate.
461 * m32c-ibld.h: Regenerate.
462 * m32c-opc.c: Regenerate.
463 * m32c-opc.h: Regenerate.
464
22cbf2e7
L		 4652005-07-18 H.J. Lu <hongjiu.lu@intel.com>
466
467 * i386-dis.c (PNI_Fixup): Update comment.
468 (VMX_Fixup): Properly handle the suffix check.
469
0aea0460
DA		 4702005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
471
472 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
473 mfctl disassembly.
474
0f82ff91
AM		 4752005-07-16 Alan Modra <amodra@bigpond.net.au>
476
477 * Makefile.am: Run "make dep-am".
478 (stamp-m32c): Fix cpu dependencies.
479 * Makefile.in: Regenerate.
480 * ip2k-dis.c: Regenerate.
481
90700ea2
L		 4822007-07-15 H.J. Lu <hongjiu.lu@intel.com>
483
484 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
485 (VMX_Fixup): New. Fix up Intel VMX Instructions.
486 (Em): New.
487 (Gm): New.
488 (VM): New.
489 (dis386_twobyte): Updated entries 0x78 and 0x79.
490 (twobyte_has_modrm): Likewise.
491 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
492 (OP_G): Handle m_mode.
493
49f58d10
JB		 4942005-07-14 Jim Blandy <jimb@redhat.com>
495
496 Add support for the Renesas M32C and M16C.
497 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
498 * m32c-desc.h, m32c-opc.h: New.
499 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
500 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
501 m32c-opc.c.
502 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
503 m32c-ibld.lo, m32c-opc.lo.
504 (CLEANFILES): List stamp-m32c.
505 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
506 (CGEN_CPUS): Add m32c.
507 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
508 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
509 (m32c_opc_h): New variable.
510 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
511 (m32c-opc.lo): New rules.
512 * Makefile.in: Regenerated.
513 * configure.in: Add case for bfd_m32c_arch.
514 * configure: Regenerated.
515 * disassemble.c (ARCH_m32c): New.
516 [ARCH_m32c]: #include "m32c-desc.h".
517 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
518 (disassemble_init_for_target) [ARCH_m32c]: Same.
519
520 * cgen-ops.h, cgen-types.h: New files.
521 * Makefile.am (HFILES): List them.
522 * Makefile.in: Regenerated.
3e7d61b2 523
0fd3a477
JW		 5242005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
525
526 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
527 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
528 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
529 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
530 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
531 v850-dis.c: Fix format bugs.
532 * ia64-gen.c (fail, warn): Add format attribute.
533 * or32-opc.c (debug): Likewise.
534
22f8fcbd
NC		 5352005-07-07 Khem Raj <kraj@mvista.com>
536
537 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
538 disassembly pattern.
539
d125c27b
AM		 5402005-07-06 Alan Modra <amodra@bigpond.net.au>
541
542 * Makefile.am (stamp-m32r): Fix path to cpu files.
543 (stamp-m32r, stamp-iq2000): Likewise.
544 * Makefile.in: Regenerate.
545 * m32r-asm.c: Regenerate.
546 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
547 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
548
3ec2b351
NC		 5492005-07-05 Nick Clifton <nickc@redhat.com>
550
551 * iq2000-asm.c: Regenerate.
552 * ms1-asm.c: Regenerate.
553
30123838
JB		 5542005-07-05 Jan Beulich <jbeulich@novell.com>
555
556 * i386-dis.c (SVME_Fixup): New.
557 (grps): Use it for the lidt entry.
558 (PNI_Fixup): Call OP_M rather than OP_E.
559 (INVLPG_Fixup): Likewise.
560
b0eec63e
L		 5612005-07-04 H.J. Lu <hongjiu.lu@intel.com>
562
563 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
564
47b0e7ad
NC		 5652005-07-01 Nick Clifton <nickc@redhat.com>
566
567 * a29k-dis.c: Update to ISO C90 style function declarations and
568 fix formatting.
569 * alpha-opc.c: Likewise.
570 * arc-dis.c: Likewise.
571 * arc-opc.c: Likewise.
572 * avr-dis.c: Likewise.
573 * cgen-asm.in: Likewise.
574 * cgen-dis.in: Likewise.
575 * cgen-ibld.in: Likewise.
576 * cgen-opc.c: Likewise.
577 * cris-dis.c: Likewise.
578 * d10v-dis.c: Likewise.
579 * d30v-dis.c: Likewise.
580 * d30v-opc.c: Likewise.
581 * dis-buf.c: Likewise.
582 * dlx-dis.c: Likewise.
583 * h8300-dis.c: Likewise.
584 * h8500-dis.c: Likewise.
585 * hppa-dis.c: Likewise.
586 * i370-dis.c: Likewise.
587 * i370-opc.c: Likewise.
588 * m10200-dis.c: Likewise.
589 * m10300-dis.c: Likewise.
590 * m68k-dis.c: Likewise.
591 * m88k-dis.c: Likewise.
592 * mips-dis.c: Likewise.
593 * mmix-dis.c: Likewise.
594 * msp430-dis.c: Likewise.
595 * ns32k-dis.c: Likewise.
596 * or32-dis.c: Likewise.
597 * or32-opc.c: Likewise.
598 * pdp11-dis.c: Likewise.
599 * pj-dis.c: Likewise.
600 * s390-dis.c: Likewise.
601 * sh-dis.c: Likewise.
602 * sh64-dis.c: Likewise.
603 * sparc-dis.c: Likewise.
604 * sparc-opc.c: Likewise.
605 * sysdep.h: Likewise.
606 * tic30-dis.c: Likewise.
607 * tic4x-dis.c: Likewise.
608 * tic80-dis.c: Likewise.
609 * v850-dis.c: Likewise.
610 * v850-opc.c: Likewise.
611 * vax-dis.c: Likewise.
612 * w65-dis.c: Likewise.
613 * z8kgen.c: Likewise.
3e7d61b2 614
47b0e7ad
NC		 615 * fr30-*: Regenerate.
616 * frv-*: Regenerate.
617 * ip2k-*: Regenerate.
618 * iq2000-*: Regenerate.
619 * m32r-*: Regenerate.
620 * ms1-*: Regenerate.
621 * openrisc-*: Regenerate.
622 * xstormy16-*: Regenerate.
623
cc16ba8c
BE		 6242005-06-23 Ben Elliston <bje@gnu.org>
625
626 * m68k-dis.c: Use ISC C90.
627 * m68k-opc.c: Formatting fixes.
628
4b185e97
DU		 6292005-06-16 David Ung <davidu@mips.com>
630
3e7d61b2
AM		 631 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
632 instructions to the table; seb/seh/sew/zeb/zeh/zew.
4b185e97 633
ac188222
DB		 6342005-06-15 Dave Brolley <brolley@redhat.com>
635
636 Contribute Morpho ms1 on behalf of Red Hat
3e7d61b2 637 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
ac188222
DB		 638 ms1-opc.h: New files, Morpho ms1 target.
639
640 2004-05-14 Stan Cox <scox@redhat.com>
641
642 * disassemble.c (ARCH_ms1): Define.
643 (disassembler): Handle bfd_arch_ms1
644
645 2004-05-13 Michael Snyder <msnyder@redhat.com>
646
647 * Makefile.am, Makefile.in: Add ms1 target.
648 * configure.in: Ditto.
649
6b5d3a4d
ZW		 6502005-06-08 Zack Weinberg <zack@codesourcery.com>
651
652 * arm-opc.h: Delete; fold contents into ...
653 * arm-dis.c: ... here. Move includes of internal COFF headers
654 next to includes of internal ELF headers.
655 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
656 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
657 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
658 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
659 (iwmmxt_wwnames, iwmmxt_wwssnames):
660 Make const.
661 (regnames): Remove iWMMXt coprocessor register sets.
662 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
663 (get_arm_regnames): Adjust fourth argument to match above changes.
664 (set_iwmmxt_regnames): Delete.
665 (print_insn_arm): Constify 'c'. Use ISO syntax for function
666 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
667 and iwmmxt_cregnames, not set_iwmmxt_regnames.
668 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
669 ISO syntax for function pointer calls.
670
4a5329c6
ZW		 6712005-06-07 Zack Weinberg <zack@codesourcery.com>
672
673 * arm-dis.c: Split up the comments describing the format codes, so
674 that the ARM and 16-bit Thumb opcode tables each have comments
675 preceding them that describe all the codes, and only the codes,
676 valid in those tables. (32-bit Thumb table is already like this.)
677 Reorder the lists in all three comments to match the order in
678 which the codes are implemented.
679 Remove all forward declarations of static functions. Convert all
680 function definitions to ISO C format.
681 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
682 Return nothing.
683 (print_insn_thumb16): Remove unused case 'I'.
684 (print_insn): Update for changed calling convention of subroutines.
685
3d456fa1
JB		 6862005-05-25 Jan Beulich <jbeulich@novell.com>
687
688 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
689 hex (but retain it being displayed as signed). Remove redundant
690 checks. Add handling of displacements for 16-bit addressing in Intel
691 mode.
692
2888cb7a
JB		 6932005-05-25 Jan Beulich <jbeulich@novell.com>
694
695 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
696 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
697 masking of 'rm' in 16-bit memory address handling.
698
1ed8e1e4
AM		 6992005-05-19 Anton Blanchard <anton@samba.org>
700
701 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
702 (print_ppc_disassembler_options): Document it.
703 * ppc-opc.c (SVC_LEV): Define.
704 (LEV): Allow optional operand.
705 (POWER5): Define.
706 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
707 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
708
49cc2e69
KC		 7092005-05-19 Kelley Cook <kcook@gcc.gnu.org>
710
711 * Makefile.in: Regenerate.
712
c19d1205
ZW		 7132005-05-17 Zack Weinberg <zack@codesourcery.com>
714
715 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
716 instructions. Adjust disassembly of some opcodes to match
717 unified syntax.
718 (thumb32_opcodes): New table.
719 (print_insn_thumb): Rename print_insn_thumb16; don't handle
720 two-halfword branches here.
721 (print_insn_thumb32): New function.
722 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
723 and print_insn_thumb32. Be consistent about order of
724 halfwords when printing 32-bit instructions.
725
003519a7
L		 7262005-05-07 H.J. Lu <hongjiu.lu@intel.com>
727
728 PR 843
729 * i386-dis.c (branch_v_mode): New.
730 (indirEv): Use branch_v_mode instead of v_mode.
731 (OP_E): Handle branch_v_mode.
732
920a34a7
L		 7332005-05-07 H.J. Lu <hongjiu.lu@intel.com>
734
735 * d10v-dis.c (dis_2_short): Support 64bit host.
736
5de773c1
NC		 7372005-05-07 Nick Clifton <nickc@redhat.com>
738
739 * po/nl.po: Updated translation.
740
f4321104
NC		 7412005-05-07 Nick Clifton <nickc@redhat.com>
742
743 * Update the address and phone number of the FSF organization in
744 the GPL notices in the following files:
745 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
746 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
747 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
748 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
749 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
750 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
751 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
752 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
753 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
754 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
755 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
756 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
757 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
758 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
759 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
760 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
761 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
762 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
763 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
764 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
765 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
766 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
767 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
768 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
769 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
770 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
771 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
772 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
773 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
774 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
775 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
776 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
777 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
778
10b076a2
JW		 7792005-05-05 James E Wilson <wilson@specifixinc.com>
780
781 * ia64-opc.c: Include sysdep.h before libiberty.h.
782
022716b6
NC		 7832005-05-05 Nick Clifton <nickc@redhat.com>
784
785 * configure.in (ALL_LINGUAS): Add vi.
786 * configure: Regenerate.
787 * po/vi.po: New.
788
db5152b4
JG		 7892005-04-26 Jerome Guitton <guitton@gnat.com>
790
791 * configure.in: Fix the check for basename declaration.
792 * configure: Regenerate.
793
eed0d89a
AM		 7942005-04-19 Alan Modra <amodra@bigpond.net.au>
795
796 * ppc-opc.c (RTO): Define.
797 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
798 entries to suit PPC440.
799
791fe849
MK		 8002005-04-18 Mark Kettenis <kettenis@gnu.org>
801
802 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
803 Add xcrypt-ctr.
804
ffe58f7c
NC		 8052005-04-14 Nick Clifton <nickc@redhat.com>
806
807 * po/fi.po: New translation: Finnish.
808 * configure.in (ALL_LINGUAS): Add fi.
809 * configure: Regenerate.
810
9e9b66a9
AM		 8112005-04-14 Alan Modra <amodra@bigpond.net.au>
812
813 * Makefile.am (NO_WERROR): Define.
814 * configure.in: Invoke AM_BINUTILS_WARNINGS.
815 * Makefile.in: Regenerate.
816 * aclocal.m4: Regenerate.
817 * configure: Regenerate.
818
9494d739
NC		 8192005-04-04 Nick Clifton <nickc@redhat.com>
820
821 * fr30-asm.c: Regenerate.
822 * frv-asm.c: Regenerate.
823 * iq2000-asm.c: Regenerate.
824 * m32r-asm.c: Regenerate.
825 * openrisc-asm.c: Regenerate.
826
6128c599
JB		 8272005-04-01 Jan Beulich <jbeulich@novell.com>
828
829 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
830 visible operands in Intel mode. The first operand of monitor is
831 %rax in 64-bit mode.
832
373ff435
JB		 8332005-04-01 Jan Beulich <jbeulich@novell.com>
834
835 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
836 easier future additions.
837
4bd60896
JG		 8382005-03-31 Jerome Guitton <guitton@gnat.com>
839
840 * configure.in: Check for basename.
841 * configure: Regenerate.
842 * config.in: Ditto.
843
4cc91dba
L		 8442005-03-29 H.J. Lu <hongjiu.lu@intel.com>
845
846 * i386-dis.c (SEG_Fixup): New.
847 (Sv): New.
848 (dis386): Use "Sv" for 0x8c and 0x8e.
849
ec72cfe5
NC		 8502005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
851 Nick Clifton <nickc@redhat.com>
c19d1205 852
ec72cfe5
NC		 853 * vax-dis.c: (entry_addr): New varible: An array of user supplied
854 function entry mask addresses.
855 (entry_addr_occupied_slots): New variable: The number of occupied
c19d1205 856 elements in entry_addr.
ec72cfe5
NC		 857 (entry_addr_total_slots): New variable: The total number of
858 elements in entry_addr.
859 (parse_disassembler_options): New function. Fills in the entry_addr
860 array.
861 (free_entry_array): New function. Release the memory used by the
862 entry addr array. Suppressed because there is no way to call it.
863 (is_function_entry): Check if a given address is a function's
864 start address by looking at supplied entry mask addresses and
865 symbol information, if available.
866 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
867
85064c79
L		 8682005-03-23 H.J. Lu <hongjiu.lu@intel.com>
869
870 * cris-dis.c (print_with_operands): Use ~31L for long instead
871 of ~31.
872
de7141c7
L		 8732005-03-20 H.J. Lu <hongjiu.lu@intel.com>
874
875 * mmix-opc.c (O): Revert the last change.
876 (Z): Likewise.
877
e493ab45
L		 8782005-03-19 H.J. Lu <hongjiu.lu@intel.com>
879
880 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
881 (Z): Likewise.
882
d8d7c459
HPN		 8832005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
884
885 * mmix-opc.c (O, Z): Force expression as unsigned long.
886
ebdb0383
NC		 8872005-03-18 Nick Clifton <nickc@redhat.com>
888
889 * ip2k-asm.c: Regenerate.
890 * op/opcodes.pot: Regenerate.
891
1ad12f97
NC		 8922005-03-16 Nick Clifton <nickc@redhat.com>
893 Ben Elliston <bje@au.ibm.com>
894
569acd2c 895 * configure.in (werror): New switch: Add -Werror to the
1ad12f97 896 compiler command line. Enabled by default. Disable via
569acd2c 897 --disable-werror.
1ad12f97
NC		 898 * configure: Regenerate.
899
4eb30afc
AM		 9002005-03-16 Alan Modra <amodra@bigpond.net.au>
901
902 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
903 BOOKE.
904
ea8409f7
AM		 9052005-03-15 Alan Modra <amodra@bigpond.net.au>
906
729ae8d2
AM		 907 * po/es.po: Commit new Spanish translation.
908
ea8409f7
AM		 909 * po/fr.po: Commit new French translation.
910
4f495e61
NC		 9112005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
912
913 * vax-dis.c: Fix spelling error
914 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
915 of just "Entry mask: < r1 ... >"
916
0a003adc
ZW		 9172005-03-12 Zack Weinberg <zack@codesourcery.com>
918
919 * arm-dis.c (arm_opcodes): Document %E and %V.
920 Add entries for v6T2 ARM instructions:
921 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
922 (print_insn_arm): Add support for %E and %V.
885fc257 923 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
0a003adc 924
da99ee72
AM		 9252005-03-10 Jeff Baker <jbaker@qnx.com>
926 Alan Modra <amodra@bigpond.net.au>
927
928 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
929 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
930 (SPRG_MASK): Delete.
931 (XSPRG_MASK): Mask off extra bits now part of sprg field.
0a003adc 932 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
da99ee72
AM		 933 mfsprg4..7 after msprg and consolidate.
934
220abb21
AM		 9352005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
936
937 * vax-dis.c (entry_mask_bit): New array.
938 (print_insn_vax): Decode function entry mask.
939
0e06657a
AH		 9402005-03-07 Aldy Hernandez <aldyh@redhat.com>
941
942 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
943
06647dfd
AM		 9442005-03-05 Alan Modra <amodra@bigpond.net.au>
945
946 * po/opcodes.pot: Regenerate.
947
82b829a7
RR		 9482005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
949
220abb21 950 * arc-dis.c (a4_decoding_class): New enum.
06647dfd
AM		 951 (dsmOneArcInst): Use the enum values for the decoding class.
952 Remove redundant case in the switch for decodingClass value 11.
82b829a7 953
c4a530c5
JB		 9542005-03-02 Jan Beulich <jbeulich@novell.com>
955
956 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
957 accesses.
958 (OP_C): Consider lock prefix in non-64-bit modes.
959
47d8304e
AM		 9602005-02-24 Alan Modra <amodra@bigpond.net.au>
961
962 * cris-dis.c (format_hex): Remove ineffective warning fix.
963 * crx-dis.c (make_instruction): Warning fix.
964 * frv-asm.c: Regenerate.
965
ec36c4a4
NC		 9662005-02-23 Nick Clifton <nickc@redhat.com>
967
33b71eeb
NC		 968 * cgen-dis.in: Use bfd_byte for buffers that are passed to
969 read_memory.
06647dfd 970
33b71eeb 971 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
06647dfd 972
ec36c4a4
NC		 973 * crx-dis.c (make_instruction): Move argument structure into inner
974 scope and ensure that all of its fields are initialised before
975 they are used.
976
33b71eeb
NC		 977 * fr30-asm.c: Regenerate.
978 * fr30-dis.c: Regenerate.
979 * frv-asm.c: Regenerate.
980 * frv-dis.c: Regenerate.
981 * ip2k-asm.c: Regenerate.
982 * ip2k-dis.c: Regenerate.
983 * iq2000-asm.c: Regenerate.
984 * iq2000-dis.c: Regenerate.
985 * m32r-asm.c: Regenerate.
986 * m32r-dis.c: Regenerate.
987 * openrisc-asm.c: Regenerate.
988 * openrisc-dis.c: Regenerate.
989 * xstormy16-asm.c: Regenerate.
990 * xstormy16-dis.c: Regenerate.
991
53c9ebc5
AM		 9922005-02-22 Alan Modra <amodra@bigpond.net.au>
993
994 * arc-ext.c: Warning fixes.
995 * arc-ext.h: Likewise.
996 * cgen-opc.c: Likewise.
997 * ia64-gen.c: Likewise.
998 * maxq-dis.c: Likewise.
999 * ns32k-dis.c: Likewise.
1000 * w65-dis.c: Likewise.
1001 * ia64-asmtab.c: Regenerate.
1002
610ad19b
AM		 10032005-02-22 Alan Modra <amodra@bigpond.net.au>
1004
1005 * fr30-desc.c: Regenerate.
1006 * fr30-desc.h: Regenerate.
1007 * fr30-opc.c: Regenerate.
1008 * fr30-opc.h: Regenerate.
1009 * frv-desc.c: Regenerate.
1010 * frv-desc.h: Regenerate.
1011 * frv-opc.c: Regenerate.
1012 * frv-opc.h: Regenerate.
1013 * ip2k-desc.c: Regenerate.
1014 * ip2k-desc.h: Regenerate.
1015 * ip2k-opc.c: Regenerate.
1016 * ip2k-opc.h: Regenerate.
1017 * iq2000-desc.c: Regenerate.
1018 * iq2000-desc.h: Regenerate.
1019 * iq2000-opc.c: Regenerate.
1020 * iq2000-opc.h: Regenerate.
1021 * m32r-desc.c: Regenerate.
1022 * m32r-desc.h: Regenerate.
1023 * m32r-opc.c: Regenerate.
1024 * m32r-opc.h: Regenerate.
1025 * m32r-opinst.c: Regenerate.
1026 * openrisc-desc.c: Regenerate.
1027 * openrisc-desc.h: Regenerate.
1028 * openrisc-opc.c: Regenerate.
1029 * openrisc-opc.h: Regenerate.
1030 * xstormy16-desc.c: Regenerate.
1031 * xstormy16-desc.h: Regenerate.
1032 * xstormy16-opc.c: Regenerate.
1033 * xstormy16-opc.h: Regenerate.
1034
db9db6f2
AM		 10352005-02-21 Alan Modra <amodra@bigpond.net.au>
1036
1037 * Makefile.am: Run "make dep-am"
1038 * Makefile.in: Regenerate.
1039
bf143b25
NC		 10402005-02-15 Nick Clifton <nickc@redhat.com>
1041
1042 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1043 compile time warnings.
1044 (print_keyword): Likewise.
1045 (default_print_insn): Likewise.
1046
1047 * fr30-desc.c: Regenerated.
1048 * fr30-desc.h: Regenerated.
1049 * fr30-dis.c: Regenerated.
1050 * fr30-opc.c: Regenerated.
1051 * fr30-opc.h: Regenerated.
1052 * frv-desc.c: Regenerated.
1053 * frv-dis.c: Regenerated.
1054 * frv-opc.c: Regenerated.
1055 * ip2k-asm.c: Regenerated.
1056 * ip2k-desc.c: Regenerated.
1057 * ip2k-desc.h: Regenerated.
1058 * ip2k-dis.c: Regenerated.
1059 * ip2k-opc.c: Regenerated.
1060 * ip2k-opc.h: Regenerated.
1061 * iq2000-desc.c: Regenerated.
1062 * iq2000-dis.c: Regenerated.
1063 * iq2000-opc.c: Regenerated.
1064 * m32r-asm.c: Regenerated.
1065 * m32r-desc.c: Regenerated.
1066 * m32r-desc.h: Regenerated.
1067 * m32r-dis.c: Regenerated.
1068 * m32r-opc.c: Regenerated.
1069 * m32r-opc.h: Regenerated.
1070 * m32r-opinst.c: Regenerated.
1071 * openrisc-desc.c: Regenerated.
1072 * openrisc-desc.h: Regenerated.
1073 * openrisc-dis.c: Regenerated.
1074 * openrisc-opc.c: Regenerated.
1075 * openrisc-opc.h: Regenerated.
1076 * xstormy16-desc.c: Regenerated.
1077 * xstormy16-desc.h: Regenerated.
1078 * xstormy16-dis.c: Regenerated.
1079 * xstormy16-opc.c: Regenerated.
1080 * xstormy16-opc.h: Regenerated.
1081
d6098898
L		 10822005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1083
1084 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1085 address.
1086
5a84f3e0
NC		 10872005-02-11 Nick Clifton <nickc@redhat.com>
1088
bc18c937
NC		 1089 * iq2000-asm.c: Regenerate.
1090
5a84f3e0
NC		 1091 * frv-dis.c: Regenerate.
1092
0a40490e
JB		 10932005-02-07 Jim Blandy <jimb@redhat.com>
1094
1095 * Makefile.am (CGEN): Load guile.scm before calling the main
1096 application script.
1097 * Makefile.in: Regenerated.
1098 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1099 Simply pass the cgen-opc.scm path to ${cgen} as its first
1100 argument; ${cgen} itself now contains the '-s', or whatever is
1101 appropriate for the Scheme being used.
1102
c46f8c51
AC		 11032005-01-31 Andrew Cagney <cagney@gnu.org>
1104
1105 * configure: Regenerate to track ../gettext.m4.
1106
60b9a617
JB		 11072005-01-31 Jan Beulich <jbeulich@novell.com>
1108
1109 * ia64-gen.c (NELEMS): Define.
1110 (shrink): Generate alias with missing second predicate register when
1111 opcode has two outputs and these are both predicates.
1112 * ia64-opc-i.c (FULL17): Define.
1113 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1114 here to generate output template.
1115 (TBITCM, TNATCM): Undefine after use.
1116 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1117 first input. Add ld16 aliases without ar.csd as second output. Add
1118 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1119 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1120 ar.ccv as third/fourth inputs. Consolidate through...
1121 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1122 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1123 * ia64-asmtab.c: Regenerate.
1124
a53bf506
AC		 11252005-01-27 Andrew Cagney <cagney@gnu.org>
1126
1127 * configure: Regenerate to track ../gettext.m4 change.
1128
90219bd0
AO		 11292005-01-25 Alexandre Oliva <aoliva@redhat.com>
1130
1131 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1132 * frv-asm.c: Rebuilt.
1133 * frv-desc.c: Rebuilt.
1134 * frv-desc.h: Rebuilt.
1135 * frv-dis.c: Rebuilt.
1136 * frv-ibld.c: Rebuilt.
1137 * frv-opc.c: Rebuilt.
1138 * frv-opc.h: Rebuilt.
1139
45181ed1
AC		 11402005-01-24 Andrew Cagney <cagney@gnu.org>
1141
1142 * configure: Regenerate, ../gettext.m4 was updated.
1143
9e836e3d
FF		 11442005-01-21 Fred Fish <fnf@specifixinc.com>
1145
1146 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1147 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1148 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1149 * mips-dis.c: Ditto.
1150
5e8cb021
AM		 11512005-01-20 Alan Modra <amodra@bigpond.net.au>
1152
1153 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1154
986e18a5
FF		 11552005-01-19 Fred Fish <fnf@specifixinc.com>
1156
1157 * mips-dis.c (no_aliases): New disassembly option flag.
1158 (set_default_mips_dis_options): Init no_aliases to zero.
1159 (parse_mips_dis_option): Handle no-aliases option.
1160 (print_insn_mips): Ignore table entries that are aliases
1161 if no_aliases is set.
1162 (print_insn_mips16): Ditto.
1163 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1164 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1165 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1166 * mips16-opc.c (mips16_opcodes): Ditto.
1167
e38bc3b5
NC		 11682005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1169
1170 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1171 (inheritance diagram): Add missing edge.
1172 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1173 easier for the testsuite.
1174 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1175 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
610ad19b 1176 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
e38bc3b5
NC		 1177 arch_sh2a_or_sh4_up child.
1178 (sh_table): Do renaming as above.
1179 Correct comment for ldc.l for gas testsuite to read.
1180 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1181 Correct comments for movy.w and movy.l for gas testsuite to read.
1182 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1183
9df48ba9
L		 11842005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1185
1186 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1187
2033b4b9
L		 11882005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1189
1190 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1191
0bcb06d2
AS		 11922005-01-10 Andreas Schwab <schwab@suse.de>
1193
1194 * disassemble.c (disassemble_init_for_target) <case
1195 bfd_arch_ia64>: Set skip_zeroes to 16.
1196 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1197
47add74d
TL		 11982004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1199
1200 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1201
246f4c05
SS		 12022004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1203
1204 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1205 memory references. Convert avr_operand() to C90 formatting.
1206
0e1200e5
TL		 12072004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1208
1209 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1210
89a649f7
TL		 12112004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1212
1213 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1214 (no_op_insn): Initialize array with instructions that have no
1215 operands.
1216 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1217
6255809c
RE		 12182004-11-29 Richard Earnshaw <rearnsha@arm.com>
1219
1220 * arm-dis.c: Correct top-level comment.
1221
2fbad815
RE		 12222004-11-27 Richard Earnshaw <rearnsha@arm.com>
1223
1224 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1225 architecuture defining the insn.
1226 (arm_opcodes, thumb_opcodes): Delete. Move to ...
6b8725b9
RE		 1227 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1228 field.
2fbad815
RE		 1229 Also include opcode/arm.h.
1230 * Makefile.am (arm-dis.lo): Update dependency list.
1231 * Makefile.in: Regenerate.
1232
d81acc42
NC		 12332004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1234
1235 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1236 reflect the change to the short immediate syntax.
1237
ca4f2377
AM		 12382004-11-19 Alan Modra <amodra@bigpond.net.au>
1239
5da8bf1b
AM		 1240 * or32-opc.c (debug): Warning fix.
1241 * po/POTFILES.in: Regenerate.
1242
ca4f2377
AM		 1243 * maxq-dis.c: Formatting.
1244 (print_insn): Warning fix.
1245
b7693d02
DJ		 12462004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1247
1248 * arm-dis.c (WORD_ADDRESS): Define.
1249 (print_insn): Use it. Correct big-endian end-of-section handling.
1250
300dac7e
NC		 12512004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1252 Vineet Sharma <vineets@noida.hcltech.com>
1253
1254 * maxq-dis.c: New file.
1255 * disassemble.c (ARCH_maxq): Define.
610ad19b 1256 (disassembler): Add 'print_insn_maxq_little' for handling maxq
300dac7e
NC		 1257 instructions..
1258 * configure.in: Add case for bfd_maxq_arch.
1259 * configure: Regenerate.
1260 * Makefile.am: Add support for maxq-dis.c
1261 * Makefile.in: Regenerate.
1262 * aclocal.m4: Regenerate.
1263
42048ee7
TL		 12642004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1265
1266 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1267 mode.
1268 * crx-dis.c: Likewise.
1269
bd21e58e
HPN		 12702004-11-04 Hans-Peter Nilsson <hp@axis.com>
1271
1272 Generally, handle CRISv32.
1273 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1274 (struct cris_disasm_data): New type.
1275 (format_reg, format_hex, cris_constraint, print_flags)
1276 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1277 callers changed.
1278 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1279 (print_insn_crisv32_without_register_prefix)
1280 (print_insn_crisv10_v32_with_register_prefix)
1281 (print_insn_crisv10_v32_without_register_prefix)
1282 (cris_parse_disassembler_options): New functions.
1283 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1284 parameter. All callers changed.
1285 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1286 failure.
1287 (cris_constraint) <case 'Y', 'U'>: New cases.
1288 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1289 for constraint 'n'.
1290 (print_with_operands) <case 'Y'>: New case.
1291 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1292 <case 'N', 'Y', 'Q'>: New cases.
1293 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1294 (print_insn_cris_with_register_prefix)
1295 (print_insn_cris_without_register_prefix): Call
1296 cris_parse_disassembler_options.
1297 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1298 for CRISv32 and the size of immediate operands. New v32-only
1299 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1300 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1301 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1302 Change brp to be v3..v10.
1303 (cris_support_regs): New vector.
1304 (cris_opcodes): Update head comment. New format characters '[',
1305 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1306 Add new opcodes for v32 and adjust existing opcodes to accommodate
1307 differences to earlier variants.
1308 (cris_cond15s): New vector.
1309
9306ca4a
JB		 13102004-11-04 Jan Beulich <jbeulich@novell.com>
1311
1312 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1313 (indirEb): Remove.
1314 (Mp): Use f_mode rather than none at all.
1315 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1316 replaces what previously was x_mode; x_mode now means 128-bit SSE
1317 operands.
1318 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1319 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1320 pinsrw's second operand is Edqw.
1321 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1322 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1323 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1324 mode when an operand size override is present or always suffixing.
1325 More instructions will need to be added to this group.
1326 (putop): Handle new macro chars 'C' (short/long suffix selector),
1327 'I' (Intel mode override for following macro char), and 'J' (for
1328 adding the 'l' prefix to far branches in AT&T mode). When an
1329 alternative was specified in the template, honor macro character when
1330 specified for Intel mode.
1331 (OP_E): Handle new *_mode values. Correct pointer specifications for
1332 memory operands. Consolidate output of index register.
1333 (OP_G): Handle new *_mode values.
1334 (OP_I): Handle const_1_mode.
1335 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1336 respective opcode prefix bits have been consumed.
1337 (OP_EM, OP_EX): Provide some default handling for generating pointer
1338 specifications.
1339
f39c96a9
TL		 13402004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1341
1342 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1343 COP_INST macro.
1344
812337be
TL		 13452004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1346
1347 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1348 (getregliststring): Support HI/LO and user registers.
610ad19b 1349 * crx-opc.c (crx_instruction): Update data structure according to the
812337be
TL		 1350 rearrangement done in CRX opcode header file.
1351 (crx_regtab): Likewise.
1352 (crx_optab): Likewise.
610ad19b 1353 (crx_instruction): Reorder load/stor instructions, remove unsupported
812337be
TL		 1354 formats.
1355 support new Co-Processor instruction 'cpi'.
1356
4030fa5a
NC		 13572004-10-27 Nick Clifton <nickc@redhat.com>
1358
1359 * opcodes/iq2000-asm.c: Regenerate.
1360 * opcodes/iq2000-desc.c: Regenerate.
1361 * opcodes/iq2000-desc.h: Regenerate.
1362 * opcodes/iq2000-dis.c: Regenerate.
1363 * opcodes/iq2000-ibld.c: Regenerate.
1364 * opcodes/iq2000-opc.c: Regenerate.
1365 * opcodes/iq2000-opc.h: Regenerate.
1366
fc3d45e8
TL		 13672004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1368
1369 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1370 us4, us5 (respectively).
1371 Remove unsupported 'popa' instruction.
1372 Reverse operands order in store co-processor instructions.
1373
3c55da70
AM		 13742004-10-15 Alan Modra <amodra@bigpond.net.au>
1375
1376 * Makefile.am: Run "make dep-am"
1377 * Makefile.in: Regenerate.
1378
7fa3d080
BW		 13792004-10-12 Bob Wilson <bob.wilson@acm.org>
1380
1381 * xtensa-dis.c: Use ISO C90 formatting.
1382
e612bb4d
AM		 13832004-10-09 Alan Modra <amodra@bigpond.net.au>
1384
1385 * ppc-opc.c: Revert 2004-09-09 change.
1386
43cd72b9
BW		 13872004-10-07 Bob Wilson <bob.wilson@acm.org>
1388
1389 * xtensa-dis.c (state_names): Delete.
1390 (fetch_data): Use xtensa_isa_maxlength.
1391 (print_xtensa_operand): Replace operand parameter with opcode/operand
1392 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1393 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1394 instruction bundles. Use xmalloc instead of malloc.
1395
bbac1f2a
NC		 13962004-10-07 David Gibson <david@gibson.dropbear.id.au>
1397
1398 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1399 initializers.
1400
48c9f030
NC		 14012004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1402
1403 * crx-opc.c (crx_instruction): Support Co-processor insns.
1404 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1405 (getregliststring): Change function to use the above enum.
1406 (print_arg): Handle CO-Processor insns.
1407 (crx_cinvs): Add 'b' option to invalidate the branch-target
1408 cache.
1409
12c64a4e
AH		 14102004-10-06 Aldy Hernandez <aldyh@redhat.com>
1411
1412 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1413 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1414 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1415 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1416 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1417
14127cc4
NC		 14182004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1419
1420 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1421 rather than add it.
1422
0dd132b6
NC		 14232004-09-30 Paul Brook <paul@codesourcery.com>
1424
1425 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1426 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1427
3f85e526
L		 14282004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1429
1430 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1431 (CONFIG_STATUS_DEPENDENCIES): New.
1432 (Makefile): Removed.
1433 (config.status): Likewise.
1434 * Makefile.in: Regenerated.
1435
8ae85421
AM		 14362004-09-17 Alan Modra <amodra@bigpond.net.au>
1437
1438 * Makefile.am: Run "make dep-am".
1439 * Makefile.in: Regenerate.
1440 * aclocal.m4: Regenerate.
1441 * configure: Regenerate.
1442 * po/POTFILES.in: Regenerate.
1443 * po/opcodes.pot: Regenerate.
1444
24443139
AS		 14452004-09-11 Andreas Schwab <schwab@suse.de>
1446
1447 * configure: Rebuild.
1448
2a309db0
AM		 14492004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1450
1451 * ppc-opc.c (L): Make this field not optional.
1452
42851540
NC		 14532004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1454
1455 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1456 Fix parameter to 'm[t|f]csr' insns.
1457
979273e3
NN		 14582004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1459
1460 * configure.in: Autoupdate to autoconf 2.59.
1461 * aclocal.m4: Rebuild with aclocal 1.4p6.
1462 * configure: Rebuild with autoconf 2.59.
1463 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1464 bfd changes for autoconf 2.59 on the way).
1465 * config.in: Rebuild with autoheader 2.59.
1466
ac28a1cb
RS		 14672004-08-27 Richard Sandiford <rsandifo@redhat.com>
1468
1469 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1470
30d1c836
ML		 14712004-07-30 Michal Ludvig <mludvig@suse.cz>
1472
1473 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1474 (GRPPADLCK2): New define.
1475 (twobyte_has_modrm): True for 0xA6.
1476 (grps): GRPPADLCK2 for opcode 0xA6.
1477
0b0ac059
AO		 14782004-07-29 Alexandre Oliva <aoliva@redhat.com>
1479
1480 Introduce SH2a support.
1481 * sh-opc.h (arch_sh2a_base): Renumber.
1482 (arch_sh2a_nofpu_base): Remove.
1483 (arch_sh_base_mask): Adjust.
1484 (arch_opann_mask): New.
1485 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1486 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1487 (sh_table): Adjust whitespace.
1488 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1489 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1490 instruction list throughout.
1491 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1492 of arch_sh2a in instruction list throughout.
1493 (arch_sh2e_up): Accomodate above changes.
1494 (arch_sh2_up): Ditto.
1495 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1496 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1497 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1498 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1499 * sh-opc.h (arch_sh2a_nofpu): New.
1500 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1501 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1502 instruction.
1503 2004-01-20 DJ Delorie <dj@redhat.com>
1504 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1505 2003-12-29 DJ Delorie <dj@redhat.com>
1506 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1507 sh_opcode_info, sh_table): Add sh2a support.
1508 (arch_op32): New, to tag 32-bit opcodes.
1509 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1510 2003-12-02 Michael Snyder <msnyder@redhat.com>
1511 * sh-opc.h (arch_sh2a): Add.
1512 * sh-dis.c (arch_sh2a): Handle.
1513 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1514
670ec21d
NC		 15152004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1516
1517 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1518
ed049af3
NC		 15192004-07-22 Nick Clifton <nickc@redhat.com>
1520
1521 PR/280
1522 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1523 insns - this is done by objdump itself.
1524 * h8500-dis.c (print_insn_h8500): Likewise.
1525
20f0a1fc
NC		 15262004-07-21 Jan Beulich <jbeulich@novell.com>
1527
1528 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1529 regardless of address size prefix in effect.
1530 (ptr_reg): Size or address registers does not depend on rex64, but
1531 on the presence of an address size override.
1532 (OP_MMX): Use rex.x only for xmm registers.
1533 (OP_EM): Use rex.z only for xmm registers.
1534
6f14957b
MR		 15352004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1536
1537 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1538 move/branch operations to the bottom so that VR5400 multimedia
1539 instructions take precedence in disassembly.
1540
1586d91e
MR		 15412004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1542
1543 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1544 ISA-specific "break" encoding.
1545
982de27a
NC		 15462004-07-13 Elvis Chiang <elvisfb@gmail.com>
1547
1548 * arm-opc.h: Fix typo in comment.
1549
4300ab10
AS		 15502004-07-11 Andreas Schwab <schwab@suse.de>
1551
1552 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1553
8577e690
AS		 15542004-07-09 Andreas Schwab <schwab@suse.de>
1555
1556 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1557
1fe1f39c
NC		 15582004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1559
1560 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1561 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1562 (crx-dis.lo): New target.
1563 (crx-opc.lo): Likewise.
1564 * Makefile.in: Regenerate.
1565 * configure.in: Handle bfd_crx_arch.
1566 * configure: Regenerate.
1567 * crx-dis.c: New file.
1568 * crx-opc.c: New file.
1569 * disassemble.c (ARCH_crx): Define.
1570 (disassembler): Handle ARCH_crx.
1571
7a33b495
JW		 15722004-06-29 James E Wilson <wilson@specifixinc.com>
1573
1574 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1575 * ia64-asmtab.c: Regnerate.
1576
98e69875
AM		 15772004-06-28 Alan Modra <amodra@bigpond.net.au>
1578
1579 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1580 (extract_fxm): Don't test dialect.
1581 (XFXFXM_MASK): Include the power4 bit.
1582 (XFXM): Add p4 param.
1583 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1584
a53b85e2
AO		 15852004-06-27 Alexandre Oliva <aoliva@redhat.com>
1586
1587 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1588 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1589
d0618d1c
AM		 15902004-06-26 Alan Modra <amodra@bigpond.net.au>
1591
1592 * ppc-opc.c (BH, XLBH_MASK): Define.
1593 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1594
1d9f512f
AM		 15952004-06-24 Alan Modra <amodra@bigpond.net.au>
1596
1597 * i386-dis.c (x_mode): Comment.
1598 (two_source_ops): File scope.
1599 (float_mem): Correct fisttpll and fistpll.
1600 (float_mem_mode): New table.
1601 (dofloat): Use it.
1602 (OP_E): Correct intel mode PTR output.
1603 (ptr_reg): Use open_char and close_char.
1604 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1605 operands. Set two_source_ops.
1606
52886d70
AM		 16072004-06-15 Alan Modra <amodra@bigpond.net.au>
1608
1609 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1610 instead of _raw_size.
1611
bad9ceea
JJ		 16122004-06-08 Jakub Jelinek <jakub@redhat.com>
1613
1614 * ia64-gen.c (in_iclass): Handle more postinc st
1615 and ld variants.
1616 * ia64-asmtab.c: Rebuilt.
1617
0451f5df
MS		 16182004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1619
1620 * s390-opc.txt: Correct architecture mask for some opcodes.
1621 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1622 in the esa mode as well.
1623
f6f9408f
JR		 16242004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1625
1626 * sh-dis.c (target_arch): Make unsigned.
1627 (print_insn_sh): Replace (most of) switch with a call to
1628 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1629 * sh-opc.h: Redefine architecture flags values.
1630 Add sh3-nommu architecture.
1631 Reorganise <arch>_up macros so they make more visual sense.
1632 (SH_MERGE_ARCH_SET): Define new macro.
1633 (SH_VALID_BASE_ARCH_SET): Likewise.
1634 (SH_VALID_MMU_ARCH_SET): Likewise.
1635 (SH_VALID_CO_ARCH_SET): Likewise.
1636 (SH_VALID_ARCH_SET): Likewise.
1637 (SH_MERGE_ARCH_SET_VALID): Likewise.
1638 (SH_ARCH_SET_HAS_FPU): Likewise.
1639 (SH_ARCH_SET_HAS_DSP): Likewise.
1640 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1641 (sh_get_arch_from_bfd_mach): Add prototype.
1642 (sh_get_arch_up_from_bfd_mach): Likewise.
1643 (sh_get_bfd_mach_from_arch_set): Likewise.
1644 (sh_merge_bfd_arc): Likewise.
1645
be8c092b
NC		 16462004-05-24 Peter Barada <peter@the-baradas.com>
1647
1648 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
610ad19b
AM		 1649 into new match_insn_m68k function. Loop over canidate
1650 matches and select first that completely matches.
be8c092b
NC		 1651 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1652 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
610ad19b 1653 to verify addressing for MAC/EMAC.
be8c092b
NC		 1654 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1655 reigster halves since 'fpu' and 'spl' look misleading.
1656 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1657 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1658 first, tighten up match masks.
1659 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1660 'size' from special case code in print_insn_m68k to
1661 determine decode size of insns.
1662
a30e9cc4
AM		 16632004-05-19 Alan Modra <amodra@bigpond.net.au>
1664
1665 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1666 well as when -mpower4.
1667
9598fbe5
NC		 16682004-05-13 Nick Clifton <nickc@redhat.com>
1669
1670 * po/fr.po: Updated French translation.
1671
6b6e92f4
NC		 16722004-05-05 Peter Barada <peter@the-baradas.com>
1673
1674 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1675 variants in arch_mask. Only set m68881/68851 for 68k chips.
1676 * m68k-op.c: Switch from ColdFire chips to core variants.
1677
a404d431
AM		 16782004-05-05 Alan Modra <amodra@bigpond.net.au>
1679
a30e9cc4 1680 PR 147.
a404d431
AM		 1681 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1682
f3806e43
BE		 16832004-04-29 Ben Elliston <bje@au.ibm.com>
1684
520ceea4
BE		 1685 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1686 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 1687
1f1799d5
KK		 16882004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1689
1690 * sh-dis.c (print_insn_sh): Print the value in constant pool
1691 as a symbol if it looks like a symbol.
1692
fd99574b
NC		 16932004-04-22 Peter Barada <peter@the-baradas.com>
1694
1695 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1696 appropriate ColdFire architectures.
1697 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1698 mask addressing.
1699 Add EMAC instructions, fix MAC instructions. Remove
1700 macmw/macml/msacmw/msacml instructions since mask addressing now
1701 supported.
1702
b4781d44
JJ		 17032004-04-20 Jakub Jelinek <jakub@redhat.com>
1704
1705 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1706 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1707 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1708 macro. Adjust all users.
1709
91809fda 17102004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
610ad19b 1711
91809fda
NC		 1712 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1713 separately.
1714
f4453dfa
NC		 17152004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1716
1717 * m32r-asm.c: Regenerate.
1718
9b0de91a
SS		 17192004-03-29 Stan Shebs <shebs@apple.com>
1720
1721 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1722 used.
1723
e20c0b3d
AM		 17242004-03-19 Alan Modra <amodra@bigpond.net.au>
1725
1726 * aclocal.m4: Regenerate.
1727 * config.in: Regenerate.
1728 * configure: Regenerate.
1729 * po/POTFILES.in: Regenerate.
1730 * po/opcodes.pot: Regenerate.
1731
fdd12ef3
AM		 17322004-03-16 Alan Modra <amodra@bigpond.net.au>
1733
1734 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1735 PPC_OPERANDS_GPR_0.
1736 * ppc-opc.c (RA0): Define.
1737 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1738 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 1739 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 1740
2dc111b3 17412004-03-15 Aldy Hernandez <aldyh@redhat.com>
fdd12ef3
AM		 1742
1743 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 1744
7bfeee7b
AM		 17452004-03-15 Alan Modra <amodra@bigpond.net.au>
1746
1747 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1748
7ffdda93
ML		 17492004-03-12 Michal Ludvig <mludvig@suse.cz>
1750
1751 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 1752 (grps): Delete GRPPLOCK entry.
7ffdda93 1753
cc0ec051
AM		 17542004-03-12 Alan Modra <amodra@bigpond.net.au>
1755
1756 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1757 (M, Mp): Use OP_M.
1758 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1759 (GRPPADLCK): Define.
1760 (dis386): Use NOP_Fixup on "nop".
1761 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1762 (twobyte_has_modrm): Set for 0xa7.
1763 (padlock_table): Delete. Move to..
1764 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1765 and clflush.
1766 (print_insn): Revert PADLOCK_SPECIAL code.
1767 (OP_E): Delete sfence, lfence, mfence checks.
1768
4fd61dcb
JJ		 17692004-03-12 Jakub Jelinek <jakub@redhat.com>
1770
1771 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1772 (INVLPG_Fixup): New function.
1773 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1774
0f10071e
ML		 17752004-03-12 Michal Ludvig <mludvig@suse.cz>
1776
1777 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1778 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1779 (padlock_table): New struct with PadLock instructions.
1780 (print_insn): Handle PADLOCK_SPECIAL.
1781
c02908d2
AM		 17822004-03-12 Alan Modra <amodra@bigpond.net.au>
1783
1784 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1785 (OP_E): Twiddle clflush to sfence here.
1786
d5bb7600
NC		 17872004-03-08 Nick Clifton <nickc@redhat.com>
1788
1789 * po/de.po: Updated German translation.
1790
ae51a426
JR		 17912003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1792
1793 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1794 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1795 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1796 accordingly.
1797
676a64f4
RS		 17982004-03-01 Richard Sandiford <rsandifo@redhat.com>
1799
1800 * frv-asm.c: Regenerate.
1801 * frv-desc.c: Regenerate.
1802 * frv-desc.h: Regenerate.
1803 * frv-dis.c: Regenerate.
1804 * frv-ibld.c: Regenerate.
1805 * frv-opc.c: Regenerate.
1806 * frv-opc.h: Regenerate.
1807
c7a48b9a
RS		 18082004-03-01 Richard Sandiford <rsandifo@redhat.com>
1809
1810 * frv-desc.c, frv-opc.c: Regenerate.
1811
8ae0baa2
RS		 18122004-03-01 Richard Sandiford <rsandifo@redhat.com>
1813
1814 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1815
ce11586c
JR		 18162004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1817
1818 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1819 Also correct mistake in the comment.
1820
6a5709a5
JR		 18212004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1822
1823 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1824 ensure that double registers have even numbers.
1825 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1826 that reserved instruction 0xfffd does not decode the same
1827 as 0xfdfd (ftrv).
1828 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1829 REG_N refers to a double register.
1830 Add REG_N_B01 nibble type and use it instead of REG_NM
1831 in ftrv.
1832 Adjust the bit patterns in a few comments.
1833
e5d2b64f 18342004-02-25 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1835
1836 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 1837
1f04b05f
AH		 18382004-02-20 Aldy Hernandez <aldyh@redhat.com>
1839
1840 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1841
2f3b8700
AH		 18422004-02-20 Aldy Hernandez <aldyh@redhat.com>
1843
1844 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1845
f0b26da6 18462004-02-20 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1847
1848 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1849 mtivor32, mtivor33, mtivor34.
f0b26da6 1850
23d59c56 18512004-02-19 Aldy Hernandez <aldyh@redhat.com>
7bfeee7b
AM		 1852
1853 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 1854
34920d91
NC		 18552004-02-10 Petko Manolov <petkan@nucleusys.com>
1856
1857 * arm-opc.h Maverick accumulator register opcode fixes.
1858
44d86481
BE		 18592004-02-13 Ben Elliston <bje@wasabisystems.com>
1860
1861 * m32r-dis.c: Regenerate.
1862
17707c23
MS		 18632004-01-27 Michael Snyder <msnyder@redhat.com>
1864
1865 * sh-opc.h (sh_table): "fsrra", not "fssra".
1866
fe3a9bc4
NC		 18672004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1868
1869 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1870 contraints.
1871
ff24f124
JJ		 18722004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1873
1874 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1875
a02a862a
AM		 18762004-01-19 Alan Modra <amodra@bigpond.net.au>
1877
1878 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1879 1. Don't print scale factor on AT&T mode when index missing.
1880
d164ea7f
AO		 18812004-01-16 Alexandre Oliva <aoliva@redhat.com>
1882
1883 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1884 when loaded into XR registers.
1885
cb10e79a
RS		 18862004-01-14 Richard Sandiford <rsandifo@redhat.com>
1887
1888 * frv-desc.h: Regenerate.
1889 * frv-desc.c: Regenerate.
1890 * frv-opc.c: Regenerate.
1891
f532f3fa
MS		 18922004-01-13 Michael Snyder <msnyder@redhat.com>
1893
1894 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1895
e45d0630
PB		 18962004-01-09 Paul Brook <paul@codesourcery.com>
1897
1898 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1899 specific opcodes.
1900
3ba7a1aa
DJ		 19012004-01-07 Daniel Jacobowitz <drow@mvista.com>
1902
1903 * Makefile.am (libopcodes_la_DEPENDENCIES)
1904 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1905 comment about the problem.
1906 * Makefile.in: Regenerate.
1907
ba2d3f07
AO		 19082004-01-06 Alexandre Oliva <aoliva@redhat.com>
1909
1910 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1911 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1912 cut&paste errors in shifting/truncating numerical operands.
1913 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1914 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1915 (parse_uslo16): Likewise.
1916 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1917 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1918 (parse_s12): Likewise.
1919 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1920 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1921 (parse_uslo16): Likewise.
1922 (parse_uhi16): Parse gothi and gotfuncdeschi.
1923 (parse_d12): Parse got12 and gotfuncdesc12.
1924 (parse_s12): Likewise.
1925
3ab48931
NC		 19262004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1927
1928 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1929 instruction which looks similar to an 'rla' instruction.
a0bd404e 1930
c9e214e5 1931For older changes see ChangeLog-0203
252b5132
RH		 1932\f
1933Local Variables:
2f6d2f85
NC		 1934mode: change-log
1935left-margin: 8
1936fill-column: 74
252b5132
RH		 1937version-control: never
1938End:
GDB Binutils - Deliverables
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