[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2016-05-26  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c (CY): New define.  Document it.
	(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
	CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
	and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
	CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
	CPU_ANY_AVX_FLAGS.
	* i386-init.h: Regenerated.

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/20141
	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
	CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
	* i386-init.h: Regenerated.

2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
	CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
	* i386-init.h: Regenerated.

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	information.
	(print_insn_arc): Set insn_type information.
	* arc-opc.c (C_CC): Add F_CLASS_COND.
	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	(brne, brne_s, jeq_s, jne_s): Likewise.

2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (neg): New instruction variant.

2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>

	* arc-dis.c (find_format, find_format, get_auxreg)
	(print_insn_arc): Changed.
	* arc-ext.h (INSERT_XOP): Likewise.

2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* tic54x-dis.c (sprint_mmr): Adjust.
	* tic54x-opc.c: Likewise.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.

2016-05-19  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c: Formatting.
	(NSISIGNOPT): Define.
	(powerpc_opcodes <subis>): Use NSISIGNOPT.

2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	replacing references to `micromips_ase' throughout.
	(_print_insn_mips): Don't use file-level microMIPS annotation to
	determine the disassembly mode with the symbol table.

2016-05-13  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.

2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>

	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	mips64r6.
	* mips-opc.c (D34): New macro.
	(mips_builtin_opcodes): Define bposge32c for DSPr3.

2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>

	* i386-dis.c (prefix_table): Add RDPID instruction.
	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	(cpu_flags): Add RDPID bitfield.
	* i386-opc.h (enum): Add RDPID element.
	(i386_cpu_flags): Add RDPID field.
	* i386-opc.tbl: Add RDPID instruction.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Regenerate.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.

2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.

2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.

2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-gen.c (VERIFIER): Define.
	* aarch64-opc.c (VERIFIER): Define.
	(verify_ldpsw): Use static linkage.
	* aarch64-opc.h (verify_ldpsw): Remove.
	* aarch64-tbl.h: Use VERIFIER for verifiers.

2016-04-28  Nick Clifton  <nickc@redhat.com>

	PR target/19722
	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/19983
	PR binutils/19984
	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	smaller than address size.

2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* alpha-dis.c: Regenerate.
	* crx-dis.c: Likewise.
	* disassemble.c: Likewise.
	* epiphany-opc.c: Likewise.
	* fr30-opc.c: Likewise.
	* frv-opc.c: Likewise.
	* ip2k-opc.c: Likewise.
	* iq2000-opc.c: Likewise.
	* lm32-opc.c: Likewise.
	* lm32-opinst.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opinst.c: Likewise.
	* mep-opc.c: Likewise.
	* mt-opc.c: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opinst.c: Likewise.
	* tic80-opc.c: Likewise.
	* xc16x-opc.c: Likewise.
	* xstormy16-opc.c: Likewise.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	calcsd, and calcxd instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.

2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.

2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Regenerated with automake 1.11.6.
	* aclocal.m4: Likewise.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.

2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (arc_insn_length): New function.
	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	(find_format): Change insnLen parameter to unsigned.

2016-04-13  Nick Clifton  <nickc@redhat.com>

	PR target/19937
	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	the LD.B and LD.BU instructions.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
19dfcc89 PB	1	2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
	2
	3	* ppc-opc.c (CY): New define. Document it.
	4	(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
	5
f3ad7637 L	6	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	7
	8	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
	9	CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
	10	and CPU_AVX512VBMI_FLAGS. Add CpuAVX512DQ, CpuAVX512BW,
	11	CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
	12	CPU_ANY_AVX_FLAGS.
	13	* i386-init.h: Regenerated.
	14
f1360d58 L	15	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	16
	17	PR gas/20141
	18	* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
	19	CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
	20	* i386-init.h: Regenerated.
	21
293f5f65 L	22	2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
	23
	24	* i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
	25	CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
	26	* i386-init.h: Regenerated.
	27
d9eca1df CZ	28	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	29
	30	* arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
	31	information.
	32	(print_insn_arc): Set insn_type information.
	33	* arc-opc.c (C_CC): Add F_CLASS_COND.
	34	* arc-tbl.h (bbit0, bbit1): Update subclass to COND.
	35	(beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
	36	(ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
	37	(breq, breq_s, brge, brhs, brlo, brlt): Likewise.
	38	(brne, brne_s, jeq_s, jne_s): Likewise.
	39
87789e08 CZ	40	2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
	41
	42	* arc-tbl.h (neg): New instruction variant.
	43
c810e0b8 CZ	44	2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
	45
	46	* arc-dis.c (find_format, find_format, get_auxreg)
	47	(print_insn_arc): Changed.
	48	* arc-ext.h (INSERT_XOP): Likewise.
	49
3d207518 TS	50	2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	51
	52	* tic54x-dis.c (sprint_mmr): Adjust.
	53	* tic54x-opc.c: Likewise.
	54
514e58b7 AM	55	2016-05-19 Alan Modra <amodra@gmail.com>
	56
	57	* ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
	58
e43de63c AM	59	2016-05-19 Alan Modra <amodra@gmail.com>
	60
	61	* ppc-opc.c: Formatting.
	62	(NSISIGNOPT): Define.
	63	(powerpc_opcodes <subis>): Use NSISIGNOPT.
	64
1401d2fe MR	65	2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
	66
	67	* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
	68	replacing references to `micromips_ase' throughout.
	69	(_print_insn_mips): Don't use file-level microMIPS annotation to
	70	determine the disassembly mode with the symbol table.
	71
1178da44 PB	72	2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
	73
	74	* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
	75
8f4f9071 MF	76	2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
	77
	78	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	79	mips64r6.
	80	* mips-opc.c (D34): New macro.
	81	(mips_builtin_opcodes): Define bposge32c for DSPr3.
	82
8bc52696 AF	83	2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
	84
	85	* i386-dis.c (prefix_table): Add RDPID instruction.
	86	* i386-gen.c (cpu_flag_init): Add RDPID flag.
	87	(cpu_flags): Add RDPID bitfield.
	88	* i386-opc.h (enum): Add RDPID element.
	89	(i386_cpu_flags): Add RDPID field.
	90	* i386-opc.tbl: Add RDPID instruction.
	91	* i386-init.h: Regenerate.
	92	* i386-tbl.h: Regenerate.
	93
39d911fc TP	94	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	95
	96	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	97	branch type of a symbol.
	98	(print_insn): Likewise.
	99
16a1fa25 TP	100	2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
	101
	102	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	103	Mainline Security Extensions instructions.
	104	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	105	Extensions instructions.
	106	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	107	instructions.
	108	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	109	special registers.
	110
d751b79e JM	111	2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
	112
	113	* sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
	114
945e0f82 CZ	115	2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
	116
	117	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	118	(arcExtMap_genOpcode): Likewise.
	119	* arc-opc.c (arg_32bit_rc): Define new variable.
	120	(arg_32bit_u6): Likewise.
	121	(arg_32bit_limm): Likewise.
	122
20f55f38 SN	123	2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
	124
	125	* aarch64-gen.c (VERIFIER): Define.
	126	* aarch64-opc.c (VERIFIER): Define.
	127	(verify_ldpsw): Use static linkage.
	128	* aarch64-opc.h (verify_ldpsw): Remove.
	129	* aarch64-tbl.h: Use VERIFIER for verifiers.
	130
4bd13cde NC	131	2016-04-28 Nick Clifton <nickc@redhat.com>
	132
	133	PR target/19722
	134	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	135	* aarch64-opc.c (verify_ldpsw): New function.
	136	* aarch64-opc.h (verify_ldpsw): New prototype.
	137	* aarch64-tbl.h: Add initialiser for verifier field.
	138	(LDPSW): Set verifier to verify_ldpsw.
	139
c0f92bf9 L	140	2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
	141
	142	PR binutils/19983
	143	PR binutils/19984
	144	* i386-dis.c (print_insn): Return -1 if size of bfd_vma is
	145	smaller than address size.
	146
e6c7cdec TS	147	2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	148
	149	* alpha-dis.c: Regenerate.
	150	* crx-dis.c: Likewise.
	151	* disassemble.c: Likewise.
	152	* epiphany-opc.c: Likewise.
	153	* fr30-opc.c: Likewise.
	154	* frv-opc.c: Likewise.
	155	* ip2k-opc.c: Likewise.
	156	* iq2000-opc.c: Likewise.
	157	* lm32-opc.c: Likewise.
	158	* lm32-opinst.c: Likewise.
	159	* m32c-opc.c: Likewise.
	160	* m32r-opc.c: Likewise.
	161	* m32r-opinst.c: Likewise.
	162	* mep-opc.c: Likewise.
	163	* mt-opc.c: Likewise.
	164	* or1k-opc.c: Likewise.
	165	* or1k-opinst.c: Likewise.
	166	* tic80-opc.c: Likewise.
	167	* xc16x-opc.c: Likewise.
	168	* xstormy16-opc.c: Likewise.
	169
537aefaf AB	170	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	171
	172	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	173	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
	174	calcsd, and calcxd instructions.
	175	* arc-opc.c (insert_nps_bitop_size): Delete.
	176	(extract_nps_bitop_size): Delete.
	177	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	178	(extract_nps_qcmp_m3): Define.
	179	(extract_nps_qcmp_m2): Define.
	180	(extract_nps_qcmp_m1): Define.
	181	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	182	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	183	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	184	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	185	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	186	NPS_QCMP_M3.
	187
c8f785f2 AB	188	2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
	189
	190	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
	191
6fd8e7c2 L	192	2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
	193
	194	* Makefile.in: Regenerated with automake 1.11.6.
	195	* aclocal.m4: Likewise.
	196
4b0c052e AB	197	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	198
	199	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	200	instructions.
	201	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	202	(extract_nps_cmem_uimm16): New function.
	203	(arc_operands): Add NPS_XLDST_UIMM16 operand.
	204
cb040366 AB	205	2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
	206
	207	* arc-dis.c (arc_insn_length): New function.
	208	(print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
	209	(find_format): Change insnLen parameter to unsigned.
	210
accc0180 NC	211	2016-04-13 Nick Clifton <nickc@redhat.com>
	212
	213	PR target/19937
	214	* v850-opc.c (v850_opcodes): Correct masks for long versions of
	215	the LD.B and LD.BU instructions.
	216
f36e33da CZ	217	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	218
	219	* arc-dis.c (find_format): Check for extension flags.
	220	(print_flags): New function.
	221	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	222	.extAuxRegister.
	223	* arc-ext.c (arcExtMap_coreRegName): Use
	224	LAST_EXTENSION_CORE_REGISTER.
	225	(arcExtMap_coreReadWrite): Likewise.
	226	(dump_ARC_extmap): Update printing.
	227	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	228	(arc_aux_regs): Add cpu field.
	229	* arc-regs.h: Add cpu field, lower case name aux registers.
	230
1c2e355e CZ	231	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	232
	233	* arc-tbl.h: Add rtsc, sleep with no arguments.
	234
b99747ae CZ	235	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	236
	237	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	238	Initialize.
	239	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	240	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	241	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	242	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	243	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	244	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	245	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	246	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	247	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	248	(arc_opcode arc_opcodes): Null terminate the array.
	249	(arc_num_opcodes): Remove.
	250	* arc-ext.h (INSERT_XOP): Define.
	251	(extInstruction_t): Likewise.
	252	(arcExtMap_instName): Delete.
	253	(arcExtMap_insn): New function.
	254	(arcExtMap_genOpcode): Likewise.
	255	* arc-ext.c (ExtInstruction): Remove.
	256	(create_map): Zero initialize instruction fields.
	257	(arcExtMap_instName): Remove.
	258	(arcExtMap_insn): New function.
	259	(dump_ARC_extmap): More info while debuging.
	260	(arcExtMap_genOpcode): New function.
	261	* arc-dis.c (find_format): New function.
	262	(print_insn_arc): Use find_format.
	263	(arc_get_disassembler): Enable dump_ARC_extmap only when
	264	debugging.
	265
92708cec MR	266	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	267
	268	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	269	instruction bits out.
	270
a42a4f84 AB	271	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	272
	273	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	274	* arc-opc.c (arc_flag_operands): Add new flags.
	275	(arc_flag_classes): Add new classes.
	276
1328504b AB	277	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	278
	279	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	280
820f03ff AB	281	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	282
	283	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	284	encode1, rflt, crc16, and crc32 instructions.
	285	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	286	(arc_flag_classes): Add C_NPS_R.
	287	(insert_nps_bitop_size_2b): New function.
	288	(extract_nps_bitop_size_2b): Likewise.
	289	(insert_nps_bitop_uimm8): Likewise.
	290	(extract_nps_bitop_uimm8): Likewise.
	291	(arc_operands): Add new operand entries.
	292
8ddf6b2a CZ	293	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	294
b99747ae CZ	295	* arc-regs.h: Add a new subclass field. Add double assist
	296	accumulator register values.
	297	* arc-tbl.h: Use DPA subclass to mark the double assist
	298	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	299	* arc-opc.c (RSP): Define instead of SP.
	300	(arc_aux_regs): Add the subclass field.
8ddf6b2a	301
589a7d88 JW	302	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	303
	304	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	305
0a191de9	306	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	307
	308	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	309	NPS_R_SRC1.
	310
0a106562 AB	311	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	312
	313	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	314	issues. No functional changes.
	315
bd05ac5f CZ	316	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	317
b99747ae CZ	318	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	319	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	320	(RTT): Remove duplicate.
	321	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	322	(PCT_CONFIG*): Remove.
	323	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	324
9885948f CZ	325	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	326
b99747ae	327	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	328
f2dd8838 CZ	329	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	330
b99747ae CZ	331	* arc-tbl.h (invld07): Remove.
	332	* arc-ext-tbl.h: New file.
	333	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	334	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	335
0d2f91fe JK	336	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	337
	338	Fix -Wstack-usage warnings.
	339	* aarch64-dis.c (print_operands): Substitute size.
	340	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	341
a6b71f42 JM	342	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	343
	344	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	345	to get a proper diagnostic when an invalid ASR register is used.
	346
9780e045 NC	347	2016-03-22 Nick Clifton <nickc@redhat.com>
	348
	349	* configure: Regenerate.
	350
e23e8ebe AB	351	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	352
	353	* arc-nps400-tbl.h: New file.
	354	* arc-opc.c: Add top level comment.
	355	(insert_nps_3bit_dst): New function.
	356	(extract_nps_3bit_dst): New function.
	357	(insert_nps_3bit_src2): New function.
	358	(extract_nps_3bit_src2): New function.
	359	(insert_nps_bitop_size): New function.
	360	(extract_nps_bitop_size): New function.
	361	(arc_flag_operands): Add nps400 entries.
	362	(arc_flag_classes): Add nps400 entries.
	363	(arc_operands): Add nps400 entries.
	364	(arc_opcodes): Add nps400 include.
	365
1ae8ab47 AB	366	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	367
	368	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	369	the new class enum values.
	370
8699fc3e AB	371	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	372
	373	* arc-dis.c (print_insn_arc): Handle nps400.
	374
24740d83 AB	375	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	376
	377	* arc-opc.c (BASE): Delete.
	378
8678914f NC	379	2016-03-18 Nick Clifton <nickc@redhat.com>
	380
	381	PR target/19721
	382	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	383	of MOV insn that aliases an ORR insn.
	384
cc933301 JW	385	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	386
	387	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	388
f86f5863 TS	389	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	390
	391	* mcore-opc.h: Add const qualifiers.
	392	* microblaze-opc.h (struct op_code_struct): Likewise.
	393	* sh-opc.h: Likewise.
	394	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	395	(tic4x_print_op): Likewise.
	396
62de1c63 AM	397	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	398
d11698cd	399	* or1k-desc.h: Regenerate.
62de1c63	400	* fr30-ibld.c: Regenerate.
c697cf0b	401	* rl78-decode.c: Regenerate.
62de1c63	402
020efce5 NC	403	2016-03-01 Nick Clifton <nickc@redhat.com>
	404
	405	PR target/19747
	406	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	407
b0c11777 RL	408	2016-02-24 Renlin Li <renlin.li@arm.com>
	409
	410	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	411	(print_insn_coprocessor): Support fp16 instructions.
	412
3e309328 RL	413	2016-02-24 Renlin Li <renlin.li@arm.com>
	414
	415	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	416	vminnm, vrint(mpna).
	417
8afc7bea RL	418	2016-02-24 Renlin Li <renlin.li@arm.com>
	419
	420	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	421	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	422
4fd7268a L	423	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	424
	425	* i386-dis.c (print_insn): Parenthesize expression to prevent
	426	truncated addresses.
	427	(OP_J): Likewise.
	428
4670103e CZ	429	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	430	Janek van Oirschot <jvanoirs@synopsys.com>
	431
b99747ae CZ	432	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	433	variable.
4670103e	434
c1d9289f NC	435	2016-02-04 Nick Clifton <nickc@redhat.com>
	436
	437	PR target/19561
	438	* msp430-dis.c (print_insn_msp430): Add a special case for
	439	decoding an RRC instruction with the ZC bit set in the extension
	440	word.
	441
a143b004 AB	442	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	443
	444	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	445	* epiphany-ibld.c: Regenerate.
	446	* fr30-ibld.c: Regenerate.
	447	* frv-ibld.c: Regenerate.
	448	* ip2k-ibld.c: Regenerate.
	449	* iq2000-ibld.c: Regenerate.
	450	* lm32-ibld.c: Regenerate.
	451	* m32c-ibld.c: Regenerate.
	452	* m32r-ibld.c: Regenerate.
	453	* mep-ibld.c: Regenerate.
	454	* mt-ibld.c: Regenerate.
	455	* or1k-ibld.c: Regenerate.
	456	* xc16x-ibld.c: Regenerate.
	457	* xstormy16-ibld.c: Regenerate.
	458
b89807c6 AB	459	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	460
	461	* epiphany-dis.c: Regenerated from latest cpu files.
	462
d8c823c8 MM	463	2016-02-01 Michael McConville <mmcco@mykolab.com>
	464
	465	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	466	test bit.
	467
5bc5ae88 RL	468	2016-01-25 Renlin Li <renlin.li@arm.com>
	469
	470	* arm-dis.c (mapping_symbol_for_insn): New function.
	471	(find_ifthen_state): Call mapping_symbol_for_insn().
	472
0bff6e2d MW	473	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	474
	475	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	476	of MSR UAO immediate operand.
	477
100b4f2e MR	478	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	479
	480	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	481	instruction support.
	482
5c14705f AM	483	2016-01-17 Alan Modra <amodra@gmail.com>
	484
	485	* configure: Regenerate.
	486
4d82fe66 NC	487	2016-01-14 Nick Clifton <nickc@redhat.com>
	488
	489	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	490	instructions that can support stack pointer operations.
	491	* rl78-decode.c: Regenerate.
	492	* rl78-dis.c: Fix display of stack pointer in MOVW based
	493	instructions.
	494
651657fa MW	495	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	496
	497	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	498	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	499	erxtatus_el1 and erxaddr_el1.
	500
105bde57 MW	501	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	502
	503	* arm-dis.c (arm_opcodes): Add "esb".
	504	(thumb_opcodes): Likewise.
	505
afa8d405 PB	506	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	507
	508	* ppc-opc.c <xscmpnedp>: Delete.
	509	<xvcmpnedp>: Likewise.
	510	<xvcmpnedp.>: Likewise.
	511	<xvcmpnesp>: Likewise.
	512	<xvcmpnesp.>: Likewise.
	513
83c3256e AS	514	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	515
	516	PR gas/13050
	517	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	518	addition to ISA_A.
	519
6f2750fe AM	520	2016-01-01 Alan Modra <amodra@gmail.com>
	521
	522	Update year range in copyright notice of all files.
	523
3499769a AM	524	For older changes see ChangeLog-2015
	525	\f
	526	Copyright (C) 2016 Free Software Foundation, Inc.
	527
	528	Copying and distribution of this file, with or without modification,
	529	are permitted in any medium without royalty provided the copyright
	530	notice and this notice are preserved.
	531
	532	Local Variables:
	533	mode: change-log
	534	left-margin: 8
	535	fill-column: 74
	536	version-control: never
	537	End: