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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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eebf07fb
NC		 12006-05-30 Nick Clifton <nickc@redhat.com>
2
3 * po/es.po: Updated Spanish translation.
4
a596001e
RS		 52006-05-25 Richard Sandiford <richard@codesourcery.com>
6
7 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
8 and fmovem entries. Put register list entries before immediate
9 mask entries. Use "l" rather than "L" in the fmovem entries.
10 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
11 out from INFO.
12 (m68k_scan_mask): New function, split out from...
13 (print_insn_m68k): ...here. If no architecture has been set,
14 first try printing an m680x0 instruction, then try a Coldfire one.
15
4a4d496a
NC		 162006-05-24 Nick Clifton <nickc@redhat.com>
17
18 * po/ga.po: Updated Irish translation.
19
a854efa3
NC		 202006-05-22 Nick Clifton <nickc@redhat.com>
21
22 * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
23
0bd79061
NC		 242006-05-22 Nick Clifton <nickc@redhat.com>
25
26 * po/nl.po: Updated translation.
27
00988f49
AM		 282006-05-18 Alan Modra <amodra@bigpond.net.au>
29
30 * avr-dis.c: Formatting fix.
31
9b3f89ee
TS		 322006-05-14 Thiemo Seufer <ths@mips.com>
33
34 * mips16-opc.c (I1, I32, I64): New shortcut defines.
35 (mips16_opcodes): Change membership of instructions to their
36 lowest baseline ISA.
37
cb6d3433
L		 382006-05-09 H.J. Lu <hongjiu.lu@intel.com>
39
40 * i386-dis.c (grps): Update sgdt/sidt for 64bit.
41
1f3c39b9
JB		 422006-05-05 Julian Brown <julian@codesourcery.com>
43
44 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
45 vldm/vstm.
46
d43b4baf
TS		 472006-05-05 Thiemo Seufer <ths@mips.com>
48 David Ung <davidu@mips.com>
49
50 * mips-opc.c: Add macro for cache instruction.
51
39a7806d
TS		 522006-05-04 Thiemo Seufer <ths@mips.com>
53 Nigel Stephens <nigel@mips.com>
54 David Ung <davidu@mips.com>
55
56 * mips-dis.c (mips_arch_choices): Add smartmips instruction
57 decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
58 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
59 MIPS64R2.
60 * mips-opc.c: fix random typos in comments.
61 (INSN_SMARTMIPS): New defines.
62 (mips_builtin_opcodes): Add paired single support for MIPS32R2.
63 Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
64 flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
65 FP_S and FP_D flags to denote single and double register
66 accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
67 Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
68 for MIPS32R2. Add SmartMIPS instructions. Add two-argument
69 variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
70 release 2 ISAs.
71 * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
72
104b4fab
TS		 732006-05-03 Thiemo Seufer <ths@mips.com>
74
75 * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
76
022fac6d
TS		 772006-05-02 Thiemo Seufer <ths@mips.com>
78 Nigel Stephens <nigel@mips.com>
79 David Ung <davidu@mips.com>
80
81 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
82 (print_mips16_insn_arg): Force mips16 to odd addresses.
83
9bcd4f99
TS		 842006-04-30 Thiemo Seufer <ths@mips.com>
85 David Ung <davidu@mips.com>
86
87 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
88 "udi0" to "udi15".
89 * mips-dis.c (print_insn_args): Adds udi argument handling.
90
f095b97b
JW		 912006-04-28 James E Wilson <wilson@specifix.com>
92
93 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
94 error message.
95
59c455b3
TS		 962006-04-28 Thiemo Seufer <ths@mips.com>
97 David Ung <davidu@mips.com>
bdb09db1 98 Nigel Stephens <nigel@mips.com>
59c455b3
TS		 99
100 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
101 names.
102
cc0ca239 1032006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 104 Nigel Stephens <nigel@mips.com>
cc0ca239
TS		 105 David Ung <davidu@mips.com>
106
107 * mips-dis.c (print_insn_args): Add mips_opcode argument.
108 (print_insn_mips): Adjust print_insn_args call.
109
0d09bfe6 1102006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 111 Nigel Stephens <nigel@mips.com>
0d09bfe6
TS		 112
113 * mips-dis.c (print_insn_args): Print $fcc only for FP
114 instructions, use $cc elsewise.
115
654c225a 1162006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 117 Nigel Stephens <nigel@mips.com>
654c225a
TS		 118
119 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
120 Map MIPS16 registers to O32 names.
121 (print_mips16_insn_arg): Use mips16_reg_names.
122
0dbde4cf
JB		 1232006-04-26 Julian Brown <julian@codesourcery.com>
124
125 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
126 VMOV.
127
16980d0b
JB		 1282006-04-26 Nathan Sidwell <nathan@codesourcery.com>
129 Julian Brown <julian@codesourcery.com>
130
131 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
132 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
133 Add unified load/store instruction names.
134 (neon_opcode_table): New.
135 (arm_opcodes): Expand meaning of %<bitfield>['`?].
136 (arm_decode_bitfield): New.
137 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
138 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
139 (print_insn_neon): New.
140 (print_insn_arm): Adjust print_insn_coprocessor call. Call
141 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
142 (print_insn_thumb32): Likewise.
143
ec3fcc56
AM		 1442006-04-19 Alan Modra <amodra@bigpond.net.au>
145
146 * Makefile.am: Run "make dep-am".
147 * Makefile.in: Regenerate.
148
241a6c40
AM		 1492006-04-19 Alan Modra <amodra@bigpond.net.au>
150
7c6646cd
AM		 151 * avr-dis.c (avr_operand): Warning fix.
152
241a6c40
AM		 153 * configure: Regenerate.
154
e7403566
DJ		 1552006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
156
157 * po/POTFILES.in: Regenerated.
158
52f16a0e
NC		 1592006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
160
161 PR binutils/2454
162 * avr-dis.c (avr_operand): Arrange for a comment to appear before
163 the symolic form of an address, so that the output of objdump -d
164 can be reassembled.
165
e78efa90
DD		 1662006-04-10 DJ Delorie <dj@redhat.com>
167
168 * m32c-asm.c: Regenerate.
169
108a6f8e
CD		 1702006-04-06 Carlos O'Donell <carlos@codesourcery.com>
171
172 * Makefile.am: Add install-html target.
173 * Makefile.in: Regenerate.
174
a135cb2c
NC		 1752006-04-06 Nick Clifton <nickc@redhat.com>
176
177 * po/vi/po: Updated Vietnamese translation.
178
47426b41
AM		 1792006-03-31 Paul Koning <ni1d@arrl.net>
180
181 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
182
331f1cbe
BS		 1832006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
184
185 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
186 logic to identify halfword shifts.
187
c16d2bf0
PB		 1882006-03-16 Paul Brook <paul@codesourcery.com>
189
190 * arm-dis.c (arm_opcodes): Rename swi to svc.
191 (thumb_opcodes): Ditto.
192
5348b81e
DD		 1932006-03-13 DJ Delorie <dj@redhat.com>
194
5398310a
DD		 195 * m32c-asm.c: Regenerate.
196 * m32c-desc.c: Likewise.
197 * m32c-desc.h: Likewise.
198 * m32c-dis.c: Likewise.
199 * m32c-ibld.c: Likewise.
5348b81e
DD		 200 * m32c-opc.c: Likewise.
201 * m32c-opc.h: Likewise.
202
253d272c
DD		 2032006-03-10 DJ Delorie <dj@redhat.com>
204
205 * m32c-desc.c: Regenerate with mul.l, mulu.l.
206 * m32c-opc.c: Likewise.
207 * m32c-opc.h: Likewise.
208
209
f530741d
NC		 2102006-03-09 Nick Clifton <nickc@redhat.com>
211
212 * po/sv.po: Updated Swedish translation.
213
35c52694
L		 2142006-03-07 H.J. Lu <hongjiu.lu@intel.com>
215
216 PR binutils/2428
217 * i386-dis.c (REP_Fixup): New function.
218 (AL): Remove duplicate.
219 (Xbr): New.
220 (Xvr): Likewise.
221 (Ybr): Likewise.
222 (Yvr): Likewise.
223 (indirDXr): Likewise.
224 (ALr): Likewise.
225 (eAXr): Likewise.
226 (dis386): Updated entries of ins, outs, movs, lods and stos.
227
ed963e2d
NC		 2282006-03-05 Nick Clifton <nickc@redhat.com>
229
230 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
231 signed 32-bit value into an unsigned 32-bit field when the host is
232 a 64-bit machine.
233 * fr30-ibld.c: Regenerate.
234 * frv-ibld.c: Regenerate.
235 * ip2k-ibld.c: Regenerate.
236 * iq2000-asm.c: Regenerate.
237 * iq2000-ibld.c: Regenerate.
238 * m32c-ibld.c: Regenerate.
239 * m32r-ibld.c: Regenerate.
240 * openrisc-ibld.c: Regenerate.
241 * xc16x-ibld.c: Regenerate.
242 * xstormy16-ibld.c: Regenerate.
243
c7d41dc5
NC		 2442006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
245
246 * xc16x-asm.c: Regenerate.
247 * xc16x-dis.c: Regenerate.
c7d41dc5 248
f7d9e5c3
CD		 2492006-02-27 Carlos O'Donell <carlos@codesourcery.com>
250
251 * po/Make-in: Add html target.
252
331d2d0d
L		 2532006-02-27 H.J. Lu <hongjiu.lu@intel.com>
254
255 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
256 Intel Merom New Instructions.
257 (THREE_BYTE_0): Likewise.
258 (THREE_BYTE_1): Likewise.
259 (three_byte_table): Likewise.
260 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
261 THREE_BYTE_1 for entry 0x3a.
262 (twobyte_has_modrm): Updated.
263 (twobyte_uses_SSE_prefix): Likewise.
264 (print_insn): Handle 3-byte opcodes used by Intel Merom New
265 Instructions.
266
ff3f9d5b
DM		 2672006-02-24 David S. Miller <davem@sunset.davemloft.net>
268
269 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
270 (v9_hpriv_reg_names): New table.
271 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
272 New cases '$' and '%' for read/write hyperprivileged register.
273 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
274 window handling and rdhpr/wrhpr instructions.
275
6772dd07
DD		 2762006-02-24 DJ Delorie <dj@redhat.com>
277
278 * m32c-desc.c: Regenerate with linker relaxation attributes.
279 * m32c-desc.h: Likewise.
280 * m32c-dis.c: Likewise.
281 * m32c-opc.c: Likewise.
282
62b3e311
PB		 2832006-02-24 Paul Brook <paul@codesourcery.com>
284
285 * arm-dis.c (arm_opcodes): Add V7 instructions.
286 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
287 (print_arm_address): New function.
288 (print_insn_arm): Use it. Add 'P' and 'U' cases.
289 (psr_name): New function.
290 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
291
59cf82fe
L		 2922006-02-23 H.J. Lu <hongjiu.lu@intel.com>
293
294 * ia64-opc-i.c (bXc): New.
295 (mXc): Likewise.
296 (OpX2TaTbYaXcC): Likewise.
297 (TF). Likewise.
298 (TFCM). Likewise.
299 (ia64_opcodes_i): Add instructions for tf.
300
301 * ia64-opc.h (IMMU5b): New.
302
303 * ia64-asmtab.c: Regenerated.
304
19a7219f
L		 3052006-02-23 H.J. Lu <hongjiu.lu@intel.com>
306
307 * ia64-gen.c: Update copyright years.
308 * ia64-opc-b.c: Likewise.
309
7f3dfb9c
L		 3102006-02-22 H.J. Lu <hongjiu.lu@intel.com>
311
312 * ia64-gen.c (lookup_regindex): Handle ".vm".
313 (print_dependency_table): Handle '\"'.
314
315 * ia64-ic.tbl: Updated from SDM 2.2.
316 * ia64-raw.tbl: Likewise.
317 * ia64-waw.tbl: Likewise.
318 * ia64-asmtab.c: Regenerated.
319
320 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
321
d70c5fc7
NC		 3222006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
323 Anil Paranjape <anilp1@kpitcummins.com>
324 Shilin Shakti <shilins@kpitcummins.com>
325
326 * xc16x-desc.h: New file
327 * xc16x-desc.c: New file
328 * xc16x-opc.h: New file
329 * xc16x-opc.c: New file
330 * xc16x-ibld.c: New file
331 * xc16x-asm.c: New file
332 * xc16x-dis.c: New file
333 * Makefile.am: Entries for xc16x
334 * Makefile.in: Regenerate
335 * cofigure.in: Add xc16x target information.
336 * configure: Regenerate.
337 * disassemble.c: Add xc16x target information.
338
a1cfb73e
L		 3392006-02-11 H.J. Lu <hongjiu.lu@intel.com>
340
341 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
342 moves.
343
6dd5059a
L		 3442006-02-11 H.J. Lu <hongjiu.lu@intel.com>
345
346 * i386-dis.c ('Z'): Add a new macro.
347 (dis386_twobyte): Use "movZ" for control register moves.
348
8536c657
NC		 3492006-02-10 Nick Clifton <nickc@redhat.com>
350
351 * iq2000-asm.c: Regenerate.
352
266abb8f
NS		 3532006-02-07 Nathan Sidwell <nathan@codesourcery.com>
354
355 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
356
f1a64f49
DU		 3572006-01-26 David Ung <davidu@mips.com>
358
359 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
360 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
361 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
362 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
363 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
364
9e919b5f
AM		 3652006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
366
367 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
368 ld_d_r, pref_xd_cb): Use signed char to hold data to be
369 disassembled.
370 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
371 buffer overflows when disassembling instructions like
372 ld (ix+123),0x23
373 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
374 operand, if the offset is negative.
375
c9021189
AM		 3762006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
377
378 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
379 unsigned char to hold data to be disassembled.
380
d99b6465
AS		 3812006-01-17 Andreas Schwab <schwab@suse.de>
382
383 PR binutils/1486
384 * disassemble.c (disassemble_init_for_target): Set
385 disassembler_needs_relocs for bfd_arch_arm.
386
c2fe9327
PB		 3872006-01-16 Paul Brook <paul@codesourcery.com>
388
e88d958a 389 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327
PB		 390 f?add?, and f?sub? instructions.
391
32fba81d
NC		 3922006-01-16 Nick Clifton <nickc@redhat.com>
393
394 * po/zh_CN.po: New Chinese (simplified) translation.
395 * configure.in (ALL_LINGUAS): Add "zh_CH".
396 * configure: Regenerate.
397
1b3a26b5
PB		 3982006-01-05 Paul Brook <paul@codesourcery.com>
399
400 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
401
db313fa6
DD		 4022006-01-06 DJ Delorie <dj@redhat.com>
403
404 * m32c-desc.c: Regenerate.
405 * m32c-opc.c: Regenerate.
406 * m32c-opc.h: Regenerate.
407
54d46aca
DD		 4082006-01-03 DJ Delorie <dj@redhat.com>
409
410 * cgen-ibld.in (extract_normal): Avoid memory range errors.
411 * m32c-ibld.c: Regenerated.
412
e88d958a 413For older changes see ChangeLog-2005
252b5132
RH		 414\f
415Local Variables:
2f6d2f85
NC		 416mode: change-log
417left-margin: 8
418fill-column: 74
252b5132
RH		 419version-control: never
420End:
GDB Binutils - Deliverables
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