[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	bits in opcode.

2010-04-09  Nick Clifton  <nickc@redhat.com>

	* i386-dis.c (print_insn): Remove unused variable op.
	(OP_sI): Remove unused variable mask.

2010-04-07  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>

	* ppc-opc.c (RBOPT): New define.
	("dccci"): Enable for PPCA2.  Make operands optional.
	("iccci"): Likewise.  Do not deprecate for PPC476.

2010-04-02  Masaki Muranaka  <monaka@monami-software.com>

	* cr16-opc.c (cr16_instruction): Fix typo in comment.

2010-03-25  Joseph Myers  <joseph@codesourcery.com>

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.

2010-03-24  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.

2010-03-23  Joseph Myers  <joseph@codesourcery.com>

	* dis-buf.c (buffer_read_memory): Give error for reading just
	before the start of memory.

2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
	    Quentin Neill <quentin.neill@amd.com>

	* i386-dis.c (OP_LWP_I): Removed.
	(reg_table): Do not use OP_LWP_I, use Iq.
	(OP_LWPCB_E): Remove use of names16.
	(OP_LWP_E): Same.
	* i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
	should not set the Vex.length bit.
	* i386-tbl.h: Regenerated.

2010-02-25  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".

2010-02-24  Nick Clifton  <nickc@redhat.com>

	PR binutils/6773
	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	<prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
	(thumb32_opcodes): Likewise.

2010-02-15  Nick Clifton  <nickc@redhat.com>

	* po/vi.po: Updated Vietnamese translation.

2010-02-12  Doug Evans  <dje@sebabeach.org>

	* lm32-opinst.c: Regenerate.

2010-02-11  Doug Evans  <dje@sebabeach.org>

	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	(print_address): Delete CGEN_PRINT_ADDRESS.
	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.

	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2010-02-10  Quentin Neill  <quentin.neill@amd.com>
	    Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	function to handle 5th imm8 operand.
	(PREFIX_VEX_3A48): Added.
	(PREFIX_VEX_3A49): Added.
	(VEX_W_3A48_P_2): Added.
	(VEX_W_3A49_P_2): Added.
	(prefix table): Added entries for PREFIX_VEX_3A48
	and PREFIX_VEX_3A49.
	(vex table): Added entries for VEX_W_3A48_P_2 and
	and VEX_W_3A49_P_2.
	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	for Vec_Imm4 operands.
	* i386-opc.h (enum): Added Vec_Imm4.
	(i386_operand_type): Added vec_imm4.
	* i386-opc.tbl: Add entries for vpermilp[ds].
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.

2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>

	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.

2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>

	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).

2010-02-03  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

2010-02-03  Anthony Green  <green@moxielogic.com>

	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	0x0f, and make 0x00 an illegal instruction.

2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>

	* opcodes/arm-dis.c (struct arm_private_data): New.
	(print_insn_coprocessor, print_insn_arm): Update to use struct
	arm_private_data.
	(is_mapping_symbol, get_map_sym_type): New functions.
	(get_sym_code_type): Check the symbol's section.  Do not check
	mapping symbols.
	(print_insn): Default to disassembling ARM mode code.  Check
	for mapping symbols separately from other symbols.  Use
	struct arm_private_data.

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXVexWdqScalar): New.
	(vex_scalar_w_dq_mode): Likewise.
	(prefix_table): Update entries for PREFIX_VEX_3899,
	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	(OP_EX): Likewise.

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Bad_Opcode): New.
	(bad_opcode): Likewise.
	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	(dis386_twobyte): Likewise.
	(reg_table): Likewise.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(float_reg): Likewise.
	(reg_table): Remove trailing "(bad)" entries.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(get_valid_dis386): Handle bytemode 0.

2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEXScalar): New.

	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	instructions.
	* i386-tbl.h: Regenerated.

2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.

	* i386-opc.tbl: Add xsave64 and xrstor64.
	* i386-tbl.h: Regenerated.

2010-01-20  Nick Clifton  <nickc@redhat.com>

	PR 11170
	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	based post-indexed addressing.

2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	comments.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (names_mm): New.
	(intel_names_mm): Likewise.
	(att_names_mm): Likewise.
	(names_xmm): Likewise.
	(intel_names_xmm): Likewise.
	(att_names_xmm): Likewise.
	(names_ymm): Likewise.
	(intel_names_ymm): Likewise.
	(att_names_ymm): Likewise.
	(print_insn): Set names_mm, names_xmm and names_ymm.
	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	(OP_XMM): Likewise.
	(OP_EM): Likewise.
	(OP_EMC): Likewise.
	(OP_MXC): Likewise.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_VexReg): Likewise.
	(OP_Vex_2src): Likewise.
	(OP_Vex_2src_1): Likewise.
	(OP_Vex_2src_2): Likewise.
	(OP_REG_VexI4): Likewise.

2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Update comments.

2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (rex_original): Removed.
	(ckprefix): Remove rex_original.
	(print_insn): Update comments.

2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* Makefile.in: Regenerate.
	* configure: Regenerate.

2010-01-07  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-06  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	* i386-init.h: Regenerated.

2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>

	* arm-dis.c (print_insn): Fixed search for next symbol and data
	dumping condition, and the initial mapping symbol state.

2010-01-05  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in: #include "cgen/basic-modes.h".
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-04  Nick Clifton  <nickc@redhat.com>

	PR 11123
	* arm-dis.c (print_insn_coprocessor): Initialise value.

2010-01-04  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".

2010-01-02  Doug Evans  <dje@sebabeach.org>

	* cgen-asm.in: Update copyright year.
	* cgen-dis.in: Update copyright year.
	* cgen-ibld.in: Update copyright year.
	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.

For older changes see ChangeLog-2009
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
f07af43e L	1	2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
	2
	3	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	4	bits in opcode.
	5
3d540e93 NC	6	2010-04-09 Nick Clifton <nickc@redhat.com>
	7
	8	* i386-dis.c (print_insn): Remove unused variable op.
	9	(OP_sI): Remove unused variable mask.
	10
397841b5 AM	11	2010-04-07 Alan Modra <amodra@gmail.com>
	12
	13	* configure: Regenerate.
	14
cee62821 PB	15	2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
	16
	17	* ppc-opc.c (RBOPT): New define.
	18	("dccci"): Enable for PPCA2. Make operands optional.
	19	("iccci"): Likewise. Do not deprecate for PPC476.
	20
accf4463 NC	21	2010-04-02 Masaki Muranaka <monaka@monami-software.com>
	22
	23	* cr16-opc.c (cr16_instruction): Fix typo in comment.
	24
40b36596 JM	25	2010-03-25 Joseph Myers <joseph@codesourcery.com>
	26
	27	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	28	* Makefile.in: Regenerate.
	29	* configure.in (bfd_tic6x_arch): New.
	30	* configure: Regenerate.
	31	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	32	(disassembler): Handle TI C6X.
	33	* tic6x-dis.c: New.
	34
1985c81c MF	35	2010-03-24 Mike Frysinger <vapier@gentoo.org>
	36
	37	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
	38
f66187fd JM	39	2010-03-23 Joseph Myers <joseph@codesourcery.com>
	40
	41	* dis-buf.c (buffer_read_memory): Give error for reading just
	42	before the start of memory.
	43
ce7d077e SP	44	2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
	45	Quentin Neill <quentin.neill@amd.com>
	46
	47	* i386-dis.c (OP_LWP_I): Removed.
	48	(reg_table): Do not use OP_LWP_I, use Iq.
	49	(OP_LWPCB_E): Remove use of names16.
	50	(OP_LWP_E): Same.
	51	* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
	52	should not set the Vex.length bit.
	53	* i386-tbl.h: Regenerated.
	54
63d0fa4e AM	55	2010-02-25 Edmar Wienskoski <edmar@freescale.com>
	56
	57	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
	58
c060226a NC	59	2010-02-24 Nick Clifton <nickc@redhat.com>
	60
	61	PR binutils/6773
	62	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	63	<prefix>asx. Replace <prefix>subaddx with <prefix>sax.
	64	(thumb32_opcodes): Likewise.
	65
ab7875de NC	66	2010-02-15 Nick Clifton <nickc@redhat.com>
	67
	68	* po/vi.po: Updated Vietnamese translation.
	69
fee1d3e8 DE	70	2010-02-12 Doug Evans <dje@sebabeach.org>
	71
	72	* lm32-opinst.c: Regenerate.
	73
37ec9240 DE	74	2010-02-11 Doug Evans <dje@sebabeach.org>
37ec9240 DE	75
9468ae89 DE	76	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	77	(print_address): Delete CGEN_PRINT_ADDRESS.
	78	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	79	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	80	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	81	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.
	82
37ec9240 DE	83	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	84	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	85	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	86	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	87	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	88	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	89	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	90	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	91	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	92	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	93	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	94	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
	95
c75ef631 L	96	2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
	97
	98	* i386-dis.c: Update copyright.
	99	* i386-gen.c: Likewise.
	100	* i386-opc.h: Likewise.
	101	* i386-opc.tbl: Likewise.
	102
a683cc34 SP	103	2010-02-10 Quentin Neill <quentin.neill@amd.com>
	104	Sebastian Pop <sebastian.pop@amd.com>
	105
	106	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	107	function to handle 5th imm8 operand.
	108	(PREFIX_VEX_3A48): Added.
	109	(PREFIX_VEX_3A49): Added.
	110	(VEX_W_3A48_P_2): Added.
	111	(VEX_W_3A49_P_2): Added.
	112	(prefix table): Added entries for PREFIX_VEX_3A48
	113	and PREFIX_VEX_3A49.
	114	(vex table): Added entries for VEX_W_3A48_P_2 and
	115	and VEX_W_3A49_P_2.
	116	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	117	for Vec_Imm4 operands.
	118	* i386-opc.h (enum): Added Vec_Imm4.
	119	(i386_operand_type): Added vec_imm4.
	120	* i386-opc.tbl: Add entries for vpermilp[ds].
	121	* i386-init.h: Regenerated.
	122	* i386-tbl.h: Regenerated.
	123
cdc51b07 RS	124	2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
	125
	126	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	127	and "pwr7". Move "a2" into alphabetical order.
	128
ce3d2015 AM	129	2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
	130
	131	* ppc-dis.c (ppc_opts): Add titan entry.
	132	* ppc-opc.c (TITAN, MULHW): Define.
	133	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
	134
68339fdf SP	135	2010-02-03 Quentin Neill <quentin.neill@amd.com>
	136
	137	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	138	to CPU_BDVER1_FLAGS
	139	* i386-init.h: Regenerated.
	140
f3d55a94 AG	141	2010-02-03 Anthony Green <green@moxielogic.com>
	142
	143	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	144	0x0f, and make 0x00 an illegal instruction.
	145
b0e28b39 DJ	146	2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
	147
	148	* opcodes/arm-dis.c (struct arm_private_data): New.
	149	(print_insn_coprocessor, print_insn_arm): Update to use struct
	150	arm_private_data.
	151	(is_mapping_symbol, get_map_sym_type): New functions.
	152	(get_sym_code_type): Check the symbol's section. Do not check
	153	mapping symbols.
	154	(print_insn): Default to disassembling ARM mode code. Check
	155	for mapping symbols separately from other symbols. Use
	156	struct arm_private_data.
	157
1c480963 L	158	2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
	159
	160	* i386-dis.c (EXVexWdqScalar): New.
	161	(vex_scalar_w_dq_mode): Likewise.
	162	(prefix_table): Update entries for PREFIX_VEX_3899,
	163	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	164	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	165	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	166	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	167	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	168	(OP_EX): Likewise.
	169
539f890d L	170	2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
	171
	172	* i386-dis.c (XMScalar): New.
	173	(EXdScalar): Likewise.
	174	(EXqScalar): Likewise.
	175	(EXqScalarS): Likewise.
	176	(VexScalar): Likewise.
	177	(EXdVexScalarS): Likewise.
	178	(EXqVexScalarS): Likewise.
	179	(XMVexScalar): Likewise.
	180	(scalar_mode): Likewise.
	181	(d_scalar_mode): Likewise.
	182	(d_scalar_swap_mode): Likewise.
	183	(q_scalar_mode): Likewise.
	184	(q_scalar_swap_mode): Likewise.
	185	(vex_scalar_mode): Likewise.
	186	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	187	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	188	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	189	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	190	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	191	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	192	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	193	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	194	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	195	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	196	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	197	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	198	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	199	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	200	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	201	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	202	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	203	VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
	204	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	205	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	206	q_scalar_mode, q_scalar_swap_mode.
	207	(OP_XMM): Handle scalar_mode.
	208	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	209	and q_scalar_swap_mode.
	210	(OP_VEX): Handle vex_scalar_mode.
	211
208b4d78 L	212	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	213
	214	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	215
448b213a L	216	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	217
	218	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
	219
47cf8fa0 L	220	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	221
	222	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	223
592d1631 L	224	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	225
	226	* i386-dis.c (Bad_Opcode): New.
	227	(bad_opcode): Likewise.
	228	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	229	(dis386_twobyte): Likewise.
	230	(reg_table): Likewise.
	231	(prefix_table): Likewise.
	232	(x86_64_table): Likewise.
	233	(vex_len_table): Likewise.
	234	(vex_w_table): Likewise.
	235	(mod_table): Likewise.
	236	(rm_table): Likewise.
	237	(float_reg): Likewise.
	238	(reg_table): Remove trailing "(bad)" entries.
	239	(prefix_table): Likewise.
	240	(x86_64_table): Likewise.
	241	(vex_len_table): Likewise.
	242	(vex_w_table): Likewise.
	243	(mod_table): Likewise.
	244	(rm_table): Likewise.
	245	(get_valid_dis386): Handle bytemode 0.
	246
712366da L	247	2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
	248
	249	* i386-opc.h (VEXScalar): New.
	250
	251	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	252	instructions.
	253	* i386-tbl.h: Regenerated.
	254
706e8205	255	2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729 L	256
	257	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
	258
	259	* i386-opc.tbl: Add xsave64 and xrstor64.
	260	* i386-tbl.h: Regenerated.
	261
99ea83aa NC	262	2010-01-20 Nick Clifton <nickc@redhat.com>
	263
	264	PR 11170
	265	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	266	based post-indexed addressing.
	267
a6461c02 SP	268	2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
	269
	270	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	271	* i386-tbl.h: Regenerated.
	272
a2a7d12c L	273	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	274
	275	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	276	comments.
	277
b9733481 L	278	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	279
	280	* i386-dis.c (names_mm): New.
	281	(intel_names_mm): Likewise.
	282	(att_names_mm): Likewise.
	283	(names_xmm): Likewise.
	284	(intel_names_xmm): Likewise.
	285	(att_names_xmm): Likewise.
	286	(names_ymm): Likewise.
	287	(intel_names_ymm): Likewise.
	288	(att_names_ymm): Likewise.
	289	(print_insn): Set names_mm, names_xmm and names_ymm.
	290	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	291	(OP_XMM): Likewise.
	292	(OP_EM): Likewise.
	293	(OP_EMC): Likewise.
	294	(OP_MXC): Likewise.
	295	(OP_EX): Likewise.
	296	(XMM_Fixup): Likewise.
	297	(OP_VEX): Likewise.
	298	(OP_EX_VexReg): Likewise.
	299	(OP_Vex_2src): Likewise.
	300	(OP_Vex_2src_1): Likewise.
	301	(OP_Vex_2src_2): Likewise.
	302	(OP_REG_VexI4): Likewise.
	303
5e6718e4 L	304	2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
	305
	306	* i386-dis.c (print_insn): Update comments.
	307
d869730d L	308	2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
	309
	310	* i386-dis.c (rex_original): Removed.
	311	(ckprefix): Remove rex_original.
	312	(print_insn): Update comments.
	313
3725885a RW	314	2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
	315
	316	* Makefile.in: Regenerate.
	317	* configure: Regenerate.
	318
b7cd1872 DE	319	2010-01-07 Doug Evans <dje@sebabeach.org>
	320
	321	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	322	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	323	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	324	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	325	* xstormy16-ibld.c: Regenerate.
	326
69dd9865 SP	327	2010-01-06 Quentin Neill <quentin.neill@amd.com>
	328
	329	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	330	* i386-init.h: Regenerated.
	331
e3e535bc NC	332	2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
	333
	334	* arm-dis.c (print_insn): Fixed search for next symbol and data
	335	dumping condition, and the initial mapping symbol state.
	336
fe8afbc4 DE	337	2010-01-05 Doug Evans <dje@sebabeach.org>
	338
	339	* cgen-ibld.in: #include "cgen/basic-modes.h".
	340	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	341	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	342	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	343	* xstormy16-ibld.c: Regenerate.
	344
2edcd244 NC	345	2010-01-04 Nick Clifton <nickc@redhat.com>
	346
	347	PR 11123
	348	* arm-dis.c (print_insn_coprocessor): Initialise value.
	349
0dc93057 AM	350	2010-01-04 Edmar Wienskoski <edmar@freescale.com>
	351
	352	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
	353
05994f45 DE	354	2010-01-02 Doug Evans <dje@sebabeach.org>
	355
	356	* cgen-asm.in: Update copyright year.
	357	* cgen-dis.in: Update copyright year.
	358	* cgen-ibld.in: Update copyright year.
	359	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	360	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	361	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	362	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	363	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	364	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	365	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	366	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	367	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	368	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	369	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	370	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	371	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	372	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	373	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	374	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	375	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	376	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	377	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	378	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	379	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f	380
43ecc30f	381	For older changes see ChangeLog-2009
252b5132 RH	382	\f
252b5132 RH	383	Local Variables:
2f6d2f85 NC	384	mode: change-log
	385	left-margin: 8
	386	fill-column: 74
252b5132 RH	387	version-control: never
252b5132 RH	388	End: